diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-core.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-core.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-core.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-core.c	2012-06-18 11:00:36.124010953 +0200
@@ -0,0 +1,253 @@
+#include "a867_af903x.h"
+#include "a867_aver_version.h"
+
+DEVICE_CONTEXT DC;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+#endif
+
+static int map_gpio_by_id(const struct usb_device_id *id, PDEVICE_CONTEXT pdc)
+{
+	if( id->idProduct == 0xa333 ) {
+		pdc->Map.I2C_SLAVE_ADDR = 0x3A;
+		pdc->Map.RF_SW_HOST = 0; //chip0
+		pdc->Map.GPIO_UHF_en = p_reg_top_gpioh2_en;
+		pdc->Map.GPIO_UHF_on = p_reg_top_gpioh2_on;
+		pdc->Map.GPIO_UHF_o  = p_reg_top_gpioh2_o;
+		pdc->Map.GPIO_VHF_en = p_reg_top_gpioh3_en;
+		pdc->Map.GPIO_VHF_on = p_reg_top_gpioh3_on;
+		pdc->Map.GPIO_VHF_o  = p_reg_top_gpioh3_o;
+		pdc->Map.GPIO_WP_en	= p_reg_top_gpioh7_en;
+		pdc->Map.GPIO_WP_on	= p_reg_top_gpioh7_on;
+		pdc->Map.GPIO_WP_o   = p_reg_top_gpioh7_o;
+		pdc->Map.GPIO_OSC_en = p_reg_top_gpioh6_en;
+		pdc->Map.GPIO_OSC_on = p_reg_top_gpioh6_on;
+		pdc->Map.GPIO_OSC_o  = p_reg_top_gpioh6_o;
+		pdc->Map.GPIO_TUR1_en = p_reg_top_gpioh11_en;
+		pdc->Map.GPIO_TUR1_on = p_reg_top_gpioh11_on;
+		pdc->Map.GPIO_TUR1_o  = p_reg_top_gpioh11_o;
+		pdc->Map.GPIO_TUR2_en = p_reg_top_gpioh12_en;
+		pdc->Map.GPIO_TUR2_on = p_reg_top_gpioh12_on;
+		pdc->Map.GPIO_TUR2_o  = p_reg_top_gpioh12_o;
+		pdc->Map.GPIO_DPWR_en = 0xF000;
+		pdc->Map.GPIO_DPWR_on = 0xF000;
+		pdc->Map.GPIO_DPWR_o	 = 0xF000;
+		pdc->Map.GPIO_DRST_en = 0xF000;
+		pdc->Map.GPIO_DRST_on = 0xF000;
+		pdc->Map.GPIO_DRST_o  = 0xF000;
+		pdc->Map.GPIO_STR_en  = p_reg_top_gpioh8_en;
+		pdc->Map.GPIO_STR_on  = p_reg_top_gpioh8_on;
+		pdc->Map.GPIO_STR_o   = p_reg_top_gpioh8_o;
+		pdc->Map.GPIO_STR_i   = r_reg_top_gpioh8_i;
+	}
+	else if( id->idProduct == 0xa825 ) {
+		pdc->Map.I2C_SLAVE_ADDR = 0x3E;
+		//pdc->Map.RF_SW_HOST = 1; //chip1
+		pdc->Map.RF_SW_HOST = 0; //chip0
+		pdc->Map.GPIO_UHF_en = p_reg_top_gpioh3_en;
+		pdc->Map.GPIO_UHF_on = p_reg_top_gpioh3_on;
+		pdc->Map.GPIO_UHF_o  = p_reg_top_gpioh3_o;
+		pdc->Map.GPIO_VHF_en = p_reg_top_gpioh2_en;	//When UHF, this pin low
+		pdc->Map.GPIO_VHF_on = p_reg_top_gpioh2_on;
+		pdc->Map.GPIO_VHF_o  = p_reg_top_gpioh2_o;
+		pdc->Map.GPIO_WP_en	= p_reg_top_gpioh7_en;
+		pdc->Map.GPIO_WP_on	= p_reg_top_gpioh7_on;
+		pdc->Map.GPIO_WP_o   = p_reg_top_gpioh7_o;
+		pdc->Map.GPIO_OSC_en = p_reg_top_gpioh6_en;	//Use GPIO6 for HW test
+		pdc->Map.GPIO_OSC_on = p_reg_top_gpioh6_on;	//GPIO8 can't use.
+		pdc->Map.GPIO_OSC_o  = p_reg_top_gpioh6_o;
+		pdc->Map.GPIO_TUR1_en = p_reg_top_gpioh11_en;	//Use GPIO11,12 will cause hostB fail.
+		pdc->Map.GPIO_TUR1_on = p_reg_top_gpioh11_on;
+		pdc->Map.GPIO_TUR1_o  = p_reg_top_gpioh11_o;
+		pdc->Map.GPIO_TUR2_en = p_reg_top_gpioh12_en;
+		pdc->Map.GPIO_TUR2_on = p_reg_top_gpioh12_on;
+		pdc->Map.GPIO_TUR2_o  = p_reg_top_gpioh12_o;
+		pdc->Map.GPIO_DPWR_en = p_reg_top_gpioh2_en;
+		pdc->Map.GPIO_DPWR_on = p_reg_top_gpioh2_on;
+		pdc->Map.GPIO_DPWR_o	 = p_reg_top_gpioh2_o;
+		pdc->Map.GPIO_DRST_en = p_reg_top_gpioh5_en;
+		pdc->Map.GPIO_DRST_on = p_reg_top_gpioh5_on;
+		pdc->Map.GPIO_DRST_o  = p_reg_top_gpioh5_o;
+		pdc->Map.GPIO_STR_en  = 0xF000;
+		pdc->Map.GPIO_STR_on  = 0xF000;
+		pdc->Map.GPIO_STR_o   = 0xF000;
+		pdc->Map.GPIO_STR_i   = 0xF000;
+	}
+	else if(id->idProduct == 0xa337 
+		|| id->idProduct == 0xF337
+		|| id->idProduct == 0x0337 
+		|| id->idProduct == 0xa867 
+		|| id->idProduct == 0x0867 
+		|| id->idProduct == 0x1867) {
+		deb_data("GPIO Mapping : A867\n");
+		pdc->Map.I2C_SLAVE_ADDR = 0x3A;
+		pdc->Map.RF_SW_HOST = 0; //chip1
+		pdc->Map.GPIO_UHF_en = 0xF000;
+		pdc->Map.GPIO_UHF_on = 0xF000;
+		pdc->Map.GPIO_UHF_o  = 0xF000;
+		pdc->Map.GPIO_VHF_en = 0xF000;
+		pdc->Map.GPIO_VHF_on = 0xF000;
+		pdc->Map.GPIO_VHF_o  = 0xF000;
+		pdc->Map.GPIO_WP_en	= p_reg_top_gpioh7_en;
+		pdc->Map.GPIO_WP_on	= p_reg_top_gpioh7_on;
+		pdc->Map.GPIO_WP_o   = p_reg_top_gpioh7_o;
+		pdc->Map.GPIO_OSC_en = 0xF000;
+		pdc->Map.GPIO_OSC_on = 0xF000;
+		pdc->Map.GPIO_OSC_o  = 0xF000;
+		pdc->Map.GPIO_TUR1_en = p_reg_top_gpioh6_en;	//Use GPIO11,12 will cause hostB fail.
+		pdc->Map.GPIO_TUR1_on = p_reg_top_gpioh6_on;
+		pdc->Map.GPIO_TUR1_o  = p_reg_top_gpioh6_o;
+		pdc->Map.GPIO_TUR2_en = p_reg_top_gpioh11_en;
+		pdc->Map.GPIO_TUR2_on = p_reg_top_gpioh11_on;
+		pdc->Map.GPIO_TUR2_o  = p_reg_top_gpioh11_o;
+		pdc->Map.GPIO_DPWR_en = 0xF000;
+		pdc->Map.GPIO_DPWR_on = 0xF000;
+		pdc->Map.GPIO_DPWR_o	= 0xF000;
+		pdc->Map.GPIO_DRST_en = 0xF000;
+		pdc->Map.GPIO_DRST_on = 0xF000;
+		pdc->Map.GPIO_DRST_o  = 0xF000;
+		pdc->Map.GPIO_STR_en  = 0xF000;
+		pdc->Map.GPIO_STR_on  = 0xF000;
+		pdc->Map.GPIO_STR_o   = 0xF000;
+		pdc->Map.GPIO_STR_i   = 0xF000;
+		pdc->Map.GPIO_LED_en = p_reg_top_gpioh3_en;	
+		pdc->Map.GPIO_LED_on = p_reg_top_gpioh3_on;
+		pdc->Map.GPIO_LED_o  = p_reg_top_gpioh3_o;
+	}
+	else {
+		pdc->Map.I2C_SLAVE_ADDR = 0x3E;
+		pdc->Map.RF_SW_HOST = 1; //chip1
+		pdc->Map.GPIO_UHF_en = p_reg_top_gpioh3_en;
+		pdc->Map.GPIO_UHF_on = p_reg_top_gpioh3_on;
+		pdc->Map.GPIO_UHF_o  = p_reg_top_gpioh3_o;
+		pdc->Map.GPIO_VHF_en = p_reg_top_gpioh2_en;	//When UHF, this pin low
+		pdc->Map.GPIO_VHF_on = p_reg_top_gpioh2_on;
+		pdc->Map.GPIO_VHF_o  = p_reg_top_gpioh2_o;
+		pdc->Map.GPIO_WP_en	= p_reg_top_gpioh7_en;
+		pdc->Map.GPIO_WP_on	= p_reg_top_gpioh7_on;
+		pdc->Map.GPIO_WP_o   = p_reg_top_gpioh7_o;
+		pdc->Map.GPIO_OSC_en = p_reg_top_gpioh6_en;	//Use GPIO6 for HW test
+		pdc->Map.GPIO_OSC_on = p_reg_top_gpioh6_on;	//GPIO8 can't use.
+		pdc->Map.GPIO_OSC_o  = p_reg_top_gpioh6_o;
+		pdc->Map.GPIO_TUR1_en = p_reg_top_gpioh11_en;	//Use GPIO11,12 will cause hostB fail.
+		pdc->Map.GPIO_TUR1_on = p_reg_top_gpioh11_on;
+		pdc->Map.GPIO_TUR1_o  = p_reg_top_gpioh11_o;
+		pdc->Map.GPIO_TUR2_en = p_reg_top_gpioh12_en;
+		pdc->Map.GPIO_TUR2_on = p_reg_top_gpioh12_on;
+		pdc->Map.GPIO_TUR2_o  = p_reg_top_gpioh12_o;
+		pdc->Map.GPIO_DPWR_en = p_reg_top_gpioh2_en;
+		pdc->Map.GPIO_DPWR_on = p_reg_top_gpioh2_on;
+		pdc->Map.GPIO_DPWR_o	 = p_reg_top_gpioh2_o;
+		pdc->Map.GPIO_DRST_en = p_reg_top_gpioh5_en;
+		pdc->Map.GPIO_DRST_on = p_reg_top_gpioh5_on;
+		pdc->Map.GPIO_DRST_o  = p_reg_top_gpioh5_o;
+		pdc->Map.GPIO_STR_en  = 0xF000;
+		pdc->Map.GPIO_STR_on  = 0xF000;
+		pdc->Map.GPIO_STR_o   = 0xF000;
+		pdc->Map.GPIO_STR_i   = 0xF000;
+	}
+	return 0;
+}
+
+static int af903x_probe(struct usb_interface *intf,
+		const struct usb_device_id *id)
+{
+	int retval = -ENOMEM;
+	int i;
+
+	// init GPIO mappings based on device
+	map_gpio_by_id(id, &DC);
+
+	deb_data("===af903x usb device pluged in!! ===\n");
+	retval = Device_init(interface_to_usbdev(intf),intf,&DC, true);
+	if (retval){
+                if(retval) deb_data("Device_init Fail: 0x%08x\n", retval);
+        }
+	
+	for (i = 0; i < af903x_device_count; i++) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
+		if (dvb_usb_device_init(intf, &af903x_properties[i], THIS_MODULE, NULL, adapter_nr) == 0)
+#else
+		if (dvb_usb_device_init(intf, &af903x_properties[i], THIS_MODULE, NULL) == 0)
+#endif
+			{deb_data("dvb_usb_device_init success!!\n");return 0;}
+	}
+
+	return -ENOMEM;
+}
+
+static int af903x_suspend(struct usb_interface *intf, pm_message_t message)
+{
+	int error;
+	deb_data("Enter %s Function, message=0x%ux\n",__FUNCTION__, message.event);
+	error = DL_ApCtrl(0);
+	if (error) deb_data("DL_ApCtrl error : 0x%x\n", error);
+
+// If selective suspend is not supported, this must be a S3/S4 suspend,
+// in which case we choose to reboot AF903x so it can work after resuming on EeePC.
+#if !defined(CONFIG_USB_SUSPEND)
+	DL_Reboot();	
+#endif
+
+	return 0;
+}
+
+static int af903x_resume(struct usb_interface *intf)
+{
+	int retval = -ENOMEM;
+	deb_data("Enter %s Function\n",__FUNCTION__);
+	
+	retval = DL_ApCtrl(1);
+	if (retval) deb_data("DL_ApCtrl error : 0x%x\n", retval);
+
+	retval = Device_init(interface_to_usbdev(intf),intf,&DC, false);
+        if (retval){
+                if(retval) deb_data("Device_init Fail: 0x%08x\n", retval);
+        }
+
+        return 0;
+}
+
+static struct usb_driver af903x_driver = {
+#if LINUX_VERSION_CODE <=  KERNEL_VERSION(2,6,15)
+	.owner = THIS_MODULE,
+#endif
+	.name       = "dvb-usb-a867",
+	.probe      = af903x_probe,
+	.disconnect = dvb_usb_device_exit,
+	.id_table   = af903x_usb_id_table,
+	.suspend    = af903x_suspend,
+	.resume     = af903x_resume,
+#if LINUX_VERSION_CODE >  KERNEL_VERSION(2,6,22)
+	.reset_resume = af903x_resume,
+#endif
+	.supports_autosuspend = 1,
+};
+
+static int __init af903x_module_init(void)
+{
+	int result;
+
+	printk("AVerMedia A867 driver module V%s loaded.\n", DRIVER_VER);
+
+	if ((result = usb_register(&af903x_driver))) {
+		err("usb_register failed. Error number %d",result);
+		return result;
+	}
+	return 0;
+}
+
+static void __exit af903x_module_exit(void)
+{
+	usb_deregister(&af903x_driver);
+	printk("AVerMedia A867 driver module V%s unloaded.\n", DRIVER_VER);
+}
+
+module_init (af903x_module_init);
+module_exit (af903x_module_exit);
+
+MODULE_AUTHOR("MPD Linux Team");
+MODULE_DESCRIPTION("AVerMedia A867");
+MODULE_VERSION(DRIVER_VER);
+MODULE_LICENSE("GPL");
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-devices.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-devices.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-devices.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-devices.c	2012-06-18 11:00:36.124010953 +0200
@@ -0,0 +1,278 @@
+#include "a867_af903x.h"
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) || ((defined V4L2_VERSION) && (V4L2_VERSION >= 196608))
+#define V4L2_REFACTORED_MFE_CODE
+#endif
+
+int dvb_usb_af903x_hwpid = 1; // enable hw pid filter 
+module_param_named(hwpid,dvb_usb_af903x_hwpid, int, 0644); 
+MODULE_PARM_DESC(debug, "set hw pid filter.(disable=0, enable=1)" DVB_USB_DEBUG_STATUS);
+
+//static u16 gSWPIDTable[32];
+static int gTblUsed = 0;
+
+static int af903x_download_firmware(struct usb_device *udev, const struct firmware *fw)
+{
+	int ret=0;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	
+	return ret;
+}
+
+static int af903x_powerctrl(struct dvb_usb_device *d, int onoff)
+{
+
+	int ret;
+	deb_data("- Enter %s Function - %s\n",__FUNCTION__,onoff?"ON":"OFF");
+
+	// resume device before DL_ApCtrl(on)
+	if( onoff ) {
+		ret = usb_autopm_get_interface(uintfs);
+		if(ret) {
+			deb_data("%s calling usb_autopm_get_interface failed with %d\n", __FUNCTION__, ret);
+			gTblUsed = 0;
+
+			return ret;
+		}
+	}
+
+	ret = DL_ApCtrl(onoff);
+	if(ret) deb_data("	af903x_powerctrl Fail: 0x%04X\n", ret);
+
+	//suspend device after DL_ApCtrl(off)
+	if( !onoff ) {
+		usb_autopm_put_interface(uintfs);	
+	}
+
+	deb_data("- Exit %s Function - %s, ret=%d\n",__FUNCTION__,onoff?"ON":"OFF", ret);
+	return ret;
+}
+
+static int af903x_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props,
+			struct dvb_usb_device_description **desc, int *cold)
+{
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	*cold = 0;
+
+	return 0;
+}
+
+static int af903x_frontend_attach(struct dvb_usb_adapter *adap)
+{
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+#ifdef V4L2_REFACTORED_MFE_CODE
+	adap->fe_adap[0].fe = af903x_attach(1);
+
+	return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
+#else
+	adap->fe = af903x_attach(1);
+
+	return adap->fe == NULL ? -ENODEV : 0;
+#endif
+}
+
+static int af903x_tuner_attach(struct dvb_usb_adapter *adap)
+{
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+#ifdef V4L2_REFACTORED_MFE_CODE
+	tuner_attach(adap->fe_adap[0].fe);
+#else
+	tuner_attach(adap->fe);
+#endif
+	return  0;
+}
+
+static int af903x_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
+{
+	deb_data("- Enter %s Function - (%d) streaming state for %d\n",__FUNCTION__,onoff, adap->id);
+	
+
+	return 0;
+}
+
+static int af903x_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)
+{
+    int ret =0;
+    deb_data("%s: onoff:%d\n", __func__, onoff);
+
+    if (!onoff){
+        deb_data("  Reset PID Table\n");
+        DL_ResetPID();
+        PDC->fc[adap->id].ulcPIDs = 0;
+        memset(PDC->fc[adap->id].aulPIDs, 0, sizeof(FILTER_INFO));
+    }
+    PDC->fc[adap->id].bEnPID =  onoff;
+    ret = DL_PIDOnOff(PDC->fc[adap->id].bEnPID);
+
+    deb_data("  set pid onoff ok\n");
+    return ret;
+}
+
+
+static int af903x_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pidnum,
+    int onoff)
+{
+//    if (down_interruptible (&my_sem))
+//            return -ERESTARTSYS;
+
+    int ret = 0;
+    Pid pid;
+    deb_data("- %s: set pid filter, index %d, pid %d, onoff %d.\n",
+    __func__, index, pidnum, onoff);
+
+
+    if (onoff) { //add filter to table
+        PDC->fc[adap->id].aulPIDs[index].filternum = pidnum;
+        if (!PDC->fc[adap->id].aulPIDs[index].onoff ){
+            PDC->fc[adap->id].aulPIDs[index].onoff = true;
+            PDC->fc[adap->id].ulcPIDs ++;
+        }
+    }
+    else{   //del filter from table
+        PDC->fc[adap->id].aulPIDs[index].filternum = 0;
+        if (PDC->fc[adap->id].aulPIDs[index].onoff ){
+            PDC->fc[adap->id].aulPIDs[index].onoff = false;
+            PDC->fc[adap->id].ulcPIDs --;
+        }
+    }
+
+    if (onoff) {
+        /* cannot use it as pid_filter_ctrl since it has to be done
+ *            before setting the first pid */
+        if (adap->feedcount == 1) {
+            deb_data("  first pid set, enable pid table\n");
+
+            pid.sectionType = SectionType_TABLE;
+            pid.table = 0x00;
+            pid.duration = 0xFF;
+
+            ret = af903x_pid_filter_ctrl(adap, onoff);
+            if (ret)
+                return ret;
+        }
+        pid.value = (Word)pidnum;
+        ret = DL_AddPID(index, pid);
+        if (ret)
+            return ret;
+
+    }
+    else{
+
+        pid.value = (Word)pidnum;
+        ret = DL_RemovePID(index, pid);
+        if (ret)
+            return ret;
+
+        if (adap->feedcount == 0) {
+            deb_data("  last pid unset, disable pid table\n");
+            ret = af903x_pid_filter_ctrl(adap, onoff);
+            if (ret)
+                return ret;
+        }
+
+    }
+
+    deb_data("  set pid ok, total pid num :%d\n", PDC->fc[adap->id].ulcPIDs);
+
+	msleep(100);
+	
+//    up(&my_sem);
+    return 0;
+}
+
+
+struct usb_device_id af903x_usb_id_table[] = {
+		{ USB_DEVICE(0x07ca,0xa333) },
+		{ USB_DEVICE(0x07ca,0xb867) },
+		{ USB_DEVICE(0x07ca,0x1867) },
+		{ USB_DEVICE(0x07ca,0x0337) },
+		{ USB_DEVICE(0x07ca,0xa867) },
+		{ USB_DEVICE(0x07ca,0x0867) },
+		{ USB_DEVICE(0x07ca,0xF337) },
+		{ USB_DEVICE(0x07ca,0x3867) },
+#if SUPPORT_AF903X_EVB 
+		{ USB_DEVICE(0x15A4,0x1000) },
+		{ USB_DEVICE(0x15A4,0x1001) },
+		{ USB_DEVICE(0x15A4,0x1002) },
+		{ USB_DEVICE(0x15A4,0x1003) },
+		{ USB_DEVICE(0x15A4,0x9035) },
+#endif //SUPPORT_AF903X_EVB
+		{ 0 }		/* Terminating entry */
+};
+MODULE_DEVICE_TABLE(usb, af903x_usb_id_table);
+
+struct dvb_usb_device_properties af903x_properties[] = {
+	{
+		.usb_ctrl          = DEVICE_SPECIFIC,
+		.download_firmware = af903x_download_firmware,
+		.no_reconnect      = 1,
+		.power_ctrl		   = af903x_powerctrl,
+		.identify_state    = af903x_identify_state,
+		
+		.num_adapters = 1,
+		.adapter = {
+			{
+#ifdef V4L2_REFACTORED_MFE_CODE
+				.num_frontends = 1,
+				.fe = {{
+#endif
+#if ENABLE_HW_PID
+					.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
+#else
+					.caps = DVB_USB_ADAP_HAS_PID_FILTER,
+#endif
+					.pid_filter_count = 32,
+					.frontend_attach  = af903x_frontend_attach,
+					.tuner_attach     = af903x_tuner_attach,
+					.streaming_ctrl   = af903x_streaming_ctrl,
+					.pid_filter_ctrl  = af903x_pid_filter_ctrl,
+					.pid_filter		  = af903x_pid_filter,
+
+					.stream = { 
+					.type = USB_BULK,
+					.count = 10,
+					.endpoint = 0x84,
+					.u = {
+						.bulk = {
+							.buffersize = (188 * TS_PACKET_COUNT),
+							}
+						}
+					}
+#ifdef V4L2_REFACTORED_MFE_CODE
+		    }},
+#endif
+			},
+		},
+#if 0
+		.num_device_descs = 1,
+#else
+		.num_device_descs = 2,
+#endif
+		.devices = {
+			{   "AVerMedia A333 DVB-T Recevier",
+				{ &af903x_usb_id_table[0]
+				 ,&af903x_usb_id_table[1]
+#if SUPPORT_AF903X_EVB 
+				 ,&af903x_usb_id_table[7]
+				 ,&af903x_usb_id_table[8]
+#endif //SUPPORT_AF903X_EVB
+				},
+
+				{ NULL },
+			},
+			{   "AVerMedia A867 DVB-T Recevier",  
+				{ &af903x_usb_id_table[2]
+				 ,&af903x_usb_id_table[3]
+				 ,&af903x_usb_id_table[4]
+				 ,&af903x_usb_id_table[5]
+				 ,&af903x_usb_id_table[6]
+				 ,&af903x_usb_id_table[7]
+				},
+
+				{ NULL },
+			}
+		}
+	}
+};
+
+int af903x_device_count = ARRAY_SIZE(af903x_properties);
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-drv.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-drv.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-drv.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-drv.c	2012-06-18 11:00:36.124010953 +0200
@@ -0,0 +1,1238 @@
+#include "a867_af903x.h"
+//#include "a867_firmware.h"
+#include "a867_ofdm.h"
+
+#define true 1
+#define false 0
+
+#define FW_VER         0x08060000
+int dvb_usb_af903x_debug = 0; // disable all level by default
+module_param_named(debug,dvb_usb_af903x_debug, int, 0644);
+MODULE_PARM_DESC(debug, "set debugging level (info=1, deb_fw=2, deb_fwdata=4, deb_data=8 (or-able)), default=0");
+
+int dvb_usb_af903x_snrdb = 0; // output SNR 16bit format
+module_param_named(snrdb,dvb_usb_af903x_snrdb, int, 0644);
+MODULE_PARM_DESC(snrdb, "set SNR format (16bit=0, dB decibel=1), default=0");
+
+struct usb_device *udevs = NULL;
+struct usb_interface *uintfs = NULL;
+PDEVICE_CONTEXT PDC;
+
+  
+//************** DRV_ *************//
+
+static DWORD DRV_ResetPID(
+    IN	void*	handle,
+    IN	BYTE	ucSlaveDemod)
+{
+	DWORD dwError = Error_NO_ERROR;
+    PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+          
+    //Clear pidTable
+    dwError = Demodulator_resetPid ((Demodulator*) &pdc->Demodulator, ucSlaveDemod);
+
+	return dwError;
+}
+
+static DWORD DRV_PIDOnOff(
+	void	*handle, 
+	BYTE	ucSlaveDemod,
+	DWORD	dwOnOff)
+{
+	DWORD dwError = Error_NO_ERROR;
+	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+	if(dwOnOff)
+	{
+        dwError = Demodulator_controlPidFilter ((Demodulator*) &pdc->Demodulator, ucSlaveDemod, 1);
+	}
+	else
+	{
+        dwError = Demodulator_controlPidFilter ((Demodulator*) &pdc->Demodulator, ucSlaveDemod, 0);
+	}
+
+	return dwError;
+}
+
+static DWORD DRV_AddPID(
+	void	*handle,
+	BYTE	ucSlaveDemod,
+	DWORD	index,
+	Pid		pid)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+    PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+          
+    dwError = Demodulator_addPidToFilter ((Demodulator*) &pdc->Demodulator, ucSlaveDemod,index, pid);
+
+	return dwError;
+}
+
+DWORD DRV_RemovePID(
+    IN  void*   handle,
+    IN  BYTE    ucSlaveDemod,
+    IN  Byte    index,
+    IN  Pid     pid
+)
+{
+//    deb_data("- Enter %s Function - , index:%d, pid:%x \n",__FUNCTION__, index, pid.value);
+
+    DWORD   dwError = Error_NO_ERROR;
+
+    PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+    dwError = Demodulator_removePidAt ((Demodulator*) &pdc->Demodulator, ucSlaveDemod,index, pid);
+
+    return(dwError);
+
+}
+
+
+
+static DWORD DRV_IrTblDownload(IN      void * handle)
+{
+        DWORD dwError = Error_NO_ERROR;
+        PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+        struct file *filp;
+        unsigned char b_buf[512] ;
+        int i, fileSize;
+        mm_segment_t oldfs;
+
+        deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+        oldfs=get_fs();
+        set_fs(KERNEL_DS);
+
+        filp=filp_open("/lib/firmware/af35irtbl.bin", O_RDWR,0644);
+        if ( IS_ERR(filp) ) {
+                deb_data("      LoadIrTable : Can't open file\n");goto exit;}
+
+        if ( (filp->f_op) == NULL ) {
+                deb_data("      LoadIrTable : File Operation Method Error!!\n");goto exit;}
+
+        filp->f_pos=0x00;
+        fileSize = filp->f_op->read(filp,b_buf,sizeof(b_buf),&filp->f_pos);
+
+        for(i=0; i<fileSize; i++)
+        {
+              //deb_data("\n Data %d",i); //
+              //deb_data("0x%x",b_buf[i]);//
+              // dwError = Af901xWriteReg(ucDemod2WireAddr, 0, MERC_IR_TABLE_BASE_ADDR + i, b_buf[i]);
+              //if (dwError) goto exit;
+        }
+
+        dwError = Demodulator_loadIrTable((Demodulator*) &pdc->Demodulator, (Word)fileSize, b_buf);
+        if (dwError) {deb_data("Demodulator_loadIrTable fail"); goto exit;}
+
+        filp_close(filp, NULL);
+        set_fs(oldfs);
+
+        return (dwError);
+exit:
+        deb_data("LoadIrTable fail!\n");
+	return dwError;
+
+}
+
+static DWORD  DRV_GetEEPROMConfig2(
+        void *      handle,
+        BYTE       ucSlaveDemod)
+{
+
+	DWORD dwError = Error_NO_ERROR;
+    	tWORD    shift = 0;
+    	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+	BYTE btmp = 0;
+
+	deb_data("- Enter %s Function -",__FUNCTION__);
+	
+    	if(ucSlaveDemod) shift = EEPROM_SHIFT;
+    
+    	dwError = Demodulator_readRegisters((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, EEPROM_TUNERID+shift, 1, &btmp);
+    	if (dwError) goto exit;
+    	deb_data("EEPROM_TUNERID%d  = 0x%02X\n", ucSlaveDemod, btmp);		
+    	PTI.TunerId = btmp;  
+
+exit:
+    
+    return(dwError);     
+}  
+
+static DWORD DRV_SetFreqBw(
+    	void*	handle,      
+     	BYTE 	ucSlaveDemod,
+      	DWORD   dwFreq,      
+      	WORD	ucBw
+)
+{
+	DWORD dwError = Error_NO_ERROR;
+    
+	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+	//Bool bLock = true;
+
+	deb_data("- Enter %s Function -\n ",__FUNCTION__);
+	deb_data("       ucSlaveDemod = %d, Freq= %d, BW=%d\n", ucSlaveDemod, dwFreq, ucBw);
+
+    if (pdc->fc[ucSlaveDemod].bEnPID)
+    {
+		deb_data("		Reset HW PID table\n ");
+        //Disable PID filter
+		Demodulator_writeRegisterBits ((Demodulator*) &pdc->Demodulator, ucSlaveDemod, Processor_OFDM, p_mp2if_pid_en, mp2if_pid_en_pos, mp2if_pid_en_len, 0);
+		
+    }
+	
+    down(&PDC->tunerLock);
+
+    PDC->fc[0].AVerFlags &= ~(0x08);
+    PDC->fc[0].AVerFlags |= 0x04;
+    PTI.bSettingFreq = true; //before acquireChannel, it is ture;  otherwise, it is false
+
+    if(dwFreq) {
+        pdc->fc[ucSlaveDemod].ulDesiredFrequency = dwFreq;
+    }
+    else {
+        dwFreq = pdc->fc[ucSlaveDemod].ulDesiredFrequency;
+    }
+
+    if(ucBw) {
+        pdc->fc[ucSlaveDemod].ucDesiredBandWidth = ucBw*1000;
+	}
+    else {
+        ucBw = pdc->fc[ucSlaveDemod].ucDesiredBandWidth;
+    	}
+
+    deb_data("Real Freq= %d, BW=%d\n", pdc->fc[ucSlaveDemod].ulDesiredFrequency, pdc->fc[ucSlaveDemod].ucDesiredBandWidth);
+           
+
+    if(!PTI.bTunerInited){
+        deb_data("    Skip SetFreq - Tuner is still off!\n");
+        goto exit;
+    }
+	
+    PTI.bTunerOK = false;        
+
+    if (pdc->fc[ucSlaveDemod].ulDesiredFrequency!=0 && pdc->fc[ucSlaveDemod].ucDesiredBandWidth!=0)	
+    {
+	deb_data("AcquireChannel : Real Freq= %d, BW=%d\n", pdc->fc[ucSlaveDemod].ulDesiredFrequency, pdc->fc[ucSlaveDemod].ucDesiredBandWidth);
+	dwError = Demodulator_acquireChannel ((Demodulator*) &pdc->Demodulator, ucSlaveDemod, pdc->fc[ucSlaveDemod].ucDesiredBandWidth, pdc->fc[ucSlaveDemod].ulDesiredFrequency);  
+	//PTI.bSettingFreq = false;
+    	if (dwError) 
+    	{
+        	deb_data("Demod_acquireChannel fail! 0x%08x\n", dwError);
+        	goto exit;
+    	}	
+	else //when success acquireChannel, record currentFreq/currentBW.
+	{
+		pdc->fc[ucSlaveDemod].ulCurrentFrequency = pdc->fc[ucSlaveDemod].ulDesiredFrequency;	
+		pdc->fc[ucSlaveDemod].ucCurrentBandWidth = pdc->fc[ucSlaveDemod].ucDesiredBandWidth;  
+	}
+    }
+    else {
+       	deb_data("Demod_acquireChannel skipped\n");
+    }
+
+    if(pdc->StreamType == StreamType_DVBT_DATAGRAM) {
+        PDC->fc[ucSlaveDemod].OvrFlwChk = CHECK_LOCK_LOOPS ;
+        PDC->fc[ucSlaveDemod].UnLockCount = 0;
+    }
+
+    PTI.bTunerOK = true;
+
+exit:
+
+    PTI.bSettingFreq = false;
+    up(&PDC->tunerLock);
+
+    return(dwError);  
+}
+
+static DWORD DRV_getFirmwareVersionFromFile( 
+	 	Processor	processor, 
+		DWORD* 		version
+)
+{
+    DWORD OFDM_VER1 = DVB_OFDM_VERSION1;
+    DWORD OFDM_VER2 = DVB_OFDM_VERSION2;
+    DWORD OFDM_VER3 = DVB_OFDM_VERSION3;
+    DWORD OFDM_VER4 = DVB_OFDM_VERSION4;
+
+    DWORD LINK_VER1 = DVB_LL_VERSION1;
+    DWORD LINK_VER2 = DVB_LL_VERSION2;
+    DWORD LINK_VER3 = DVB_LL_VERSION3;    
+    DWORD LINK_VER4 = DVB_LL_VERSION4;    
+
+    if(processor == Processor_OFDM) {
+        *version = (DWORD)( (OFDM_VER1 << 24) + (OFDM_VER2 << 16) + (OFDM_VER3 << 8) + OFDM_VER4);
+    }
+    else { //LINK
+        *version = (DWORD)( (LINK_VER1 << 24) + (LINK_VER2 << 16) + (LINK_VER3 << 8) + LINK_VER4);    
+    }
+    
+    return *version;
+}
+
+static DWORD  DRV_Initialize(
+	    void *      handle
+)
+{
+	DWORD error = Error_NO_ERROR;
+	 
+	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+	DWORD fileVersion, cmdVersion = 0; 
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	if(pdc->Demodulator.booted) //from Standard_setBusTuner() > Standard_getFirmwareVersion()
+    	{
+        	//use "#define version" to get fw version (from firmware.h title)
+        	error = DRV_getFirmwareVersionFromFile(Processor_OFDM, &fileVersion);
+
+        	//use "Command_QUERYINFO" to get fw version 
+        	error = Demodulator_getFirmwareVersion((Demodulator*) &pdc->Demodulator, Processor_OFDM, &cmdVersion);
+        	if(error) deb_data("DRV_Initialize : Demodulator_getFirmwareVersion : error = 0x%08x\n", error);
+
+        	if(cmdVersion != fileVersion)
+        	{
+            		deb_data("Reboot: Outside Fw = 0x%X, Inside Fw = 0x%X", fileVersion, cmdVersion);               
+            		error = Demodulator_reboot((Demodulator*) &pdc->Demodulator);
+            		pdc->bBootCode = true;
+            		if(error) 
+            		{
+                		deb_data("Demodulator_reboot : error = 0x%08x\n", error);
+                		return error;
+            		}
+            		else {
+                		return Error_NOT_READY;
+            		}
+        	}
+        	else
+        	{
+            		deb_data("	Fw version is the same!\n");
+  	      		error = Error_NO_ERROR;
+        	}
+	}//pdc->Demodulator.booted
+	
+ReInit:  //Patch for NIM fail or disappear, Maggie   
+    error = Demodulator_initialize ((Demodulator*) &pdc->Demodulator, pdc->Demodulator.chipNumber , 8000, pdc->StreamType, pdc->architecture);    
+    if (error) 
+    { 
+        deb_data("Device initialize fail : 0x%08x\n", error);
+        if( ((error&Error_FIRMWARE_STATUS) && (error&0x10)) && (pdc->Demodulator.chipNumber>1) )
+        {
+            pdc->Demodulator.cmdDescription->sendCommand ((Demodulator*) &pdc->Demodulator, Command_FW_DOWNLOAD_END, 0, Processor_LINK, 0, NULL, 0, NULL);
+
+            deb_data("	Retry to download FW with Single TS\n");
+            pdc->Demodulator.chipNumber = 1;
+            pdc->bDualTs = false;
+            error = Demodulator_writeRegister ((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, 0x417F, 0);
+            goto ReInit;
+       }
+    }
+    else {
+        deb_data("    Device initialize Ok!!\n");
+    }
+
+	error = Demodulator_writeRegisterBits ((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, 
+											p_reg_usb_min_len, reg_usb_min_len_pos, reg_usb_min_len_len, 1);
+
+    Demodulator_getFirmwareVersion ((Demodulator*) &pdc->Demodulator, Processor_OFDM, &cmdVersion);
+    deb_data("    FwVer OFDM = 0x%X, ", cmdVersion);
+    Demodulator_getFirmwareVersion ((Demodulator*) &pdc->Demodulator, Processor_LINK, &cmdVersion);
+    deb_data("FwVer LINK = 0x%X\n", cmdVersion);
+    
+    return error;
+	
+}
+
+static DWORD DRV_InitDevInfo(
+    	void *      handle,
+    	BYTE        ucSlaveDemod
+)
+{
+    DWORD dwError = Error_NO_ERROR;    
+ 
+    PDC->fc[ucSlaveDemod].ulCurrentFrequency = 0;  
+    PDC->fc[ucSlaveDemod].ucCurrentBandWidth = 0;
+
+    PDC->fc[ucSlaveDemod].ulDesiredFrequency = 0;	
+    PDC->fc[ucSlaveDemod].ucDesiredBandWidth = 6000;	
+
+    //For PID Filter Setting
+    //PDC->fc[ucSlaveDemod].ulcPIDs = 0;    
+    PDC->fc[ucSlaveDemod].bEnPID = true;
+    PDC->fc[ucSlaveDemod].bApOn = false;
+    PDC->fc[ucSlaveDemod].bResetTs = false;
+
+    PTI.bTunerOK = false;
+    PTI.bSettingFreq = false;
+
+    return dwError;
+}	
+
+static DWORD DRV_GetEEPROMConfig(    
+	void *      handle)
+{
+	DWORD dwError = Error_NO_ERROR;
+	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+    	BYTE ucSlaveDemod = 0;
+	BYTE btmp = 0;
+
+	deb_data("- Enter %s Function -",__FUNCTION__);	
+   
+	//bIrTblDownload option
+	dwError =   Demodulator_readRegisters((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, EEPROM_IRMODE, 1, &btmp);
+	if (dwError) return(dwError);
+	PDC->bIrTblDownload = btmp ? true:false;
+	deb_data(	"EEPROM_IRMODE = 0x%02X, ", btmp);
+        deb_data("bIrTblDownload %s\n", PDC->bIrTblDownload?"ON":"OFF");
+ 
+    	PDC->bDualTs = false;
+    	PDC->architecture = Architecture_DCA;
+    	PDC->Demodulator.chipNumber = 1;    
+    	PDC->bDCAPIP = false;
+
+
+        dwError = DRV_GetEEPROMConfig2(pdc, ucSlaveDemod);
+	 if (dwError) return(dwError);  
+        dwError = DRV_InitDevInfo(pdc, ucSlaveDemod);
+    
+   	 return(dwError);     
+}   
+
+static DWORD DRV_SetBusTuner(
+	 void * handle, 
+	 Word busId, 
+	 Word tunerId
+)
+{
+	DWORD dwError = Error_NO_ERROR;
+	DWORD 	 version = 0;
+
+	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+	deb_data("- Enter %s Function -",__FUNCTION__);
+	deb_data("busId = 0x%x, tunerId =0x%x\n", busId, tunerId);
+
+	if ((pdc->UsbMode==0x0110) && (busId==Bus_USB)) {
+        busId=Bus_USB11;    
+    }
+    
+    	dwError = Demodulator_setBusTuner ((Demodulator*) &pdc->Demodulator, busId, tunerId);
+	if (dwError) {deb_data("Demodulator_setBusTuner error\n");return dwError;}
+	dwError = Demodulator_getFirmwareVersion ((Demodulator*) &pdc->Demodulator, Processor_LINK, &version);
+    	if (version != 0) {
+        	pdc->Demodulator.booted = True;
+    	} 
+    	else {
+        	pdc->Demodulator.booted = False;
+    	}
+    	return(dwError); 
+}
+
+
+DWORD A333TunerPowerControl(
+	PDEVICE_CONTEXT pdc,	
+	BYTE    ucSlaveDemod,
+	bool        bPowerOn
+)
+{
+
+	DWORD dwError = Error_NO_ERROR;
+
+	if(bPowerOn)
+       	PTI.bTunerInited = true;
+	else
+		PTI.bTunerInited = false;    
+
+    //control oscilator	
+   	dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_OSC_en, 1);
+    dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_OSC_on, 1);
+   	dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_OSC_o, 1); 
+
+    dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR1_en, 1);
+   	dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR1_on, 1);
+    dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR1_o, 1); 
+   	dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR2_en, 1);
+    dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR2_on, 1);
+   	dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR2_o, 1);
+
+    if(bPowerOn) 
+	{
+   		dwError=Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_OSC_o, 1); 
+       	dwError=Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR1_o, 1);
+       	dwError=Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR2_o, 1);
+        if(pdc->bTunerPowerOff == true) 
+   	    {
+       	    dwError = Demodulator_initialize ((Demodulator*) &pdc->Demodulator, pdc->Demodulator.chipNumber, 
+											pdc->Demodulator.bandwidth[0], pdc->StreamType, pdc->architecture);  
+			pdc->bTunerPowerOff = false;
+		}              	        
+		
+    }
+	else 
+	{ // power off
+	
+		if(pdc->architecture == Architecture_PIP)
+		{
+			if(pdc->fc[0].tunerinfo.bTunerInited == 0 && pdc->fc[1].tunerinfo.bTunerInited == 0) 
+           	{                                
+               	if(pdc->bTunerPowerOff == false) 
+               	{
+                   	dwError = Demodulator_finalize((Demodulator*) &pdc->Demodulator);
+					pdc->bTunerPowerOff = true;
+				}
+       	        dwError = Demodulator_writeRegister((Demodulator*)&PDC->Demodulator,0,Processor_LINK,PDC->Map.GPIO_TUR1_o, 0);
+           	    dwError = Demodulator_writeRegister((Demodulator*)&PDC->Demodulator,0,Processor_LINK,PDC->Map.GPIO_TUR2_o, 0);
+   	        	dwError = Demodulator_writeRegister((Demodulator*)&PDC->Demodulator,0,Processor_LINK,PDC->Map.GPIO_OSC_o, 0);
+            }
+        }
+		else 
+		{
+			if(pdc->bTunerPowerOff == false) 
+            {                
+               	dwError = Demodulator_finalize((Demodulator*) &pdc->Demodulator);
+	        	pdc->bTunerPowerOff = true;
+			}      
+
+			dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR1_o, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_TUR2_o, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_OSC_o, 0);
+		}        	
+	}
+
+	return dwError;
+}
+
+DWORD A337TunerPowerControl(
+	PDEVICE_CONTEXT pdc,	
+	BYTE    ucSlaveDemod,
+	bool        bPowerOn
+)
+{
+
+	DWORD dwError = Error_NO_ERROR;
+
+	if(bPowerOn)
+		PTI.bTunerInited = true;
+	else
+		PTI.bTunerInited = false;    
+
+	if(bPowerOn) //tuner on
+	{
+		if(pdc->bTunerPowerOff == true) 
+		{
+			//use variable to control gpio
+
+			// enable tuner power
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_en, 1);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_on, 1);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_en, 1);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_on, 1);
+
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_o, 1); 
+			mdelay(100);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_o, 1);
+			mdelay(100);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_en, 1);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_on, 1);
+
+				
+			// reset tuner
+			deb_data("A337 reset");
+			mdelay(10);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_o, 0); 
+			mdelay(30);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_o, 1);
+
+			mdelay(300);
+			deb_data("pdc->bTunerPowerOff == true\n");
+			dwError = Demodulator_initialize ((Demodulator*) &pdc->Demodulator, pdc->Demodulator.chipNumber , pdc->Demodulator.bandwidth[0], pdc->StreamType, pdc->architecture);  
+			pdc->bTunerPowerOff = false;
+		}              	        
+	}
+	else //tuner off
+	{
+		// Bugfix: wrong level of tuner i2c whiling plugging in device.
+		dwError = Demodulator_finalize((Demodulator*) &pdc->Demodulator);
+		if(pdc->bTunerPowerOff == false) 
+		{                
+			pdc->bTunerPowerOff = true;
+
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_o, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_en, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, p_reg_top_gpioh12_on, 0);
+			mdelay(10);
+
+			// disable tuner power
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_o, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_o, 0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_en,0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR1_on,0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_en,0);
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_LINK, pdc->Map.GPIO_TUR2_on,0);
+		}      
+	}
+
+	return dwError;
+}
+
+
+static DWORD DRV_TunerPowerCtrl(
+    	void *	handle, 
+     	BYTE	ucSlaveDemod,
+     	bool		bPowerOn
+)
+{ 
+    DWORD dwError = Error_NO_ERROR;	
+
+    PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+    deb_data("- Enter %s Function , bPowerOn=%d -\n",__FUNCTION__, bPowerOn);
+
+	deb_data("Detected tuner ID: 0x%x\n", pdc->fc[0].tunerinfo.TunerId);
+
+	switch(PDC->idProduct)
+	{
+	case 0xa337:	//A337
+	case 0x0337:	//A867
+	case 0xa867:	//A867
+    case 0x0867:
+    case 0x1867:
+	case 0xF337:
+		dwError = A337TunerPowerControl(pdc, ucSlaveDemod, bPowerOn);
+		break;
+	case 0xa333:	//A337 & EVB
+	default:	
+		dwError = A333TunerPowerControl(pdc, ucSlaveDemod, bPowerOn);
+	}
+
+	return dwError;
+}
+
+static DWORD DRV_ApCtrl (
+      void *      handle,
+      Byte        ucSlaveDemod,
+      Bool        bOn
+)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+        PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+
+	deb_data("enter DRV_ApCtrl: ucSlaveDemod = %d, bOn = %s\n", ucSlaveDemod, bOn?"ON":"OFF"); 
+
+      //deb_data("enter DRV_ApCtrl: Demod[%d].GraphBuilt = %d", ucSlaveDemod, pdc->fc[ucSlaveDemod].GraphBuilt); 
+	
+   	Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_LED_en, 1); 
+   	Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_LED_on, 1); 
+   	Demodulator_writeRegister((Demodulator*) &PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_LED_o, bOn?1:0); 
+
+
+	dwError = DRV_TunerPowerCtrl(handle, ucSlaveDemod, bOn);
+       	if(dwError) deb_data("DRV_TunerPowerCtrl Fail: 0x%08x\n", dwError); 
+
+	
+    	dwError = Demodulator_controlPowerSaving((Demodulator*) &pdc->Demodulator, ucSlaveDemod, bOn);   
+    	if(dwError) deb_data("DRV_ApCtrl: Demodulator_controlPowerSaving error = 0x%08x\n", dwError);
+	
+    return(dwError);
+}
+
+
+static DWORD DRV_TunerWakeup(
+      void *     handle
+)
+{   
+    	DWORD dwError = Error_NO_ERROR;
+
+    	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT) handle;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	//tuner power on
+	dwError = Demodulator_writeRegisterBits((Demodulator*) &pdc->Demodulator, 0, Processor_LINK,  p_reg_top_gpioh7_o, reg_top_gpioh7_o_pos, reg_top_gpioh7_o_len, 1);	 
+
+    return(dwError);
+
+}
+
+static DWORD DRV_Reboot(
+	void * handle
+)
+{
+    	DWORD dwError = Error_NO_ERROR;
+
+    	PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT) handle;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	dwError = Demodulator_reboot((Demodulator*) &pdc->Demodulator);
+
+	return(dwError);
+}
+//s021+e
+
+static DWORD DRV_IsPsbOverflow(
+	void *	handle,
+	Byte	ucSlaveDemod,
+	Bool	*bPsbOverflow
+)
+{
+	DWORD dwError = Error_NO_ERROR;
+	Byte ucValue;
+        PDEVICE_CONTEXT pdc = (PDEVICE_CONTEXT)handle;
+	Bool PsbOverflow;
+
+	deb_data("enter %s: - \n", __FUNCTION__); 
+
+	if( ucSlaveDemod ) { //13
+		dwError = Demodulator_readRegister((Demodulator*) &pdc->Demodulator, 0, Processor_OFDM, p_reg_sys_buf_overflow, &ucValue);
+		if( dwError ) goto exit;
+
+		PsbOverflow = (ucValue&0x01)? 1:0;
+		if( PsbOverflow ) {
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_OFDM, p_reg_sys_buf_overflow, ucValue&(~0x01));
+			if( dwError ) goto exit;
+		}
+	}
+	else { //15
+		dwError = Demodulator_readRegister((Demodulator*) &pdc->Demodulator, 0, Processor_OFDM, p_mp2if_psb_overflow, &ucValue);
+		if( dwError ) goto exit;
+
+		PsbOverflow = (ucValue&0x01)? 1:0;
+		if( PsbOverflow ) {
+			dwError = Demodulator_writeRegister((Demodulator*) &pdc->Demodulator, 0, Processor_OFDM, p_mp2if_psb_overflow, ucValue&(~0x01));
+			if( dwError ) goto exit;
+		}
+	}
+
+	if( bPsbOverflow ) *bPsbOverflow = PsbOverflow;
+exit:
+	return dwError;
+}
+
+//************** DL_ *************//
+//
+DWORD DL_ResetPID(void)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+    dwError = DRV_ResetPID(PDC, 0);
+
+	return dwError;
+}
+
+DWORD DL_AddPID(BYTE index, Pid pid)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+	dwError = DRV_AddPID(PDC, 0, index, pid);
+	
+	return dwError;
+}
+
+DWORD DL_PIDOnOff(DWORD OnOff)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+	dwError = DRV_PIDOnOff(PDC, 0, OnOff);
+
+	return dwError;
+}
+
+DWORD DL_RemovePID(
+    IN  Byte    index,
+    IN  Pid     pid
+)
+{
+
+    DWORD dwError = Error_NO_ERROR;
+	
+	dwError = DRV_RemovePID(PDC, 0, index, pid);
+
+    return(dwError);
+}
+
+
+DWORD DL_IsPsbOverflow(
+	void *	handle,
+	Byte	ucSlaveDemod,
+	Bool *	bPsbOverflow
+)
+{
+	DWORD dwError = DRV_IsPsbOverflow(handle, ucSlaveDemod, bPsbOverflow);
+	return dwError;
+}
+
+
+DWORD DL_MonitorReception(Bool *lock)
+{
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	Bool bLock = False;
+	ChannelStatistic stat;
+
+	deb_data("- Enter %s Function , OvrFlwChk=%d, UnLockCount=%d-\n",__FUNCTION__,
+			PDC->fc[ucSlaveDemod].OvrFlwChk,
+			PDC->fc[ucSlaveDemod].UnLockCount);
+
+	down(&PDC->tunerLock);
+
+	if( PDC->fc[ucSlaveDemod].ulDesiredFrequency==0 || PDC->fc[ucSlaveDemod].ucDesiredBandWidth==0 ) {
+		if( lock ) *lock = False;
+		deb_data("- %s Function skipping\n",__FUNCTION__);
+		goto exit;
+	}
+
+	// check lock status
+	dwError= Demodulator_isLocked((Demodulator*) &PDC->Demodulator, ucSlaveDemod, &bLock);
+	if( dwError!=Error_NO_ERROR ) {
+		goto exit;
+	}
+
+	// consider as unlock if UBC is not zero
+	dwError = Demodulator_getChannelStatistic((Demodulator*) &PDC->Demodulator, ucSlaveDemod, &stat);
+	if( dwError!=Error_NO_ERROR ) {
+		goto exit;
+	}
+
+//uncomment this because this causes instability in channel scan.
+
+
+	// report lock status
+	if( lock ) *lock = bLock;
+	deb_data("- %s Function, LOCK = %d\n", __FUNCTION__, bLock);
+
+	// stop monitoring
+	if(PDC->fc[ucSlaveDemod].OvrFlwChk<1) {
+		deb_data("- %s Function end of monitor cycle -\n",__FUNCTION__);
+
+		// if lock is lost for a while, try to reacquire channel
+		if( PDC->fc[ucSlaveDemod].UnLockCount >= CHECK_LOCK_LOOPS*2/3) {
+			WORD bw = PDC->fc[ucSlaveDemod].ucDesiredBandWidth;
+			DWORD freq = PDC->fc[ucSlaveDemod].ulDesiredFrequency;
+	
+
+			deb_data("- %s Function need to reacquire channel, freq=%d, bw=%d-\n",__FUNCTION__,
+					freq, bw);
+
+			// reacquire channel
+			// first power off, then power on
+			DRV_ApCtrl (PDC, 0, 0);
+			User_delay(0, 500);
+			DRV_ApCtrl (PDC, 0, 1);
+			User_delay(0, 500);
+
+			// switch to another frequency, say 500MHz
+			deb_data("- %s Function switch to 500MHz first -\n",__FUNCTION__);
+			Demodulator_acquireChannel ((Demodulator*) &PDC->Demodulator, ucSlaveDemod,
+							bw, 500000);
+			User_delay(0, 500);
+			// now change to original frequency
+			deb_data("- %s Function switch to %d KHz later -\n",__FUNCTION__, freq);
+			Demodulator_acquireChannel ((Demodulator*) &PDC->Demodulator, ucSlaveDemod,
+							bw, freq);
+		}	
+
+		// restart monitor cycle
+		PDC->fc[ucSlaveDemod].OvrFlwChk = CHECK_LOCK_LOOPS;
+		PDC->fc[ucSlaveDemod].UnLockCount = 0;
+
+		dwError = Error_NO_ERROR;
+		goto exit;
+	}
+	
+	PDC->fc[ucSlaveDemod].OvrFlwChk--;
+
+	// maintain lock count
+	if( !bLock ) PDC->fc[ucSlaveDemod].UnLockCount ++;
+
+	deb_data("- Exit %s Function -\n",__FUNCTION__);
+
+	// avoid race with setfreq
+exit:
+	up(&PDC->tunerLock);
+	return dwError;
+}
+
+
+DWORD DL_GetLocked(Bool *bLock)
+{
+	DWORD dwError;
+	BYTE    ucSlaveDemod=0;
+
+	down(&PDC->tunerLock);
+
+	if( bLock ) {
+		dwError= Demodulator_isLocked((Demodulator*) &PDC->Demodulator, ucSlaveDemod, bLock);
+	}
+	else {
+		dwError = Error_NULL_PTR;
+	}
+
+	up(&PDC->tunerLock);
+	return dwError;
+}
+
+
+DWORD DL_GetSignalStrength(u16 *strength)
+{
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	Byte 	str;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	 	
+
+	dwError = Demodulator_getSignalStrength((Demodulator*) &PDC->Demodulator, ucSlaveDemod, &str);
+
+	if( strength ) *strength = str;
+
+	return dwError;
+}
+
+DWORD DL_GetSignalQuality(u16 *squality)
+{
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	Byte 	str;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	 	
+
+	dwError = Demodulator_getSignalQuality((Demodulator*) &PDC->Demodulator, ucSlaveDemod, &str);
+
+	if( squality ) *squality = str;
+
+	return dwError;
+}
+
+
+DWORD DL_GetChannelStat(u32 *ber, u32 *berbits, u32 *ubc)
+{
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	ChannelStatistic stat;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	 	
+
+	dwError = Demodulator_getChannelStatistic((Demodulator*) &PDC->Demodulator, ucSlaveDemod, &stat);
+	// ignore error because saved value is returned in stat
+	if( ber ) *ber = stat.postVitErrorCount;
+	if( berbits ) *berbits = stat.postVitBitCount;
+	if( ubc ) *ubc = stat.abortCount;
+
+	return(dwError);
+}
+
+
+static DWORD DL_Initialize(
+	    void *      handle
+)
+{
+    	DWORD dwError = Error_NO_ERROR;  
+    
+     	dwError = DRV_Initialize(handle);   
+
+	return (dwError); 
+    
+}
+
+static DWORD DL_SetBusTuner(
+	 void * handle, 
+	 Word busId, 
+	 Word tunerId
+)
+{
+
+	DWORD dwError = Error_NO_ERROR;
+	
+    	dwError = DRV_SetBusTuner(handle, busId, tunerId);
+
+	return (dwError);
+
+}
+
+static DWORD  DL_GetEEPROMConfig(
+	 void *      handle
+)
+{   
+    DWORD dwError = Error_NO_ERROR;
+
+    dwError = DRV_GetEEPROMConfig(handle);
+
+    return(dwError);
+} 
+
+static DWORD DL_TunerWakeup(
+      void *     handle
+)
+{    
+	DWORD dwError = Error_NO_ERROR;
+
+	 dwError = DRV_TunerWakeup(handle);
+   
+    	return(dwError);
+}
+static DWORD  DL_IrTblDownload(
+      void *     handle
+)
+{
+        DWORD dwError = Error_NO_ERROR;
+
+	dwError = DRV_IrTblDownload(handle);
+
+        return(dwError);
+}
+
+
+DWORD DL_TunerPowerCtrl(u8 bPowerOn)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+	deb_data("enter DL_TunerPowerCtrl:  bOn = %s\n", bPowerOn?"ON":"OFF");
+
+    	dwError = DRV_TunerPowerCtrl(PDC, 0, bPowerOn);
+
+    	return (dwError);
+}
+//EXPORT_SYMBOL(DL_TunerPowerCtrl);
+
+
+DWORD DL_ApCtrl (
+      Bool        bOn
+)
+{
+        DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	//Bool bLock;
+
+	down(&PDC->powerLock);
+
+	deb_data("Enter DL_ApCtrl:  bOn = %s, use_cnt=%d\n", bOn?"ON":"OFF", PDC->power_use_count);
+
+	// implement power management based on reference counting
+	if( bOn ) PDC->power_use_count++;
+	else PDC->power_use_count--;
+	if( PDC->power_use_count < 0 ) PDC->power_use_count = 0;
+
+	if( bOn && PDC->power_use_count==1 ) {
+
+		deb_data("DL_ApCtrl: call DRV_ApCtrl(ON)\n");
+	    	dwError = DRV_ApCtrl (PDC, 0, 1);
+	}
+	else if( !bOn && PDC->power_use_count==0 ) {
+		deb_data("DL_ApCtrl: call DRV_ApCtrl(OFF)\n");
+
+	    	dwError = DRV_ApCtrl (PDC, 0, 0);
+		PDC->fc[ucSlaveDemod].ulDesiredFrequency = 0;
+		PDC->fc[ucSlaveDemod].ucDesiredBandWidth = 0;
+		PDC->fc[ucSlaveDemod].OvrFlwChk = 0;
+	}
+
+	up(&PDC->powerLock);
+
+	deb_data("Exit DL_ApCtrl:  bOn = %s, dwError = %d\n", bOn?"ON":"OFF", dwError);
+    	return(dwError);
+}
+
+// return 1 if the difference between freq1 & freq2 is smaller or equal than t.
+static inline int Is_Within_Tolerance(u32 freq1, u32 freq2, u32 t)
+{
+	u32 diff = (freq1>freq2)? (freq1-freq2) : (freq2-freq1);
+	if( diff<=t ) return 1;
+	else return 0;
+}
+
+
+DWORD DL_Tuner_SetFreq(u32 dwFreq,u8 ucBw)
+{
+
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	if ( (PDC->fc[ucSlaveDemod].ulDesiredFrequency!=dwFreq 
+		&& !Is_Within_Tolerance(PDC->fc[ucSlaveDemod].ulDesiredFrequency, dwFreq, 125) )
+			|| PDC->fc[ucSlaveDemod].ucDesiredBandWidth!=ucBw*1000) 
+	 	dwError = DRV_SetFreqBw(PDC, ucSlaveDemod, dwFreq, ucBw);
+	else
+		deb_data("     the same Frequency & BandWidth\n");
+	 
+    	return(dwError);	
+}
+
+DWORD DL_Tuner_SetBW(u8 ucBw)
+{
+	DWORD dwError = Error_NO_ERROR;
+	BYTE    ucSlaveDemod=0;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	 	
+	if (PDC->fc[ucSlaveDemod].ucDesiredBandWidth!=ucBw*1000)
+	 	dwError =  DRV_SetFreqBw(PDC, ucSlaveDemod, 0, ucBw);
+	else
+		deb_data("     the same BandWidth\n");
+
+	return(dwError);
+}
+
+DWORD DL_ReSetInterval(void)
+{
+         DWORD dwError = Error_NO_ERROR;
+
+
+         return(dwError);
+}
+
+DWORD DL_Reboot(void)
+{
+	DWORD dwError = Error_NO_ERROR;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	 	
+
+	dwError = DRV_Reboot(PDC);
+
+	return(dwError);
+}
+
+
+DWORD Device_init(struct usb_device *udev,struct usb_interface *uintf, PDEVICE_CONTEXT PDCs, Bool bBoot)
+{
+	 DWORD error = Error_NO_ERROR;
+	 BYTE filterIdx=0;
+	 udevs=udev;
+	 uintfs=uintf;
+	 PDC=PDCs;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	//************* Set Device init Info *************//
+	PDC->bEnterSuspend = false;
+    	PDC->bSurpriseRemoval = false;
+    	PDC->bDevNotResp = false;
+    	PDC->bSelectiveSuspend = false; 
+	PDC->bTunerPowerOff = false;
+
+	if (bBoot)
+	{
+		PDC->bSupportSelSuspend = false;
+		PDC->Demodulator.userData = (Handle)PDC;
+		PDC->Demodulator.chipNumber =1;
+		PDC->architecture=Architecture_DCA;
+		PDC->Demodulator.frequency[0] = 666000;
+		PDC->Demodulator.bandwidth[0] = 8000;
+		PDC->bIrTblDownload = false;
+		PDC->fc[0].tunerinfo.TunerId = 0;
+		PDC->fc[1].tunerinfo.TunerId = 0;
+		PDC->bDualTs=false;	
+        	PDC->FilterCnt = 0;
+		PDC->StreamType = StreamType_DVBT_DATAGRAM;
+		PDC->UsbCtrlTimeOut = 1;
+
+		//init_MUTEX(&PDC->powerLock);
+		//init_MUTEX(&PDC->tunerLock);
+		sema_init(&PDC->powerLock, 1);
+		sema_init(&PDC->tunerLock, 1);
+		
+		PDC->power_use_count = 0;
+
+		PDC->idVendor = udev->descriptor.idVendor;
+		PDC->idProduct = udev->descriptor.idProduct;
+
+		PDC->Demodulator.GPIO8Value[0] = 2;
+		PDC->Demodulator.GPIO8Value[1] = 2;
+
+		PDC->fc[0].AVerFlags = 0x00;
+		PDC->fc[1].AVerFlags = 0x00;
+		
+		//init_MUTEX(&PDC->regLock);
+		sema_init(&PDC->regLock, 1);
+	}
+	else {
+        	PDC->UsbCtrlTimeOut = 5;
+    	}//bBoot
+
+#ifdef AFA_USB_DEVICE 	
+	if (bBoot) {
+		//************* Set USB Info *************//
+		PDC->MaxPacketSize = 0x0200; //default USB2.0
+		PDC->UsbMode = (PDC->MaxPacketSize == 0x200)?0x0200:0x0110;  
+		deb_data("USB mode= 0x%x\n", PDC->UsbMode);
+
+		PDC->TsPacketCount = (PDC->UsbMode == 0x200)?TS_PACKET_COUNT_HI:TS_PACKET_COUNT_FU;
+		PDC->TsFrames = (PDC->UsbMode == 0x200)?TS_FRAMES_HI:TS_FRAMES_FU;
+		PDC->TsFrameSize = TS_PACKET_SIZE*PDC->TsPacketCount;
+		PDC->TsFrameSizeDw = PDC->TsFrameSize/4;
+	}
+	PDC->bEP12Error = false;
+    	PDC->bEP45Error = false; 
+    	PDC->ForceWrite = false;    
+    	PDC->ulActiveFilter = 0;
+#else
+    	PDC->bSupportSuspend = false; 
+#endif//AFA_USB_DEVICE
+	
+#ifdef AFA_USB_DEVICE
+	if(bBoot)
+    	{
+		//patch for eeepc
+        	error = DL_SetBusTuner (PDC, Bus_USB, Tuner_Afatech_AF9007);
+        	PDC->UsbCtrlTimeOut = 5;
+        
+        	error = DL_SetBusTuner (PDC, Bus_USB, Tuner_Afatech_AF9007);
+        	if (error)
+        	{
+            		deb_data("First DL_SetBusTuner fail : 0x%08x\n",error );
+            		goto Exit;
+        	}
+
+        	error =DL_GetEEPROMConfig(PDC);
+        	if (error)
+        	{
+            		deb_data("DL_GetEEPROMConfig fail : 0x%08x\n", error);
+            		goto Exit;
+        	}
+	}//bBoot
+	
+	error = DL_SetBusTuner(PDC, Bus_USB, PDC->fc[0].tunerinfo.TunerId);
+    	if (error)
+    	{
+        	deb_data("DL_SetBusTuner fail!\n");
+        	goto Exit;
+    	}
+
+	if(PDC->Demodulator.chipNumber == 1 && PDC->Demodulator.booted) //warm-boot/(S1)
+	{
+		error = DL_TunerWakeup(PDC);
+	}
+	if(error) deb_data("DL_NIMReset or DL_NIMSuspend or DL_TunerWakeup fail!\n"); 
+
+	error = DL_Initialize(PDC);
+    	if (error) 
+    	{
+        	deb_data("DL_Initialize fail! 0x%08x\n", error);
+        	goto Exit;
+    	}
+	
+	if (PDC->bIrTblDownload) 
+    	{
+        	error = DL_IrTblDownload(PDC);
+       	 	if (error) deb_data("DL_IrTblDownload fail");
+    	}
+
+    	//for (filterIdx=0; filterIdx< pdc->Demodulator.chipNumber; filterIdx++) 
+    	//{  
+		
+
+        	if (bBoot)
+        	{
+			//Bool bLock;
+            		error = DRV_ApCtrl(PDC, filterIdx, false);
+            		if (error) deb_data("%d: DRV_ApCtrl Fail!\n", filterIdx);
+        	} 
+
+	deb_data("        %s success!! \n",__FUNCTION__);
+
+Exit:
+#endif //AFA_USB_DEVICE
+
+	return (error);
+}
+//EXPORT_SYMBOL(Device_init);
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-fe.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-fe.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-fe.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-fe.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,936 @@
+#include <linux/sched.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/version.h>
+
+#include "a867_af903x.h"
+#include "dvb_frontend.h"
+#include "a867_standard.h"
+
+#define A333_FREQ_MIN	44250000
+#define A333_FREQ_MAX	867250000
+
+DEFINE_MUTEX(mutex);
+
+static int alwayslock; // default to 0
+module_param(alwayslock, int, 0644);
+MODULE_PARM_DESC(alwayslock, "Whether to always report channel as locked (default:no).");
+
+
+struct af903xm_state {
+	struct dvb_frontend demod;
+#ifdef V4L2_ONLY_DVB_V5
+	uint32_t current_bandwidth_hz;
+#else
+	fe_bandwidth_t current_bandwidth;
+#endif
+	uint32_t current_frequency;
+
+	struct completion thread_exit;
+	int thread_should_stop;
+	atomic_t thread_created;
+
+	u32 ucblocks;
+	u32 ber;
+	u16 strength;
+	
+	int locked;
+};
+
+int test_map_snr(u32 snr_data, u16 *snr, u16 *maxsnr)
+{
+	Dword error = 0;
+	Dword snr_value = 0;
+	Byte constellation = 0;
+	Byte transmission_mode = 0;
+
+	*maxsnr = 0;
+	*snr = 0;
+
+    /** Get constellation type */
+    error = Standard_readRegisterBits ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+										Processor_OFDM, g_reg_tpsd_const, reg_tpsd_const_pos, reg_tpsd_const_len, &constellation);
+    if (error) goto exit;
+
+    /** Get FFT mode */
+    error = Standard_readRegisterBits ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+										Processor_OFDM, g_reg_tpsd_txmod, reg_tpsd_txmod_pos, reg_tpsd_txmod_len, &transmission_mode);
+    if (error) goto exit;
+
+	// Adjust snr data by transmission mode
+	if (transmission_mode == 0)
+		snr_value = snr_data * 4;
+	else if (transmission_mode == 2)	
+		snr_value = snr_data * 2;
+	else
+		snr_value = snr_data;
+
+   if( constellation == 0) //Constellation_QPSK
+   {
+           if(snr_value < 0xB4771)    *snr = 0;
+           else if(snr_value < 0xC1AED)   *snr = 1;
+           else if(snr_value < 0xD0D27)   *snr = 2;
+           else if(snr_value < 0xE4D19)   *snr = 3;
+           else if(snr_value < 0xE5DA8)   *snr = 4;
+           else if(snr_value < 0x107097)   *snr = 5;
+           else if(snr_value < 0x116975)   *snr = 6;
+           else if(snr_value < 0x1252D9)   *snr = 7;
+           else if(snr_value < 0x131FA4)   *snr = 8;
+           else if(snr_value < 0x13D5E1)   *snr = 9;
+           else if(snr_value < 0x148E53)   *snr = 10;
+           else if(snr_value < 0x15358B)   *snr = 11;
+           else if(snr_value < 0x15DD29)   *snr = 12;
+           else if(snr_value < 0x168112)   *snr = 13;
+           else if(snr_value < 0x170B61)   *snr = 14;
+           else if(snr_value < 0x17A532)   *snr = 15;
+           else if(snr_value < 0x180F94)   *snr = 16;
+           else if(snr_value < 0x186ED2)   *snr = 17;
+           else if(snr_value < 0x18B271)   *snr = 18;
+           else if(snr_value < 0x18E118)   *snr = 19;
+           else if(snr_value < 0x18FF4B)   *snr = 20;
+           else if(snr_value < 0x190AF1)   *snr = 21;
+           else if(snr_value < 0x191451)   *snr = 22;
+           else   *snr = 23;
+	   *maxsnr = 23;
+    }
+    else if ( constellation == 1) //Constellation_16QAM
+    {
+        if(snr_value < 0x4F0D5)    *snr = 0;
+           else if(snr_value < 0x5387A)   *snr = 1;
+           else if(snr_value < 0x573A4)   *snr = 2;
+           else if(snr_value < 0x5A99E)   *snr = 3;
+           else if(snr_value < 0x5CC80)   *snr = 4;
+           else if(snr_value < 0x5EB62)   *snr = 5;
+           else if(snr_value < 0x5FECF)   *snr = 6;
+           else if(snr_value < 0x60B80)   *snr = 7;
+           else if(snr_value < 0x62501)   *snr = 8;
+           else if(snr_value < 0x64865)   *snr = 9;
+           else if(snr_value < 0x69604)   *snr = 10;
+           else if(snr_value < 0x6F356)   *snr = 11;
+           else if(snr_value < 0x7706A)   *snr = 12;
+           else if(snr_value < 0x804D3)   *snr = 13;
+           else if(snr_value < 0x89D1A)   *snr = 14;
+           else if(snr_value < 0x93E3D)   *snr = 15;
+           else if(snr_value < 0x9E35D)   *snr = 16;
+           else if(snr_value < 0xA7C3C)   *snr = 17;
+           else if(snr_value < 0xAFAF8)   *snr = 18;
+           else if(snr_value < 0xB719D)   *snr = 19;
+           else if(snr_value < 0xBDA6A)   *snr = 20;
+           else if(snr_value < 0xC0C75)   *snr = 21;
+           else if(snr_value < 0xC3F7D)   *snr = 22;
+           else if(snr_value < 0xC5E62)   *snr = 23;
+           else if(snr_value < 0xC6C31)   *snr = 24;
+           else if(snr_value < 0xC7925)   *snr = 25;
+           else    *snr = 26;
+	   *maxsnr = 26;
+    }
+    else if ( constellation == 2) //Constellation_64QAM
+    {
+        if(snr_value < 0x256D0)    *snr = 0;
+           else if(snr_value < 0x27A65)   *snr = 1;
+           else if(snr_value < 0x29873)   *snr = 2;
+           else if(snr_value < 0x2B7FE)   *snr = 3;
+           else if(snr_value < 0x2CF1E)   *snr = 4;
+           else if(snr_value < 0x2E234)   *snr = 5;
+           else if(snr_value < 0x2F409)   *snr = 6;
+           else if(snr_value < 0x30046)   *snr = 7;
+           else if(snr_value < 0x30844)   *snr = 8;
+           else if(snr_value < 0x30A02)   *snr = 9;
+           else if(snr_value < 0x30CDE)   *snr = 10;
+           else if(snr_value < 0x31031)   *snr = 11;
+           else if(snr_value < 0x3144C)   *snr = 12;
+           else if(snr_value < 0x315DD)   *snr = 13;
+           else if(snr_value < 0x31920)   *snr = 14;
+           else if(snr_value < 0x322D0)   *snr = 15;
+           else if(snr_value < 0x339FC)   *snr = 16;
+           else if(snr_value < 0x364A1)   *snr = 17;
+           else if(snr_value < 0x38BCC)   *snr = 18;
+           else if(snr_value < 0x3C7D3)   *snr = 19;
+           else if(snr_value < 0x408CC)   *snr = 20;
+           else if(snr_value < 0x43BED)   *snr = 21;
+           else if(snr_value < 0x48061)   *snr = 22;
+           else if(snr_value < 0x4BE95)   *snr = 23;
+           else if(snr_value < 0x4FA7D)   *snr = 24;
+           else if(snr_value < 0x52405)   *snr = 25;
+           else if(snr_value < 0x5570D)   *snr = 26;
+           else if(snr_value < 0x59FEB)   *snr = 27;
+           else if(snr_value < 0x5BF38)   *snr = 28;
+           else    *snr = 29;
+	   *maxsnr = 29;
+    }
+	
+	
+exit:
+	
+	deb_data(" %s Function, SNR = %d -\n",__FUNCTION__, *snr);
+	return error;
+}
+
+int test_read_strength_dbm(struct dvb_frontend *demod, u32 *str)
+{
+	
+	Dword dwError = 0;
+	Byte str_dbm = 0;
+
+   // Read StrengthDBM
+    dwError = Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, est_rf_level_dbm, &str_dbm);
+    if(dwError) {
+	    deb_data("%s error, ret=0x%x\n", __FUNCTION__, dwError);
+		*str = 0;	
+		goto exit;
+    }
+ 
+	deb_data(" %s Function, StrengthDbm = %d -\n",__FUNCTION__, str_dbm);
+
+exit:
+	return dwError;
+}
+
+
+int test_read_snr(struct dvb_frontend *demod, u32 *snr_data)
+{
+	Byte check1 = 0x0, check2 = 0x0;
+	Byte base1  = 0x0, base2  = 0x0;
+	Byte snr1   = 0x0, snr2   = 0x0, snr3=0x0;			
+	u16 baseAddr = 0x0;
+
+	*snr_data = 0x000000;
+
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, 0xf21b, &check1);
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, 0xf999, &check2);
+
+	deb_data(" %s Function, check1=0x%x -\n",__FUNCTION__, check1);
+
+	if(check1 != 0x0c || check2 != 0x01)	return 1;
+	
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, 0x418b, &base1);
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, 0x418c, &base2);
+
+	baseAddr = (base1<<8) + base2 + 0x2C;
+
+	deb_data(" %s Function, base1 = 0x%x -\n",__FUNCTION__, base1);
+	deb_data(" %s Function, base2 = 0x%x -\n",__FUNCTION__, base2);
+	deb_data(" %s Function, (base1<<8) + base2 + 0x2c = baseAddr = 0x%x -\n",__FUNCTION__, baseAddr);
+	
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, baseAddr,   &snr1);
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, baseAddr+1, &snr2);
+    Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, baseAddr+2, &snr3);
+
+	*snr_data = (snr3<<16)+(snr2<<8)+(snr1);
+
+	deb_data(" %s Function, snr data = 0x%x -\n",__FUNCTION__, *snr_data);
+
+	return 0;
+
+}
+
+
+
+/* unused
+static int af903x_set_bandwidth(struct dvb_frontend *demod, u8 bw_idx)
+{
+	struct af903xm_state *state = demod->demodulator_priv;
+
+	deb_data("- Enter %s Function - bandwidth= %d \n",__FUNCTION__,bw_idx);
+
+//	state->current_bandwidth = bw_idx;
+
+	DL_Tuner_SetBW(bw_idx);
+
+	return 0;
+}
+*/
+
+static void af903x_set_channel(struct af903x_ofdm_channel *ch)
+{
+	deb_data("- Enter %s Function - RF=%d, BW=%d\n",__FUNCTION__,ch->RF_kHz,ch->Bw);
+
+	DL_Tuner_SetFreq(ch->RF_kHz,ch->Bw);
+
+}
+
+static int af903x_tune(struct dvb_frontend *demod, struct af903x_ofdm_channel *ch)
+{
+	if (ch != NULL)
+		af903x_set_channel(ch);
+
+	return 0;
+}
+
+static int af903x_init(struct dvb_frontend *demod)
+{
+	int ret = 0;
+	struct af903xm_state *state = demod->demodulator_priv;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+ 
+	ret = usb_autopm_get_interface(uintfs);
+	if(ret) {
+		deb_data("%s calling usb_autopm_get_interface failed with %d\n", __FUNCTION__, ret);
+		return ret;
+	}
+
+	ret = DL_ApCtrl(1);
+	if(ret) {
+		deb_data("af903x_init Fail: 0x%04X", ret);
+		return -EIO;
+	}
+
+	// reset statistics
+	state->ber = 0;
+	state->ucblocks = 0;
+	state->strength = 0;
+	state->locked = 1; 
+	
+	// reset values
+	state->current_frequency = 0;
+#ifdef V4L2_ONLY_DVB_V5
+	state->current_bandwidth_hz = 0;
+#else
+	state->current_bandwidth = 0;
+#endif
+
+	af903x_start_monitor_thread(demod);
+
+	deb_data("- Exit %s Function -\n",__FUNCTION__);
+	return 0;
+}
+
+static int af903x_sleep(struct dvb_frontend *demod)
+{
+	int error;
+        deb_data("Enter %s Function\n",__FUNCTION__);
+
+	af903x_stop_monitor_thread(demod);
+
+        error = DL_ApCtrl(0);
+        if (error) {
+		deb_data("%s calling DL_ApCtrl error : 0x%x\n", __FUNCTION__, error);
+		return -EIO;
+	}
+
+	usb_autopm_put_interface(uintfs);	
+
+	deb_data("- Exit %s Function -\n",__FUNCTION__);
+	return 0;
+}
+static int af903x_identify(struct af903xm_state *state)
+{
+	return 0;
+}
+
+#ifdef V4L2_ONLY_DVB_V5
+static int af903x_get_frontend(struct dvb_frontend* fe)
+{
+	struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
+	struct af903xm_state *state = fe->demodulator_priv;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	fep->frequency = state->current_frequency;
+	fep->inversion = INVERSION_AUTO;
+	fep->bandwidth_hz = state->current_bandwidth_hz;
+
+	return 0;
+}
+
+static int af903x_set_frontend(struct dvb_frontend* fe)
+{
+	struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
+	struct af903xm_state *state = fe->demodulator_priv;
+	struct af903x_ofdm_channel ch;
+	u16 bw=0;
+	int ret=0;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+
+	if( fep->frequency < A333_FREQ_MIN || fep->frequency > A333_FREQ_MAX ) {
+		deb_data("- %s freq=%d Hz out of range(%d~%d)-\n",__FUNCTION__, fep->frequency, 
+				A333_FREQ_MIN, A333_FREQ_MAX);
+		// set to zero so we can report unlock to AP, because return -EINVAL apparently 
+		// does not stop AP from continuing tuning.
+		state->current_frequency = 0;
+		return -EINVAL;
+	}
+
+	switch(fep->bandwidth_hz) {
+	case 8000000: bw=8; break;
+	case 7000000: bw=7; break;
+	case 6000000: bw=6; break;
+	default:
+		deb_data("- %s unknown bw value: %d -\n",__FUNCTION__, fep->bandwidth_hz);
+		return -EINVAL;
+	}
+
+
+	ch.RF_kHz           = fep->frequency / 1000;
+	ch.Bw               = bw;
+	deb_data("- %s freq=%d KHz, bw=%d MHz -\n",__FUNCTION__, ch.RF_kHz,  ch.Bw);
+
+	state->current_bandwidth_hz = fep->bandwidth_hz;
+	state->current_frequency = fep->frequency;
+
+	ret = af903x_tune(fe, &ch);
+
+	// start monitor thread if not yet.
+	af903x_start_monitor_thread(fe);
+	
+	return ret;
+}
+#else
+static int af903x_get_frontend(struct dvb_frontend* fe,
+				struct dvb_frontend_parameters *fep)
+{
+	struct af903xm_state *state = fe->demodulator_priv;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	memset(fep, 0, sizeof(*fep));
+	fep->frequency = state->current_frequency;
+	fep->inversion = INVERSION_AUTO;
+	fep->u.ofdm.bandwidth = state->current_bandwidth;
+	return 0;
+}
+
+static int af903x_set_frontend(struct dvb_frontend* fe,
+				struct dvb_frontend_parameters *fep)
+{
+	struct af903xm_state *state = fe->demodulator_priv;
+	struct af903x_ofdm_channel ch;
+	u16 bw=0;
+	int ret=0;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+
+	if( fep->frequency < A333_FREQ_MIN || fep->frequency > A333_FREQ_MAX ) {
+		deb_data("- %s freq=%d Hz out of range(%d~%d)-\n",__FUNCTION__, fep->frequency, 
+				A333_FREQ_MIN, A333_FREQ_MAX);
+		// set to zero so we can report unlock to AP, because return -EINVAL apparently 
+		// does not stop AP from continuing tuning.
+		state->current_frequency = 0;
+		return -EINVAL;
+	}
+
+	switch(fep->u.ofdm.bandwidth) {
+	case BANDWIDTH_8_MHZ: bw=8; break;
+	case BANDWIDTH_7_MHZ: bw=7; break;
+	case BANDWIDTH_6_MHZ: bw=6; break;
+
+	case 6: 
+	//case 7:
+	//case 8:
+		bw = fep->u.ofdm.bandwidth;
+		deb_data("- %s wrong bw value: %d -\n",__FUNCTION__, fep->u.ofdm.bandwidth);
+		break;
+	default:
+
+		deb_data("- %s unknown bw value: %d -\n",__FUNCTION__, fep->u.ofdm.bandwidth);
+		return -EINVAL;
+	}
+
+
+	ch.RF_kHz           = fep->frequency / 1000;
+	ch.Bw               = bw;
+	deb_data("- %s freq=%d KHz, bw=%d MHz -\n",__FUNCTION__, ch.RF_kHz,  ch.Bw);
+
+	state->current_bandwidth = fep->u.ofdm.bandwidth;
+	state->current_frequency = fep->frequency;
+
+	ret = af903x_tune(fe, &ch);
+
+	// start monitor thread if not yet.
+	af903x_start_monitor_thread(fe);
+	
+	return ret;
+}
+#endif
+
+static int af903x_read_status(struct dvb_frontend *fe, fe_status_t *stat)
+{
+	//DWORD dwError;
+	Bool bLock;
+	struct af903xm_state *state = fe->demodulator_priv;
+	//u32	snr_data;
+	//u32 str_dbm_data;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	*stat = 0;
+
+#if !USE_MONITOR_TH	
+	{	
+	unsigned long j = (HZ*500)/1000;
+	set_current_state(TASK_UNINTERRUPTIBLE);
+	schedule_timeout(j);
+	}
+	dwError = DL_GetLocked(&bLock);
+	if( dwError ) {
+		deb_data("- Function %s error=0x%x\n",__FUNCTION__, dwError);	
+		return -EIO;
+	}
+#else
+	if( alwayslock ) {
+		bLock = True;
+	}
+	else {
+		bLock = state->locked;
+	}
+#endif
+	if( bLock ) {
+		*stat |= FE_HAS_SIGNAL;
+		*stat |= FE_HAS_CARRIER;
+		*stat |= FE_HAS_LOCK;
+		*stat |= FE_HAS_VITERBI;
+		*stat |= FE_HAS_SYNC;
+	}
+
+
+	// report unlock if frequency is out of bound
+	if( 0==state->current_frequency ) {
+		*stat = 0;
+	}
+	
+#if ENABLE_TEST_FUNCTION
+	test_read_snr(fe, &snr_data);
+	test_map_snr(snr_data, &snr);
+	test_read_strength_dbm(fe, &str_dbm_data);
+#endif
+
+	deb_data("- Exit %s Function, status=0x%x -\n",__FUNCTION__, *stat);
+	return 0;
+}
+
+static int af903x_read_ubc(struct dvb_frontend *fe, u32* ucblocks)
+{
+	struct af903xm_state *state = fe->demodulator_priv;
+	//DWORD dwError;
+	//Bool bLock;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	
+
+#if !USE_MONITOR_TH
+	DL_GetChannelStat(NULL, NULL, ucblocks);
+
+	dwError = DL_GetLocked(&bLock);
+	// if signal is not locked, fill with 65535 to indicate loss of signal
+	if( dwError || !bLock ) {
+		deb_data("- Function %s lost lock , error=0x%x, bLock=%d -\n",__FUNCTION__, dwError, bLock);	
+		if( ucblocks ) *ucblocks = 65535;
+		return 0;
+	}
+#else
+	if( ucblocks ) *ucblocks = state->ucblocks;
+#endif
+
+	deb_data("- Exit %s Function, ubc=%d -\n",__FUNCTION__, ucblocks? *ucblocks:-1);
+	return 0;
+}
+
+
+static int af903x_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+	struct af903xm_state *state = fe->demodulator_priv;
+	//DWORD dwError;
+	//u32 berbits;
+	//Bool bLock;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	
+
+#if !USE_MONITOR_TH
+	DL_GetChannelStat(ber, &berbits, NULL);
+
+	// if signal is not locked, fill BER with BER total bits
+	dwError = DL_GetLocked(&bLock);
+	if( dwError || !bLock ) {
+		deb_data("- Function %s lost lock , error=0x%x, bLock=%d -\n",__FUNCTION__, dwError, bLock);	
+		if( ber ) *ber = berbits;
+		return 0;
+	}
+#else
+	if( ber ) *ber = state->ber;
+#endif
+	//
+	deb_data("- Exit %s Function , ber=%d-\n",__FUNCTION__, ber? *ber:(-1));
+	return 0;
+}
+
+
+static int af903x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+	DWORD dwError;
+	Bool bLock;
+	Byte value;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	
+
+	dwError = Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, signal_strength, &value);
+	//dwError = DL_GetSignalStrength(strength);
+	if( dwError ) {
+		deb_data("- Function %s error reading signal strength -\n",__FUNCTION__);	
+		*strength = 0;
+		return 1;
+	}
+
+	dwError = DL_GetLocked(&bLock);
+	if( dwError ) {
+		deb_data("- Function %s error reading signal quality : lost lock -\n",__FUNCTION__);	
+		*strength = 0;
+		return 1;
+	}
+	
+	deb_data("- Exit %s Function, signal strength (0-100)=%d -\n",__FUNCTION__, value);	
+
+	// 16 bit output
+	*strength = value * (0xffff / 100);
+
+	return 0;
+}
+
+/*
+static int af903x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+	struct af903xm_state *state = fe->demodulator_priv;
+	//DWORD dwError;
+	// Bool bLock;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	
+
+#if !USE_MONITOR_TH
+	DL_GetSignalStrength(strength);
+
+	dwError = DL_GetLocked(&bLock);
+	if( dwError || !bLock ) {
+		deb_data("- Function %s lost lock , error=0x%x, bLock=%d -\n",__FUNCTION__, dwError, bLock);	
+		if( strength ) *strength = 0;
+		return 0;
+	}
+#else
+	if( strength ) *strength = state->strength;
+#endif
+	
+	deb_data("- Exit %s Function, strength=%d -\n",__FUNCTION__, strength? *strength:-1);	
+	return 0;
+}
+*/
+
+static int af903x_read_snr(struct dvb_frontend* fe, u16 *snr)
+{
+	Byte value_7_0 = 0;
+	Byte value_15_8 = 0;
+	Byte value_23_16 = 0;
+	//Dword addr = 0;
+	Dword dwError = 0;
+	u32 snr_val=0;
+	u16 snr_max=0;
+	u16 snr_16bit = 0;
+
+	*snr = 0;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+
+	dwError = Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, qnt_vbc_err_7_0, &value_7_0);
+	if(dwError)	{
+		deb_data("- Function %s  qnt_vbc_err_7_0 register read fail ! -\n",__FUNCTION__);
+		return 1;
+	}
+
+	dwError = Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, qnt_vbc_err_15_8, &value_15_8);
+	if(dwError)	{
+		deb_data("- Function %s  qnt_vbc_err_15_8 register read fail ! -\n",__FUNCTION__);
+		return 1;
+	}
+
+	dwError = Standard_readRegister ((Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, Processor_OFDM, qnt_vbc_err_23_16, &value_23_16);
+	if(dwError)	{
+		deb_data("- Function %s  qnt_vbc_err_23_16 register read fail ! -\n",__FUNCTION__);
+		return 1;
+	}
+
+	snr_val = (value_23_16 << 16) + (value_15_8 << 8) + value_7_0;
+	deb_data("- Function %s SNR row val 0x%x -\n",__FUNCTION__,snr_val);
+
+	dwError = test_map_snr(snr_val, snr, &snr_max);
+	if(dwError)	{
+		deb_data("- Function %s  map_snr fail ! -\n",__FUNCTION__);
+		*snr = 0;
+		return 1;
+	}
+	snr_16bit = (0xffff / snr_max) * *snr;
+	deb_data("- Exit %s SNR %d dB , %d 16bit -\n",__FUNCTION__,*snr,snr_16bit);
+
+	if (dvb_usb_af903x_snrdb == 0)
+		*snr = snr_16bit;
+
+	return 0;
+
+}
+
+
+
+static void af903x_release(struct dvb_frontend *demod)
+{
+	struct af903xm_state *st = demod->demodulator_priv;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	af903x_stop_monitor_thread(demod);
+	kfree(st);
+}
+
+static struct dvb_frontend_ops af903x_ops = {
+#ifdef V4L2_ONLY_DVB_V5
+	.delsys = { SYS_DVBT },
+#endif
+	.info = {
+		.name = "A867 USB DVB-T",
+#ifndef V4L2_ONLY_DVB_V5
+		.type = FE_OFDM,
+#endif
+		.frequency_min      = A333_FREQ_MIN,
+		.frequency_max      = A333_FREQ_MAX,
+		.frequency_stepsize = 62500,
+		.caps = FE_CAN_INVERSION_AUTO |
+			FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+			FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
+			FE_CAN_TRANSMISSION_MODE_AUTO |
+			FE_CAN_GUARD_INTERVAL_AUTO |
+			FE_CAN_RECOVER |
+			FE_CAN_HIERARCHY_AUTO,
+	},
+
+	.release              = af903x_release,
+
+	.init                 = af903x_init,
+	.sleep                = af903x_sleep,
+
+	.set_frontend         = af903x_set_frontend,
+	.get_frontend         = af903x_get_frontend,
+
+	.read_status          = af903x_read_status,
+	.read_ber             = af903x_read_ber,
+	.read_signal_strength = af903x_read_signal_strength,
+	.read_snr             = af903x_read_snr,
+//	.read_snr             = af903x_read_signal_quality,
+	.read_ucblocks	      = af903x_read_ubc,
+};
+
+static struct dvb_frontend_ops af903x_ops;
+struct dvb_frontend * af903x_attach(u8 tmp)
+{
+	struct dvb_frontend *demod;
+	struct af903xm_state *st;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);	
+	st = kzalloc(sizeof(struct af903xm_state), GFP_KERNEL);
+	if (st == NULL)
+		return NULL;
+
+	demod                   = &st->demod;
+	demod->demodulator_priv = st;
+	memcpy(&st->demod.ops, &af903x_ops, sizeof(struct dvb_frontend_ops));
+	atomic_set(&st->thread_created, 0);
+
+	af903x_identify(st); 
+
+	return demod;
+}
+
+
+static Dword Monitor_GPIO8(void)
+{
+    Dword error = Error_NO_ERROR;
+    Byte PinValue;
+
+    if ( PDC->idProduct!=0xa333 ) {
+	goto exit;
+    }
+
+    if( PDC->fc[0].AVerFlags&0x04 ) {
+	deb_data("%s, skip read GPIO8\n", __FUNCTION__);
+	PDC->fc[0].AVerFlags &= ~(0x04);
+	goto exit;
+    }
+
+    // read GPIO8
+    error = Standard_readRegister ((Demodulator *)&PDC->Demodulator, 
+			PDC->Map.RF_SW_HOST, 
+			Processor_LINK, 
+			PDC->Map.GPIO_STR_i, 
+			&PinValue);
+    if( error ) goto exit;
+
+    if( PDC->Demodulator.GPIO8Value[0] != PinValue ) {
+
+        if( PinValue == 1 ) {
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, 
+			PDC->Map.RF_SW_HOST, 
+			Processor_LINK, 
+			PDC->Map.GPIO_UHF_o, 
+			1);
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, 
+			PDC->Map.RF_SW_HOST, 
+			Processor_LINK, 
+			PDC->Map.GPIO_VHF_o, 
+			1);
+        }
+        else if (PDC->fc[0].ulDesiredFrequency > 300000)
+        {
+	     //UHF
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+					Processor_LINK, PDC->Map.GPIO_UHF_o, 1);
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+					Processor_LINK, PDC->Map.GPIO_VHF_o, 0);
+        }
+        else
+        {
+	    //VHF
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+					Processor_LINK, PDC->Map.GPIO_UHF_o, 0);
+	    error = Standard_writeRegister ( (Demodulator *)&PDC->Demodulator, PDC->Map.RF_SW_HOST, 
+					Processor_LINK, PDC->Map.GPIO_VHF_o, 1);
+        }
+	 PDC->Demodulator.GPIO8Value[0] = PinValue;
+    }
+    else if( PinValue == 0 ) { // pin value remains 0
+	if( PDC->Demodulator.channelStatistic[0].abortCount > 2500  &&
+		(PDC->fc[0].AVerFlags&0x08)==0 ) {
+		// pull high GPIO8
+		PDC->fc[0].AVerFlags |= 0x08; // pull H flag bit 3
+		Demodulator_writeRegister( (Demodulator *)&PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_STR_en, 1);
+		Demodulator_writeRegister( (Demodulator *)&PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_STR_on, 1);
+		Demodulator_writeRegister( (Demodulator *)&PDC->Demodulator, 0, Processor_LINK, PDC->Map.GPIO_STR_o, 1);
+	}
+    }
+    else if( PinValue == 1 ) { // pin value remains 1
+	if( PDC->Demodulator.channelStatistic[0].abortCount < 2500 &&
+		(PDC->fc[0].AVerFlags&0x08)!=0 ) {
+		// after manual tune and result is good
+		PDC->fc[0].AVerFlags &= ~(0x08);
+	}
+    }
+
+exit:
+    return error;
+}
+
+static int af903x_monitor_thread_func(void *data)
+{
+	struct dvb_frontend *demod = data;
+	struct af903xm_state *state = demod? demod->demodulator_priv:NULL;
+	const char *thread_name = "A867_monitor_thread";
+	unsigned long loopcount = 0;
+	Bool bLock = True;
+
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	if( !state ) return -1;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
+	lock_kernel();
+#else
+	mutex_lock(&mutex);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,61)
+	daemonize();
+	sigfillset(&current->blocked);
+	sprintf(current->comm, "%s", thread_name);
+#else
+	daemonize("%s", thread_name);
+	allow_signal(SIGTERM);
+#endif
+	siginitsetinv(&current->blocked, sigmask(SIGKILL)|sigmask(SIGINT)|\
+			sigmask(SIGTERM));
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
+	unlock_kernel();
+#else
+	mutex_unlock(&mutex);
+#endif
+	while(!state->thread_should_stop && !signal_pending(current)) {
+	
+		//DWORD dwError;
+		u32 ber, berbits, ucblocks;
+		u16 strength;
+
+		loopcount++;
+
+		// sleep for 500 mili seconds
+		set_current_state(TASK_UNINTERRUPTIBLE);
+		schedule_timeout((HZ*500)/1000);
+
+		// monitor lock and return lock status
+		// reacquire channel if lock is lost for quiet a while
+		#if 1
+			DL_MonitorReception(&bLock);
+			state->locked = bLock? 1:0;
+		#endif //0
+		// obtain statistics
+		// do this every 2 loops, which is 1 second
+		if( loopcount%2 == 1  ) {
+			// do not do this if bLock is false, because 
+			//    1. this is not necessary
+			//    2. frequency is not yet set
+			if( bLock ) {
+				DL_GetChannelStat(&ber, &berbits, &ucblocks);
+				DL_GetSignalStrength(&strength);
+
+				// sometimes strength can drop to zero while demod
+				// is still pumping out stream. In which case we
+				// maintain strength to a locked level because 
+				// some AP(kaffeine) seem to rely on strength
+				// for signs of signal lock.
+				//if( strength==0 ) strength = 10;
+				
+				strength = (strength*65535/100);
+			}
+			else {
+				DL_GetChannelStat(NULL, &berbits, NULL);
+				ber = berbits;
+				ucblocks = 65535;
+				strength = 0;
+			}
+
+			state->ber = ber;
+			state->ucblocks = ucblocks;
+			state->strength = strength;
+		}
+		// monitor GPIO8
+	        Monitor_GPIO8();
+	}
+
+	//Firstly, clear thread_created flag so monitor thead can be restored later.
+	atomic_set(&state->thread_created, 0);
+	//Secondly, clear current frequency so we can depent on later set_frequency to restore
+	//this thread.
+	state->current_frequency = 0;
+
+	deb_data("- Exit %s Function -\n",__FUNCTION__);
+	complete_and_exit(&state->thread_exit, 0);
+}
+
+void af903x_start_monitor_thread(struct dvb_frontend *demod)
+{
+	struct af903xm_state *st = demod? demod->demodulator_priv:NULL;
+	if( !st ) return;
+
+#if USE_MONITOR_TH
+	// if st->thread_created is already 1, then skip thread creation
+	if( atomic_add_unless(&st->thread_created, 1, 1) ) {
+		st->thread_should_stop = 0;
+		init_completion(&st->thread_exit); 
+		kernel_thread(af903x_monitor_thread_func, st, 0);
+	}
+#endif //USE_MONITOR_TH
+
+}
+
+void af903x_stop_monitor_thread(struct dvb_frontend *demod)
+{
+	struct af903xm_state *st = demod? demod->demodulator_priv:NULL;
+	deb_data("- Enter %s Function -\n",__FUNCTION__);
+	if( !st ) return;
+
+#if USE_MONITOR_TH
+	// if st->thread_created is alread 0, then skip thread destruction
+	if( atomic_add_unless(&st->thread_created, -1, 0) ) {
+		st->thread_should_stop = 1;
+		wait_for_completion(&st->thread_exit);
+	}
+#endif //USE_MONITOR_TH
+	deb_data("- Exit %s Function -\n",__FUNCTION__);
+}
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,311 @@
+ 
+#ifndef _AF903X_H_
+#define _AF903X_H_
+
+#define DVB_USB_LOG_PREFIX "AF903X"
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kref.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
+#include <linux/smp_lock.h>
+#else
+#include <linux/mutex.h>
+#endif
+#include <linux/usb.h>
+#include <asm/uaccess.h>
+#include "dvb-usb.h"
+#include "a867_af903x-ioctl.h"
+#include "a867_demodulator.h"
+#include "a867_userdef.h"
+//#include "a867_firmware.h"
+#include "a867_type.h"
+#include "a867_Common.h"
+#include "a867_debug.h"
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) || ((defined V4L2_VERSION) && (V4L2_VERSION >= 197120))
+/* all DVB frontend drivers now work directly with the DVBv5
+ * structure. This warrants that all drivers will be
+ * getting/setting frontend parameters on a consistent way, in
+ * order to avoid copying data from/to the DVBv3 structs
+ * without need.
+ */
+#define V4L2_ONLY_DVB_V5
+#endif
+
+#define ENABLE_TEST_FUNCTION 0
+#define ENABLE_HW_PID 0
+
+
+//enable snr reading register , default = 0
+#define ENABLE_READ_REG 1
+
+
+#define SUPPORT_AF903X_EVB	0
+
+//***************** from device.h *****************//
+#define AFA_USB_DEVICE
+
+#define SLAVE_DEMOD_2WIREADDR  0x3A
+
+#define TS_PACKET_SIZE              	188
+#define TS_PACKET_COUNT_HI       348
+#define TS_PACKET_COUNT_FU       21
+
+//***************** from driver.h *****************//
+#define TS_FRAMES_HI 16
+#define TS_FRAMES_FU 128
+#define MAX_USB20_IRP_NUM  5
+#define MAX_USB11_IRP_NUM  2
+
+//***************** from afdrv.h *****************//
+#define GANY_ONLY 0x42F5
+#define EEPROM_FLB_OFS  8
+
+#define EEPROM_IRMODE      (GANY_ONLY+EEPROM_FLB_OFS+0x10)   //00:disabled, 01:HID
+#define EEPROM_SELSUSPEND  (GANY_ONLY+EEPROM_FLB_OFS+0x28)   //Selective Suspend Mode
+#define EEPROM_TSMODE      (GANY_ONLY+EEPROM_FLB_OFS+0x28+1) //0:one ts, 1:dual ts
+#define EEPROM_2WIREADDR   (GANY_ONLY+EEPROM_FLB_OFS+0x28+2) //MPEG2 2WireAddr
+#define EEPROM_SUSPEND     (GANY_ONLY+EEPROM_FLB_OFS+0x28+3) //Suspend Mode
+#define EEPROM_IRTYPE      (GANY_ONLY+EEPROM_FLB_OFS+0x28+4) //0:NEC, 1:RC6
+#define EEPROM_SAWBW1      (GANY_ONLY+EEPROM_FLB_OFS+0x28+5)
+#define EEPROM_XTAL1       (GANY_ONLY+EEPROM_FLB_OFS+0x28+6) //0:28800, 1:20480
+#define EEPROM_SPECINV1    (GANY_ONLY+EEPROM_FLB_OFS+0x28+7)
+#define EEPROM_TUNERID     (GANY_ONLY+EEPROM_FLB_OFS+0x30+4) //
+#define EEPROM_IFFREQL     (GANY_ONLY+EEPROM_FLB_OFS+0x30) 
+#define EEPROM_IFFREQH     (GANY_ONLY+EEPROM_FLB_OFS+0x30+1)   
+#define EEPROM_IF1L        (GANY_ONLY+EEPROM_FLB_OFS+0x30+2)   
+#define EEPROM_IF1H        (GANY_ONLY+EEPROM_FLB_OFS+0x30+3)
+#define EEPROM_SHIFT       (0x10)                 //EEPROM Addr Shift for slave front end
+
+#define CHECK_LOCK_LOOPS	(20)
+#define USE_MONITOR_TH		1
+
+
+extern int dvb_usb_af903x_debug;
+extern int dvb_usb_af903x_snrdb;
+/*
+#if CONFIG_DVB_USB_DEBUG
+#define avprintk(dbg, lvl, fmt, args...) \
+		do { \
+			printk(fmt, ## args); \
+		} while(0)
+#else
+#define avprintk(dbg, lvl, fmt, args...) do {} while(0)
+#endif //CONFIG_DVB_USB_DEBUG
+
+#define deb_info(fmt, args...)   avprintk(dvb_usb_af903x_debug,0x01,fmt, ## args)
+#define deb_fw(fmt, args...)     avprintk(dvb_usb_af903x_debug,0x02,fmt, ## args)
+#define deb_fwdata(fmt, args...) avprintk(dvb_usb_af903x_debug,0x04,fmt, ## args)
+#define deb_data(fmt, args...)   avprintk(dvb_usb_af903x_debug,0x08,fmt, ## args)
+*/
+//#define deb_data(args...)   printk(KERN_NOTICE args)
+
+#define deb_force(args...) printk(KERN_DEBUG args);
+#define deb_info(args...) if (dvb_usb_af903x_debug & 1) printk(KERN_DEBUG args);
+#define deb_fw(args...) if (dvb_usb_af903x_debug & 2) printk(KERN_DEBUG args);
+#define deb_fwdata(args...)   if (dvb_usb_af903x_debug & 4) printk(KERN_DEBUG args);
+#define deb_data(args...)   if (dvb_usb_af903x_debug & 8) printk(KERN_DEBUG args);
+
+typedef struct _GPIO_MAPPINGS {
+	unsigned short  I2C_SLAVE_ADDR;
+	unsigned short  RF_SW_HOST;
+	int GPIO_UHF_en;
+	int GPIO_UHF_on;
+	int GPIO_UHF_o;
+	int GPIO_VHF_en;
+	int GPIO_VHF_on;
+	int GPIO_VHF_o;
+	int GPIO_WP_en;
+	int GPIO_WP_on;
+	int GPIO_WP_o;
+	int GPIO_OSC_en;
+	int GPIO_OSC_on;
+	int GPIO_OSC_o;
+	int GPIO_TUR1_en;
+	int GPIO_TUR1_on;
+	int GPIO_TUR1_o;
+	int GPIO_TUR2_en;
+	int GPIO_TUR2_on;
+	int GPIO_TUR2_o;
+	int GPIO_DPWR_en;
+	int GPIO_DPWR_on;
+	int GPIO_DPWR_o;
+	int GPIO_DRST_en;
+	int GPIO_DRST_on;
+	int GPIO_DRST_o;
+	int GPIO_STR_en;
+	int GPIO_STR_on;
+	int GPIO_STR_o;
+	int GPIO_STR_i;
+	int GPIO_LED_en;
+	int GPIO_LED_on;
+	int GPIO_LED_o;
+} GPIO_MAPPINGS, *PGPIO_MAPPINGS;
+
+//***************** from device.h *****************//
+typedef struct _TUNER_INFO {
+
+    Bool bTunerInited;
+    Bool bSettingFreq;
+    BYTE TunerId;
+    Bool bTunerOK;
+    Tuner_struct MXL5005_Info;
+
+} TUNER_INFO, *PTUNER_INFO;
+
+
+typedef struct  _FILTER_INFO{
+    int filternum;
+    Bool onoff;
+}  FILTER_INFO;
+
+
+typedef struct _FILTER_CONTEXT_HW {
+    DWORD ulCurrentFrequency;
+    WORD  ucCurrentBandWidth;  
+    DWORD ulDesiredFrequency;
+    WORD  ucDesiredBandWidth;   
+    //ULONG ulBandWidth;   
+    Bool bTimerOn;
+   // PKSFILTER filter;
+    Byte GraphBuilt;
+    TUNER_INFO tunerinfo; 
+    //SIGNAL_STATISTICS ss;
+    //SIGNAL_RETRAIN sr;  
+    //DWORD   gdwOrigFCW;     //move from AF901x.cpp [global variable]
+    //BYTE    gucOrigUnplugTh; //move from AF901x.cpp [global variable]
+    //BYTE    gucPreShiftIdx;    //move from AF901x.cpp [global variable]    
+   // PKSFILTERFACTORY  pFilterFactory;
+    int  bEnPID;
+    int ulcPIDs;
+    FILTER_INFO aulPIDs[32];
+    Bool bApOn;
+    int bResetTs;
+    Byte OvrFlwChk;
+    Byte UnLockCount;
+
+    BYTE AVerFlags;
+} FILTER_CONTEXT_HW, *PFILTER_CONTEXT_HW;  
+
+typedef struct _DEVICE_CONTEXT {
+    FILTER_CONTEXT_HW fc[2];
+    Byte DeviceNo;
+    Bool bBootCode;
+    Bool bEP12Error;
+    Bool bEP45Error;
+    //bool bDebugMsg;
+    //bool bDevExist;
+    Bool bDualTs;
+    Bool bIrTblDownload;
+    Byte BulkOutData[256];
+    u32 WriteLength;
+    Bool bSurpriseRemoval;
+    Bool bDevNotResp;
+    Bool bEnterSuspend;
+    Bool bSupportSuspend;
+    Bool bSupportSelSuspend;
+    u16 regIdx; 
+    Byte eepromIdx;
+    u16 UsbMode;
+    u16 MaxPacketSize;
+    u32 MaxIrpSize;
+    u32 TsFrames;
+    u32 TsFrameSize;
+    u32 TsFrameSizeDw;
+    u32 TsPacketCount;
+    //BYTE  ucDemod2WireAddr;
+    //USB_IDLE_CALLBACK_INFO cbinfo;          // callback info for selective suspend          // our selective suspend IRP    
+
+    Bool    bSelectiveSuspend;
+    u32   ulActiveFilter;
+    //BYTE    ucSerialNo; 
+    Architecture architecture;
+    //BYTE Tuner_Id;
+    StreamType StreamType;
+    Bool bDCAPIP;
+    Bool bSwapFilter;
+    Byte FilterCnt;
+    Bool  bTunerPowerOff;
+    //PKSPIN PinSave;
+    Byte UsbCtrlTimeOut;
+	
+   Ganymede Demodulator;
+   
+    Bool ForceWrite;
+
+    GPIO_MAPPINGS Map;
+
+    struct semaphore powerLock;
+    int power_use_count;
+    struct semaphore tunerLock;
+
+    unsigned short idVendor;
+    unsigned short idProduct;
+
+    struct semaphore regLock;
+	
+} DEVICE_CONTEXT, *PDEVICE_CONTEXT;
+
+#define PTI             (PDC->fc[ucSlaveDemod].tunerinfo)   //TunerInfo pointer
+
+
+
+struct af903x_ofdm_channel {
+	u32 RF_kHz;
+	u8  Bw;
+	s16 nfft;
+	s16 guard;
+	s16 nqam;
+	s16 vit_hrch;
+	s16 vit_select_hp;
+	s16 vit_alpha;
+	s16 vit_code_rate_hp;
+	s16 vit_code_rate_lp;
+	u8  intlv_native;
+};
+
+struct tuner_priv {
+        struct tuner_config *cfg;
+        struct i2c_adapter   *i2c;
+
+        u32 frequency;
+        u32 bandwidth;
+        u16 if1_freq;
+        u8  fmfreq;
+};
+
+extern struct dvb_frontend * tuner_attach(struct dvb_frontend *fe);
+extern struct dvb_frontend * af903x_attach(u8 TMP);
+extern struct dvb_usb_device_properties af903x_properties[];
+extern struct usb_device_id af903x_usb_id_table[];
+extern struct usb_device *udevs;
+extern struct usb_interface *uintfs;
+extern PDEVICE_CONTEXT PDC;
+extern int af903x_device_count;
+
+extern void af903x_start_monitor_thread(struct dvb_frontend *demod);
+extern void af903x_stop_monitor_thread(struct dvb_frontend *demod);
+
+extern DWORD Device_init(struct usb_device *udev, struct usb_interface *uintf, PDEVICE_CONTEXT PDCs, Bool bBoot);
+extern DWORD DL_ApCtrl (Bool bOn);
+extern DWORD DL_Tuner_SetBW(u8 ucBw);
+extern DWORD DL_Tuner_SetFreq(u32 ucFreq,u8 ucBw);
+extern DWORD DL_ReSetInterval(void);
+extern DWORD DL_GetChannelStat(u32 *ber, u32 *berbits, u32 *ubc);
+extern DWORD DL_GetSignalStrength(u16 *strength);
+extern DWORD DL_GetSignalQuality(u16 *strength);
+extern DWORD DL_GetLocked(Bool *bLock);
+extern DWORD DL_MonitorReception(Bool *bLock);
+extern DWORD DL_IsPsbOverflow(void *handle, Byte ucSlaveDemod, Bool *bPsvOverflow);
+extern DWORD DL_Reboot(void);
+extern DWORD DL_ResetPID(void);
+extern DWORD DL_AddPID(BYTE index, Pid pid);
+extern DWORD DL_PIDOnOff(DWORD OnOff);
+extern DWORD DL_RemovePID(BYTE index, Pid pid);
+
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-ioctl.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-ioctl.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-ioctl.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-ioctl.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,29 @@
+#ifndef _AF903X_IOCTL_H_
+#define _AF903X_IOCTL_H_
+
+#include <linux/ioctl.h> /* needed for the _IOW etc stuff used later */
+
+/*
+ * Ioctl definitions
+ */
+
+/* Use 'k' as magic number */
+#define AFA_IOC_MAGIC  'k'
+/* Please use a different 8-bit number in your code */
+
+//#define AFA_IOCRESETINTERVAL    _IO(AFA_IOC_MAGIC, 0)
+
+/*
+ * S means "Set" through a ptr,
+ * T means "Tell" directly with the argument value
+ * G means "Get": reply by setting through a pointer
+ * Q means "Query": response is on the return value
+ * X means "eXchange": switch G and S atomically
+ * H means "sHift": switch T and Q atomically
+ */
+
+
+/* ... more to come */
+
+#define AFA_IOC_MAXNR 14
+#endif /* _AF903X-IOCTL_H_ */
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-tuner.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-tuner.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_af903x-tuner.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_af903x-tuner.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,122 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/delay.h>
+#include <linux/dvb/frontend.h>
+
+#include "dvb_frontend.h"
+#include "a867_af903x.h"
+
+#define IF2  36150       // IF2 frequency = 36.150 MHz
+#define FREF 16000       // Quartz oscillator 16 MHz
+
+#ifdef V4L2_ONLY_DVB_V5
+static int tuner_set_params(struct dvb_frontend *fe)
+{
+	struct dtv_frontend_properties *params = &fe->dtv_property_cache;
+	struct tuner_priv *priv=NULL;
+	DWORD dwError = Error_NO_ERROR;
+	DWORD freq = params->frequency ;// 1000; // Hz -> kHz
+
+	switch (params->delivery_system) {
+	case SYS_DVBT:
+	case SYS_DVBT2:
+	case SYS_ISDBT:
+	case SYS_DMBTH:
+		priv->bandwidth = params->bandwidth_hz;
+		break;
+	default:
+		priv->bandwidth = 0;
+		break;
+	}
+
+	deb_data("%s - freq : %d , bandwidth : %dn",__FUNCTION__, freq, priv->bandwidth);
+
+	/* here, frequency is expressed in KHz and bandwidth in MHz */
+	dwError =DL_Tuner_SetFreq(freq/1000, priv->bandwidth/1000000);
+	if (dwError) deb_data("tuner_set_params Fail !\n");
+	
+	return 0;
+}
+#else
+static int tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
+{
+	struct tuner_priv *priv=NULL;
+	DWORD dwError = Error_NO_ERROR;
+	DWORD freq = params->frequency ;// 1000; // Hz -> kHz
+	
+	priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
+
+       deb_data("%s - freq : %d , bandwidth : %dn",__FUNCTION__, freq,priv->bandwidth);
+	   
+	dwError =DL_Tuner_SetFreq(freq,priv->bandwidth);
+	if (dwError) deb_data("tuner_set_params Fail !\n");
+	
+	return 0;
+}
+#endif
+static int tuner_get_frequency(struct dvb_frontend *fe, u32 *frequency)
+{
+	struct tuner_priv *priv = fe->tuner_priv;
+	*frequency = priv->frequency;
+	return 0;
+}
+
+static int tuner_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
+{
+	struct tuner_priv *priv = fe->tuner_priv;
+	*bandwidth = priv->bandwidth;
+	return 0;
+}
+
+static int tuner_init(struct dvb_frontend *fe)
+{
+
+	return 0;
+}
+
+static int tuner_sleep(struct dvb_frontend *fe)
+{
+	return 0;
+}
+
+static int tuner_release(struct dvb_frontend *fe)
+{
+	kfree(fe->tuner_priv);
+	fe->tuner_priv = NULL;
+	return 0;
+}
+
+static const struct dvb_tuner_ops tuner_tuner_ops = {
+	.info = {
+		.name           = "dvb_usb_tuner",
+		.frequency_min  =  48000000,
+		.frequency_max  = 860000000,
+		.frequency_step =     50000,
+	},
+
+	.release       = tuner_release,
+
+	.init          = tuner_init,
+	.sleep         = tuner_sleep,
+
+	.set_params    = tuner_set_params,
+	.get_frequency = tuner_get_frequency,
+	.get_bandwidth = tuner_get_bandwidth
+};
+
+/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
+struct dvb_frontend * tuner_attach(struct dvb_frontend *fe)
+{
+	struct tuner_priv *priv = NULL;
+
+	priv = kzalloc(sizeof(struct tuner_priv), GFP_KERNEL);
+	if (priv == NULL)
+		return NULL;
+
+	memcpy(&fe->ops.tuner_ops, &tuner_tuner_ops, sizeof(struct dvb_tuner_ops));
+
+	fe->tuner_priv = priv;
+	
+	return fe;
+}
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,50 @@
+/*
+ * @(#)Afatech_AF9007_EXT.cpp
+ *
+ * Copyright 2005 Afatech, Inc. All rights reserved.
+ */
+
+//#include <stdio.h>
+#include "a867_type.h"
+#include "a867_error.h"
+#include "a867_user.h"
+#include "a867_register.h"
+#include "a867_standard.h"
+#include "a867_Afa_AF9007_Script.h"
+
+
+Dword AF9007_open (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+) {
+	return (Error_NO_ERROR);
+}
+
+Dword AF9007_close (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+) {
+	return (Error_NO_ERROR);
+}
+
+Dword AF9007_set (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Word			bandwidth,
+	IN  Dword			frequency
+) {
+	return (Error_NO_ERROR);
+}
+
+TunerDescription tuner_AF9007 = {
+    AF9007_open,
+    AF9007_close,
+    AF9007_set,
+    AF9007_scripts,
+    AF9007_scriptSets,
+    0,                              /** tuner i2c address */
+    0,                              /** length of tuner register address */
+    36167000,                       /** tuner if */
+    True,                           /** spectrum inverse */
+    0xFF                            /** tuner id */
+};
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,39 @@
+/**
+ * @(#)Afatech_AF9007_EXT.h
+ *
+ * Copyright 2005 Afatech, Inc. All rights reserved.
+ */
+#ifndef __Afatech_AF9007_EXT_H__
+#define __Afatech_AF9007_EXT_H__
+
+
+extern TunerDescription tuner_AF9007;
+
+
+/**
+ *
+ */
+Dword AF9007_open (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+/**
+ *
+ */
+Dword AF9007_close (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+/**
+ *
+ */
+Dword AF9007_set (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    IN  Word			bandwidth,
+    IN  Dword			frequency
+);
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007_Script.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007_Script.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Afa_AF9007_Script.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Afa_AF9007_Script.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,93 @@
+/** script version */
+
+#define AF9007_ADDRESS 0xC0
+#define AF9007_SCRIPTSETLENGTH	0x00000001
+
+
+Word AF9007_scriptSets[] = {
+	0x50
+};
+
+ValueSet AF9007_scripts[] = {
+ {0xF600, 0x5},
+ {0xF601, 0x8},
+ {0xF602, 0xb},
+ {0xF603, 0x0e},
+ {0xF604, 0x11},
+ {0xF605, 0x14},
+ {0xF606, 0x17},
+ {0xF607, 0x1f},
+ {0xF1E6, 0x01},
+ {0xF001, 0x00},
+ {0xF005, 0x01},
+ {0xF004, 0x00},
+ {0xF00A, 0x1B},
+ {0xF00B, 0x1C},
+ {0xF00C, 0x1B},
+ {0xF00D, 0x1C},
+ {0xF016, 0x10},
+ {0xF017, 0x04},
+ {0xF018, 0x05},
+ {0xF019, 0x04},
+ {0xF01A, 0x05},
+ {0xF021, 0x03},
+ {0xF022, 0x0A},
+ {0xF023, 0x0A},
+ {0xF000, 0x01},
+ {0xF047, 0x00},
+ {0xF007, 0x00},
+ {0xF12F, 0x00},
+ {0xF077, 0x00},
+ {0xF00A, 0x1A},
+ {0xF00B, 0x1B},
+ {0xF00C, 0x1A},
+ {0xF00D, 0x1B},
+ {0xF01F, 0x50},
+ {0xF020, 0x00},
+ {0xF029, 0x46},
+ {0xF02A, 0x00},
+ {0xF010, 0xDF},
+ {0xF011, 0x02},
+ {0xF00E, 0x44},
+ {0xF00F, 0x01},
+ {0xF014, 0xEB},
+ {0xF015, 0x02},
+ {0xF012, 0xF4},
+ {0xF013, 0x01},
+ {0x0066, 0x52},
+ {0xF01B, 0x26},
+ {0xF01C, 0x01},
+ {0xF01D, 0x12},
+ {0xF01E, 0x03},
+ {0xF025, 0xE8},
+ {0xF026, 0x00},
+ {0xF027, 0x5F},
+ {0xF028, 0x03},
+ {0x0044, 0xFF},
+ {0x0045, 0x03},
+ {0x0046, 0xFF},
+ {0x0047, 0x03},
+ {0x0048, 0xFF},
+ {0x0049, 0x03},
+ {0x004a, 0xFF},
+ {0x004b, 0x03},
+ {0x004c, 0xEB},
+ {0x004d, 0x02},
+ {0x0053, 0x68},
+ {0x0054, 0x03},
+ {0x0059, 0x12},
+ {0x005a, 0x03},
+ {0xF02B, 0x00},
+ {0xF02C, 0x01},
+ {0xF03B, 0x9A},
+ {0xF03C, 0x01},
+ {0xF03D, 0x5A},
+ {0xF03E, 0x01},
+ {0xF03F, 0x96},
+ {0xF040, 0x46},
+ {0xF031, 0x0},
+ {0x006b, 0x0A},
+ {0x006c, 0x14},
+ {0x006d, 0x08},
+};
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_aver_version.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_aver_version.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_aver_version.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_aver_version.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1 @@
+#define DRIVER_VER "1.0.27"
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_cmd.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_cmd.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_cmd.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_cmd.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,1005 @@
+#include "a867_cmd.h"
+
+
+Byte Cmd_sequence = 0;
+
+
+Dword Bus_addChecksum (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+    Dword loop = (*bufferLength - 1) / 2;
+    Dword remain = (*bufferLength - 1) % 2;
+    Dword i;
+    Word checksum = 0;
+
+    for (i = 0; i < loop; i++)
+        checksum += (Word) (buffer[2 * i + 1] << 8) + (Word) (buffer[2 * i + 2]);
+    if (remain)
+        checksum += (Word) (buffer[*bufferLength - 1] << 8);
+    checksum = ~checksum;
+    buffer[*bufferLength] = (Byte) ((checksum & 0xFF00) >> 8);
+    buffer[*bufferLength + 1] = (Byte) (checksum & 0x00FF);
+    buffer[0] = (Byte) (*bufferLength + 1);
+    *bufferLength += 2;
+
+    return (error);
+}
+
+
+Dword Bus_removeChecksum (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+    Dword loop = (*bufferLength - 3) / 2;
+    Dword remain = (*bufferLength - 3) % 2;
+    Dword i;
+    Word checksum = 0;
+
+    for (i = 0; i < loop; i++)
+        checksum += (Word) (buffer[2 * i + 1] << 8) + (Word) (buffer[2 * i + 2]);
+    if (remain)
+        checksum += (Word) (buffer[*bufferLength - 3] << 8);
+    checksum = ~checksum;
+    if (((Word) (buffer[*bufferLength - 2] << 8) + (Word) (buffer[*bufferLength - 1])) != checksum) {
+        error = Error_WRONG_CHECKSUM;
+        goto exit;
+    }
+    if (buffer[2])
+        error = Error_FIRMWARE_STATUS | buffer[2];
+    buffer[0] = (Byte) (*bufferLength - 3);
+    *bufferLength -= 2;
+
+exit :
+    return (error);
+}
+
+
+Dword Cmd_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (writeBufferLength == 0) goto exit;
+    if (registerAddressLength > 4) {
+        error  = Error_PROTOCOL_FORMAT_INVALID;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    i = 0;
+    while (i < writeBufferLength) {
+
+        j = (writeBufferLength - i) > (maxPktSize - 12) ? (maxPktSize - 12) : (writeBufferLength - i);
+        command = Bus_buildCommand (Command_REG_DEMOD_WRITE, processor, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) j;
+        buffer[5] = (Byte) registerAddressLength;
+        buffer[6] = (Byte) ((registerAddress + i) >> 24); /** Get first byte of reg. address  */
+        buffer[7] = (Byte) ((registerAddress + i) >> 16); /** Get second byte of reg. address */
+        buffer[8] = (Byte) ((registerAddress + i) >> 8);  /** Get third byte of reg. address  */
+        buffer[9] = (Byte) (registerAddress + i);         /** Get fourth byte of reg. address */
+
+        for (k = 0; k < j; k++)
+            buffer[10 + k] = writeBuffer[i + k];
+
+        bufferLength = j + 10;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        i += j;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (valueSetsLength == 0) goto exit;
+    if (valueSetsAddressLength > 4) {
+        error  = Error_PROTOCOL_FORMAT_INVALID;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    i = 0;
+    while (i < valueSetsLength) {
+        j = (valueSetsLength - i) > ((maxPktSize - 10) / 3) ? ((maxPktSize - 10) / 3) : (valueSetsLength - i);
+        command = Bus_buildCommand (Command_SCATTER_WRITE, processor, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) 2;                       /** Type 2 */
+        if (processor == Processor_LINK)
+            buffer[5] = (Byte) 0;
+        else
+            buffer[5] = (Byte) 1;
+        buffer[6] = (Byte) 0;
+        buffer[7] = (Byte) j;
+
+        for (k = 0; k < j; k++) {
+            buffer[8 + k * 2] = (Byte) (valueSets[k].address >> 8);
+            buffer[9 + k * 2] = (Byte) valueSets[k].address;
+            buffer[8 + j * 2 + k] = (Byte) valueSets[k].value;
+        }
+
+        bufferLength = 8 + j * 3;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength =  5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        i += j;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+) {
+
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+	if (writeBufferLength == 0)
+	{
+        command = Bus_buildCommand (Command_REG_TUNER_WRITE, Processor_LINK, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) 0;
+        buffer[5] = (Byte) tunerAddress;
+        buffer[6] = (Byte) registerAddressLength;
+        buffer[7] = (Byte) ((registerAddress) >> 8);  /** Get high byte of reg. address */
+        buffer[8] = (Byte) (registerAddress);         /** Get low byte of reg. address  */
+
+        bufferLength = 9;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+		goto exit;
+	}
+
+    i = 0;
+    while (i < writeBufferLength) {
+        j = (writeBufferLength - i) > (maxPktSize - 11) ? (maxPktSize - 11) : (writeBufferLength - i);
+        command = Bus_buildCommand (Command_REG_TUNER_WRITE, Processor_LINK, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) j;
+        buffer[5] = (Byte) tunerAddress;
+        buffer[6] = (Byte) registerAddressLength;
+        buffer[7] = (Byte) ((registerAddress + i) >> 8);  /** Get high byte of reg. address */
+        buffer[8] = (Byte) (registerAddress + i);         /** Get low byte of reg. address  */
+
+        for (k = 0; k < j; k++)
+            buffer[9 + k] = writeBuffer[ i + k];
+
+        bufferLength = j + 9;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        i += j;
+    }
+
+
+exit :    
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Byte i;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (writeBufferLength == 0) goto exit;
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    command = Bus_buildCommand (Command_REG_EEPROM_WRITE, Processor_LINK, chip);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    buffer[4] = (Byte) writeBufferLength;
+    buffer[5] = (Byte) eepromAddress;
+    buffer[6] = (Byte) registerAddressLength;
+    buffer[7] = (Byte) (registerAddress >> 8);  /** Get high byte of reg. address */
+    buffer[8] = (Byte) registerAddress;         /** Get low byte of reg. address  */
+
+    for (i = 0; i < writeBufferLength; i++)
+        buffer[9 + i] = writeBuffer[i];
+
+    bufferLength = writeBufferLength + 9;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    bufferLength = 5;
+
+    error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (readBufferLength == 0) goto exit;
+    if (registerAddressLength > 4) {
+        error  = Error_PROTOCOL_FORMAT_INVALID;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    i = 0;
+    while (i < readBufferLength) {
+
+        j = (readBufferLength - i) > (maxPktSize - 5) ? (maxPktSize - 5) : (readBufferLength - i);
+        command = Bus_buildCommand (Command_REG_DEMOD_READ, processor, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) j;
+        buffer[5] = (Byte) registerAddressLength;
+        buffer[6] = (Byte) ((registerAddress + i) >> 24); /** Get first byte of reg. address  */
+        buffer[7] = (Byte) ((registerAddress + i) >> 16); /** Get second byte of reg. address */
+        buffer[8] = (Byte) ((registerAddress + i) >> 8);  /** Get third byte of reg. address  */
+        buffer[9] = (Byte) (registerAddress + i);         /** Get fourth byte of reg. address */
+
+        bufferLength = 10;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = j + 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+        for (k = 0; k < j; k++) {
+            readBuffer[i + k] = buffer[k + 3];
+        }
+
+        i += j;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (valueSetsLength == 0) goto exit;
+    if (valueSetsAddressLength > 4) {
+        error  = Error_PROTOCOL_FORMAT_INVALID;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    i = 0;
+    while (i < valueSetsLength) {
+        j = (valueSetsLength - i) > ((maxPktSize - 10) / 2) ? ((maxPktSize - 10) / 2) : (valueSetsLength - i);
+        command = Bus_buildCommand (Command_SCATTER_READ, processor, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) 2;                       /** Type 2 */
+        if (processor == Processor_LINK)
+            buffer[5] = (Byte) 0;
+        else
+            buffer[5] = (Byte) 1;
+        buffer[6] = (Byte) 0;
+        buffer[7] = (Byte) j;
+
+        for (k = 0; k < j; k++) {
+            buffer[8 + k * 2] = (Byte) (valueSets[k].address >> 8);
+            buffer[9 + k * 2] = (Byte) valueSets[k].address;
+        }
+
+        bufferLength = 8 + j * 2;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = j + 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+        for (k = 0; k < j; k++) {
+            //(Byte) valueSets[i + k].value = buffer[k + 3];
+	      valueSets[i + k].value = (Byte) buffer[k + 3];
+        }
+
+        i += j;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_readTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    IN  Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (readBufferLength == 0) goto exit;
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    i = 0;
+    while (i < readBufferLength) {
+        j = (readBufferLength - i) > (maxPktSize - 5) ? (maxPktSize - 5) : (readBufferLength - i);
+        command = Bus_buildCommand (Command_REG_TUNER_READ, Processor_LINK, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        buffer[4] = (Byte) j;
+        buffer[5] = (Byte) tunerAddress;
+        buffer[6] = (Byte) registerAddressLength;
+        buffer[7] = (Byte) ((registerAddress + i) >> 8);  /** Get high byte of reg. address */
+        buffer[8] = (Byte) (registerAddress + i);         /** Get low byte of reg. address  */
+
+        bufferLength = 9;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        bufferLength = j + 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+        for (k = 0; k < j; k++) {
+            readBuffer[i + k] = buffer[k + 3];
+        }
+
+        i += j;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    OUT Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Byte i;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (readBufferLength == 0) goto exit;
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    command = Bus_buildCommand (Command_REG_EEPROM_READ, Processor_LINK, chip);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    buffer[4] = (Byte) readBufferLength;
+    buffer[5] = (Byte) eepromAddress;
+    buffer[6] = (Byte) registerAddressLength;
+    buffer[7] = (Byte) (registerAddress >> 8);  /** Get high byte of reg. address */
+    buffer[8] = (Byte) registerAddress;         /** Get low byte of reg. address  */
+
+    bufferLength = 9;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    bufferLength = readBufferLength + 5;
+    error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+    for (i = 0; i < readBufferLength; i++) {
+        readBuffer[i] = buffer[i + 3];
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_modifyRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Byte temp;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    if (registerAddressLength > 4) {
+        error  = Error_PROTOCOL_FORMAT_INVALID;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    command = Bus_buildCommand (Command_REG_DEMOD_READ, processor, chip);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    buffer[4] = (Byte) 1;
+    buffer[5] = (Byte) registerAddressLength;
+    buffer[6] = (Byte) (registerAddress >> 24); /** Get first byte of reg. address  */
+    buffer[7] = (Byte) (registerAddress >> 16); /** Get second byte of reg. address */
+    buffer[8] = (Byte) (registerAddress >> 8);  /** Get third byte of reg. address  */
+    buffer[9] = (Byte) registerAddress;         /** Get fourth byte of reg. address */
+
+    bufferLength = 10;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    bufferLength = 6;
+
+    error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+    temp = buffer[3];
+    temp = REG_CREATE (value, temp, position, length);
+
+    command = Bus_buildCommand (Command_REG_DEMOD_WRITE, processor, chip);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    buffer[4] = (Byte) 1;
+    buffer[5] = (Byte) registerAddressLength;
+    buffer[6] = (Byte) (registerAddress >> 24); /** Get first byte of reg. address  */
+    buffer[7] = (Byte) (registerAddress >> 16); /** Get second byte of reg. address */
+    buffer[8] = (Byte) (registerAddress >> 8);  /** Get third byte of reg. address  */
+    buffer[9] = (Byte) registerAddress;         /** Get fourth byte of reg. address */
+    buffer[10] = temp;
+
+    bufferLength = 11;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    bufferLength = 5;
+
+    error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Dword           length,
+    IN  Byte*           firmware
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Dword loop;
+    Dword remain;
+    Dword i, j, k;
+    Byte buffer[256];
+    Dword bufferLength;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    loop = length / (maxPktSize - 6);
+    remain = length % (maxPktSize - 6);
+    k = 0;
+    command = Bus_buildCommand (Command_FW_DOWNLOAD, Processor_LINK, 0);
+    for (i = 0; i < loop; i++) {
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        for (j = 0; j < (maxPktSize - 6); j++)
+            buffer[4 + j] = firmware[k++];
+        bufferLength = (maxPktSize - 2);
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+    }
+    if (remain) {
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        for (j = 0; j < remain; j++)
+            buffer[4 + j] = firmware[k++];
+        bufferLength = (Word) (4 + remain);
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_reboot (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    User_enterCriticalSection (demodulator);
+
+    command = Bus_buildCommand (Command_REBOOT, Processor_LINK, chip);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    bufferLength = 4;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_sendCommand (
+    IN  Demodulator*    demodulator,
+    IN  Word            command,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Byte buffer[256];
+    Dword bufferLength;
+    Dword i, j, k;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    User_enterCriticalSection (demodulator);
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    if (writeBufferLength == 0) {
+        command = Bus_buildCommand (command, processor, chip);
+        buffer[1] = (Byte) (command >> 8);
+        buffer[2] = (Byte) command;
+        buffer[3] = (Byte) Cmd_sequence++;
+        bufferLength = 4;
+        error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+
+        error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+    } else {
+        i = 0;
+        while (i < writeBufferLength) {
+            j = (writeBufferLength - i) > (maxPktSize - 6) ? (maxPktSize - 6) : (writeBufferLength - i);
+            command = Bus_buildCommand (command, processor, chip);
+            buffer[1] = (Byte) (command >> 8);
+            buffer[2] = (Byte) command;
+            buffer[3] = (Byte) Cmd_sequence++;
+            for (k = 0; k < j; k++)
+                buffer[k + 4] = writeBuffer[i + k];
+
+            bufferLength = j + 4;
+            error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+            if (error) goto exit;
+
+            error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+            if (error) goto exit;
+
+            i += j;
+        }
+    }
+
+    if (readBufferLength == 0) {
+        bufferLength = 5;
+
+        error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+        if (error) goto exit;
+
+        error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+        if (error) goto exit;
+    } else {
+        i = 0;
+        while (i < readBufferLength) {
+            j = (readBufferLength - i) > (maxPktSize - 5) ? (maxPktSize - 5) : (readBufferLength - i);
+
+            bufferLength = j + 5;
+
+            error = pbusDesc->busRx (demodulator, bufferLength, buffer);
+            if (error) goto exit;
+
+            error = Bus_removeChecksum (demodulator, &bufferLength, buffer);
+            if (error) goto exit;
+            for (k = 0; k < j; k++)
+                readBuffer[i + k] = buffer[k + 3];
+
+            i += j;
+        }
+    }
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Dword Cmd_receiveData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           registerAddress,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+    Word command;
+    Byte buffer[256];
+    Dword bufferLength;
+    Ganymede* ganymede;
+    CmdDescription*     pcmdDesc;
+    BusDescription*     pbusDesc;
+    Dword maxPktSize;
+
+    if (readBufferLength == 0) goto exit;
+
+    ganymede = (Ganymede*) demodulator;
+    pcmdDesc = ganymede->cmdDescription;
+    pbusDesc = pcmdDesc->busDescription;
+    maxPktSize = pcmdDesc->mailBoxSize;
+
+    User_enterCriticalSection (demodulator);
+
+    command = Bus_buildCommand (Command_DATA_READ, Processor_LINK, 0);
+    buffer[1] = (Byte) (command >> 8);
+    buffer[2] = (Byte) command;
+    buffer[3] = (Byte) Cmd_sequence++;
+    buffer[4] = (Byte) ((readBufferLength >> 16)  & 0xFF);
+    buffer[5] = (Byte) ((readBufferLength >> 8)  & 0xFF);
+    buffer[6] = (Byte) (readBufferLength  & 0xFF);
+    buffer[7] = (Byte) ((registerAddress >> 16)  & 0xFF);
+    buffer[8] = (Byte) ((registerAddress >> 8)  & 0xFF);
+    buffer[9] = (Byte) (registerAddress  & 0xFF);
+
+    bufferLength = 10;
+    error = Bus_addChecksum (demodulator, &bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busTx (demodulator, bufferLength, buffer);
+    if (error) goto exit;
+
+    error = pbusDesc->busRxData (demodulator, readBufferLength, readBuffer);
+
+exit :
+    User_leaveCriticalSection (demodulator);
+    return (error);
+}
+
+
+Word Cmd_busId = Bus_USB;
+CmdDescription Cmd_busDescription = {
+    0,
+    NULL,
+    Cmd_writeRegisters,
+    Cmd_writeScatterRegisters,
+    Cmd_writeTunerRegisters,
+    Cmd_writeEepromValues,
+    Cmd_readRegisters,
+    Cmd_readScatterRegisters,
+    Cmd_readTunerRegisters,
+    Cmd_readEepromValues,
+    Cmd_modifyRegister,
+    Cmd_loadFirmware,
+    Cmd_reboot,
+    Cmd_sendCommand,
+    Cmd_receiveData
+};
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_cmd.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_cmd.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_cmd.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_cmd.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,246 @@
+#ifndef __CMD_H__
+#define __CMD_H__
+
+
+#include "a867_type.h"
+#include "a867_user.h"
+#include "a867_error.h"
+
+/**
+ * Bus types
+ */
+#define Bus_I2C             1
+#define Bus_USB             2
+#define Bus_SPI             3
+#define Bus_SDIO            4
+#define Bus_USB11           5
+#define Bus_I2M             6  /** I2C bus for Mercury      */
+#define Bus_I2U             7  /** I2C bus for Mercury USB  */
+
+
+/**
+ * Define commands
+ */
+#define Command_REG_DEMOD_READ          0x0000
+#define Command_REG_DEMOD_WRITE         0x0001
+#define Command_REG_TUNER_READ          0x0002
+#define Command_REG_TUNER_WRITE         0x0003
+#define Command_REG_EEPROM_READ         0x0004
+#define Command_REG_EEPROM_WRITE        0x0005
+#define Command_VAR_READ                0x0008
+#define Command_VAR_WRITE               0x0009
+
+#define Command_DATA_READ               0x0006
+
+#define Command_PLATFORM_GET            0x000A
+#define Command_PLATFORM_SET            0x000B
+#define Command_IP_CACHE                0x000D
+#define Command_IP_ADD                  0x000E
+#define Command_IP_REMOVE               0x000F
+#define Command_PID_ADD                 0x0010
+#define Command_PID_REMOVE              0x0011
+#define Command_SIPSI_GET               0x0012  /** Get SI/PSI table for specific PID "once". */
+#define Command_SIPSI_MPE_RESET         0x0013
+#define Command_H_PID_ADD               0x0015
+#define Command_H_PID_REMOVE            0x0016
+#define Command_ABORT                   0x0017
+#define Command_IR_GET                  0x0018
+#define Command_IR_SET                  0x0019
+#define Command_FW_DOWNLOAD_BEGIN       0x0024
+#define Command_FW_DOWNLOAD             0x0021
+#define Command_FW_DOWNLOAD_END         0x0025
+#define Command_QUERYINFO               0x0022
+#define Command_BOOT                    0x0023
+#define Command_REBOOT                  0x0023
+#define Command_RUN_CODE                0x0026
+#define Command_SCATTER_READ            0x0028
+#define Command_SCATTER_WRITE           0x0029
+#define Command_GENERIC_READ            0x002A
+#define Command_GENERIC_WRITE           0x002B
+
+#define Command_SERVICES_GET            0x0083
+#define Command_COMPONENT_ADD           0x0086
+#define Command_COMPONENT_REMOVE        0x0087
+#define Command_FIG_ADD                 0x0088
+#define Command_FIG_REMOVE              0x0089
+
+
+#define Bus_MAX_WRITE_SIZE              254
+#define Bus_MAX_READ_SIZE               254
+
+
+#define Bus_buildCommand(command, processor, chip)  (command + (Word) (processor << 12) + (Word) (chip << 12))
+
+
+/**
+ *
+ */
+Dword Cmd_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+/**
+ *
+ */
+Dword Cmd_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+);
+
+
+/**
+ *
+ */
+Dword Cmd_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+
+/**
+ *
+ */
+Dword Cmd_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+/**
+ *
+ */
+Dword Cmd_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ *
+ */
+Dword Cmd_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+);
+
+
+/**
+ *
+ */
+Dword Cmd_readTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    IN  Byte*           readBuffer
+);
+
+
+/**
+ *
+ */
+Dword Cmd_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ *
+ */
+Dword Cmd_modifyRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+);
+
+
+/**
+ *
+ */
+Dword Cmd_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Dword           length,
+    IN  Byte*           firmware
+);
+
+
+/**
+ *
+ */
+Dword Cmd_reboot (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ *
+ */
+Dword Cmd_sendCommand (
+    IN  Demodulator*    demodulator,
+    IN  Word            command,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+Dword Cmd_receiveData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           registerAddress,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+extern Word Cmd_busId;
+extern CmdDescription Cmd_busDescription;
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Common.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Common.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Common.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Common.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,259 @@
+#pragma once
+
+typedef unsigned char		BYTE;						/** At least 1 Byte				*/
+typedef unsigned short		WORD;						/** At least 2 Bytes				*/
+typedef unsigned int		DWORD;						/** At least 4 Bytes				*/
+typedef void *				HANDLE;						/** Pointer to memory location	*/
+
+#define TUNER_REGS_NUM		104
+#define INITCTRL_NUM		38
+#ifdef _MXL_PRODUCTION
+#define CHCTRL_NUM			39
+#else
+#define CHCTRL_NUM			36
+#endif
+
+#define MXLCTRL_NUM			189
+
+#define MASTER_CONTROL_ADDR		9
+
+/** Enumeration of AGC Mode */
+typedef enum
+{
+	MXL_DUAL_AGC = 0 ,
+	MXL_SINGLE_AGC
+} AGC_Mode ;
+
+/**
+ * Enumeration of Master Control Register State
+ */
+typedef enum
+{
+	MC_LOAD_START = 1 ,
+	MC_POWER_DOWN ,
+	MC_SYNTH_RESET ,
+	MC_SEQ_OFF
+} Master_Control_State ;
+
+/**
+ * Enumeration of MXL5005 Tuner Mode
+ */
+typedef enum
+{
+	MXL_ANALOG_MODE = 0 ,
+	MXL_DIGITAL_MODE
+
+} Tuner_Mode ;
+
+/**
+ * Enumeration of MXL5005 Tuner IF Mode
+ */
+typedef enum
+{
+	MXL_ZERO_IF = 0 ,
+	MXL_LOW_IF
+
+} Tuner_IF_Mode ;
+
+/**
+ * Enumeration of MXL5005 Tuner Clock Out Mode
+ */
+typedef enum
+{
+	MXL_CLOCK_OUT_DISABLE = 0 ,
+	MXL_CLOCK_OUT_ENABLE
+} Tuner_Clock_Out ;
+
+/**
+ * Enumeration of MXL5005 Tuner Div Out Mode
+ */
+typedef enum
+{
+	MXL_DIV_OUT_1 = 0 ,
+	MXL_DIV_OUT_4
+
+} Tuner_Div_Out ;
+
+/**
+ * Enumeration of MXL5005 Tuner Pull-up Cap Select Mode
+ */
+typedef enum
+{
+	MXL_CAP_SEL_DISABLE = 0 ,
+	MXL_CAP_SEL_ENABLE
+
+} Tuner_Cap_Select ;
+
+/**
+ * Enumeration of MXL5005 Tuner RSSI Mode
+ */
+typedef enum
+{
+	MXL_RSSI_DISABLE = 0 ,
+	MXL_RSSI_ENABLE
+
+} Tuner_RSSI ;
+
+/**
+ * Enumeration of MXL5005 Tuner Modulation Type
+ */
+typedef enum
+{
+	MXL_DEFAULT_MODULATION = 0 ,
+	MXL_DVBT,
+	MXL_ATSC,
+	MXL_QAM
+
+} Tuner_Modu_Type ;
+
+/**
+ * MXL5005 Tuner Register Struct
+ */
+typedef struct _TunerReg_struct
+{
+	WORD 	Reg_Num ;							/** Tuner Register Address */
+	WORD	Reg_Val ;							/** Current sofware programmed value waiting to be writen */
+} TunerReg_struct ;
+
+/** 
+ * MXL5005 Tuner Control Struct
+ */
+typedef struct _TunerControl_struct {
+/*	char 	Name[40] ; */						/** Control Name */
+	WORD	Ctrl_Num ;							/** Control Number */
+	WORD	size ;								/** Number of bits to represent Value */
+	WORD 	addr[25] ;							/** Array of Tuner Register Address for each bit position */
+	WORD 	bit[25] ;							/** Array of bit position in Register Address for each bit position */
+	WORD 	val[25] ;							/** Binary representation of Value */
+} TunerControl_struct ;
+
+/**
+ * MXL5005 Tuner Struct
+ */
+typedef struct _Tuner_struct
+{
+	BYTE			Mode ;				/** 0: Analog Mode ; 1: Digital Mode */
+	BYTE			IF_Mode ;			/** for Analog Mode, 0: zero IF; 1: low IF */
+	DWORD			Chan_Bandwidth ;	/** filter  channel bandwidth (6, 7, 8) */
+	DWORD			IF_OUT ;			/** Desired IF Out Frequency */
+	WORD			IF_OUT_LOAD ;		/** IF Out Load Resistor (200/300 Ohms) */
+	DWORD			RF_IN ;				/** RF Input Frequency */
+	DWORD			Fxtal ;				/** XTAL Frequency */
+	BYTE			AGC_Mode ;			/** AGC Mode 0: Dual AGC; 1: Single AGC */
+	WORD			TOP ;				/** Value: take over point */
+	BYTE			CLOCK_OUT ;			/** 0: turn off clock out; 1: turn on clock out */
+	BYTE			DIV_OUT ;			/** 4MHz or 16MHz */
+	BYTE			CAPSELECT ;			/** 0: disable On-Chip pulling cap; 1: enable */
+	BYTE			EN_RSSI ;			/** 0: disable RSSI; 1: enable RSSI */
+	BYTE			Mod_Type ;			/** Modulation Type; */
+										/** 0 - Default;		1 - DVB-T */
+
+	/** Calculated Settings */
+	DWORD			RF_LO ;				/** Synth RF LO Frequency */
+	DWORD			IF_LO ;				/** Synth IF LO Frequency */
+	DWORD			TG_LO ;				/** Synth TG_LO Frequency */
+
+	/** Pointers to ControlName Arrays */
+	WORD					Init_Ctrl_Num ;					/** Number of INIT Control Names */
+	TunerControl_struct		Init_Ctrl[INITCTRL_NUM] ;		/** INIT Control Names Array Pointer */
+	WORD					CH_Ctrl_Num ;					/** Number of CH Control Names */
+	TunerControl_struct		CH_Ctrl[CHCTRL_NUM] ;			/** CH Control Name Array Pointer */
+	WORD					MXL_Ctrl_Num ;					/** Number of MXL Control Names */
+	TunerControl_struct		MXL_Ctrl[MXLCTRL_NUM] ;			/** MXL Control Name Array Pointer */
+
+	/** Pointer to Tuner Register Array */
+	WORD					TunerRegs_Num ;		/** Number of Tuner Registers */
+	TunerReg_struct			TunerRegs[TUNER_REGS_NUM] ;			/** Tuner Register Array Pointer */
+} Tuner_struct ;
+
+
+
+typedef enum
+{
+	/**
+	 * Initialization Control Names
+	 */
+	DN_IQTN_AMP_CUT = 1 ,       /** 1  */
+	BB_MODE ,                   /** 2  */
+	BB_BUF ,                    /** 3  */
+	BB_BUF_OA ,	                /** 4  */
+	BB_ALPF_BANDSELECT ,        /** 5  */
+	BB_IQSWAP ,                 /** 6  */
+	BB_DLPF_BANDSEL ,           /** 7  */
+	RFSYN_CHP_GAIN ,            /** 8  */
+	RFSYN_EN_CHP_HIGAIN ,       /** 9  */
+	AGC_IF ,                    /** 10 */
+	AGC_RF ,                    /** 11 */
+	IF_DIVVAL ,                 /** 12 */
+	IF_VCO_BIAS ,               /** 13 */
+	CHCAL_INT_MOD_IF ,          /** 14 */
+	CHCAL_FRAC_MOD_IF ,         /** 15 */
+	DRV_RES_SEL ,               /** 16 */
+	I_DRIVER ,                  /** 17 */
+	EN_AAF ,                    /** 18 */
+	EN_3P ,                     /** 19 */
+	EN_AUX_3P ,                 /** 20 */
+	SEL_AAF_BAND ,              /** 21 */
+	SEQ_ENCLK16_CLK_OUT ,       /** 22 */
+	SEQ_SEL4_16B ,              /** 23 */
+	XTAL_CAPSELECT ,            /** 24 */
+	IF_SEL_DBL ,                /** 25 */
+	RFSYN_R_DIV ,               /** 26 */
+	SEQ_EXTSYNTHCALIF ,         /** 27 */
+	SEQ_EXTDCCAL ,              /** 28 */
+	AGC_EN_RSSI ,               /** 29 */
+	RFA_ENCLKRFAGC ,            /** 30 */
+	RFA_RSSI_REFH ,             /** 31 */
+	RFA_RSSI_REF ,              /** 32 */
+	RFA_RSSI_REFL ,             /** 33 */
+	RFA_FLR ,                   /** 34 */
+	RFA_CEIL ,                  /** 35 */
+	SEQ_EXTIQFSMPULSE ,         /** 36 */
+	OVERRIDE_1 ,                /** 37 */
+	BB_INITSTATE_DLPF_TUNE,     /** 38 */
+	/**
+	 * Channel Change Control Names
+	 */
+	DN_POLY = 51 ,              /** 51 */
+	DN_RFGAIN ,                 /** 52 */
+	DN_CAP_RFLPF ,              /** 53 */
+	DN_EN_VHFUHFBAR ,           /** 54 */
+	DN_GAIN_ADJUST ,            /** 55 */
+	DN_IQTNBUF_AMP ,            /** 56 */
+	DN_IQTNGNBFBIAS_BST ,       /** 57 */
+	RFSYN_EN_OUTMUX ,           /** 58 */
+	RFSYN_SEL_VCO_OUT ,         /** 59 */
+	RFSYN_SEL_VCO_HI ,          /** 60 */
+	RFSYN_SEL_DIVM ,            /** 61 */
+	RFSYN_RF_DIV_BIAS ,         /** 62 */
+	DN_SEL_FREQ ,               /** 63 */
+	RFSYN_VCO_BIAS ,            /** 64 */
+	CHCAL_INT_MOD_RF ,          /** 65 */
+	CHCAL_FRAC_MOD_RF ,         /** 66 */
+	RFSYN_LPF_R ,               /** 67 */
+	CHCAL_EN_INT_RF ,           /** 68 */
+	TG_LO_DIVVAL ,              /** 69 */
+	TG_LO_SELVAL ,              /** 70 */
+	TG_DIV_VAL ,                /** 71 */
+	TG_VCO_BIAS ,               /** 72 */
+	SEQ_EXTPOWERUP ,            /** 73 */
+	OVERRIDE_2 ,                /** 74 */
+	OVERRIDE_3 ,                /** 75 */
+	OVERRIDE_4 ,                /** 76 */
+	SEQ_FSM_PULSE ,             /** 77 */
+	GPIO_4B,                    /** 78 */
+	GPIO_3B,                    /** 79 */
+	GPIO_4,                     /** 80 */
+	GPIO_3,                     /** 81 */
+	GPIO_1B,                    /** 82 */
+	DAC_A_ENABLE ,              /** 83 */
+	DAC_B_ENABLE ,              /** 84 */
+	DAC_DIN_A ,	                /** 85 */
+	DAC_DIN_B ,                 /** 86 */
+#ifdef _MXL_PRODUCTION
+	RFSYN_EN_DIV,				/** 87 */
+	RFSYN_DIVM,					/** 88 */
+	DN_BYPASS_AGC_I2C			/** 89 */
+#endif
+
+} MXL5005_ControlName ;
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_compat.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_compat.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_compat.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_compat.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,503 @@
+/*
+ * $Id: compat.h,v 1.1.1.1 2008/07/09 07:30:49 stylon Exp $
+ */
+
+#ifndef _COMPAT_H
+#define _COMPAT_H
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
+#define	KERN_CONT	""
+#endif
+
+/* To allow I2C compatibility code to work */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)
+#include <linux/i2c-dev.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+# define set_freezable()
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,18)
+# define minor(x) MINOR(x)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+# define DEVICE_ATTR(a,b,c,d) CLASS_DEVICE_ATTR(a,b,c,d)
+# define device_create_file(a,b) class_device_create_file(a,b)
+# define device_remove_file(a,b) class_device_remove_file(a,b)
+# define device_register(a) class_device_register(a)
+# define device_unregister(a) class_device_unregister(a)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+# include <linux/moduleparam.h>
+# include <linux/delay.h>
+# define need_resched() (current->need_resched)
+# define work_struct tq_struct
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19)
+# define BUG_ON(condition) do { if ((condition)!=0) BUG(); } while(0)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23)
+# define irqreturn_t void
+# define IRQ_RETVAL(foobar)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,71)
+# define strlcpy(dest,src,len) strncpy(dest,src,(len)-1)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+# define iminor(inode) minor(inode->i_rdev)
+#endif
+
+#if defined(I2C_ADAP_CLASS_TV_ANALOG) && !defined(I2C_CLASS_TV_ANALOG)
+# define  I2C_CLASS_TV_ANALOG  I2C_ADAP_CLASS_TV_ANALOG
+# define  I2C_CLASS_TV_DIGITAL I2C_ADAP_CLASS_TV_DIGITAL
+#endif
+
+#ifndef __pure
+#  define __pure __attribute__((pure))
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+# define __user
+# define __kernel
+# define __iomem
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
+# define pm_message_t                      u32
+# define pci_choose_state(pci_dev, state)  (state)
+# define PCI_D0                            (0)
+# define assert_spin_locked(foobar)
+#endif
+
+/* Since v4l-dvb now includes it's own copy of linux/i2c-id.h these
+   are no longer necessary */
+/*
+#if !defined(I2C_ALGO_SAA7134)
+#define I2C_ALGO_SAA7134 I2C_HW_B_BT848
+#endif
+#if !defined(I2C_HW_B_CX2388x)
+# define I2C_HW_B_CX2388x I2C_HW_B_BT848
+#endif
+#if !defined(I2C_HW_SAA7134)
+# define I2C_HW_SAA7134 I2C_ALGO_SAA7134
+#endif
+#if !defined(I2C_HW_SAA7146)
+# define I2C_HW_SAA7146 I2C_ALGO_SAA7146
+#endif
+#if !defined(I2C_HW_B_EM2820)
+#define I2C_HW_B_EM2820 0x99
+#endif
+*/
+
+#ifndef I2C_M_IGNORE_NAK
+# define I2C_M_IGNORE_NAK 0x1000
+#endif
+
+/* v4l-dvb uses an out of kernel copy of i2c-id.h, which does not have
+   some stuff that previous versions of i2c-id.h defined. */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) && defined(LINUX_I2C_ID_H)
+# define I2C_ALGO_BIT 0x010000
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+#define __le32 __u32
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7))
+static inline unsigned long msecs_to_jiffies(const unsigned int m)
+{
+#if HZ <= 1000 && !(1000 % HZ)
+	return (m + (1000 / HZ) - 1) / (1000 / HZ);
+#else
+#if HZ > 1000 && !(HZ % 1000)
+	return m * (HZ / 1000);
+#else
+	return (m * HZ + 999) / 1000;
+#endif
+#endif
+}
+static inline unsigned int jiffies_to_msecs(const unsigned long j)
+{
+#if HZ <= 1000 && !(1000 % HZ)
+	return (1000 / HZ) * j;
+#else
+#if HZ > 1000 && !(HZ % 1000)
+	return (j + (HZ / 1000) - 1)/(HZ / 1000);
+#else
+	return (j * 1000) / HZ;
+#endif
+#endif
+}
+static inline void msleep(unsigned int msecs)
+{
+	unsigned long timeout = msecs_to_jiffies(msecs);
+	while (timeout) {
+		set_current_state(TASK_UNINTERRUPTIBLE);
+		timeout = schedule_timeout(timeout);
+	}
+}
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+static inline unsigned long msleep_interruptible(unsigned int msecs)
+{
+	unsigned long timeout = msecs_to_jiffies(msecs);
+
+	while (timeout) {
+		set_current_state(TASK_INTERRUPTIBLE);
+		timeout = schedule_timeout(timeout);
+	}
+	return jiffies_to_msecs(timeout);
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+/* some keys from 2.6.x which are not (yet?) in 2.4.x */
+# define KEY_PLAY                207
+# define KEY_PRINT		 210
+# define KEY_EMAIL         215
+# define KEY_SEARCH              217
+# define KEY_SELECT 		 0x161
+# define KEY_GOTO                0x162
+# define KEY_INFO                0x166
+# define KEY_CHANNEL             0x16b
+# define KEY_LANGUAGE            0x170
+# define KEY_SUBTITLE		 0x172
+# define KEY_ZOOM                0x174
+# define KEY_MODE		 0x175
+# define KEY_TV                  0x179
+# define KEY_CD                  0x17f
+# define KEY_TUNER               0x182
+# define KEY_TEXT                0x184
+# define KEY_DVD		 0x185
+# define KEY_AUDIO               0x188
+# define KEY_VIDEO               0x189
+# define KEY_RED                 0x18e
+# define KEY_GREEN               0x18f
+# define KEY_YELLOW              0x190
+# define KEY_BLUE                0x191
+# define KEY_CHANNELUP           0x192
+# define KEY_CHANNELDOWN         0x193
+# define KEY_RESTART		 0x198
+# define KEY_SHUFFLE     	 0x19a
+# define KEY_NEXT                0x197
+# define KEY_RADIO               0x181
+# define KEY_PREVIOUS            0x19c
+# define KEY_MHP                 0x16f
+# define KEY_EPG                 0x16d
+# define KEY_FASTFORWARD         208
+# define KEY_LIST                0x18b
+# define KEY_LAST                0x195
+# define KEY_CLEAR               0x163
+# define KEY_AUX                 0x186
+# define KEY_SCREEN              0x177
+# define KEY_PC                  0x178
+# define KEY_MEDIA               226
+# define KEY_SLOW                0x199
+# define KEY_OK                  0x160
+# define KEY_DIGITS              0x19d
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+# define KEY_SEND		231
+# define KEY_REPLY		232
+# define KEY_FORWARDMAIL	233
+# define KEY_SAVE		234
+# define KEY_DOCUMENTS		235
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+#define container_of(ptr, type, member) ({                      \
+	const typeof( ((type *)0)->member ) *__mptr = (ptr);    \
+	(type *)( (char *)__mptr - offsetof(type,member) );})
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+#include <linux/mm.h>
+static inline unsigned long vmalloc_to_pfn(void * vmalloc_addr)
+{
+    return page_to_pfn(vmalloc_to_page(vmalloc_addr));
+}
+
+static unsigned long kvirt_to_pa(unsigned long adr)
+{
+	unsigned long kva, ret;
+
+	kva = (unsigned long) page_address(vmalloc_to_page((void *)adr));
+	kva |= adr & (PAGE_SIZE-1); /* restore the offset */
+	ret = __pa(kva);
+	return ret;
+}
+
+#ifndef wait_event_timeout
+#define wait_event_timeout(wq, condition, timeout)                   	     \
+({                                                                           \
+     long __ret = timeout;                                                   \
+     if (!(condition))                                                       \
+     do {                                                                    \
+	     DEFINE_WAIT(__wait);                                            \
+	     for (;;) {                                                      \
+		     prepare_to_wait(&wq, &__wait, TASK_UNINTERRUPTIBLE);    \
+		     if (condition)                                          \
+			 break;                                              \
+		     __ret = schedule_timeout(__ret);                        \
+		     if (!__ret)                                             \
+			 break;                                              \
+	     }                                                               \
+	     finish_wait(&wq, &__wait);                                      \
+     } while (0);							     \
+     __ret;                                                                  \
+})
+#endif
+
+#define remap_pfn_range remap_page_range
+
+#endif
+
+/* vm_insert_page() was added in 2.6.15 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) && defined(_LINUX_MM_H)
+static inline int vm_insert_page(struct vm_area_struct *vma,
+	unsigned long addr, struct page *page)
+{
+	return remap_pfn_range(vma, addr, page_to_pfn(page), PAGE_SIZE,
+			       vma->vm_page_prot);
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+#ifndef kcalloc
+#define kcalloc(n,size,flags)			\
+({						\
+  void * __ret = NULL;				\
+  __ret = kmalloc(n * size, flags);		\
+  if (__ret)					\
+	 memset(__ret, 0, n * size);		\
+  __ret;					\
+})
+#endif
+#endif
+
+/* try_to_freeze() lost its argument.  Must appear after linux/sched.h */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) && defined(_LINUX_SCHED_H)
+# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#  define try_to_freeze() try_to_freeze(PF_FREEZE)
+# else
+#  define try_to_freeze() (0)
+# endif
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+#ifndef kzalloc
+#define kzalloc(size, flags)				\
+({							\
+	void *__ret = kmalloc(size, flags);		\
+	if (__ret)					\
+		memset(__ret, 0, size);			\
+	__ret;						\
+})
+#endif
+#endif
+
+/* The class_device system didn't appear until 2.5.69 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define class_device_create_file(a, b) (0)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+# define class_device_create(a, b, c, d, e, f, g, h) class_simple_device_add(a, c, d, e, f, g, h)
+# define class_device_destroy(a, b) class_simple_device_remove(b)
+# define class_create(a, b) class_simple_create(a, b)
+# define class_destroy(a) class_simple_destroy(a)
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+# define class_device_create(a, b, c, d, e, f, g, h) class_device_create(a, c, d, e, f, g, h)
+#endif
+/* device_create/destroy added in 2.6.18 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+/* on older kernels, class_device_create will in turn be a compat macro */
+# define device_create(a, b, c, d, e, f, g) class_device_create(a, NULL, c, b, d, e, f, g)
+# define device_destroy(a, b) class_device_destroy(a, b)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+# define input_allocate_device() kzalloc(sizeof(struct input_dev),GFP_KERNEL);
+# define input_free_device(input_dev) kfree(input_dev)
+# ifdef _INPUT_H  /* input.h must be included _before_ compat.h for this to work */
+   /* input_register_device() was changed to return an error code in 2.6.15 */
+#  define input_register_device(x) (input_register_device(x), 0)
+# endif
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15)
+#define DEFINE_MUTEX(a) DECLARE_MUTEX(a)
+#define mutex_lock_interruptible(a) down_interruptible(a)
+#define mutex_unlock(a) up(a)
+#define mutex_lock(a) down(a)
+#define mutex_init(a) init_MUTEX(a)
+#define mutex_trylock(a) down_trylock(a)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) && defined(_LINUX_SCHED_H)
+static inline signed long __sched
+schedule_timeout_interruptible(signed long timeout)
+{
+	__set_current_state(TASK_INTERRUPTIBLE);
+	return schedule_timeout(timeout);
+}
+#endif
+
+/* New 4GB DMA zone was added in 2.6.15-rc2 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+#  define __GFP_DMA32	__GFP_DMA
+#endif
+
+/* setup_timer() helper added 10/31/05, 2.6.15-rc1 */
+/* Need linux/timer.h to be included for struct timer_list */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) && defined(_LINUX_TIMER_H)
+static inline void setup_timer(struct timer_list * timer,
+			       void (*function)(unsigned long),
+			       unsigned long data)
+{
+	timer->function = function;
+	timer->data = data;
+	init_timer(timer);
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+#define IRQF_SHARED		SA_SHIRQ
+#define IRQF_DISABLED		SA_INTERRUPT
+#endif
+
+/* linux/usb.h must be included _before_ compat.h for this code to get
+   turned on.  We can not just include usb.h here, because there is a
+   lot of code which will not compile if it has usb.h included, due to
+   conflicts with symbol names.  */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) && \
+    defined(__LINUX_USB_H) && defined(_INPUT_H)
+#include <linux/input.h>
+/* Found in linux/usb_input.h in 2.6.13 */
+/* Moved to linux/usb/input.h in 2.6.18 */
+static inline void
+usb_to_input_id(const struct usb_device *dev, struct input_id *id)
+{
+	id->bustype = BUS_USB;
+	id->vendor = le16_to_cpu(dev->descriptor.idVendor);
+	id->product = le16_to_cpu(dev->descriptor.idProduct);
+	id->version = le16_to_cpu(dev->descriptor.bcdDevice);
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+# define PCIAGP_FAIL 0
+
+#define vmalloc_32_user(a) vmalloc_32(a)
+
+#endif
+
+/* bool type and enum-based definition of true and false was added in 2.6.19 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+typedef int bool;
+#define true 1
+#define false 0
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+#define sony_pic_camera_command(a,b) sonypi_camera_command(a,b)
+
+#define SONY_PIC_COMMAND_SETCAMERAAGC        SONYPI_COMMAND_SETCAMERAAGC
+#define SONY_PIC_COMMAND_SETCAMERABRIGHTNESS SONYPI_COMMAND_SETCAMERABRIGHTNESS
+#define SONY_PIC_COMMAND_SETCAMERACOLOR      SONYPI_COMMAND_SETCAMERACOLOR
+#define SONY_PIC_COMMAND_SETCAMERACONTRAST   SONYPI_COMMAND_SETCAMERACONTRAST
+#define SONY_PIC_COMMAND_SETCAMERAHUE        SONYPI_COMMAND_SETCAMERAHUE
+#define SONY_PIC_COMMAND_SETCAMERAPICTURE    SONYPI_COMMAND_SETCAMERAPICTURE
+#define SONY_PIC_COMMAND_SETCAMERASHARPNESS  SONYPI_COMMAND_SETCAMERASHARPNESS
+#define SONY_PIC_COMMAND_SETCAMERA           SONYPI_COMMAND_SETCAMERA
+#endif
+
+/* Parameter to pci_match_device() changed in 2.6.13-rc2 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) && defined(LINUX_PCI_H)
+#define pci_match_device(drv, dev)	pci_match_device((drv)->id_table, dev)
+#endif
+
+/* pci_dev got a new revision field in 2.6.23-rc1 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) && defined(LINUX_PCI_H)
+/* Just make it easier to subsitute pci_dev->revision with
+ * v4l_compat_pci_rev(pci_dev).  It's too bad there isn't some kind of context
+ * sensitive macro in C that could do this for us.  */
+static inline u8 v4l_compat_pci_rev(struct pci_dev *pci)
+{ u8 rev; pci_read_config_byte(pci, PCI_REVISION_ID, &rev); return rev; }
+#endif
+
+/* ALSA removed a bunch of typedefs and renamed some structs in 2.6.16 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16)
+# ifdef __SOUND_CORE_H
+#  define snd_card _snd_card /* struct _snd_card became struct snd_card */
+#  define snd_pcm _snd_pcm
+#  undef snd_device
+#  define snd_device _snd_device
+# endif
+# ifdef __SOUND_PCM_H
+#  define snd_pcm_substream _snd_pcm_substream
+#  define snd_pcm_hardware _snd_pcm_hardware
+#  define snd_pcm_runtime _snd_pcm_runtime
+#  define snd_pcm_ops _snd_pcm_ops
+# endif
+# ifdef __SOUND_ASOUND_H
+#  define snd_pcm_hw_params sndrv_pcm_hw_params
+#  define snd_ctl_elem_info sndrv_ctl_elem_info
+#  define snd_ctl_elem_value sndrv_ctl_elem_value
+# endif
+# ifdef __SOUND_CONTROL_H
+#  undef snd_kcontrol
+#  define snd_kcontrol _snd_kcontrol
+#  define snd_kcontrol_new _snd_kcontrol_new
+# endif
+#endif
+
+#if defined(COMPAT_PCM_TO_RATE_BIT) && defined(__SOUND_PCM_H)
+/* New alsa core utility function */
+static inline unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate)
+{
+	static const unsigned int rates[] = { 5512, 8000, 11025, 16000, 22050,
+		32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000 };
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(rates); i++)
+		if (rates[i] == rate)
+			return 1u << i;
+	return SNDRV_PCM_RATE_KNOT;
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+# define task_pid_nr(current) ((current)->pid)
+
+# define sg_init_table(a,b)
+# define sg_page(p) (sg->page)
+# define sg_set_page(sglist,pg,sz,off)					\
+do {									\
+	struct scatterlist *p=sglist;					\
+	p->page   = pg;							\
+	p->length = sz;							\
+	p->offset = off;						\
+} while (0)
+#endif
+
+#ifndef BIT_MASK
+# define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_LONG))
+# define BIT_WORD(nr)            ((nr) / BITS_PER_LONG)
+#endif
+
+#endif
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_debug.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_debug.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_debug.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_debug.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,4 @@
+
+// turn on/off debug for all modules
+//#define	CONFIG_DVB_USB_DEBUG	0	
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulator.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulator.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulator.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulator.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,540 @@
+#include "a867_demodulator.h"
+
+
+Dword Demodulator_writeRegister (
+      Demodulator*    demodulator,
+      Byte            chip,
+      Processor       processor,
+      Dword           registerAddress,
+      Byte            value
+) {
+    return (Standard_writeRegister (demodulator, chip, processor, registerAddress, value));
+}
+
+
+Dword Demodulator_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_writeRegisters (demodulator, chip, processor, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+) {
+    return (Standard_writeScatterRegisters (demodulator, chip, processor, valueSetsLength, valueSets));
+}
+
+
+Dword Demodulator_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_writeTunerRegisters (demodulator, chip, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_writeGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_writeGenericRegisters (demodulator, chip, interfaceIndex, slaveAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_writeEepromValues (demodulator, chip, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_writeRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+)
+{
+    return (Standard_writeRegisterBits (demodulator, chip, processor, registerAddress, position, length, value));
+}
+
+
+Dword Demodulator_readRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    OUT Byte*           value
+) {
+    return (Standard_readRegister (demodulator, chip, processor, registerAddress, value));
+}
+
+
+Dword Demodulator_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+) {
+    return (Standard_readRegisters (demodulator, chip, processor, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+) {
+    return (Standard_readScatterRegisters (demodulator, chip, processor, valueSetsLength, valueSets));
+}
+
+
+Dword Demodulator_readTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_readTunerRegisters (demodulator, chip, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_readGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    return (Standard_readGenericRegisters (demodulator, chip, interfaceIndex, slaveAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+) {
+    return (Standard_readEepromValues (demodulator, chip, registerAddress, bufferLength, buffer));
+}
+
+
+Dword Demodulator_readRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    OUT Byte*           value
+) {
+    return (Standard_readRegisterBits (demodulator, chip, processor, registerAddress, position, length, value));
+}
+
+
+Dword Demodulator_getHardwareVersion (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          version
+) {
+    return (Standard_getHardwareVersion (demodulator, version));
+}
+
+
+Dword Demodulator_getFirmwareVersion (
+    IN  Demodulator*    demodulator,
+    IN  Processor       processor,
+    OUT Dword*          version
+) {
+    return (Standard_getFirmwareVersion (demodulator, processor, version));
+}
+
+
+Dword Demodulator_getRfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           rfAgc
+) {
+    return (Standard_getRfAgcGain (demodulator, chip, rfAgc));
+}
+
+
+Dword Demodulator_getIfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           ifAgc
+) {
+    return (Standard_getIfAgcGain (demodulator, chip, ifAgc));
+}
+
+
+Dword Demodulator_controlPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+) {
+    return (Standard_controlPidFilter (demodulator, chip, control));
+}
+
+
+Dword Demodulator_addPidToFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            index,
+    IN  Pid             pid
+) {
+    return (Standard_addPidToFilter (demodulator, chip, index, pid));
+}
+
+
+Dword Demodulator_resetPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+) {
+    return (Standard_resetPidFilter (demodulator, chip));
+}
+
+
+Dword Demodulator_loadIrTable (
+    IN  Demodulator*    demodulator,
+    IN  Word            tableLength,
+    IN  Byte*           table
+) {
+    return (Standard_loadIrTable (demodulator, tableLength, table));
+}
+
+
+Dword Demodulator_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Byte*           firmwareCodes,
+    IN  Segment*        firmwareSegments,
+    IN  Byte*           firmwarePartitions
+) {
+
+    return (Standard_loadFirmware (demodulator, firmwareCodes, firmwareSegments, firmwarePartitions));
+}
+
+
+Dword Demodulator_initialize (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chipNumber,
+    IN  Word            sawBandwidth,
+    IN  StreamType      streamType,
+    IN  Architecture    architecture
+) {
+    return (Standard_initialize (demodulator, chipNumber, sawBandwidth, streamType, architecture));
+}
+
+
+Dword Demodulator_finalize (
+    IN  Demodulator*    demodulator
+) {
+    return (Standard_finalize (demodulator));
+}
+
+
+Dword Demodulator_isAgcLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    return (Standard_isAgcLocked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_isCfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    return (Standard_isCfoeLocked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_isSfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    return (Standard_isSfoeLocked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_isTpsLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    return (Standard_isTpsLocked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_isMpeg2Locked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    return (Standard_isMpeg2Locked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_isLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+)
+{
+    return (Standard_isLocked (demodulator, chip, locked));
+}
+
+
+Dword Demodulator_setPriority (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Priority        priority
+)
+{
+    return (Standard_setPriority (demodulator, chip, priority));
+}
+
+
+Dword Demodulator_reset (
+    IN  Demodulator*    demodulator
+) {
+    return (Standard_reset (demodulator));
+}
+
+
+Dword Demodulator_getChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    OUT ChannelModulation*      channelModulation
+) {
+    return (Standard_getChannelModulation (demodulator, chip, channelModulation));
+}
+
+
+Dword Demodulator_setChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    IN  ChannelModulation*      channelModulation
+) {
+    return (Standard_setChannelModulation (demodulator, chip, channelModulation));
+}
+
+
+Dword Demodulator_acquireChannel (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,
+    IN  Dword           frequency
+) {
+    return (Standard_acquireChannel (demodulator, chip, bandwidth, frequency));
+}
+
+
+Dword Demodulator_setStreamType (
+    IN  Demodulator*    demodulator,
+    IN  StreamType      streamType
+) {
+    return (Standard_setStreamType (demodulator, streamType));
+}
+
+
+Dword Demodulator_setArchitecture (
+    IN  Demodulator*    demodulator,
+    IN  Architecture    architecture
+) {
+    return (Standard_setArchitecture (demodulator, architecture));
+}
+
+
+Dword Demodulator_getSignalQuality (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           quality
+) {
+    return (Standard_getSignalQuality (demodulator, chip, quality));
+}
+
+
+Dword Demodulator_getSignalStrength (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           strength
+) {
+    return (Standard_getSignalStrength (demodulator, chip, strength));
+}
+
+
+Dword Demodulator_getSignalStrengthDbm (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Long            rfpullUpVolt_X10,     /** RF pull up voltage multiplied by 10 */
+    IN  Long            ifpullUpVolt_X10,     /** IF pull up voltage multiplied by 10 */
+    OUT Long*           strengthDbm           /** DBm                                */
+) {
+    return (Standard_getSignalStrengthDbm (demodulator, chip, rfpullUpVolt_X10, ifpullUpVolt_X10, strengthDbm));
+}
+
+Dword Demodulator_getPostVitBer (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Dword*          postErrorCount,  /** 24 bits */
+    OUT Dword*          postBitCount,    /** 16 bits */
+    OUT Word*           abortCount
+){
+	return (Standard_getPostVitBer(demodulator, chip, postErrorCount, postBitCount, abortCount));
+}
+
+
+Dword Demodulator_setStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            superFrameCount,
+    IN  Word            packetUnit
+) {
+    return (Standard_setStatisticRange (demodulator, chip, superFrameCount, packetUnit));
+}
+
+
+Dword Demodulator_getStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte*           superFrameCount,
+    IN  Word*           packetUnit
+) {
+    return (Standard_getStatisticRange (demodulator, chip, superFrameCount, packetUnit));
+}
+
+
+Dword Demodulator_getStatistic (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Statistic*      statistic
+) {
+    return (Standard_getStatistic (demodulator, chip, statistic));
+}
+
+
+Dword Demodulator_getInterrupts (
+    IN  Demodulator*    demodulator,
+    OUT Interrupts*     interrupts
+) {
+    return (Standard_getInterrupts (demodulator, interrupts));
+}
+
+
+Dword Demodulator_clearInterrupt (
+    IN  Demodulator*    demodulator,
+    IN  Interrupt       interrupt
+) {
+    return (Standard_clearInterrupt (demodulator, interrupt));
+}
+
+
+Dword Demodulator_getDataLength (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          dataLength,
+    OUT Bool*           valid
+) {
+    return (Standard_getDataLength (demodulator, dataLength, valid));
+}
+
+
+//jamie: The function is unused.
+Dword Demodulator_getData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+) {
+    return (Standard_getData (demodulator, bufferLength, buffer));
+}
+
+//jamie: The function is unused.
+Dword Demodulator_getDatagram (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+) {
+    return (Standard_getDatagram (demodulator, bufferLength, buffer));
+}
+
+
+Dword Demodulator_getIrCode (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          code
+)  {
+    return (Standard_getIrCode (demodulator, code));
+}
+
+
+Dword Demodulator_reboot (
+    IN  Demodulator*    demodulator
+)  {
+    return (Standard_reboot (demodulator));
+}
+
+
+Dword Demodulator_controlPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+) {
+    return (Standard_controlPowerSaving (demodulator, chip, control));
+}
+
+
+Dword Demodulator_controlTunerPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            control
+) {
+    return (Standard_controlTunerPowerSaving (demodulator, control));
+}
+
+
+Dword Demodulator_setBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize       burstSize
+) {
+    return (Standard_setBurstSize (demodulator, burstSize));
+}
+
+
+Dword Demodulator_getBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize*      burstSize
+) {
+    return (Standard_getBurstSize (demodulator, burstSize));
+}
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulatorextend.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulatorextend.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulatorextend.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulatorextend.c	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,607 @@
+#include "a867_demodulatorextend.h"
+/*
+#include "i2cimpl.h"
+#include "spiimpl.h"
+#include "i2uimpl.h"
+#include "i2u.h"
+#include "sdioimpl.h"
+*/
+
+#include "a867_usb2impl.h"
+#include "a867_cmd.h"
+
+#include "a867_Maxlinear_MXL5007.h"
+#include "a867_Afa_AF9007.h"
+
+static PidInfo pidInfo;
+BusDescription busDesc[] =
+{
+    /** 0: NULL bus */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+    /** 1: I2C bus */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+    /** 2: USB bus */
+    {
+        Usb2_getDriver,
+        Usb2_writeControlBus,
+        Usb2_readControlBus,
+        Usb2_readDataBus,
+    },
+    /** 3: SPI bus */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+    /** 4: SDIO bus */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+    /** 5: USB11 bus */
+    {
+        Usb2_getDriver,
+        Usb2_writeControlBus,
+        Usb2_readControlBus,
+        Usb2_readDataBus,
+    },
+    /** 6: I2C for old mail box */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+    /** 7: USB for old mail box */
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+    },
+};
+
+CmdDescription cmdDesc[] =
+{
+    /** NULL Bus */
+    {
+        0,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    },
+    /** 1:I2C Bus */
+    {
+        255,
+        &busDesc[1],
+        Cmd_writeRegisters,
+        Cmd_writeScatterRegisters,
+        Cmd_writeTunerRegisters,
+        Cmd_writeEepromValues,
+        Cmd_readRegisters,
+        Cmd_readScatterRegisters,
+        Cmd_readTunerRegisters,
+        Cmd_readEepromValues,
+        Cmd_modifyRegister,
+        Cmd_loadFirmware,
+        Cmd_reboot,
+        Cmd_sendCommand,
+        Cmd_receiveData
+    },
+    /** 2:USB Bus */
+    {
+        63,
+        &busDesc[2],
+        Cmd_writeRegisters,
+        Cmd_writeScatterRegisters,
+        Cmd_writeTunerRegisters,
+        Cmd_writeEepromValues,
+        Cmd_readRegisters,
+        Cmd_readScatterRegisters,
+        Cmd_readTunerRegisters,
+        Cmd_readEepromValues,
+        Cmd_modifyRegister,
+        Cmd_loadFirmware,
+        Cmd_reboot,
+        Cmd_sendCommand,
+        Cmd_receiveData
+    },
+    /** 3:SPI Bus */
+    {
+        255,
+        &busDesc[3],
+        Cmd_writeRegisters,
+        Cmd_writeScatterRegisters,
+        Cmd_writeTunerRegisters,
+        Cmd_writeEepromValues,
+        Cmd_readRegisters,
+        Cmd_readScatterRegisters,
+        Cmd_readTunerRegisters,
+        Cmd_readEepromValues,
+        Cmd_modifyRegister,
+        Cmd_loadFirmware,
+        Cmd_reboot,
+        Cmd_sendCommand,
+        Cmd_receiveData
+    },
+    /** 4:SDIO Bus */
+    {
+        255,
+        &busDesc[4],
+        Cmd_writeRegisters,
+        Cmd_writeScatterRegisters,
+        Cmd_writeTunerRegisters,
+        Cmd_writeEepromValues,
+        Cmd_readRegisters,
+        Cmd_readScatterRegisters,
+        Cmd_readTunerRegisters,
+        Cmd_readEepromValues,
+        Cmd_modifyRegister,
+        Cmd_loadFirmware,
+        Cmd_reboot,
+        Cmd_sendCommand,
+        Cmd_receiveData
+    },
+    /** 5:USB11 Bus */
+    {
+        63,
+        &busDesc[5],
+        Cmd_writeRegisters,
+        Cmd_writeScatterRegisters,
+        Cmd_writeTunerRegisters,
+        Cmd_writeEepromValues,
+        Cmd_readRegisters,
+        Cmd_readScatterRegisters,
+        Cmd_readTunerRegisters,
+        Cmd_readEepromValues,
+        Cmd_modifyRegister,
+        Cmd_loadFirmware,
+        Cmd_reboot,
+        Cmd_sendCommand,
+        Cmd_receiveData
+    },
+    /** 6:I2C for old mailbox */
+    {
+        16,
+        &busDesc[6],
+        NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL
+    },
+    /** 7:USB for old mailbox */
+    {
+        16,
+        &busDesc[7],
+        NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL,
+	    NULL
+    },
+};
+
+Dword Demodulator_setBusTuner (
+    IN  Demodulator*    demodulator,
+    IN  Word            busId,
+    IN  Word            tunerId
+) {
+    Dword error = Error_NO_ERROR;
+
+    Ganymede* ganymede;
+    ganymede = (Ganymede*) demodulator;
+    ganymede->cmdDescription = &cmdDesc[busId];
+    ganymede->busId = busId;
+
+    switch(tunerId) {
+    case Tuner_Afatech_AF9007:
+	ganymede->tunerDescription = &tuner_AF9007;
+	break;
+
+    case Tuner_Maxlinear_MXL5007:
+	ganymede->tunerDescription = &tuner_MXL5007;
+	break;
+
+    default:
+	error = Error_INVALID_TUNER_TYPE;
+	goto exit;
+	break;
+    }
+
+    if (ganymede->tunerDescription->tunerScript == NULL) {
+        ganymede->tunerDescription->tunerScript = NULL;
+        ganymede->tunerDescription->tunerScriptSets = NULL;
+    }
+
+exit:
+    return(error);
+}
+
+Dword Demodulator_getChannelStatistic (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    OUT ChannelStatistic*       channelStatistic
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetChannelStatisticRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.channelStatistic = channelStatistic;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETCHANNELSTATISTIC,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Dword postErrCnt;
+    Dword postBitCnt;
+    Word rsdAbortCnt;
+    Ganymede* ganymede;
+
+
+    ganymede = (Ganymede*) demodulator;
+
+
+    /** Get BER if couter is ready, error = Error_RSD_COUNTER_NOT_READY if counter is not ready */
+    if (ganymede->architecture == Architecture_PIP) {
+        error = Standard_getPostVitBer (demodulator, chip, &postErrCnt, &postBitCnt, &rsdAbortCnt);
+        if (error == Error_NO_ERROR) {
+            ganymede->channelStatistic[chip].postVitErrorCount = postErrCnt;
+            ganymede->channelStatistic[chip].postVitBitCount = postBitCnt;
+            ganymede->channelStatistic[chip].abortCount = rsdAbortCnt;
+        }
+    } else {
+        error = Standard_getPostVitBer (demodulator, 0, &postErrCnt, &postBitCnt, &rsdAbortCnt);
+        if (error == Error_NO_ERROR) {
+            ganymede->channelStatistic[chip].postVitErrorCount = postErrCnt;
+            ganymede->channelStatistic[chip].postVitBitCount = postBitCnt;
+            ganymede->channelStatistic[chip].abortCount = rsdAbortCnt;
+        }
+    }
+
+    *channelStatistic = ganymede->channelStatistic[chip];
+
+#endif
+
+    return (error);
+}
+Dword Demodulator_addPid (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Pid             pid
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    AddPidRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.pid = pid;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_ADDPID,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte writeBuffer[2];
+    Byte i, j;
+    Bool found;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (pidInfo.pidinit == False) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            for (j = 0; j < 32; j++) {
+                pidInfo.pidtable[i].pid[j] = 0xFFFF;
+            }
+        }
+        pidInfo.pidinit = True;
+    }
+
+    /** Enable pid filter */
+    if (pidInfo.pidcount == 0) {
+        error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_en, mp2if_pid_en_pos, mp2if_pid_en_len, 1);
+        if (error) goto exit;
+    } else {
+        found = False;
+        for (i = 0; i < 32; i++) {
+            if (pidInfo.pidtable[chip].pid[i] == pid.value) {
+                found = True;
+                break;
+            }
+        }
+        if (found == True)
+            goto exit;
+    }
+
+    for (i = 0; i < 32; i++) {
+        if (pidInfo.pidtable[chip].pid[i] == 0xFFFF)
+            break;
+    }
+    if (i == 32) {
+        error = Error_PID_FILTER_FULL;
+        goto exit;
+    }
+
+    writeBuffer[0] = (Byte) pid.value;
+    writeBuffer[1] = (Byte) (pid.value >> 8);
+
+    error = Standard_writeRegisters (demodulator, chip, Processor_OFDM, p_mp2if_pid_dat_l, 2, writeBuffer);
+    if (error) goto exit;
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_index_en, mp2if_pid_index_en_pos, mp2if_pid_index_en_len, 1);
+    if (error) goto exit;
+
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_mp2if_pid_index, i);
+    if (error) goto exit;
+
+    pidInfo.pidtable[chip].pid[i] = pid.value;
+    pidInfo.pidcount++;
+
+exit :
+#endif
+
+    return (error);
+}
+
+
+Dword Demodulator_addPidAt (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            index,
+    IN  Pid             pid
+) {
+	return (Demodulator_addPidToFilter (demodulator, chip, index, pid));
+}
+
+
+Dword Demodulator_removePid (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Pid             pid
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    RemovePidRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.pid = pid;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_REMOVEPID,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte i;
+    Bool found;
+    Interrupts interrupts;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    found = False;
+    for (i = 0; i < 32; i++) {
+        if (pidInfo.pidtable[chip].pid[i] == pid.value) {
+            found = True;
+            break;
+        }
+    }
+    if (found == False)
+        goto exit;
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_index_en, mp2if_pid_index_en_pos, mp2if_pid_index_en_len, 0);
+    if (error) goto exit;
+
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_mp2if_pid_index, i);
+    if (error) goto exit;
+
+    pidInfo.pidtable[chip].pid[i] = 0xFFFF;
+
+    /** Disable pid filter */
+    if (pidInfo.pidcount == 1) {
+        error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_en, mp2if_pid_en_pos, mp2if_pid_en_len, 0);
+
+        error = Standard_getInterrupts (demodulator, &interrupts);
+        if (error) goto exit;
+        if (interrupts & Interrupt_DVBT) {
+            error = Standard_clearInterrupt (demodulator, Interrupt_DVBT);
+            if (error) goto exit;
+        }
+    }
+
+    pidInfo.pidcount--;
+
+exit :
+#endif
+
+    return (error);
+}
+
+
+Dword Demodulator_removePidAt (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+	IN  Byte			index,
+    IN  Pid             pid
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+	DWORD number;
+	BOOL result;
+	RemovePidAtRequest request;
+	Ganymede* ganymede;
+
+	ganymede = (Ganymede*) demodulator;
+	
+	if (ganymede->driver != NULL) {
+		request.chip = chip;
+		request.index = index;
+		request.pid = pid;
+		result = DeviceIoControl (
+					ganymede->driver,
+					IOCTL_AFA_DEMOD_REMOVEPIDAT,
+					&request,
+					sizeof (request),
+					NULL,
+					0,
+					&number,
+					NULL
+		);
+		error = request.error;
+	} else {
+		error = Error_DRIVER_INVALID;
+	}
+#else
+	Ganymede* ganymede;
+
+	ganymede = (Ganymede*) demodulator;
+
+	error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_index_en, mp2if_pid_index_en_pos, mp2if_pid_index_en_len, 0);
+	if (error) goto exit;
+
+	error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_mp2if_pid_index, index);
+	if (error) goto exit;
+exit :
+#endif
+
+	return (error);
+}
+
+
+Dword Demodulator_resetPid (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte i;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    for (i = 0; i < 32; i++) {
+        pidInfo.pidtable[chip].pid[i] = 0xFFFF;
+    }
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_rst, mp2if_pid_rst_pos, mp2if_pid_rst_len, 1);
+    if (error) goto exit;
+
+    pidInfo.pidcount = 0;
+
+exit :
+#endif
+
+    return (error);
+}
+
+
+#ifdef UNDER_CE
+#else
+extern long ActiveSync;
+#endif
+
+Dword Demodulator_controlActiveSync (
+    IN Demodulator* demodulator,
+    IN Byte         control
+) {
+#ifdef UNDER_CE
+    if (control == 0)
+        ActiveSync = 0;
+    else
+        ActiveSync = 1;
+#endif
+
+    return (Error_NO_ERROR);
+}
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulatorextend.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulatorextend.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulatorextend.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulatorextend.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,1326 @@
+#ifndef __DEMODULATOREXTEND_H__
+#define __DEMODULATOREXTEND_H__
+
+
+//#include <stdio.h>
+//#include <math.h>
+#include "a867_type.h"
+#include "a867_user.h"
+#include "a867_register.h"
+#include "a867_error.h"
+#include "a867_cmd.h"
+/*
+#include "i2cimpl.h"
+#include "spiimpl.h"
+#include "sdioimpl.h"
+*/
+#include "a867_usb2impl.h"
+#include "a867_demodulator.h"
+
+
+#define Tuner_Panasonic_ENV77H11D5			0x01
+#define Tuner_Microtune_MT2060				0x02
+#define Tuner_Maxlinear_MXL5003				0x03
+#define Tuner_Philip_TD1316AFIHP			0x04
+#define Tuner_Freescale_FS803A				0x05
+#define Tuner_Quantek_QT1010				0x06
+#define Tuner_Panasonic_ENV75H10D8			0x07
+#define Tuner_Lg_TDTMG252D					0x08
+#define Tuner_Himax_HTXR03A					0x09
+#define Tuner_Alps_TDQ44M					0x0A
+#define Tuner_Infineon_TUA6045				0x0B
+#define Tuner_Infineon_TUA6034				0x0C
+#define Tuner_Maxlinear_MXL5005				0x0D
+#define Tuner_Thomson_664X					0x0E
+#define Tuner_Thomson_6630					0x0F
+#define Tuner_Samsung_DTOS403				0x10
+#define Tuner_Samsung_DTOS446				0x11
+#define Tuner_Freescale_FS803A_DLNA			0x12
+#define Tuner_Microtune_MT2060_7SAW			0x13
+#define Tuner_Alps_TDQ03					0x14
+#define Tuner_Thomson_759X					0x15
+#define Tuner_Empire_DTN317					0x16
+#define Tuner_Partsnic_PDHTF05D				0x17
+#define Tuner_Panasonic_ENG37A30GF			0x18
+#define Tuner_Philips_FQD1216ME_MK5			0x19
+#define Tuner_Infineon_TUA6041				0x1A
+#define Tuner_Philips_TDA18271				0x1B
+#define Tuner_Alps_TDQD1X001A				0x1C
+#define Tuner_Maxlinear_MXL5005_RSSI		0x1D
+#define Tuner_Thomson_75101					0x1E
+#define Tuner_Sharp_5056					0x1F
+#define Tuner_Freescale_MC44CD02			0x20
+#define Tuner_Microtune_MT2260B0			0x21
+#define Tuner_Philips_TDA18291HN			0x22
+#define Tuner_Microtune_MT2266				0x23
+#define	Tuner_Integrant_ITD3020				0x24
+#define Tuner_Afatech_PEACOCK				0x25
+#define Tuner_Xceive_XC3028L				0x26
+#define Tuner_Infineon_TUA9001				0x27
+#define Tuner_Fitipower_FC0011				0x28
+#define Tuner_Afatech_AF9007				0xFF
+#define Tuner_Maxlinear_MXL5007				0xA0
+
+/**
+ * Define commands for AGC general set function
+ */
+#define APO_AGC_SET_RF_ACQUIRE				1
+#define APO_AGC_SET_RF_TRACK				2
+#define APO_AGC_SET_IF_ACQUIRE				3
+#define APO_AGC_SET_IF_TRACK				4
+#define APO_AGC_SET_ADC_OUT_DESIRED_S		5
+#define APO_AGC_SET_RF_TOP_S				6
+#define APO_AGC_SET_IF_TOP_S				7
+#define APO_AGC_SET_RF_LOCK_TH_ACQUIRE		8
+#define APO_AGC_SET_RF_LOCK_TH_TRACK		9
+#define APO_AGC_SET_IF_LOCK_TH_ACQUIRE		10
+#define APO_AGC_SET_IF_LOCK_TH_TRACK		11
+#define APO_AGC_SET_ADC_OUT_DESIRED_M		12
+#define APO_AGC_SET_RF_TOP_M				13
+#define APO_AGC_SET_IF_TOP_M				14
+#define APO_AGC_SET_RF_TOP					15
+#define APO_AGC_SET_IF_TOP					16
+
+
+/**
+ * Define commands for AGC general set function
+ */
+#define APO_AGC_GET_RF_ACQUIRE				1
+#define APO_AGC_GET_RF_TRACK				2
+#define APO_AGC_GET_IF_ACQUIRE				3
+#define APO_AGC_GET_IF_TRACK				4
+#define APO_AGC_GET_RF_LOCK_TH_ACQUIRE		5
+#define APO_AGC_GET_RF_LOCK_TH_TRACK		6
+#define APO_AGC_GET_IF_LOCK_TH_ACQUIRE		7
+#define APO_AGC_GET_IF_LOCK_TH_TRACK		8
+#define APO_AGC_GET_RF_MAX					9
+#define APO_AGC_GET_RF_MIN					10
+#define APO_AGC_GET_RF_TOP_S				11
+#define APO_AGC_GET_RF_TOP_M				17
+#define APO_AGC_GET_IF_MAX					12
+#define APO_AGC_GET_IF_MIN					13
+#define APO_AGC_GET_IF_TOP_S				14
+#define APO_AGC_GET_IF_TOP_M				18
+#define APO_AGC_GET_RF_TOP					19
+#define APO_AGC_GET_IF_TOP					20
+#define APO_AGC_GET_ADC_OUT_DESIRED_S		15
+#define APO_AGC_GET_ADC_OUT_DESIRED_M		16
+
+
+/**
+ * Define Options
+ */
+#define APO_OPTION_FREQSHIFT				0x00000001
+#define APO_OPTION_DYNATOP					0x00000002
+#define APO_OPTION_RET_NOW					0x00000004
+#define APO_OPTION_REPEAT_RETRAIN			0x00000008
+
+
+/**
+ * Define Demodulator_getDouble index
+ */
+#define APO_GET_FREQ_SHIFT					1
+#define APO_GET_ORIG_RF_TOP					2
+#define APO_GET_ORIG_IF_TOP					3
+#define APO_GET_FINAL_RF_TOP				4
+#define APO_GET_FINAL_IF_TOP				5
+#define APO_GET_BEST_RF_TOP					6
+#define APO_GET_BEST_IF_TOP					7
+
+
+/**
+ * Define commands for general CE information function
+ */
+#define APO_AGC_CLEAR_REGS				1
+#define APO_AGC_STALL_OFSM_ACCESS		2
+#define APO_AGC_RESTORE_OFSM_ACCESS		3
+
+
+#define APO_DCA_EN_UPPER				0x01
+#define APO_DCA_EN_LOWER				0x02
+#define APO_DCA_BOTH					0x00
+
+
+/** keep for internal api release */
+/**
+ * The type defination of PidTable.
+ */
+typedef struct {
+	Word pid[32];
+} PidTable;
+
+typedef struct {
+	PidTable pidtable[2];
+	Byte pidcount;
+	Bool pidinit;
+} PidInfo;
+/** end keep for internal api release */
+
+
+extern Word DemodulatorExtend_diversityMode;
+extern double DemodulatorExtend_crystalFrequency;
+extern Word Tdmb_bitRateTable[64];
+
+
+/**
+ * Set control bus and tuner.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param busId The ID of bus.
+ * @param tunerId The ID of tuner.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set I2C as the control bus. 
+ *     error = Demodulator_setBusTuner ((Demodulator*) &ganymede, Bus_I2C, Tuner_MICROTUNE_MT2060);
+ *     if (error) 
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setBusTuner (
+	IN  Demodulator*	demodulator,
+	IN  Word			busId,
+	IN  Word			tunerId
+);
+
+
+/**
+ * Set firmware and script.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param crystalFrequency The value of crystal frequency on board (KHz).
+ * @param adcFrequency The value of desire internal ADC frequency (Hz).
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set frequencies. 
+ *     error = Demodulator_setCrystalAdcFrequency ((Demodulator*) &ganymede, 30000, 20156250);
+ *     if (error) 
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setCrystalAdcFrequency (
+	IN  Demodulator*	demodulator,
+	IN  Dword			crystalFrequency,
+	IN  Dword			adcFrequency
+);
+
+
+/**
+ * Set firmware and script.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param firmwareCodes The byte array of firmware code.
+ * @param firmwareSegments The segments of firmwares.
+ * @param firmwarePartitions The partitions of firmwares.
+ * @param scriptSets The sets of script.
+ * @param scripts The byte array of script.
+ * @param tunerScriptSets The sets of tunerScript.
+ * @param tunerScripts The byte array of tunerScript.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte firmware[65535];
+ *     ValueSet script[256];
+ *     ValueSet tunerScript[256];
+ *     Ganymede ganymede;
+ *
+ *     // Set I2C as the control bus. 
+ *     error = Demodulator_setFirmwareScript ((Demodulator*) &ganymede, firmware, 65535, script, 256, tunerScript, 256);
+ *     if (error) 
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setFirmwareScript (
+	IN  Demodulator*	demodulator,
+	IN  Byte*			firmwareCodes,
+	IN  Segment*		firmwareSegments,
+	IN  Byte*			firmwarePartitions,
+	IN  Word*			scriptSets,
+	IN  ValueSet*		scripts,
+	IN  Word*           tunerScriptSets,
+	IN  ValueSet*       tunerScripts
+);
+
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param statistic the structure that store all statistic values.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     ChannelStatistic channelStatistic;
+ *     double preBer;
+ *     double postBer;
+ *     Ganymede ganymede;
+ *
+ *     // Set statistic range. 
+ *     error = Demodulator_getChannelStatistic ((Demodulator*) &ganymede, 0, &channelStatistic);
+ *     if (error) 
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     preBer = (double) channelStatistic.preVitErrorCount / (double) channelStatistic.preVitBitCount;
+ *     printf ("Pre-Viterbi BER = %f\n", preBer);
+ *     postBer = (double) channelStatistic.postVitErrorCount / (double) channelStatistic.postVitBitCount;
+ *     printf ("Post-Viterbi BER = %f\n", postBer);
+ *     printf ("Abort Count = %d\n", channelStatistic.abortCount);
+ * </pre>
+ */
+Dword Demodulator_getChannelStatistic (
+	IN  Demodulator*			demodulator,
+	IN  Byte					chip,
+	OUT ChannelStatistic*		channelStatistic
+);
+
+
+/**
+ * Set the counting range for Pre-Viterbi and Post-Viterbi. 
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param preErrorCount the number of super frame for Pre-Viterbi.
+ * @param preBitCount the number of packet unit for Post-Viterbi.
+ * @param snr the signal to noise ratio.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_getPreVitBer (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT Dword*			preErrorCount,
+	OUT Dword*			preBitCount,
+	OUT double*			snr
+);
+
+
+/**
+ * Set the counting range for Pre-Viterbi and Post-Viterbi. 
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param preErrorCount the number of super frame for Pre-Viterbi.
+ * @param preBitCount the number of packet unit for Post-Viterbi.
+ * @param snr the signal to noise ratio.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_getSoftBer (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT Dword*			preErrorCount,
+	OUT Dword*			preBitCount,
+	OUT double*			snr
+);
+
+
+/**
+ * This function is used to get signal quality indicator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param sqi signal quality indicator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ *     Byte sqi;
+ * 
+ *     Demodulator_getSqi (0x38, 0, &sqi);
+ * </pre>
+ */
+Dword Demodulator_getSqi (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    OUT Byte*			sqi
+);
+
+
+/**
+ * Get IF agc voltage.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param doPullUpVolt The pull up voltage of tunre.
+ * @param dopVolt IF AGC voltage to be returned.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getIfAgcVoltage (
+	IN  Demodulator*	demodulator,
+    IN  double			doPullUpVolt,
+    OUT double*			dopVolt
+);
+
+
+/**
+ * Set maximum RF agc. 
+ *
+ * @param demodulator the handle of demodulator.
+ * @param doMaxRfAgc The maximum value of RF AGC.
+ * @param doVolt RF AGC voltage to be set.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMaxRfAgc (
+	IN  Demodulator*	demodulator,
+    IN	double			doMaxRfAgc,
+	IN  double			doVolt
+);
+
+
+/**
+ * Set minimum rf agc.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param doMinRfAgc The minimum value of RF AGC.
+ * @param doVolt RF AGC voltage to be set.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMinRfAgc (
+	IN  Demodulator*	demodulator,
+    IN	double			doMinRfAgc,
+	IN  double			doVolt
+);
+
+
+/**
+ * Set max if agc.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param doMaxIfAgc The maximum value of IF AGC.
+ * @param doVolt IF AGC voltage to be set.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMaxIfAgc (
+	IN  Demodulator*	demodulator,
+    IN	double			doMaxIfAgc,
+	IN  double			doVolt
+);
+
+
+/**
+ * Set min if agc. 
+ *
+ * @param demodulator the handle of demodulator.
+ * @param doMinIfAgc The minimum value of IF AGC.
+ * @param doVolt IF AGC voltage to be set.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMinIfAgc (
+	IN  Demodulator*	demodulator,
+    IN	double			doMinIfAgc,
+	IN  double			doVolt
+);
+
+
+/**
+ * General agc set function.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucCmd .
+ * @param vpParams .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setAgc (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucCmd,
+    IN	Word*			vpParams
+);
+
+
+/**
+ * General agc get function.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucCmd .
+ * @param vpParams .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getAgc (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucCmd,
+    IN	void*			vpParams
+);
+
+
+/**
+ * Check if INR detected.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param count INR count.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getInrCount (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    OUT Word*			count
+);
+
+
+/**
+ * Check if CCI happens.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param cci0 1: CCI happen, 0: CCI doesn't happen.
+ * @param cci1 1: CCI happen, 0: CCI doesn't happen.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isCci (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    OUT Bool*			cci0,
+    OUT Bool*			cci1
+);
+
+
+/**
+ * Check if ACI happens
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param aci0 1: ACI happen, 0: ACI doesn't happen.
+ * @param aci1 1: ACI happen, 0: ACI doesn't happen.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isAci (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    OUT Bool*			aci0,
+    OUT Bool*			aci1
+);
+
+
+/**
+ * Get frequency offset.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param doTs Sampling period.
+ * @param lpNormOffset Normalized frequency offset (carrier spacing).
+ * @param lpOffset Frequency offset (22 bits) (Hz).
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getFrequencyOffset (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  double			elementaryPeriod,
+	OUT Long*			normalizedOffset,
+	OUT Long*			offset
+);
+
+
+/**
+ * Get sampling clock offset in second
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param adcFrequency ADC frequency.
+ * @param elementaryPeriod Sampling period.
+ * @param offset ADC sampling clock offset in sec.
+ * @param offsetPpm ADC sampling clock offset in PPM.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getTimeOffset (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    IN  double			adcFrequency,
+    IN  double			elementaryPeriod,
+    OUT double*			offset,
+    OUT double*			offsetPpm
+);
+
+
+/**
+ * Set IF1 frequency of MT2060.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param dwIf1 The IF1 frequency (KHz).
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMT2060If1 (
+	IN  Demodulator*	demodulator,
+    IN  Dword			dwIf1
+);
+
+
+/**
+ * Clear FFT window position valid bit.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_resetFftWinPos (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+
+/**
+ * Clear FFT window position valid bit.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param delta Delta value for FFT window position.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getFftWinPos (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    IN	Long*			delta	
+);
+
+
+/**
+ * Get crystal frequency (KHz).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param fpFreq Crystal frequency.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getXtalFreq (
+	IN  Demodulator*	demodulator,
+    IN	float*			fpFreq
+);
+
+
+/**
+ * Test register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_testRegister (
+	IN  Demodulator*	demodulator
+);
+
+
+/**
+ * Dump register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param cpFileName The name of file to be write.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_dumpRegister (
+	IN  Demodulator*	demodulator,
+    IN  char*			cpFileName
+);
+
+
+/**
+ * Get frequency response from hardware.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param tone Sub-Carrier Index ( Real Index = 200*wIndex).
+ * @param realPart Real part of Constellation value.
+ * @param imaginaryPart Imaginary part of Constellation value.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getFrequencyResponse (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT Word*			tone,
+	OUT Long*			realPart,
+	OUT Long*			imaginaryPart
+);
+
+
+/**
+ * Get constellation value.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param tone Sub-Carrier Index ( Real Index = 200*wIndex).
+ * @param realPart Real part of Constellation value.
+ * @param imaginaryPart Imaginary part of Constellation value.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getConstellation (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Word			tone,
+	OUT float*			realPart,
+	OUT float*			imaginaryPart
+);
+
+
+/**
+ * Capture constellation value (2).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param wIndex Sub-Carrier Index ( Real Index = 200*wIndex).
+ * @param wpReal real part of constellation value.
+ * @param wpImag imaginary part of constellation value.
+ * @param wpH2 H2 value.
+ * @param wpRealH real part of H.
+ * @param wpImagH imaginary part of H.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_capConstellation2 (
+	IN  Demodulator*	demodulator,
+    IN  Word			wIndex,
+    OUT Byte*			ucpSymCnt,
+    OUT Byte*			ucpReal,
+    OUT Byte*			ucpImag,
+    OUT Word*			wpRealH,
+    OUT Word*			wpImagH
+);
+
+
+/**
+ * Get status.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param dwpStatus Pointer to system information.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getStatus (
+	IN  Demodulator*	demodulator,
+    OUT Dword*			dwpStatus
+);
+
+
+/**
+ * Get frequency shift.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param index .
+ * @param dopShift .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getDouble (
+	IN  Demodulator*	demodulator,
+    IN  Byte			index,
+    IN  double*			dopValue
+);
+
+
+/**
+ * Get IR byte.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucpIRByte IR packet buffer.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getIr (
+	IN  Demodulator*	demodulator,
+    OUT	Byte*			ucpIRByte
+);
+
+
+/**
+ * Dump EEPROM.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param dwDelay .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_dumpEeprom (
+	IN  Demodulator*	demodulator,
+    IN  Dword			dwDelay
+);
+
+
+/**
+ * Load file to EEPROM.
+ *
+ * @param fileName File name to load to EEPROM.
+ * @param dwDelay .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_loadEeprom (
+	IN  Demodulator*	demodulator,
+    IN  char*			fileName,
+    IN  Dword			dwDelay
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isFecMonEnabled (
+	IN  Demodulator*	demodulator,
+	OUT Bool*			enabled
+);
+
+
+/**
+ * Generate ce information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param command .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_genCeInfoFunc (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Byte			command
+);
+
+
+/**
+ * Get ce information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param spCentroid .
+ * @param spBias .
+ * @param dwpRh0 .
+ * @param wpM2 .
+ * @param dwpEh2 .
+ * @param ucpM2q .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getCeInfo (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT Short*			spCentroid,
+	OUT Short*			spBias,
+	OUT Dword*			dwpRh0,
+	OUT Word*			wpM2,
+	OUT Dword*			dwpEh2,
+	OUT Byte*			ucpM2q
+);
+
+
+/**
+ * Enable/disable retrain.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param enable .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setRetrain (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Byte			enable
+);
+
+
+/**
+ * Enable/disable CCIR.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucEnable .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setCcir (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucEnable
+);
+
+
+/**
+ * Handle CCIF
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ccifId .
+ * @param ctrl .
+ * @param ucBw .
+ * @param wFreq .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_handleCcif (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ccifId,
+	IN  Byte			ctrl,
+	IN  Byte			ucBw,
+	IN  Word			wFreq
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param level .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getAdcDesiredLevel (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT Word*			level
+);
+
+	
+/**
+ * Set tuner type
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucTuner .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setTunerType (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucTuner
+);
+
+
+/**
+ * Set board id
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucBoard .
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setBoardId (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucBoard
+);
+
+
+/**
+ * Get signal strength in Dbm
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucTunerType tuner type.
+ * @param ucBoardId Board ids.
+ * @param dopStrength signal strength.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getSignalStrengthDBm (
+	IN  Demodulator*	demodulator,
+	IN  Byte			ucTunerType,
+    IN  Byte			ucBoardId,
+    OUT double*			dopStrength		
+);
+
+
+/**
+ * Program CFOE 2.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ucBw Current channel bandwidth in MHz.
+ * @param dFs ADC sampling frequency.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_programCFOE2 (
+	IN  Demodulator*	demodulator,
+    IN  Byte			ucBw,
+    IN  double			dFs
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setCalibratAgc (
+	IN  Demodulator*	demodulator
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setCrystalFrequency (
+	IN  Demodulator*	demodulator,
+	IN  double			crystalFrequency
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_writeMt2060If1 (
+	IN  Demodulator*	demodulator,
+	IN  Dword			dwIF1
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getSnr (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	OUT double*			snr
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param speed the I2C speed in KHz.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setI2cSpeed (
+	IN  Demodulator*	demodulator,
+	IN  Dword			speed
+);
+
+
+/**
+ * Ask fw to go back to boot code
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_backToBootCode (
+	IN  Demodulator*	demodulator
+);
+
+
+/**
+ * Control gpio3 (AF9015 use this pin to turn on/off tuner)
+ * ucOn = 1 => turn on tuner
+ * ucOn = 0 => turn off tuner
+ *
+ * @param demodulator the handle of demodulator.
+ * @param contorl True: Enable, False: Disable;
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_controlTunerPower (
+	IN  Demodulator*	demodulator,
+	IN  Byte			control
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param multiplier ADC frequency multiplier;
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setMultiplier (
+	IN  Demodulator*	demodulator,
+	IN  Multiplier		multiplier
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param multiplier ADC frequency multiplier;
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getMultiplier (
+	IN  Demodulator*	demodulator,
+	IN  Multiplier*		multiplier
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param ifFrequency the IF frequency of tuner;
+ * @param inversion True if tuner's pectrum is inversed;
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_modifyTunerDescription (
+	IN  Demodulator*	demodulator,
+	IN  Byte			tunerAddress,
+	IN  Byte			registerAddressLength,
+	IN  Dword			ifFrequency,
+	IN  Bool			inversion
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_writeRawData (
+	IN  Demodulator*	demodulator,
+	IN  Byte			writeBufferLength,
+	IN  Byte*			writeBuffer
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_readRawData (
+	IN  Demodulator*	demodulator,
+	IN  Byte			readBufferLength,
+	OUT Byte*			readBuffer
+);
+
+
+/**
+ * Open tuner.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ */
+Dword Demodulator_openTuner (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+/**
+ * Set tuner.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param bandwidth The desired bandwidth.
+ * @param frequency The desired frequency.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ */
+Dword Demodulator_setTuner (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN	Word			bandwidth,
+	IN  Dword			frequency
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param block How many block (logical frame) to be check.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setPostVitAllZeroBlock (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Word			block
+);
+
+
+/**
+ * Add PID to PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param pid the PID that will be add to PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_addPid (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Pid				pid
+);
+
+
+/**
+ * Add PID to PID filter by index.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param index the index of PID filter.
+ * @param pid the PID that will be add to PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_addPidAt (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    IN  Byte            index,
+	IN  Pid				pid
+);
+
+
+/**
+ * Remove PID from PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param pid the PID that will be remove from PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_removePid (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Pid				pid
+);
+
+/**
+ * Remove PID from PID filter by index.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @param index the index of PID filter.
+ * @param pid the PID that will be remove from PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_removePidAt (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+	IN  Byte			index,
+    IN  Pid             pid
+);
+
+
+/**
+ * Reset PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are 
+ *        0~7.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_resetPid (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+
+/**
+ * Control Active Sync.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param contorl 0: Disable(BDA Extend), 1: Enable (Active Sync)
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_controlActiveSync (
+	IN  Demodulator*	demodulator,
+	IN  Byte			control
+);
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulator.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulator.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_demodulator.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_demodulator.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,1495 @@
+#ifndef __GANYMEDE_H__
+#define __GANYMEDE_H__
+
+
+#include "a867_type.h"
+#include "a867_user.h"
+#include "a867_error.h"
+#include "a867_register.h"
+#include "a867_variable.h"
+#include "a867_cmd.h"
+#include "a867_standard.h"
+#include "a867_demodulatorextend.h"  /** release1remove */
+#include "a867_version.h"
+
+/**
+ * Write one byte (8 bits) to a specific register in demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be written.
+ * @param value the value to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set the value of register 0xA000 in demodulator to 0.
+ *     error = Demodulator_writeRegister ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, 0);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            value
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the start address of the registers to be written.
+ * @param bufferLength the number of registers to be written.
+ * @param buffer a byte array which is used to store values to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3] = { 0x00, 0x01, 0x02 };
+ *     Ganymede ganymede;
+ *
+ *     // Set the value of register 0xA000 in demodulator to 0.
+ *     // Set the value of register 0xA001 in demodulator to 1.
+ *     // Set the value of register 0xA002 in demodulator to 2.
+ *     error = Demodulator_writeRegisters ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a collection of values to discontiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param valueSetsLength the number of values to be written.
+ * @param valueSets a ValueSet array which is used to store values to be
+ *        written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     ValueSet valueSet[3];
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of register 0xA000, 0xA001 and 0xA002 in demodulator.
+ *     valueSet[0].address = 0xA000;
+ *     valueSet[0].value = 0x00;
+ *     valueSet[1].address = 0xA001;
+ *     valueSet[1].value = 0x01;
+ *     valueSet[2].address = 0xA002;
+ *     valueSet[2].value = 0x02;
+ *     error = Demodulator_writeScatterRegisters ((Demodulator*) &ganymede, 0, Processor_LINK, 3, valueSet);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in slave device.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the registers to be read.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3] = { 0x00, 0x01, 0x02 };
+ *     Ganymede ganymede;
+ *
+ *     // Set the value of register 0x0000 in tuner to 0.
+ *     // Set the value of register 0x0001 in tuner to 1.
+ *     // Set the value of register 0x0002 in tuner to 2.
+ *     error = Demodulator_writeTunerRegistersWithAddress ((Demodulator*) &ganymede, 0, 0x38, 0x00, 1, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in slave device
+ * through specified interface (1, 2, 3).
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param interfaceIndex the index of interface. The possible values are
+ *        1~3.
+ * @param slaveAddress the I2c address of slave device.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_writeGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous cells in the EEPROM.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5 (firmware will detect EEPROM address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the cells to be written.
+ * @param registerAddressLength the valid bytes of registerAddress.
+ * @param bufferLength the number of cells to be written.
+ * @param buffer a byte array which is used to store values to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3] = { 0x00, 0x01, 0x02 };
+ *     Ganymede ganymede;
+ *
+ *     // Set the value of cell 0x0000 in EEPROM to 0.
+ *     // Set the value of cell 0x0001 in EEPROM to 1.
+ *     // Set the value of cell 0x0002 in EEPROM to 2.
+ *     error = Demodulator_writeEepromValues ((Demodulator*) &ganymede, 0, 0x0000, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Modify bits in the specific register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be written.
+ * @param position the start position of bits to be modified (0 means the
+ *        LSB of the specifyed register).
+ * @param length the length of bits.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Modify the LSB of register 0xA000 in demodulator to 0.
+ *     error = Demodulator_writeRegisterBits ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, 0, 1, 0);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_writeRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+);
+
+
+/**
+ * Read one byte (8 bits) from a specific register in demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param value the pointer used to store the value read from demodulator
+ *        register.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte value;
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of register 0xA000 in demodulator.
+ *     error = Demodulator_readRegister ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, &value);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of 0xA000 is %2x", value);
+ * </pre>
+ */
+Dword Demodulator_readRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    OUT Byte*           value
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3];
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of register 0xA000, 0xA001, 0xA002 in demodulator.
+ *     error = Demodulator_readRegisters ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of 0xA000 is %2x", buffer[0]);
+ *     printf ("The value of 0xA001 is %2x", buffer[1]);
+ *     printf ("The value of 0xA002 is %2x", buffer[2]);
+ * </pre>
+ */
+Dword Demodulator_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Read a collection of values to discontiguous registers from demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param valueSetsLength the number of values to be read.
+ * @param valueSets a ValueSet array which is used to store values to be
+ *        read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     ValueSet valueSet[3];
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of register 0xA000, 0xA001 and 0xA002 in demodulator.
+ *     valueSet[0].address = 0xA000;
+ *     valueSet[1].address = 0xA001;
+ *     valueSet[2].address = 0xA002;
+ *     error = Demodulator_readScatterRegisters ((Demodulator*) &ganymede, 0, Processor_LINK, 3, valueSet);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of 0xA000 is %2x", valueSet[0].value);
+ *     printf ("The value of 0xA001 is %2x", valueSet[1].value);
+ *     printf ("The value of 0xA002 is %2x", valueSet[2].value);
+ * </pre>
+ */
+Dword Demodulator_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in tuner.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the registers to be read.
+ * @param registerAddressLength the valid bytes of registerAddress.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3];
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of register 0x0000, 0x0001, 0x0002 in tuner.
+ *     error = Demodulator_readTunerRegisters ((Demodulator*) &ganymede, 0, 0x0000, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of 0x0000 is %2x", buffer[0]);
+ *     printf ("The value of 0x0001 is %2x", buffer[1]);
+ *     printf ("The value of 0x0002 is %2x", buffer[2]);
+ * </pre>
+ */
+Dword Demodulator_readTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in slave device
+ * through specified interface (1, 2, 3).
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param interfaceIndex the index of interface. The possible values are
+ *        1~3.
+ * @param slaveAddress the I2c address of slave device.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_readGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous cells in the EEPROM.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5 (firmware will detect EEPROM address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the cells to be read.
+ * @param registerAddressLength the valid bytes of registerAddress.
+ * @param bufferLength the number of cells to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte buffer[3];
+ *     Ganymede ganymede;
+ *
+ *     // Get the value of cell 0x0000, 0x0001, 0x0002 in EEPROM.
+ *     error = Demodulator_readEepromValues ((Demodulator*) &ganymede, 0, 0x0000, 3, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of 0x0000 is %2x", buffer[0]);
+ *     printf ("The value of 0x0001 is %2x", buffer[1]);
+ *     printf ("The value of 0x0002 is %2x", buffer[2]);
+ * </pre>
+ */
+Dword Demodulator_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Read bits of the specified register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param position the start position of bits to be read (0 means the
+ *        LSB of the specifyed register).
+ * @param length the length of bits.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte value;
+ *     Ganymede ganymede;
+ *
+ *     // Read the LSB of register 0xA000 in demodulator.
+ *     error = Demodulator_readRegisterBits ((Demodulator*) &ganymede, 0, Processor_LINK, 0xA000, 0, 1, &value);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     printf ("The value of LSB of 0xA000 is %2x", value);
+ * </pre>
+ */
+Dword Demodulator_readRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    OUT Byte*           value
+);
+
+
+/**
+ * Get the version of hardware.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param version the version of hardware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Dword version;
+ *     Ganymede ganymede;
+ *
+ *     // Add PID to PID filter.
+ *     error = Demodulator_getHardwareVersion ((Demodulator*) &ganymede, &version);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("The version of hardware is : %X", version);
+ * </pre>
+ */
+Dword Demodulator_getHardwareVersion (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          version
+);
+
+
+/**
+ * Get the version of firmware.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param version the version of firmware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Dword version;
+ *     Ganymede ganymede;
+ *
+ *     // Get the version of Link layer firmware.
+ *     error = Demodulator_getFirmwareVersion ((Demodulator*) &ganymede, Processor_LINK, &version);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("The version of firmware is : %X", version);
+ * </pre>
+ */
+Dword Demodulator_getFirmwareVersion (
+    IN  Demodulator*    demodulator,
+    IN  Processor       processor,
+    OUT Dword*          version
+);
+
+
+/**
+ * Add PID to PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param index the index of PID filter.
+ * @param pid the PID that will be add to PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Pid pid;
+ *     Ganymede ganymede;
+ *
+ *     pid.value = 0x0000;
+ *
+ *     // Add PID to PID filter.
+ *     error = Demodulator_addPidToFilter ((Demodulator*) &ganymede, 0, 1, pid);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_addPidToFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            index,
+    IN  Pid             pid
+);
+
+
+/**
+ * Reset PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     error = Demodulator_resetPidFilter ((Demodulator*) &ganymede, 0);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_resetPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ * Get datagram from device.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_BUFFER_INSUFFICIENT: if buffer is too small.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Word bufferLength;
+ *     Byte buffer[4096];
+ *     Ganymede ganymede;
+ *
+ *     bufferLength = 4096;
+ *     error = Demodulator_getDatagram ((Demodulator*) &ganymede, &bufferLength, buffer);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_getDatagram (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Get RF AGC gain.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param rfAgc the value of RF AGC.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte rfAgc;
+ *     Ganymede ganymede;
+ *
+ *     // Set I2C as the control bus.
+ *     error = Demodulator_getRfAgcGain ((Demodulator*) &ganymede, 0, rfAgc);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_getRfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           rfAgc
+);
+
+
+/**
+ * Get IF AGC.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param ifAgc the value of IF AGC.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte ifAgc;
+ *     Ganymede ganymede;
+ *
+ *     // Set I2C as the control bus.
+ *     error = Demodulator_getIfAgcGain ((Demodulator*) &ganymede, 0, ifAgc);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_getIfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           ifAgc
+);
+
+
+/**
+ * Load the IR table for USB device.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param tableLength The length of IR table.
+ * @param table The content of IR table.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_loadIrTable (
+    IN  Demodulator*    demodulator,
+    IN  Word            tableLength,
+    IN  Byte*           table
+);
+
+
+/**
+ * Load firmware to device
+ *
+ * @param demodulator the handle of demodulator.
+ * @firmwareCodes pointer to fw binary.
+ * @firmwareSegments pointer to fw segments.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Demodulator_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Byte*           firmwareCodes,
+    IN  Segment*        firmwareSegments,
+    IN  Byte*           firmwarePartitions
+);
+
+
+/**
+ * First, download firmware from host to demodulator. Actually, firmware is
+ * put in firmware.h as a part of source code. Therefore, in order to
+ * update firmware the host have to re-compile the source code.
+ * Second, setting all parameters which will be need at the beginning.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chipNumber The total number of demodulators.
+ * @param sawBandwidth SAW filter bandwidth in KHz. The possible values
+ *        are 6000, 7000, and 8000 (KHz).
+ * @param streamType The format of output stream.
+ * @param architecture the architecture of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Initialize demodulators.
+ *     // SAW Filter  : 8MHz
+ *     // Stream Type : IP Datagram.
+ *     error = Demodulator_initialize ((Demodulator*) &ganymede, 1, 8, StreamType_IP_DATAGRAM, Architecture_DCA);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_initialize (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chipNumber,
+    IN  Word            sawBandwidth,
+    IN  StreamType      streamType,
+    IN  Architecture    architecture
+);
+
+
+/**
+ * Power off the demodulators.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Finalize demodulators.
+ *     error = Demodulator_finalize ((Demodulator*) &ganymede);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_finalize (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isAgcLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isCfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isSfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isTpsLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_isMpeg2Locked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param locked the result of frequency tuning. True if there is
+ *        demodulator can lock signal, False otherwise.
+ * @see Demodulator_acquireChannel
+ */
+Dword Demodulator_isLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ * Set priorty of modulation.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param priority modulation priority.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set priority.
+ *     error = Demodulator_setPriority ((Demodulator*) &ganymede, 0, Priority_HIGH);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setPriority (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Priority        priority
+);
+
+
+/**
+ * Reset demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Reset demodulator.
+ *     error = Demodulator_reset ((Demodulator*) &ganymede);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_reset (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Get channel modulation related information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param channelModulation The modulation of channel.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    OUT ChannelModulation*      channelModulation
+);
+
+
+/**
+ * Set channel modulation related information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param channelModulation The modulation of channel.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_setChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    IN  ChannelModulation*      channelModulation
+);
+
+
+/**
+ * Specify the bandwidth of channel and tune the channel to the specific
+ * frequency. Afterwards, host could use output parameter dvbH to determine
+ * if there is a DVB-H signal.
+ * In DVB-T mode, after calling this function the output parameter dvbH
+ * should return False and host could use output parameter "locked" to check
+ * if the channel has correct TS output.
+ * In DVB-H mode, after calling this function the output parameter dvbH should
+ * return True and host could start get platform thereafter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param bandwidth The channel bandwidth.
+ *        DVB-T: 5000, 6000, 7000, and 8000 (KHz).
+ *        DVB-H: 5000, 6000, 7000, and 8000 (KHz).
+ *        T-DMB: 5000, 6000, 7000, and 8000 (KHz).
+ *        FM: 100, and 200 (KHz).
+ * @param frequency the channel frequency in KHz.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Bool locked;
+ *     Ganymede ganymede;
+ *
+ *     error = Demodulator_acquireChannel ((Demodulator*) &ganymede, 0, 8000, 666000);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *
+ *     error = Demodulator_isLocked ((Demodulator*) &ganymede, 0, &locked);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *
+ *     if (locked == True) {
+ *         // In DVB-T mode.
+ *         // Start to process TS
+ *         // Because DVB-T could be multiplex with DVB-H
+ *     }
+ * </pre>
+ */
+Dword Demodulator_acquireChannel (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,
+    IN  Dword           frequency
+);
+
+
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ *
+ * Note: After host know all the available channels, and want to change to
+ *       specific channel, host have to choose output mode before receive
+ *       data. Please refer the example of Demodulator_setStreamType.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param streamType the possible values are
+ *        DVB-H:    StreamType_DVBH_DATAGRAM
+ *                  StreamType_DVBH_DATABURST
+ *        DVB-T:    StreamType_DVBT_DATAGRAM
+ *                  StreamType_DVBT_PARALLEL
+ *                  StreamType_DVBT_SERIAL
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     error = Demodulator_setStreamType ((Demodulator*) &ganymede, StreamType_DVBT_PARALLEL)
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setStreamType (
+    IN  Demodulator*    demodulator,
+    IN  StreamType      streamType
+);
+
+
+/**
+ * Set the architecture of chip. When two of our device are using, they could
+ * be operated in Diversity Combine Architecture (DCA) or (PIP). Therefore,
+ * host could decide which mode to be operated.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param architecture the possible values are
+ *        Architecture_DCA
+ *        Architecture_PIP
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set architecture.
+ *     error = Demodulator_setArchitecture ((Demodulator*) &ganymede, Architecture_DCA)
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setArchitecture (
+    IN  Demodulator*    demodulator,
+    IN  Architecture    architecture
+);
+
+
+/**
+ * Get the length of Data
+ * In DVB-T mode, data length should always equals 2K,
+ * In DVB-H mode, data length would be the length of IP datagram.
+ * NOTE: data can't be transfer via I2C bus, in order to transfer data
+ * host must provide SPI bus.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param dataLength the length of data.
+ * @param valid True if the data length is valid.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @see Demodulator_addIp
+ */
+Dword Demodulator_getDataLength (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          dataLength,
+    OUT Bool*           valid
+);
+
+
+/**
+ * Get the IP datagram of Data.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength the length of buffer.
+ * @param buffer buffer used to get Data.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @see Demodulator_addIp
+ */
+Dword Demodulator_getData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Get the type of interrupts.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param interrupts the type of interrupts.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Interrupt interrupts;
+ *     Ganymede ganymede;
+ *
+ *     // Get the type of interrupts.
+ *     error = Demodulator_getInterrupts ((Demodulator*) &ganymede, &interrupts);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     if (interrupts & Interrupt_VERSION) {
+ *         // Get IP version
+ *     }
+ *     if (interrupts & Interrupt_DVBH) {
+ *         // Get DVB-H Data
+ *     }
+ *     if (interrupts & Interrupt_DVBT) {
+ *         // Get DVB-T Data
+ *     }
+ *     if (interrupts & Interrupt_SIPSI) {
+ *         // Get SI/PSI
+ *     }
+ * </pre>
+ */
+Dword Demodulator_getInterrupts (
+    IN  Demodulator*    demodulator,
+    OUT Interrupts*     interrupts
+);
+
+
+/**
+ * Clear interrupts flag.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param interrupts interrupts flag.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set statistic range.
+ *     error = Demodulator_clearInterrupt ((Demodulator*) &ganymede, Interrupt_SIPSI);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_clearInterrupt (
+    IN  Demodulator*    demodulator,
+    IN  Interrupt       interrupt
+);
+
+
+/**
+ * Get siganl quality.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param quality The value of signal quality.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getSignalQuality (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           quality
+);
+
+
+/**
+ * Get signal strength
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param strength The value of signal strength.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getSignalStrength (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           strength
+);
+
+
+/**
+ * Get signal strength in dbm
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param rfpullUpVolt_X10 the pullup voltag of RF multiply 10.
+ * @param ifpullUpVolt_X10 the pullup voltag of IF multiply 10.
+ * @param strengthDbm The value of signal strength in DBm.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getSignalStrengthDbm (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Long            rfpullUpVolt_X10,     /** RF pull up voltage multiplied by 10   */
+    IN  Long            ifpullUpVolt_X10,     /** IF pull up voltage multiplied by 10   */
+    OUT Long*           strengthDbm           /** DBm                                   */
+);
+
+
+/**
+ * Get post VitBer
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param postErrorCount error count after viterbi
+ * @param postBitCount total count after viterbi
+ * @param abortCount error count after reed-soloman
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getPostVitBer (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Dword*          postErrorCount,  /** 24 bits */
+    OUT Dword*          postBitCount,    /** 16 bits */
+    OUT Word*           abortCount
+);
+
+
+/**
+ * Set the counting range for Pre-Viterbi and Post-Viterbi.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param frameCount the number of super frame for Pre-Viterbi.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Ganymede ganymede;
+ *
+ *     // Set statistic range.
+ *     error = Demodulator_setStatisticRange ((Demodulator*) &ganymede, 0, 1, 10000);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_setStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            superFrameCount,
+    IN  Word            packetUnit
+);
+
+
+/**
+ * Get the counting range for Pre-Viterbi and Post-Viterbi.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param frameCount the number of super frame for Pre-Viterbi.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Byte superFrameCount;
+ *     Word packetUnit;
+ *     Ganymede ganymede;
+ *
+ *     // Set statistic range.
+ *     error = Demodulator_getStatisticRange ((Demodulator*) &ganymede, 0, &superFrameCount, &packetUnit);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ * </pre>
+ */
+Dword Demodulator_getStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte*           superFrameCount,
+    IN  Word*           packetUnit
+);
+
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param statistic the structure that store all statistic values.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ *     Dword error = Error_NO_ERROR;
+ *     Statistic statistic;
+ *     double preBer;
+ *     double postBer;
+ *     Ganymede ganymede;
+ *
+ *     // Set statistic range.
+ *     error = Demodulator_getStatistic ((Demodulator*) &ganymede, 0, &statistic);
+ *     if (error)
+ *         printf ("Error Code = %X", error);
+ *     else
+ *         printf ("Success");
+ *     preBer = (double) statistic.preVitErrorCount / (double) statistic.preVitBitCount;
+ *     printf ("Pre-Viterbi BER = %f\n", preBer);
+ *     postBer = (double) statistic.postVitErrorCount / (double) statistic.postVitBitCount;
+ *     printf ("Post-Viterbi BER = %f\n", postBer);
+ *     printf ("Abort Count = %d\n", statistic.abortCount);
+ *     if (statistic.signalPresented == True)
+ *         printf ("Signal Presented = True\n");
+ *     else
+ *         printf ("Signal Presented = False\n");
+ *     if (statistic.signalLocked == True)
+ *         printf ("Signal Locked = True\n");
+ *     else
+ *         printf ("Signal Locked = False\n");
+ *     printf ("Signal Quality = %d\n", statistic.signalQuality);
+ *     printf ("Signal Strength = %d\n", statistic.signalStrength);
+ * </pre>
+ */
+Dword Demodulator_getStatistic (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Statistic*      statistic
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param code the value of IR raw code, the size should be 4 or 6,
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_getIrCode (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          code
+);
+
+
+/**
+ * Return to boot code
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_reboot (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Control PID fileter
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param contorl 0: Disable, 1: Enable.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_controlPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param contorl 1: Power up, 0: Power down;
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_controlPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+);
+
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param contorl 1: Power up, 0: Power down;
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Demodulator_controlTunerPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            control
+);
+
+
+/**
+ * Set datagram burst size.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param burstSize the burst size.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_NOT_SUPPORT: if the burst size is not support.
+ */
+Dword Demodulator_setBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize       burstSize
+);
+
+
+/**
+ * Get datagram burst size.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param burstSize the burst size.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_NOT_SUPPORT: if the burst size is not support.
+ */
+Dword Demodulator_getBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize*      burstSize
+);
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_error.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_error.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_error.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_error.h	2012-06-18 11:00:36.134010953 +0200
@@ -0,0 +1,141 @@
+#ifndef __ERROR_H__
+#define __ERROR_H__
+
+#define Error_NO_ERROR							0x00000000ul
+#define Error_RESET_TIMEOUT						0x00000001ul
+#define Error_WRITE_REG_TIMEOUT					0x00000002ul
+#define Error_WRITE_TUNER_TIMEOUT				0x00000003ul
+#define Error_WRITE_TUNER_FAIL					0x00000004ul
+#define Error_RSD_COUNTER_NOT_READY				0x00000005ul
+#define Error_VTB_COUNTER_NOT_READY				0x00000006ul
+#define Error_FEC_MON_NOT_ENABLED				0x00000007ul
+#define Error_INVALID_DEV_TYPE					0x00000008ul
+#define Error_INVALID_TUNER_TYPE				0x00000009ul
+#define Error_OPEN_FILE_FAIL					0x0000000Aul
+#define Error_WRITEFILE_FAIL					0x0000000Bul
+#define Error_READFILE_FAIL						0x0000000Cul
+#define Error_CREATEFILE_FAIL					0x0000000Dul
+#define Error_MALLOC_FAIL						0x0000000Eul
+#define Error_INVALID_FILE_SIZE					0x0000000Ful
+#define Error_INVALID_READ_SIZE					0x00000010ul
+#define Error_LOAD_FW_DONE_BUT_FAIL				0x00000011ul
+#define Error_NOT_IMPLEMENTED					0x00000012ul
+#define Error_NOT_SUPPORT						0x00000013ul
+#define Error_WRITE_MBX_TUNER_TIMEOUT			0x00000014ul
+#define Error_DIV_MORE_THAN_8_CHIPS				0x00000015ul
+#define Error_DIV_NO_CHIPS						0x00000016ul
+#define Error_SUPER_FRAME_CNT_0					0x00000017ul
+#define Error_INVALID_FFT_MODE					0x00000018ul
+#define Error_INVALID_CONSTELLATION_MODE		0x00000019ul
+#define Error_RSD_PKT_CNT_0						0x0000001Aul
+#define Error_FFT_SHIFT_TIMEOUT					0x0000001Bul
+#define Error_WAIT_TPS_TIMEOUT					0x0000001Cul
+#define Error_INVALID_BW						0x0000001Dul
+#define Error_INVALID_BUF_LEN					0x0000001Eul
+#define Error_NULL_PTR							0x0000001Ful
+#define Error_INVALID_AGC_VOLT					0x00000020ul
+#define Error_MT_OPEN_FAIL						0x00000021ul
+#define Error_MT_TUNE_FAIL						0x00000022ul
+#define Error_CMD_NOT_SUPPORTED					0x00000023ul
+#define Error_CE_NOT_READY						0x00000024ul
+#define Error_EMBX_INT_NOT_CLEARED				0x00000025ul
+#define Error_INV_PULLUP_VOLT					0x00000026ul
+#define Error_FREQ_OUT_OF_RANGE					0x00000027ul
+#define Error_INDEX_OUT_OF_RANGE				0x00000028ul
+#define Error_NULL_SETTUNER_PTR					0x00000029ul
+#define Error_NULL_INITSCRIPT_PTR				0x0000002Aul
+#define Error_INVALID_INITSCRIPT_LEN			0x0000002Bul
+#define Error_INVALID_POS						0x0000002Cul
+#define Error_BACK_TO_BOOTCODE_FAIL				0x0000002Dul
+#define Error_GET_BUFFER_VALUE_FAIL				0x0000002Eul
+#define Error_INVALID_REG_VALUE					0x0000002Ful
+#define Error_INVALID_INDEX						0x00000030ul
+#define Error_READ_TUNER_TIMEOUT				0x00000031ul
+#define Error_READ_TUNER_FAIL					0x00000032ul
+#define Error_UNDEFINED_SAW_BW					0x00000033ul
+#define Error_MT_NOT_AVAILABLE					0x00000034ul
+#define Error_NO_SUCH_TABLE						0x00000035ul
+#define Error_WRONG_CHECKSUM					0x00000036ul
+#define Error_INVALID_XTAL_FREQ					0x00000037ul
+#define Error_COUNTER_NOT_AVAILABLE				0x00000038ul
+#define Error_INVALID_DATA_LENGTH				0x00000039ul
+#define Error_BOOT_FAIL							0x0000003Aul
+#define Error_BUFFER_INSUFFICIENT				0x0000003Bul
+#define Error_NOT_READY							0x0000003Cul
+#define Error_DRIVER_INVALID					0x0000003Dul
+#define Error_INTERFACE_FAIL					0x0000003Eul
+#define Error_PID_FILTER_FULL					0x0000003Ful
+#define Error_OPERATION_TIMEOUT					0x00000040ul
+#define Error_LOADFIRMWARE_SKIPPED				0x00000041ul
+#define Error_REBOOT_FAIL						0x00000042ul
+#define Error_PROTOCOL_FORMAT_INVALID			0x00000043ul
+#define Error_ACTIVESYNC_ERROR					0x00000044ul
+#define Error_CE_READWRITEBUS_ERROR				0x00000045ul
+#define Error_CE_NODATA_ERROR					0x00000046ul
+#define Error_NULL_FW_SCRIPT					0x00000047ul
+#define Error_NULL_TUNER_SCRIPT					0x00000048ul
+
+/** Error Code of Gemini System */
+#define Error_INVALID_INDICATOR_TYPE			0x00000101ul
+#define Error_INVALID_SC_NUMBER					0x00000102ul
+#define Error_INVALID_SC_INFO					0x00000103ul
+#define Error_FIGBYPASS_FAIL					0x00000104ul
+
+/** Error Code of Firmware */
+#define Error_FIRMWARE_STATUS					0x01000000ul
+
+/** Error Code of I2C Module */
+#define Error_I2C_DATA_HIGH_FAIL				0x02001000ul
+#define Error_I2C_CLK_HIGH_FAIL					0x02002000ul
+#define Error_I2C_WRITE_NO_ACK					0x02003000ul
+#define Error_I2C_DATA_LOW_FAIL					0x02004000ul
+
+/** Error Code of USB Module */
+#define Error_USB_NULL_HANDLE					0x03010001ul
+#define Error_USB_WRITEFILE_FAIL				0x03000002ul
+#define Error_USB_READFILE_FAIL					0x03000003ul
+#define Error_USB_INVALID_READ_SIZE				0x03000004ul
+#define Error_USB_INVALID_STATUS				0x03000005ul
+#define Error_USB_INVALID_SN					0x03000006ul
+#define Error_USB_INVALID_PKT_SIZE				0x03000007ul
+#define Error_USB_INVALID_HEADER				0x03000008ul
+#define Error_USB_NO_IR_PKT						0x03000009ul
+#define Error_USB_INVALID_IR_PKT				0x0300000Aul
+#define Error_USB_INVALID_DATA_LEN				0x0300000Bul
+#define Error_USB_EP4_READFILE_FAIL				0x0300000Cul
+#define Error_USB_EP$_INVALID_READ_SIZE			0x0300000Dul
+#define Error_USB_BOOT_INVALID_PKT_TYPE			0x0300000Eul
+#define Error_USB_BOOT_BAD_CONFIG_HEADER		0x0300000Ful
+#define Error_USB_BOOT_BAD_CONFIG_SIZE			0x03000010ul
+#define Error_USB_BOOT_BAD_CONFIG_SN			0x03000011ul
+#define Error_USB_BOOT_BAD_CONFIG_SUBTYPE		0x03000012ul
+#define Error_USB_BOOT_BAD_CONFIG_VALUE			0x03000013ul
+#define Error_USB_BOOT_BAD_CONFIG_CHKSUM		0x03000014ul
+#define Error_USB_BOOT_BAD_CONFIRM_HEADER		0x03000015ul
+#define Error_USB_BOOT_BAD_CONFIRM_SIZE			0x03000016ul
+#define Error_USB_BOOT_BAD_CONFIRM_SN			0x03000017ul
+#define Error_USB_BOOT_BAD_CONFIRM_SUBTYPE		0x03000018ul
+#define Error_USB_BOOT_BAD_CONFIRM_VALUE		0x03000019ul
+#define Error_USB_BOOT_BAD_CONFIRM_CHKSUM		0x03000020ul
+#define Error_USB_BOOT_BAD_BOOT_HEADER			0x03000021ul
+#define Error_USB_BOOT_BAD_BOOT_SIZE			0x03000022ul
+#define Error_USB_BOOT_BAD_BOOT_SN				0x03000023ul
+#define Error_USB_BOOT_BAD_BOOT_PATTERN_01		0x03000024ul
+#define Error_USB_BOOT_BAD_BOOT_PATTERN_10		0x03000025ul
+#define Error_USB_BOOT_BAD_BOOT_CHKSUM			0x03000026ul
+#define Error_USB_INVALID_BOOT_PKT_TYPE			0x03000027ul
+#define Error_USB_BOOT_BAD_CONFIG_VAlUE			0x03000028ul
+#define Error_USB_COINITIALIZEEX_FAIL			0x03000029ul
+#define Error_USB_COCREATEINSTANCE_FAIL			0x0300003Aul
+#define Error_USB_COCREATCLSEENUMERATOR_FAIL    0x0300002Bul
+#define Error_USB_QUERY_INTERFACE_FAIL			0x0300002Cul
+#define Error_USB_PKSCTRL_NULL					0x0300002Dul
+#define Error_USB_INVALID_REGMODE				0x0300002Eul
+#define Error_USB_INVALID_REG_COUNT				0x0300002Ful
+#define Error_USB_INVALID_HANDLE				0x03000100ul
+#define Error_USB_WRITE_FAIL					0x03000200ul
+#define Error_USB_UNEXPECTED_WRITE_LEN			0x03000300ul
+#define Error_USB_READ_FAIL						0x03000400ul
+
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_firmware.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_firmware.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_firmware.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_firmware.h	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,10867 @@
+// This file is automatically generated. Do not edit.
+
+#ifndef __FIRMWARE_H__
+
+#define __FIRMWARE_H__
+
+
+/* moved to a867_ofdm.h
+
+#define DVB_LL_VERSION1 10
+
+#define DVB_LL_VERSION2 10
+
+#define DVB_LL_VERSION3 3
+
+#define DVB_LL_VERSION4 0
+
+
+
+#define DVB_OFDM_VERSION1 4
+
+#define DVB_OFDM_VERSION2 21
+
+#define DVB_OFDM_VERSION3 6
+
+#define DVB_OFDM_VERSION4 251
+*/
+
+
+#include "a867_type.h"
+
+
+
+
+
+#define Firmware_CODELENGTH				0x0000A4D6
+
+#define Firmware_SEGMENTLENGTH			0x00000004
+
+#define Firmware_PARTITIONLENGTH		0x00000001
+
+
+
+
+
+static Byte Firmware_codes[] = {
+
+	0x01,0x41,0x00,0x00,0x03,0xFB,0xBE,0x02,
+
+	0x54,0x30,
+
+	0x01,0x47,0x00,0x3A,0x07,0xF7,0x7E,0x32,
+
+	0x32,0xA9,0x07,0x89,0x0E,0xE5,0x0E,0x24,
+
+	0x04,0x90,0xF7,0x00,0xF0,0x90,0xF7,0x03,
+
+	0xE0,0x90,0xF7,0x01,0xF0,0xA3,0xE4,0xF0,
+
+	0xE5,0x0E,0x24,0x05,0x90,0xF4,0x12,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0xE0,0x54,0xFC,0xF0,
+
+	0x75,0x0C,0xF7,0x75,0x0D,0x03,0x90,0xF7,
+
+	0x01,0xE0,0xF5,0x08,0xA3,0xE0,0xF5,0x09,
+
+	0xE5,0x0E,0x60,0x57,0xB4,0x01,0x1A,0x8D,
+
+	0x82,0x8C,0x83,0xE0,0x85,0x0D,0x82,0x85,
+
+	0x0C,0x83,0xF0,0xE0,0xFE,0xE4,0x25,0x09,
+
+	0xF5,0x09,0xEE,0x35,0x08,0xF5,0x08,0x80,
+
+	0x3A,0x8D,0x82,0x8C,0x83,0xE0,0xF5,0x0A,
+
+	0xA3,0xE0,0xF5,0x0B,0x85,0x0D,0x82,0x85,
+
+	0x0C,0x83,0xE5,0x0A,0xF0,0xA3,0xE5,0x0B,
+
+	0xF0,0x25,0x09,0xF5,0x09,0xE5,0x0A,0x35,
+
+	0x08,0xF5,0x08,0x74,0x02,0x2D,0xFD,0xE4,
+
+	0x3C,0xFC,0x74,0x02,0x25,0x0D,0xF5,0x0D,
+
+	0xE4,0x35,0x0C,0xF5,0x0C,0x15,0x0E,0x15,
+
+	0x0E,0x80,0xA5,0xE5,0x09,0xF4,0xFF,0xE5,
+
+	0x08,0xF4,0xFE,0x74,0x03,0x29,0xF5,0x82,
+
+	0xE4,0x34,0xF7,0xF5,0x83,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x22,0x90,0x41,0x82,0xEE,0xF0,
+
+	0xA3,0xEF,0xF0,0xE4,0xA3,0xF0,0xA3,0xF0,
+
+	0xFC,0xEC,0xC3,0x9D,0x50,0x43,0xEC,0x30,
+
+	0xE0,0x1F,0x90,0x41,0x82,0xE0,0xFE,0xA3,
+
+	0xE0,0x2C,0xF5,0x82,0xE4,0x3E,0xF5,0x83,
+
+	0xE0,0xFF,0x90,0x41,0x85,0xE0,0x2F,0xF0,
+
+	0x90,0x41,0x84,0xE0,0x34,0x00,0xF0,0x80,
+
+	0x1D,0x90,0x41,0x82,0xE0,0xFE,0xA3,0xE0,
+
+	0x2C,0xF5,0x82,0xE4,0x3E,0xF5,0x83,0xE0,
+
+	0xFE,0x90,0x41,0x85,0xE0,0x24,0x00,0xF0,
+
+	0x90,0x41,0x84,0xE0,0x3E,0xF0,0x0C,0x80,
+
+	0xB8,0x90,0x41,0x84,0xE0,0xFE,0xA3,0xE0,
+
+	0xF4,0xFF,0xEE,0xF4,0xFE,0x22,0xC0,0xE0,
+
+	0xC0,0xF0,0xC0,0x83,0xC0,0x82,0xC0,0x85,
+
+	0xC0,0x84,0xC0,0x86,0x75,0x86,0x00,0xC0,
+
+	0xD0,0x75,0xD0,0x00,0xC0,0x00,0xC0,0x01,
+
+	0xC0,0x02,0xC0,0x03,0xC0,0x04,0xC0,0x05,
+
+	0xC0,0x06,0xC0,0x07,0x90,0x41,0xAD,0x74,
+
+	0xFE,0xF0,0x90,0xF4,0x05,0xE0,0x20,0xE5,
+
+	0x03,0x02,0x52,0xAD,0x75,0x12,0x00,0x90,
+
+	0xF6,0xB4,0xE0,0x30,0xE0,0x1F,0x90,0xF4,
+
+	0x09,0xE0,0xF4,0x60,0x18,0x90,0xF7,0x00,
+
+	0xE0,0x04,0xFF,0x90,0xF4,0x09,0xE0,0xC3,
+
+	0x9F,0x50,0x0A,0x90,0xF4,0x05,0xE0,0x44,
+
+	0x20,0xF0,0x02,0x52,0xAD,0x90,0xF6,0xB4,
+
+	0xE0,0x30,0xE0,0x05,0x90,0xF4,0x09,0xE4,
+
+	0xF0,0x90,0xF6,0xB4,0xE0,0x20,0xE0,0x46,
+
+	0x90,0xF6,0x6F,0xE0,0x20,0xE0,0x3F,0x90,
+
+	0xF6,0x04,0xE0,0x54,0xF0,0x60,0x37,0x90,
+
+	0xF6,0x03,0xE0,0x04,0xF0,0x90,0xF4,0x05,
+
+	0x74,0x20,0xF0,0x90,0x41,0x8C,0xE0,0x04,
+
+	0xF0,0x70,0x06,0x90,0x41,0x8B,0xE0,0x04,
+
+	0xF0,0x90,0xF6,0x04,0xE0,0x30,0xE1,0xF9,
+
+	0x90,0xF6,0x04,0xE4,0xF0,0xE0,0x44,0x01,
+
+	0xF0,0xE0,0x54,0xFE,0xF0,0x90,0xF6,0x03,
+
+	0xE0,0x14,0xF0,0x02,0x52,0xAD,0x90,0xF7,
+
+	0x01,0xE0,0x54,0x70,0x70,0x03,0x02,0x4A,
+
+	0x6A,0xE0,0x54,0x0F,0xFE,0xA3,0xE0,0xC3,
+
+	0x94,0x06,0xEE,0x94,0x00,0x40,0x03,0x02,
+
+	0x4A,0x61,0x90,0xF1,0x03,0xE0,0x90,0x41,
+
+	0x91,0xF0,0x90,0xF6,0xB5,0xE0,0x54,0xF7,
+
+	0x44,0x08,0xF0,0xE0,0x54,0xF7,0xF0,0x90,
+
+	0x41,0x91,0xE0,0x90,0xF1,0x03,0xF0,0x90,
+
+	0x41,0x8E,0xE0,0x90,0xF0,0x00,0xF0,0x90,
+
+	0x44,0xB8,0xE0,0x60,0x09,0x90,0xF1,0x04,
+
+	0xE0,0x54,0xF3,0xF0,0x80,0x09,0x90,0xF1,
+
+	0x04,0xE0,0x54,0xF3,0x44,0x04,0xF0,0x90,
+
+	0xF7,0x00,0xE0,0x04,0xF5,0x11,0x90,0xF1,
+
+	0x01,0xF0,0x90,0xF7,0x01,0xE0,0x54,0x70,
+
+	0xFF,0x74,0xFE,0x25,0x11,0xF5,0x82,0xE4,
+
+	0x34,0xF6,0xF5,0x83,0xE0,0x2F,0xF0,0x90,
+
+	0xF7,0x01,0xE0,0x54,0x8F,0xF0,0xE5,0x11,
+
+	0x60,0x1E,0x15,0x11,0xE4,0x25,0x11,0xF5,
+
+	0x82,0xE4,0x34,0xF7,0xF5,0x83,0xE0,0xFF,
+
+	0xE5,0x11,0x24,0x01,0xFD,0xE4,0x34,0xF0,
+
+	0x8D,0x82,0xF5,0x83,0xEF,0xF0,0x80,0xDE,
+
+	0x90,0xF1,0x00,0xE0,0x54,0xFE,0xF0,0x90,
+
+	0xF1,0x02,0x74,0x01,0xF0,0x90,0xF7,0x02,
+
+	0xE0,0x30,0xE0,0x05,0x75,0x11,0x05,0x80,
+
+	0x08,0x90,0xF7,0x04,0xE0,0x24,0x05,0xF5,
+
+	0x11,0x90,0xF1,0x02,0xE0,0x30,0xE2,0x0F,
+
+	0x90,0xF4,0x05,0x74,0x20,0xF0,0x90,0xF1,
+
+	0x02,0x74,0x02,0xF0,0x02,0x52,0xAD,0x90,
+
+	0xF1,0x02,0xE0,0x30,0xE1,0xE3,0x74,0x02,
+
+	0xF0,0x90,0xF4,0x12,0xE5,0x11,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0xE0,0x54,0xFC,0xF0,0x90,
+
+	0xF0,0x00,0xE0,0x04,0xF0,0x90,0xF1,0x01,
+
+	0xE5,0x11,0xF0,0x90,0xF1,0x00,0xE0,0x44,
+
+	0x01,0xF0,0x90,0xF1,0x02,0x74,0x01,0xF0,
+
+	0x75,0x0F,0x00,0x75,0x10,0x00,0x90,0xF1,
+
+	0x02,0xE0,0x20,0xE3,0x2A,0xE0,0x30,0xE2,
+
+	0xF5,0x74,0x02,0xF0,0xAE,0x0F,0xAF,0x10,
+
+	0xBE,0xFF,0x0C,0xBF,0xFF,0x09,0x90,0xF4,
+
+	0x05,0x74,0x20,0xF0,0x02,0x52,0xAD,0x90,
+
+	0xF1,0x02,0x74,0x01,0xF0,0x05,0x10,0xE5,
+
+	0x10,0x70,0x02,0x05,0x0F,0x80,0xCF,0xE5,
+
+	0x11,0x60,0x1D,0x15,0x11,0xE4,0x25,0x11,
+
+	0xFF,0xE4,0x34,0xF0,0x8F,0x82,0xF5,0x83,
+
+	0xE0,0xFF,0xE4,0x25,0x11,0xF5,0x82,0xE4,
+
+	0x34,0xF7,0xF5,0x83,0xEF,0xF0,0x80,0xDF,
+
+	0x90,0xF4,0x05,0x74,0x20,0xF0,0x90,0x44,
+
+	0xB8,0xE0,0x60,0x1C,0x7E,0xDE,0x7F,0x40,
+
+	0x90,0xF7,0x00,0xE0,0x04,0xFB,0x7D,0x00,
+
+	0x7C,0xF7,0x12,0x56,0x9C,0x90,0xF7,0x00,
+
+	0xE0,0x04,0x90,0xDD,0x86,0xF0,0x80,0x07,
+
+	0x90,0xF4,0x11,0xE0,0x54,0xFC,0xF0,0x90,
+
+	0xF1,0x02,0x74,0x08,0xF0,0x02,0x52,0xAD,
+
+	0x90,0xF4,0x05,0x74,0x20,0xF0,0x02,0x52,
+
+	0xAD,0x90,0xF7,0x03,0xE0,0x90,0x41,0xB2,
+
+	0xF0,0x90,0xF7,0x00,0xE0,0x64,0x03,0x70,
+
+	0x2C,0xA3,0xE0,0x64,0x02,0x70,0x26,0x90,
+
+	0xF7,0x00,0x04,0xF0,0x90,0xF7,0x02,0xE0,
+
+	0xFE,0xA3,0xE0,0xF5,0x82,0x8E,0x83,0xE0,
+
+	0x90,0xF7,0x01,0xF0,0x90,0xF4,0x12,0x74,
+
+	0x02,0xF0,0xA3,0xE4,0xF0,0xA3,0xE0,0x54,
+
+	0xFC,0xF0,0x02,0x51,0xE1,0x90,0xF7,0x00,
+
+	0xE0,0xB4,0x04,0x20,0xA3,0xE0,0xB4,0x03,
+
+	0x1B,0x90,0xF7,0x04,0xE0,0xFF,0x90,0xF7,
+
+	0x02,0xE0,0xFC,0xA3,0xE0,0xF5,0x82,0x8C,
+
+	0x83,0xEF,0xF0,0x90,0xF4,0x05,0x74,0x20,
+
+	0xF0,0x02,0x52,0xAD,0x90,0xF7,0x00,0xE0,
+
+	0xB4,0x04,0x0D,0xA3,0xE0,0xB4,0x04,0x08,
+
+	0x90,0x41,0xAE,0x74,0x01,0xF0,0x80,0x12,
+
+	0x90,0xF7,0x00,0xE0,0x64,0x05,0x70,0x77,
+
+	0xA3,0xE0,0x64,0x05,0x70,0x71,0x90,0x41,
+
+	0xAE,0xF0,0x90,0xF7,0x02,0xE0,0xFD,0x90,
+
+	0x41,0xAE,0xE0,0xFB,0x90,0xF7,0x03,0xE0,
+
+	0x90,0x41,0xC4,0xF0,0x90,0xF7,0x04,0xE0,
+
+	0xFF,0xA3,0xE0,0x90,0x41,0xC5,0xCF,0xF0,
+
+	0xA3,0xEF,0xF0,0xEB,0x60,0x06,0x7E,0xF7,
+
+	0x7F,0x01,0x80,0x04,0x7E,0xF7,0x7F,0x06,
+
+	0x90,0x41,0xC7,0xEE,0xF0,0xA3,0xEF,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x04,0xF0,0x7F,0x02,
+
+	0x12,0x57,0x94,0x90,0x41,0xB0,0xEF,0xF0,
+
+	0x90,0x41,0xAE,0xE0,0x70,0x09,0x90,0xF4,
+
+	0x05,0x74,0x20,0xF0,0x02,0x52,0xAD,0x90,
+
+	0xF7,0x00,0x74,0x01,0xF0,0x90,0x41,0xB0,
+
+	0xE0,0x70,0x03,0x02,0x4A,0x95,0x90,0xF7,
+
+	0x01,0x74,0xFF,0xF0,0x02,0x4A,0x95,0x90,
+
+	0x41,0xAD,0x74,0xFF,0xF0,0x90,0x41,0xB8,
+
+	0x74,0x01,0xF0,0x90,0xF7,0x01,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0xEE,0x60,0x03,0x02,0x51,
+
+	0xDE,0xEF,0x12,0x7E,0xB5,0x4E,0x42,0x00,
+
+	0x4B,0xB2,0x01,0x4C,0xE8,0x02,0x4C,0xE1,
+
+	0x03,0x4D,0x9B,0x04,0x4D,0x94,0x05,0x4E,
+
+	0x5A,0x06,0x4C,0x6A,0x18,0x4C,0x0C,0x22,
+
+	0x4F,0xE3,0x23,0x51,0xD3,0x25,0x50,0xA2,
+
+	0x29,0x50,0x18,0x2A,0x50,0x2F,0x2B,0x4E,
+
+	0x5A,0x30,0x4E,0xE2,0x32,0x00,0x00,0x51,
+
+	0xDE,0x90,0xF6,0xB4,0xE0,0x54,0x08,0xF5,
+
+	0x12,0x60,0x04,0xE0,0x54,0xF7,0xF0,0x90,
+
+	0xF7,0x04,0xE0,0xF5,0x11,0x90,0xF7,0x08,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x80,0x00,0xE5,
+
+	0x11,0x60,0x27,0x15,0x11,0x74,0x0A,0x25,
+
+	0x11,0xF5,0x82,0xE4,0x34,0xF7,0xF5,0x83,
+
+	0xE0,0xFF,0xE5,0x11,0xFD,0x7C,0x00,0x90,
+
+	0xF7,0x08,0xE0,0xFA,0xA3,0xE0,0x2D,0xFD,
+
+	0xEC,0x3A,0x8D,0x82,0xF5,0x83,0xEF,0xF0,
+
+	0x80,0xD5,0xE5,0x12,0x60,0x07,0x90,0xF6,
+
+	0xB4,0xE0,0x44,0x08,0xF0,0x75,0x12,0x00,
+
+	0x02,0x51,0xE1,0x90,0xF4,0x12,0x74,0x09,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xE0,0x54,0xFC,
+
+	0xF0,0x90,0xF7,0x00,0x74,0x08,0xF0,0x90,
+
+	0xF7,0x03,0xE0,0x90,0xF7,0x01,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x74,0x0A,0xF0,0xA3,0xF0,
+
+	0xA3,0x74,0x03,0xF0,0xA3,0xE4,0xF0,0x90,
+
+	0xF7,0x03,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0xF7,0x01,0xE0,0xFC,0xA3,0xE0,0x2F,0xFF,
+
+	0xEC,0x3E,0xFE,0x90,0xF7,0x05,0xE0,0xFC,
+
+	0xA3,0xE0,0x2F,0xFF,0xEC,0x3E,0xFE,0xEF,
+
+	0xF4,0xFF,0xEE,0xF4,0xA3,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x41,0xAD,0xE4,0xF0,0x02,0x51,
+
+	0xE1,0x90,0xF7,0x00,0x74,0x08,0xF0,0x90,
+
+	0xF7,0x03,0xE0,0x90,0xF7,0x01,0xF0,0x90,
+
+	0x44,0xDE,0xE0,0x60,0x40,0x90,0x44,0xDE,
+
+	0xE4,0xF0,0x90,0xF7,0x02,0xF0,0x90,0x44,
+
+	0xDD,0x04,0xF0,0x90,0x44,0xDF,0xE0,0xFF,
+
+	0x90,0x41,0x86,0xF0,0x90,0xDE,0x80,0xE0,
+
+	0x90,0xF7,0x03,0xF0,0x90,0xDE,0x81,0xE0,
+
+	0x90,0xF7,0x04,0xF0,0x90,0xDE,0x82,0xE0,
+
+	0x90,0xF7,0x05,0xF0,0x90,0xDE,0x83,0xE0,
+
+	0x90,0xF7,0x06,0xF0,0x90,0x41,0x86,0xE0,
+
+	0xB5,0x07,0xC2,0x80,0x06,0x90,0xF7,0x02,
+
+	0x74,0x01,0xF0,0x90,0xF7,0x00,0xE0,0x04,
+
+	0x90,0xF4,0x12,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0xE0,0x54,0xFC,0xF0,0x90,0x44,0xDD,0xE4,
+
+	0xF0,0x90,0x41,0xAD,0xF0,0x02,0x51,0xE1,
+
+	0x90,0x41,0xAE,0xE4,0xF0,0x80,0x06,0x90,
+
+	0x41,0xAE,0x74,0x01,0xF0,0x90,0x41,0xAF,
+
+	0x74,0x02,0xF0,0x90,0x41,0xAE,0xE0,0x60,
+
+	0x07,0x90,0xF7,0x04,0xE0,0xFF,0x80,0x02,
+
+	0x7F,0x00,0xEF,0x24,0x04,0x90,0x41,0xB1,
+
+	0xF0,0x90,0xF7,0x05,0xE0,0xB4,0x01,0x08,
+
+	0x90,0x41,0xDE,0xE0,0xFF,0xFD,0x80,0x06,
+
+	0x90,0xF7,0x05,0xE0,0xFF,0xFD,0x90,0x41,
+
+	0xAE,0xE0,0xFB,0x90,0xF7,0x06,0xE0,0x90,
+
+	0x41,0xC4,0xF0,0x90,0xF7,0x07,0xE0,0xFF,
+
+	0xA3,0xE0,0x90,0x41,0xC5,0xCF,0xF0,0xA3,
+
+	0xEF,0xF0,0xEB,0x60,0x06,0x7E,0xF7,0x7F,
+
+	0x03,0x80,0x04,0x7E,0xF7,0x7F,0x09,0x90,
+
+	0x41,0xC7,0xEE,0xF0,0xA3,0xEF,0xF0,0x90,
+
+	0xF7,0x04,0xE0,0xFF,0x90,0x41,0xC9,0xE4,
+
+	0xF0,0xA3,0xEF,0xF0,0x7F,0x02,0x12,0x57,
+
+	0x94,0x90,0x41,0xB0,0xEF,0xF0,0xA3,0xE0,
+
+	0xFF,0x90,0xF7,0x00,0xF0,0x90,0x41,0xB2,
+
+	0xE0,0x90,0xF7,0x01,0xF0,0x90,0x41,0xB0,
+
+	0xE0,0x90,0xF7,0x02,0xF0,0xEF,0x04,0x90,
+
+	0xF4,0x12,0xF0,0xA3,0xE4,0xF0,0xA3,0xE0,
+
+	0x54,0xFC,0xF0,0x90,0x41,0xAD,0xE4,0xF0,
+
+	0x02,0x51,0xE1,0x90,0x41,0xAE,0xE4,0xF0,
+
+	0x80,0x06,0x90,0x41,0xAE,0x74,0x01,0xF0,
+
+	0x90,0x44,0xB8,0xE0,0x60,0x04,0x7F,0x01,
+
+	0x80,0x02,0x7F,0x03,0x90,0x41,0xAF,0xEF,
+
+	0xF0,0x90,0x41,0xAE,0xE0,0xFB,0x60,0x07,
+
+	0x90,0xF7,0x04,0xE0,0xFF,0x80,0x02,0x7F,
+
+	0x00,0xEF,0x24,0x04,0x90,0x41,0xB1,0xF0,
+
+	0x90,0xF7,0x05,0xE0,0xB4,0x01,0x08,0x90,
+
+	0x41,0xDE,0xE0,0xFF,0xFD,0x80,0x06,0x90,
+
+	0xF7,0x05,0xE0,0xFF,0xFD,0x90,0xF7,0x08,
+
+	0xE0,0x90,0x44,0xC9,0xF0,0xEB,0x60,0x06,
+
+	0x7E,0xF7,0x7F,0x03,0x80,0x04,0x7E,0xF7,
+
+	0x7F,0x09,0x90,0x44,0xCA,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x90,0xF7,0x04,0xE0,0xFF,0x90,
+
+	0x44,0xCC,0xE4,0xF0,0xA3,0xEF,0xF0,0x90,
+
+	0x41,0xAF,0xE0,0xFF,0x12,0x6A,0xEA,0x90,
+
+	0x41,0xB0,0xEF,0xF0,0xA3,0xE0,0xFF,0x90,
+
+	0xF7,0x00,0xF0,0x90,0x41,0xB2,0xE0,0x90,
+
+	0xF7,0x01,0xF0,0x90,0x41,0xB0,0xE0,0x90,
+
+	0xF7,0x02,0xF0,0xEF,0x04,0x90,0xF4,0x12,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xE0,0x54,0xFC,
+
+	0xF0,0x90,0x41,0xAD,0xE4,0xF0,0x02,0x51,
+
+	0xE1,0x90,0xF7,0x04,0xE0,0xFF,0x90,0xF7,
+
+	0x08,0xE0,0xFC,0xA3,0xE0,0xFD,0x12,0x47,
+
+	0x02,0x90,0x41,0xAD,0xE4,0xF0,0x02,0x51,
+
+	0xE1,0xC2,0x8C,0xC2,0x8D,0x75,0x8A,0x00,
+
+	0x75,0x8C,0x00,0xE5,0x89,0x54,0xF0,0x44,
+
+	0x01,0xF5,0x89,0xD2,0x8C,0x90,0x41,0x87,
+
+	0xE4,0xF0,0x90,0xF4,0x04,0xE0,0x54,0x04,
+
+	0xFF,0x13,0x13,0x54,0x3F,0x60,0x21,0xE0,
+
+	0x54,0xFB,0x44,0x04,0xF0,0xA3,0x74,0x20,
+
+	0xF0,0x90,0xF4,0x14,0xE0,0x54,0x7F,0xF0,
+
+	0x90,0xF4,0x11,0xE0,0x54,0xFC,0x44,0x02,
+
+	0xF0,0xC2,0x8C,0xC2,0x8D,0x02,0x52,0xAD,
+
+	0x30,0x8D,0xCF,0xC2,0x8C,0xC2,0x8D,0x90,
+
+	0x41,0x87,0xE0,0x04,0xF0,0xE0,0xD3,0x94,
+
+	0x01,0x40,0x2A,0x90,0xF4,0x14,0xE0,0x54,
+
+	0x7F,0x44,0x80,0xF0,0xE0,0x54,0xFC,0xF0,
+
+	0x90,0xF4,0x13,0x74,0x08,0xF0,0x90,0xF4,
+
+	0x12,0xE4,0xF0,0x90,0xF4,0x05,0x74,0x20,
+
+	0xF0,0x90,0xF4,0x11,0xE0,0x54,0xFC,0x44,
+
+	0x01,0xF0,0x02,0x52,0xAD,0xD2,0x8C,0x80,
+
+	0x91,0x90,0xF7,0x0A,0xE0,0xFF,0x90,0x41,
+
+	0xB8,0xF0,0x90,0x41,0x88,0xF0,0x90,0xF4,
+
+	0x14,0xE0,0x30,0xE7,0x1F,0x90,0xF7,0x04,
+
+	0xE0,0x54,0x03,0xFF,0x90,0xF4,0x14,0xE0,
+
+	0x54,0xFC,0x4F,0xF0,0x90,0xF7,0x05,0xE0,
+
+	0x90,0xF4,0x13,0xF0,0x90,0xF7,0x06,0xE0,
+
+	0x90,0xF4,0x12,0xF0,0x90,0xF4,0x05,0x74,
+
+	0x20,0xF0,0x90,0xF4,0x11,0xE0,0x54,0x03,
+
+	0x60,0x08,0x90,0x41,0x89,0xE0,0x64,0x01,
+
+	0x60,0x1B,0x90,0xF7,0x07,0xE0,0xB4,0xF0,
+
+	0x0B,0x90,0xF4,0x11,0xE0,0x54,0xFC,0x44,
+
+	0x02,0xF0,0x80,0x09,0x90,0xF4,0x11,0xE0,
+
+	0x54,0xFC,0x44,0x01,0xF0,0x90,0x41,0x89,
+
+	0xE4,0xF0,0x90,0x41,0x88,0xE0,0xB4,0x01,
+
+	0x0C,0x90,0xF4,0x04,0xE0,0x54,0xFB,0x44,
+
+	0x04,0xF0,0x02,0x52,0xAD,0x90,0xF4,0x05,
+
+	0xE0,0x20,0xE5,0x09,0x90,0xF4,0x15,0xE0,
+
+	0xC3,0x94,0x05,0x40,0xF0,0x90,0xF4,0x04,
+
+	0xE0,0x54,0xFB,0x44,0x04,0xF0,0xA3,0xE0,
+
+	0x30,0xE5,0x09,0x90,0x41,0x89,0x74,0x01,
+
+	0xF0,0x02,0x52,0xAD,0x90,0x41,0xB8,0xE0,
+
+	0x14,0xF0,0x70,0x03,0x02,0x52,0xAD,0x90,
+
+	0xF4,0x15,0xE0,0x70,0xFA,0xA3,0xE0,0x70,
+
+	0xF6,0xA3,0xE0,0x54,0x03,0x70,0xF0,0x90,
+
+	0xF4,0x04,0xE0,0x54,0x04,0xFF,0x13,0x13,
+
+	0x54,0x3F,0x60,0x0C,0x90,0x41,0x8A,0xE0,
+
+	0xC3,0x94,0xFF,0x50,0x03,0xE0,0x04,0xF0,
+
+	0x90,0xF4,0x05,0xE0,0x20,0xE5,0x0D,0x90,
+
+	0xF4,0x04,0xE0,0x54,0x04,0xFF,0x13,0x13,
+
+	0x54,0x3F,0x60,0xEC,0x90,0xF4,0x05,0xE0,
+
+	0x20,0xE5,0x03,0x02,0x4F,0x1B,0x90,0xF4,
+
+	0x04,0xE0,0x54,0xFB,0x44,0x04,0xF0,0x02,
+
+	0x52,0xAD,0xC2,0xAF,0x90,0xF6,0xB3,0xE0,
+
+	0x54,0xFE,0xF0,0x90,0xF6,0xDE,0xE0,0x54,
+
+	0xFE,0x44,0x01,0xF0,0x90,0xF6,0xDE,0xE0,
+
+	0x20,0xE0,0xF9,0x90,0x44,0xB8,0xE0,0x60,
+
+	0x07,0x90,0xDD,0x00,0xE0,0x54,0x7F,0xF0,
+
+	0x90,0xF4,0x05,0x74,0x20,0xF0,0x90,0xF6,
+
+	0x2F,0xE0,0x54,0xFE,0x44,0x01,0xF0,0x90,
+
+	0x41,0xAE,0x74,0x01,0xF0,0x90,0xF7,0x06,
+
+	0xE0,0x44,0x01,0xF0,0x90,0xF7,0x03,0xE0,
+
+	0x90,0xF7,0x01,0xF0,0x80,0x1D,0x90,0x41,
+
+	0xAE,0xE4,0xF0,0x90,0xF7,0x03,0xE0,0x90,
+
+	0xF7,0x01,0xF0,0x7E,0xF0,0x7F,0x01,0x90,
+
+	0xF7,0x04,0xE0,0xFB,0x7D,0x07,0x7C,0xF7,
+
+	0x12,0x56,0x9C,0x90,0xF7,0x04,0xE0,0xF5,
+
+	0x11,0xA3,0xE0,0xFF,0xA3,0xE0,0xFD,0x90,
+
+	0x41,0xBD,0x74,0x01,0xF0,0xAB,0x11,0x12,
+
+	0x54,0xB6,0x8F,0x12,0x90,0xF7,0x02,0xEF,
+
+	0xF0,0x90,0x41,0xAE,0xE0,0x64,0x01,0x60,
+
+	0x03,0x02,0x51,0xE1,0x7C,0xF0,0x7D,0x00,
+
+	0x90,0xF7,0x04,0xE0,0xFB,0x7F,0x03,0x7E,
+
+	0xF7,0x12,0x56,0x9C,0x90,0x41,0xAD,0xE4,
+
+	0xF0,0xE5,0x11,0x24,0x04,0x90,0xF7,0x00,
+
+	0xF0,0xE0,0x90,0xF4,0x12,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0xE0,0x54,0xFC,0xF0,0x02,0x51,
+
+	0xE1,0x90,0x41,0xB6,0x74,0xF7,0xF0,0xA3,
+
+	0x74,0x08,0xF0,0x90,0xF7,0x04,0xE0,0x24,
+
+	0xFE,0x60,0x10,0x14,0x60,0x7F,0x24,0x02,
+
+	0x60,0x03,0x02,0x51,0xC8,0x75,0x12,0x01,
+
+	0x02,0x51,0xC8,0x90,0xF7,0x07,0xE0,0x75,
+
+	0xF0,0x02,0xA4,0x24,0x08,0xFE,0xE5,0xF0,
+
+	0x34,0xF7,0x90,0x41,0xB4,0xF0,0xA3,0xCE,
+
+	0xF0,0x90,0x41,0xB3,0xE4,0xF0,0x90,0xF7,
+
+	0x07,0xE0,0xFF,0x90,0x41,0xB3,0xE0,0xC3,
+
+	0x9F,0x50,0x44,0xA3,0xE0,0xFE,0xA3,0xE0,
+
+	0xF5,0x82,0x8E,0x83,0xE0,0xFF,0x90,0x41,
+
+	0xB6,0xE0,0xFC,0xA3,0xE0,0xF5,0x82,0x8C,
+
+	0x83,0xE0,0xFC,0xA3,0xE0,0xF5,0x82,0x8C,
+
+	0x83,0xEF,0xF0,0x90,0x41,0xB3,0xE0,0x04,
+
+	0xF0,0x90,0x41,0xB5,0xE0,0x04,0xF0,0x70,
+
+	0x06,0x90,0x41,0xB4,0xE0,0x04,0xF0,0x90,
+
+	0x41,0xB7,0xE0,0x24,0x02,0xF0,0x90,0x41,
+
+	0xB6,0xE0,0x34,0x00,0xF0,0x80,0xAF,0x75,
+
+	0x12,0x00,0x02,0x51,0xC8,0x90,0xF7,0x07,
+
+	0xE0,0x75,0xF0,0x03,0xA4,0x24,0x08,0xFE,
+
+	0xE5,0xF0,0x34,0xF7,0x90,0x41,0xB4,0xF0,
+
+	0xA3,0xCE,0xF0,0x90,0xF7,0x07,0xE0,0x75,
+
+	0xF0,0x03,0xA4,0x24,0x08,0x90,0xF6,0x20,
+
+	0xF0,0x90,0x41,0xB3,0xE4,0xF0,0x90,0xF7,
+
+	0x07,0xE0,0xFF,0x90,0x41,0xB3,0xE0,0xC3,
+
+	0x9F,0x50,0x59,0x90,0x41,0xB6,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x24,0x02,0xFD,0xE4,0x3E,
+
+	0x8D,0x82,0xF5,0x83,0xE0,0xFD,0x90,0x41,
+
+	0xB9,0xF0,0xFB,0x8F,0x82,0x8E,0x83,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x41,0xB4,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0x12,0x56,0x9C,0x90,
+
+	0x41,0xB9,0xE0,0xFF,0x90,0x41,0xB5,0xE0,
+
+	0x2F,0xF0,0x90,0x41,0xB4,0xE0,0x34,0x00,
+
+	0xF0,0x90,0x41,0xB3,0xE0,0x04,0xF0,0x90,
+
+	0x41,0xB6,0xE0,0xFE,0xA3,0xE0,0x24,0x03,
+
+	0xFF,0xE4,0x3E,0x90,0x41,0xB6,0xF0,0xA3,
+
+	0xEF,0xF0,0x80,0x9A,0x75,0x12,0x00,0x90,
+
+	0x41,0xAD,0x74,0xFF,0xF0,0x75,0x12,0x00,
+
+	0x80,0x0E,0x90,0x41,0xAD,0x74,0xFF,0xF0,
+
+	0x75,0x12,0xFA,0x80,0x03,0x75,0x12,0x02,
+
+	0x90,0x41,0xAD,0xE0,0xFF,0xF4,0x60,0x5E,
+
+	0xEF,0x64,0xFE,0x60,0x59,0x90,0xF7,0x00,
+
+	0xE0,0x24,0xFE,0xFD,0x7F,0x01,0x7E,0xF7,
+
+	0x12,0x47,0xAC,0x90,0xF7,0x00,0xE0,0x24,
+
+	0xFF,0xF5,0x82,0xE4,0x34,0xF6,0xF5,0x83,
+
+	0xEE,0xF0,0xA3,0xEF,0xF0,0x90,0xF4,0x05,
+
+	0x74,0x20,0xF0,0x90,0x44,0xB8,0xE0,0x60,
+
+	0x1C,0x7E,0xDE,0x7F,0x40,0x90,0xF7,0x00,
+
+	0xE0,0x04,0xFB,0x7D,0x00,0x7C,0xF7,0x12,
+
+	0x56,0x9C,0x90,0xF7,0x00,0xE0,0x04,0x90,
+
+	0xDD,0x86,0xF0,0x80,0x77,0x90,0x41,0xAD,
+
+	0xE0,0x54,0x03,0xFF,0x90,0xF4,0x11,0xE0,
+
+	0x54,0xFC,0x4F,0xF0,0x80,0x66,0x90,0x41,
+
+	0xAD,0xE0,0xF4,0x70,0x30,0x90,0xF4,0x12,
+
+	0x74,0x05,0xF0,0xA3,0xE4,0xF0,0xA3,0xE0,
+
+	0x54,0xFC,0xF0,0x90,0xF7,0x00,0x74,0x04,
+
+	0xF0,0x90,0xF7,0x03,0xE0,0x90,0xF7,0x01,
+
+	0xF0,0xA3,0xE5,0x12,0xF0,0x90,0xF7,0x01,
+
+	0xE0,0xFE,0xA3,0xE0,0xF4,0xFF,0xEE,0xF4,
+
+	0xA3,0xF0,0xA3,0xEF,0xF0,0x90,0xF4,0x05,
+
+	0x74,0x20,0xF0,0x90,0x44,0xB8,0xE0,0x60,
+
+	0x1C,0x7E,0xDE,0x7F,0x40,0x90,0xF7,0x00,
+
+	0xE0,0x04,0xFB,0x7D,0x00,0x7C,0xF7,0x12,
+
+	0x56,0x9C,0x90,0xF7,0x00,0xE0,0x04,0x90,
+
+	0xDD,0x86,0xF0,0x80,0x07,0x90,0xF4,0x11,
+
+	0xE0,0x54,0xFC,0xF0,0xD0,0x07,0xD0,0x06,
+
+	0xD0,0x05,0xD0,0x04,0xD0,0x03,0xD0,0x02,
+
+	0xD0,0x01,0xD0,0x00,0xD0,0xD0,0xD0,0x86,
+
+	0xD0,0x84,0xD0,0x85,0xD0,0x82,0xD0,0x83,
+
+	0xD0,0xF0,0xD0,0xE0,0x32,0x32,0x32,0x32,
+
+	0x32,0x32,0x90,0xF6,0x13,0xE0,0x30,0xE0,
+
+	0x03,0x7F,0x03,0x22,0x90,0xF6,0xB4,0xE0,
+
+	0x30,0xE0,0x03,0x7F,0x00,0x22,0x90,0xF6,
+
+	0x6F,0xE0,0x30,0xE0,0x03,0x7F,0x02,0x22,
+
+	0x7F,0x01,0x22,0x90,0x41,0x7F,0xE0,0x90,
+
+	0x41,0x8E,0xF0,0xE0,0x54,0xF9,0xFF,0xBF,
+
+	0x38,0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,
+
+	0xEF,0x54,0x01,0xFF,0x90,0xD8,0x1A,0xE0,
+
+	0x54,0xFE,0x4F,0xF0,0x90,0xF6,0x41,0xE0,
+
+	0xB4,0x22,0x12,0x90,0xD8,0xD1,0xE0,0x54,
+
+	0xFE,0x44,0x01,0xF0,0x90,0xD8,0xD0,0xE0,
+
+	0x54,0xFE,0x44,0x01,0xF0,0x90,0xD8,0x30,
+
+	0xE0,0x54,0xFE,0x44,0x01,0xF0,0xA3,0xE0,
+
+	0x54,0xFE,0xF0,0xA3,0xE0,0x54,0xFE,0xF0,
+
+	0x90,0xD8,0x29,0xE0,0x54,0xFE,0xF0,0x90,
+
+	0xF6,0xB3,0xE0,0x54,0xFE,0x44,0x01,0xF0,
+
+	0x90,0xF6,0x32,0x74,0xFF,0xF0,0xA3,0xF0,
+
+	0x90,0xF6,0x31,0xE0,0x54,0xFE,0x44,0x01,
+
+	0xF0,0x90,0xF6,0x13,0xE0,0x54,0x01,0x90,
+
+	0x44,0xB8,0xF0,0x12,0x7C,0x41,0x12,0x52,
+
+	0xD3,0x90,0x41,0x90,0xEF,0xF0,0x90,0xF6,
+
+	0xA0,0x74,0x04,0xF0,0x90,0x41,0x90,0xE0,
+
+	0x90,0xF6,0xA1,0xF0,0x90,0xF6,0xDE,0xE0,
+
+	0x54,0xFE,0x44,0x01,0xF0,0x90,0xF6,0xDE,
+
+	0xE0,0x20,0xE0,0xF9,0x90,0xDF,0x82,0xE0,
+
+	0x44,0x20,0xF0,0x90,0xDD,0x17,0xE0,0x54,
+
+	0xFE,0xF0,0xC2,0xDC,0xD2,0xBC,0x12,0x56,
+
+	0xD8,0xD2,0xE9,0x12,0x78,0x4B,0x12,0x5A,
+
+	0x72,0x90,0xF4,0x18,0xE4,0xF0,0xA3,0xE0,
+
+	0x54,0xF0,0x44,0x08,0xF0,0x90,0xF4,0x1E,
+
+	0xE0,0x54,0xEF,0x44,0x10,0xF0,0xC2,0xB8,
+
+	0xC2,0xBA,0xD2,0xAF,0xD2,0xA8,0xD2,0xAA,
+
+	0x90,0xDF,0x82,0xE0,0x30,0xE0,0x1A,0xA2,
+
+	0xAF,0xE4,0x33,0x90,0x41,0x8D,0xF0,0xC2,
+
+	0xAF,0x90,0xDF,0x82,0x74,0x20,0xF0,0xE4,
+
+	0xF0,0x90,0x41,0x8D,0xE0,0x24,0xFF,0x92,
+
+	0xAF,0x90,0x41,0x81,0xE0,0xFF,0x90,0x43,
+
+	0x43,0xE0,0x6F,0x60,0x1D,0xA2,0xAF,0xE4,
+
+	0x33,0x90,0x41,0x8D,0xF0,0xC2,0xAF,0x90,
+
+	0x44,0xDE,0xE0,0x70,0x05,0x90,0x43,0x43,
+
+	0xEF,0xF0,0x90,0x41,0x8D,0xE0,0x24,0xFF,
+
+	0x92,0xAF,0x12,0x58,0xDB,0x90,0x41,0x8F,
+
+	0xE0,0xB4,0x07,0x05,0x12,0x5A,0x0B,0x80,
+
+	0xA7,0x12,0x59,0x73,0x80,0xA2,0x22,0x75,
+
+	0x81,0x18,0x02,0x54,0x71,0x02,0x52,0xF4,
+
+	0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
+
+	0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
+
+	0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
+
+	0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
+
+	0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
+
+	0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
+
+	0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
+
+	0x90,0x64,0x98,0xE4,0x7E,0x01,0x93,0x60,
+
+	0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
+
+	0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
+
+	0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
+
+	0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
+
+	0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
+
+	0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
+
+	0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
+
+	0xE9,0xDE,0xE7,0x80,0xBE,0x90,0x41,0xBA,
+
+	0xEF,0xF0,0xA3,0xED,0xF0,0xA3,0xEB,0xF0,
+
+	0x90,0x41,0x92,0xE0,0xB4,0x01,0x2E,0x90,
+
+	0x41,0xBC,0xE0,0x24,0x01,0xFF,0xE4,0x33,
+
+	0xFE,0xE4,0xFC,0xFD,0x7B,0xFB,0x7A,0x04,
+
+	0xF9,0xF8,0x12,0x7D,0x98,0xE4,0x7B,0x04,
+
+	0xFA,0xF9,0xF8,0x12,0x7E,0x23,0xEF,0x24,
+
+	0x03,0xFF,0xE4,0x3E,0xFE,0xE4,0x3D,0xFD,
+
+	0xE4,0x3C,0xFC,0x80,0x3F,0x90,0x41,0xBC,
+
+	0xE0,0x24,0x01,0xFF,0xE4,0x33,0xFE,0xE4,
+
+	0xFC,0xFD,0x7B,0x05,0xFA,0xF9,0xF8,0x12,
+
+	0x7D,0x98,0xA8,0x04,0xA9,0x05,0xAA,0x06,
+
+	0xAB,0x07,0x90,0xF1,0x03,0xE0,0xFF,0xE4,
+
+	0xFC,0xFD,0xFE,0x12,0x7D,0x98,0xE4,0x7B,
+
+	0x04,0xFA,0xF9,0xF8,0x12,0x7E,0x23,0xEF,
+
+	0x24,0x03,0xFF,0xE4,0x3E,0xFE,0xE4,0x3D,
+
+	0xFD,0xE4,0x3C,0xFC,0x90,0x41,0xBF,0xEE,
+
+	0xF0,0xA3,0xEF,0xF0,0x90,0x41,0xBB,0xE0,
+
+	0x90,0xF0,0x00,0xF0,0x90,0x41,0x92,0xE0,
+
+	0xB4,0x01,0x27,0x90,0x41,0x98,0xE0,0xFF,
+
+	0x90,0x41,0x97,0xE0,0x2F,0xFF,0xE4,0x33,
+
+	0xFE,0xC3,0xEF,0x94,0x0A,0xEE,0x64,0x80,
+
+	0x94,0x80,0x50,0x05,0x12,0x7C,0x0E,0x80,
+
+	0x09,0x90,0x41,0xBE,0x74,0x05,0xF0,0x02,
+
+	0x56,0x8E,0x90,0xF1,0x03,0xE0,0x90,0x41,
+
+	0x91,0xF0,0x90,0xF6,0xB5,0xE0,0x54,0xF7,
+
+	0x44,0x08,0xF0,0xE0,0x54,0xF7,0xF0,0x90,
+
+	0x41,0x91,0xE0,0x90,0xF1,0x03,0xF0,0x90,
+
+	0x41,0xBA,0xE0,0xFF,0xB4,0x01,0x09,0x90,
+
+	0xF1,0x04,0xE0,0x54,0xF3,0xF0,0x80,0x18,
+
+	0xEF,0xB4,0x02,0x0B,0x90,0xF1,0x04,0xE0,
+
+	0x54,0xF3,0x44,0x08,0xF0,0x80,0x09,0x90,
+
+	0xF1,0x04,0xE0,0x54,0xF3,0x44,0x04,0xF0,
+
+	0x90,0x41,0xBB,0xE0,0x54,0x01,0xFF,0x90,
+
+	0xF1,0x00,0xE0,0x54,0xFE,0x4F,0xF0,0x90,
+
+	0x41,0xBC,0xE0,0x90,0xF1,0x01,0xF0,0x12,
+
+	0x7B,0x3E,0x90,0x41,0xBD,0xE0,0x64,0x01,
+
+	0x60,0x03,0x02,0x56,0x6C,0x90,0xF1,0x02,
+
+	0xE0,0x20,0xE2,0x16,0xE0,0x20,0xE1,0x12,
+
+	0xE0,0x20,0xE3,0x0E,0x90,0x41,0xBF,0x74,
+
+	0xFF,0xF5,0xF0,0x12,0x7D,0x6C,0x45,0xF0,
+
+	0x70,0xE3,0x90,0x41,0xBF,0xE0,0x70,0x02,
+
+	0xA3,0xE0,0x70,0x25,0x90,0xF1,0x03,0xE0,
+
+	0x90,0x41,0x91,0xF0,0x90,0xF6,0xB5,0xE0,
+
+	0x54,0xF7,0x44,0x08,0xF0,0xE0,0x54,0xF7,
+
+	0xF0,0x90,0x41,0x91,0xE0,0x90,0xF1,0x03,
+
+	0xF0,0x90,0x41,0xBE,0x74,0x04,0xF0,0x80,
+
+	0x49,0x90,0xF1,0x02,0xE0,0x30,0xE2,0x08,
+
+	0x90,0x41,0xBE,0x74,0x02,0xF0,0x80,0x3A,
+
+	0x90,0x41,0xBB,0xE0,0x30,0xE0,0x16,0x90,
+
+	0xF1,0x02,0xE0,0x30,0xE1,0x08,0x90,0x41,
+
+	0xBE,0x74,0x01,0xF0,0x80,0x24,0xE4,0x90,
+
+	0x41,0xBE,0xF0,0x80,0x1D,0x90,0xF1,0x02,
+
+	0xE0,0x30,0xE3,0x08,0x90,0x41,0xBE,0x74,
+
+	0x01,0xF0,0x80,0x0E,0xE4,0x90,0x41,0xBE,
+
+	0xF0,0x80,0x07,0xE4,0x90,0x41,0xBE,0xF0,
+
+	0x80,0x1B,0x90,0x41,0xBB,0xE0,0x30,0xE0,
+
+	0x0B,0x90,0xF1,0x02,0xE0,0x54,0xF7,0x44,
+
+	0x08,0xF0,0x80,0x09,0x90,0xF1,0x02,0xE0,
+
+	0x54,0xFD,0x44,0x02,0xF0,0x90,0x41,0x91,
+
+	0xE0,0x90,0xF1,0x03,0xF0,0x90,0x41,0xBE,
+
+	0xE0,0xFF,0x22,0xAA,0x86,0x53,0x86,0xFE,
+
+	0x8E,0x85,0x8F,0x84,0x8C,0x83,0x8D,0x82,
+
+	0x0B,0x80,0x0A,0xE0,0xA3,0x63,0x86,0x01,
+
+	0xF0,0xA3,0x63,0x86,0x01,0xDB,0xF4,0x8A,
+
+	0x86,0x22,0x43,0x8E,0x08,0x53,0x89,0xF0,
+
+	0x43,0x89,0x01,0x22,0xAD,0x07,0xAC,0x06,
+
+	0xC2,0x8C,0xC2,0x8D,0xEC,0xF4,0xF5,0x8C,
+
+	0xED,0xF4,0xF5,0x8A,0xD2,0x8C,0x22,0xC2,
+
+	0xAF,0x90,0x41,0x03,0x74,0x02,0xF0,0xA3,
+
+	0x74,0x47,0xF0,0xA3,0x74,0x00,0xF0,0x90,
+
+	0x41,0x0B,0x74,0x02,0xF0,0xA3,0x74,0x47,
+
+	0xF0,0xA3,0x74,0x01,0xF0,0x90,0x41,0x13,
+
+	0x74,0x02,0xF0,0xA3,0x74,0x48,0xF0,0xA3,
+
+	0x74,0x0F,0xF0,0x90,0x41,0x1B,0x74,0x02,
+
+	0xF0,0xA3,0x74,0x52,0xF0,0xA3,0x74,0xCE,
+
+	0xF0,0x90,0x41,0x23,0x74,0x02,0xF0,0xA3,
+
+	0x74,0x57,0xF0,0xA3,0x74,0x93,0xF0,0x90,
+
+	0x41,0x2B,0x74,0x02,0xF0,0xA3,0x74,0x6D,
+
+	0xF0,0xA3,0x74,0xA9,0xF0,0x90,0x41,0x33,
+
+	0x74,0x02,0xF0,0xA3,0x74,0x67,0xF0,0xA3,
+
+	0x74,0x3B,0xF0,0x90,0x41,0x3B,0x74,0x02,
+
+	0xF0,0xA3,0x74,0x52,0xF0,0xA3,0x74,0xCF,
+
+	0xF0,0x90,0x41,0x43,0x74,0x02,0xF0,0xA3,
+
+	0x74,0x52,0xF0,0xA3,0x74,0xD0,0xF0,0x90,
+
+	0x41,0x4B,0x74,0x02,0xF0,0xA3,0x74,0x60,
+
+	0xF0,0xA3,0x74,0x6A,0xF0,0x90,0x41,0x53,
+
+	0x74,0x02,0xF0,0xA3,0x74,0x52,0xF0,0xA3,
+
+	0x74,0xD1,0xF0,0x90,0x41,0x5B,0x74,0x02,
+
+	0xF0,0xA3,0x74,0x52,0xF0,0xA3,0x74,0xD2,
+
+	0xF0,0x90,0x41,0x63,0x74,0x02,0xF0,0xA3,
+
+	0x74,0x67,0xF0,0xA3,0x74,0x85,0xF0,0xD2,
+
+	0xAF,0x22,0x32,0x90,0x41,0xC1,0xEF,0xF0,
+
+	0xA3,0xED,0xF0,0xEB,0x70,0x61,0x90,0x41,
+
+	0xC4,0xE0,0xFF,0xB4,0x01,0x0A,0x90,0x41,
+
+	0xC6,0xE0,0x90,0xF0,0x01,0xF0,0x80,0x14,
+
+	0xEF,0xB4,0x02,0x10,0x90,0x41,0xC5,0xE0,
+
+	0x90,0xF0,0x01,0xF0,0x90,0x41,0xC6,0xE0,
+
+	0x90,0xF0,0x02,0xF0,0x90,0x41,0xC4,0xE0,
+
+	0x24,0x01,0xF5,0x82,0xE4,0x34,0xF0,0xAF,
+
+	0x82,0xFE,0x90,0x41,0xC7,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0x90,0x41,0xCA,0xE0,0xFB,0x12,
+
+	0x56,0x9C,0x90,0x41,0xC1,0xE0,0xFF,0xA3,
+
+	0xE0,0xFD,0x90,0x41,0xCA,0xE0,0xFE,0x90,
+
+	0x41,0xC4,0xE0,0x2E,0xFB,0x90,0x41,0xBD,
+
+	0x74,0x01,0xF0,0x12,0x54,0xB6,0x22,0x90,
+
+	0x41,0xC4,0xE0,0x70,0x22,0x90,0x41,0xC1,
+
+	0xE0,0xFF,0xA3,0xE0,0x44,0x01,0xFD,0x90,
+
+	0x41,0xCA,0xE0,0xFB,0x90,0x41,0xBD,0x74,
+
+	0x01,0xF0,0x12,0x54,0xB6,0x90,0x41,0xCB,
+
+	0xEF,0xF0,0x60,0x5F,0xE0,0xFF,0x22,0x7E,
+
+	0xF0,0x7F,0x01,0x90,0x41,0xC4,0xE0,0xFD,
+
+	0xC3,0x74,0xC7,0x9D,0xF9,0x74,0x41,0x94,
+
+	0x00,0xFC,0xAD,0x01,0xE0,0xFB,0x12,0x56,
+
+	0x9C,0x90,0x41,0xC1,0xE0,0xFF,0xA3,0xE0,
+
+	0xFD,0x90,0x41,0xC4,0xE0,0xFB,0x90,0x41,
+
+	0xBD,0x74,0x01,0xF0,0x12,0x54,0xB6,0x90,
+
+	0x41,0xCB,0xEF,0xF0,0x60,0x03,0xE0,0xFF,
+
+	0x22,0x90,0x41,0xC1,0xE0,0xFF,0xA3,0xE0,
+
+	0x44,0x01,0xFD,0x90,0x41,0xCA,0xE0,0xFB,
+
+	0x90,0x41,0xBD,0x74,0x01,0xF0,0x12,0x54,
+
+	0xB6,0x90,0x41,0xCB,0xEF,0xF0,0x60,0x03,
+
+	0xE0,0xFF,0x22,0x90,0x41,0xC7,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x7C,0xF0,0x7D,0x00,0x90,
+
+	0x41,0xCA,0xE0,0xFB,0x12,0x56,0x9C,0x7F,
+
+	0x00,0x22,0x90,0x41,0xCC,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0xA3,0xEC,0xF0,0xA3,0xED,0xF0,
+
+	0x90,0x41,0xC4,0x74,0x01,0xF0,0x90,0x41,
+
+	0xCC,0xE0,0xFF,0xA3,0xE0,0x90,0x41,0xC5,
+
+	0xCF,0xF0,0xA3,0xEF,0xF0,0x90,0x41,0xCE,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x41,0xC7,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x04,0xF0,0x7D,0xC0,0x7F,0x02,0x12,0x57,
+
+	0x94,0x22,0xC2,0xE9,0x90,0x41,0xD3,0xE0,
+
+	0xFF,0xA3,0xE0,0xFE,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFC,0xD2,0xE9,0x60,0x06,0xED,0xD3,
+
+	0x94,0x02,0x40,0x06,0x90,0xF6,0xA5,0xE4,
+
+	0xF0,0x22,0xED,0xD3,0x94,0x00,0x40,0x16,
+
+	0xED,0xC4,0x54,0xF0,0xFC,0x74,0x37,0x9C,
+
+	0xFC,0xEE,0xC4,0x54,0x0F,0xFB,0xC3,0xEC,
+
+	0x9B,0x90,0xF6,0xA5,0xF0,0x22,0xEE,0xD3,
+
+	0x94,0x0C,0x40,0x10,0xEE,0x13,0x13,0x13,
+
+	0x54,0x1F,0xFC,0xC3,0x74,0x49,0x9C,0x90,
+
+	0xF6,0xA5,0xF0,0x22,0xEE,0xD3,0x94,0x02,
+
+	0x40,0x19,0xEE,0x25,0xE0,0xFC,0xC3,0x74,
+
+	0x5F,0x9C,0xFC,0xEF,0xC4,0x13,0x13,0x13,
+
+	0x54,0x01,0xFB,0xC3,0xEC,0x9B,0x90,0xF6,
+
+	0xA5,0xF0,0x22,0xED,0xD3,0x94,0x10,0x40,
+
+	0x1A,0xEE,0x25,0xE0,0x25,0xE0,0xFE,0xC3,
+
+	0x74,0x64,0x9E,0xFE,0xEF,0xC4,0x13,0x13,
+
+	0x54,0x03,0xFF,0xC3,0xEE,0x9F,0x90,0xF6,
+
+	0xA5,0xF0,0x22,0x90,0xF6,0xA5,0x74,0x64,
+
+	0xF0,0x22,0xC2,0xE9,0x90,0x41,0xD7,0xE0,
+
+	0xFF,0x90,0x41,0xD9,0xE0,0xFD,0x90,0x41,
+
+	0xDB,0xE0,0x90,0x41,0xD2,0xF0,0x90,0x41,
+
+	0xDC,0xE0,0xF9,0xD2,0xE9,0xEF,0xFE,0x7C,
+
+	0x00,0xE4,0x2D,0xFF,0xEC,0x3E,0xFE,0x90,
+
+	0x41,0xD0,0xF0,0xA3,0xEF,0xF0,0xD3,0x94,
+
+	0x64,0xEE,0x94,0x00,0x40,0x45,0x90,0x43,
+
+	0x4F,0xE0,0xB4,0x01,0x1C,0xE9,0xFF,0x90,
+
+	0x41,0xD2,0xE0,0x2F,0xFF,0xEC,0x33,0xCF,
+
+	0x24,0x71,0xCF,0x34,0xFF,0xFE,0x7D,0x28,
+
+	0x12,0x7D,0x05,0xAA,0x06,0xAB,0x07,0x80,
+
+	0x13,0xAF,0x01,0x7E,0x00,0x7C,0x00,0x7D,
+
+	0x28,0x12,0x7D,0x05,0xEF,0x24,0xA0,0xFB,
+
+	0xEE,0x34,0x14,0xFA,0xEA,0xFF,0x90,0x43,
+
+	0x4E,0xE0,0x2F,0xFF,0x24,0x05,0x90,0xF6,
+
+	0xA6,0xF0,0x22,0x90,0x41,0xD0,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0xC3,0x74,0x64,0x9F,0xFF,
+
+	0xE4,0x9E,0xFE,0x7C,0x00,0x7D,0x06,0x12,
+
+	0x7D,0x17,0xEF,0x24,0x50,0x90,0xF6,0xA6,
+
+	0xF0,0x22,0xC2,0xE9,0x90,0x41,0xDD,0xE0,
+
+	0xFF,0xD2,0xE9,0xC3,0x13,0x24,0x1A,0x90,
+
+	0xF6,0xA6,0xF0,0xE0,0xC3,0x94,0x5A,0x40,
+
+	0x0A,0xE0,0xD3,0x94,0x64,0x50,0x04,0xA3,
+
+	0xE4,0xF0,0x22,0x90,0xF6,0xA6,0xE0,0xFF,
+
+	0x74,0x5A,0xD3,0x9F,0x40,0x0F,0xE0,0x94,
+
+	0x28,0x40,0x0A,0xE0,0xFF,0x74,0x5A,0x9F,
+
+	0x25,0xE0,0xA3,0xF0,0x22,0x90,0xF6,0xA6,
+
+	0xE0,0xC3,0x94,0x28,0x50,0x0A,0xE0,0xC3,
+
+	0x94,0x00,0x40,0x04,0xA3,0x74,0x64,0xF0,
+
+	0x22,0xE4,0x90,0x44,0xB5,0xF0,0x90,0x44,
+
+	0xB6,0xF0,0x90,0x44,0xB7,0xF0,0x90,0x44,
+
+	0xC5,0xF0,0x12,0x6A,0xDF,0x12,0x64,0xA0,
+
+	0x22,0x90,0x45,0x18,0xE0,0x60,0x38,0x74,
+
+	0x41,0x90,0x41,0x7F,0xF0,0x74,0xE4,0xA3,
+
+	0xF0,0x90,0x45,0x34,0xE0,0x70,0x05,0x12,
+
+	0x6D,0x4C,0x80,0x1B,0x90,0x45,0x34,0xE0,
+
+	0xB4,0x01,0x05,0x12,0x6D,0x56,0x80,0x0F,
+
+	0x90,0x45,0x34,0xE0,0x64,0x02,0x60,0x04,
+
+	0xE0,0xB4,0xFF,0x03,0x12,0x78,0xFE,0x90,
+
+	0x44,0xB8,0xE0,0x70,0x02,0xD2,0xDD,0x90,
+
+	0x44,0xB8,0xE0,0x60,0x06,0x12,0x68,0x68,
+
+	0x12,0x68,0x49,0x22,0x90,0x43,0x54,0xE0,
+
+	0xFF,0x20,0xE7,0x03,0x02,0x5B,0x98,0xB4,
+
+	0xA1,0x19,0xA3,0xE0,0x24,0xFE,0x60,0x0D,
+
+	0x14,0x60,0x0D,0x24,0x02,0x60,0x03,0x02,
+
+	0x5C,0x52,0x7F,0x21,0x22,0x7F,0x22,0x22,
+
+	0x7F,0x23,0x22,0x90,0x43,0x54,0xE0,0xFF,
+
+	0x54,0x60,0x60,0x03,0x02,0x5C,0x52,0x90,
+
+	0x43,0x55,0xE0,0x24,0xFA,0x60,0x2D,0x24,
+
+	0xFE,0x70,0x03,0x02,0x5B,0x92,0x24,0xFE,
+
+	0x70,0x03,0x02,0x5B,0x95,0x24,0x0A,0x60,
+
+	0x03,0x02,0x5C,0x52,0xEF,0x24,0x7F,0x60,
+
+	0x0D,0x14,0x60,0x0D,0x24,0x02,0x60,0x03,
+
+	0x02,0x5C,0x52,0x7F,0x01,0x22,0x7F,0x02,
+
+	0x22,0x7F,0x03,0x22,0x90,0x43,0x54,0xE0,
+
+	0xB4,0x81,0x1B,0x90,0x43,0x57,0xE0,0x24,
+
+	0xDE,0x60,0x0D,0x14,0x60,0x0D,0x24,0x02,
+
+	0x60,0x03,0x02,0x5C,0x52,0x7F,0x6B,0x22,
+
+	0x7F,0x6C,0x22,0x7F,0x6D,0x22,0x90,0x43,
+
+	0x57,0xE0,0x14,0xB4,0x08,0x00,0x40,0x03,
+
+	0x02,0x5C,0x52,0x90,0x5B,0x62,0x75,0xF0,
+
+	0x03,0xA4,0xC5,0x83,0x25,0xF0,0xC5,0x83,
+
+	0x73,0x02,0x5B,0x7A,0x02,0x5B,0x7D,0x02,
+
+	0x5B,0x80,0x02,0x5B,0x83,0x02,0x5B,0x86,
+
+	0x02,0x5B,0x89,0x02,0x5B,0x8C,0x02,0x5B,
+
+	0x8F,0x7F,0x60,0x22,0x7F,0x61,0x22,0x7F,
+
+	0x62,0x22,0x7F,0x63,0x22,0x7F,0x64,0x22,
+
+	0x7F,0x65,0x22,0x7F,0x66,0x22,0x7F,0x67,
+
+	0x22,0x7F,0x80,0x22,0x7F,0xA0,0x22,0x90,
+
+	0x43,0x54,0xE0,0xB4,0x21,0x19,0xA3,0xE0,
+
+	0x24,0xF6,0x60,0x0D,0x14,0x60,0x0D,0x24,
+
+	0x02,0x60,0x03,0x02,0x5C,0x52,0x7F,0x29,
+
+	0x22,0x7F,0x2B,0x22,0x7F,0x2B,0x22,0x90,
+
+	0x43,0x54,0xE0,0xFF,0x54,0x60,0x60,0x03,
+
+	0x02,0x5C,0x52,0x90,0x43,0x55,0xE0,0x24,
+
+	0xFD,0x60,0x39,0x24,0xFE,0x60,0x63,0x24,
+
+	0xFE,0x60,0x6B,0x24,0xFE,0x60,0x74,0x24,
+
+	0xFE,0x60,0x73,0x24,0x0A,0x70,0x72,0xEF,
+
+	0x24,0xFE,0x60,0x17,0x24,0x02,0x70,0x69,
+
+	0x90,0x43,0x56,0xE0,0xFE,0xB4,0x01,0x03,
+
+	0x7F,0x10,0x22,0xEE,0x64,0x02,0x70,0x59,
+
+	0x7F,0x12,0x22,0x90,0x43,0x56,0xE0,0x70,
+
+	0x50,0x7F,0x13,0x22,0x90,0x43,0x54,0xE0,
+
+	0x24,0xFE,0x60,0x1D,0x24,0x02,0x70,0x41,
+
+	0x90,0x43,0x56,0xE0,0xFE,0xB4,0x01,0x03,
+
+	0x7F,0x30,0x22,0xEE,0x64,0x02,0x70,0x31,
+
+	0x90,0x43,0x58,0xE0,0x70,0x2B,0x7F,0x31,
+
+	0x22,0x90,0x43,0x56,0xE0,0x70,0x22,0x7F,
+
+	0x32,0x22,0x90,0x43,0x56,0xE0,0xC3,0x94,
+
+	0x80,0x50,0x16,0x7F,0x50,0x22,0x90,0x43,
+
+	0x54,0xE0,0xB4,0x01,0x03,0x7F,0x71,0x22,
+
+	0x7F,0x70,0x22,0x7F,0x90,0x22,0x7F,0xB0,
+
+	0x22,0x7F,0x00,0x22,0xE4,0xFF,0x7F,0x06,
+
+	0x90,0x43,0x5C,0xE4,0xF0,0xA3,0xDF,0xFC,
+
+	0x22,0x90,0x44,0x67,0xE0,0x24,0xA0,0x60,
+
+	0x2D,0x14,0x60,0x35,0x14,0x70,0x03,0x02,
+
+	0x5C,0xFD,0x24,0xFD,0x70,0x03,0x02,0x5D,
+
+	0x5D,0x14,0x70,0x03,0x02,0x5D,0x67,0x24,
+
+	0x16,0x60,0x03,0x02,0x5D,0xC9,0x90,0x43,
+
+	0x56,0xE0,0x90,0xDD,0x10,0xF0,0xE4,0x90,
+
+	0x44,0x68,0xF0,0x02,0x5D,0xCC,0x90,0x43,
+
+	0x64,0xE0,0xFF,0x12,0x68,0xD9,0x02,0x5D,
+
+	0xCC,0x90,0x44,0xC5,0xE0,0x60,0x29,0x78,
+
+	0x89,0x7C,0x43,0x7D,0x01,0x7B,0x01,0x7A,
+
+	0x43,0x79,0x80,0x7E,0x00,0x7F,0x09,0x12,
+
+	0x7F,0x9D,0x90,0x43,0x8A,0x74,0x02,0xF0,
+
+	0x7F,0x00,0x7E,0x40,0x12,0x6A,0x7A,0x7F,
+
+	0x02,0x7E,0x00,0x12,0x6A,0xBB,0x80,0x21,
+
+	0x78,0x89,0x7C,0x43,0x7D,0x01,0x7B,0x01,
+
+	0x7A,0x44,0x79,0x6A,0x7E,0x00,0x7F,0x09,
+
+	0x12,0x7F,0x9D,0x7F,0x02,0x7E,0x00,0x12,
+
+	0x6A,0x7A,0x7F,0x14,0x7E,0x00,0x12,0x6A,
+
+	0xBB,0x90,0x43,0x8B,0xE0,0xFF,0x12,0x68,
+
+	0xD9,0x02,0x5D,0xCC,0xE4,0xFF,0x90,0x43,
+
+	0x56,0xE0,0xFE,0xEF,0xC3,0x9E,0x50,0x2C,
+
+	0x90,0x44,0x69,0xE0,0xFE,0x90,0x45,0x03,
+
+	0xE0,0x75,0xF0,0x08,0xA4,0x2E,0xF5,0x82,
+
+	0xE4,0x35,0xF0,0xF5,0x83,0xE5,0x82,0x24,
+
+	0x00,0xF5,0x82,0xE5,0x83,0x34,0x45,0xF5,
+
+	0x83,0xE0,0xFE,0x90,0x44,0x69,0xE0,0x2E,
+
+	0xF0,0x0F,0x80,0xCA,0x90,0x44,0x69,0xE0,
+
+	0xFF,0x90,0x45,0x03,0xE0,0x75,0xF0,0x08,
+
+	0xA4,0x2F,0xF5,0x82,0xE4,0x35,0xF0,0xF5,
+
+	0x83,0xE5,0x82,0x24,0x00,0xF5,0x82,0xE5,
+
+	0x83,0x34,0x45,0xF5,0x83,0xE0,0xFF,0x12,
+
+	0x68,0xD9,0x80,0x6F,0x90,0x43,0x76,0xE0,
+
+	0xFF,0x12,0x68,0xD9,0x80,0x65,0x90,0x44,
+
+	0xC5,0xE0,0x60,0x31,0x78,0x89,0x7C,0x43,
+
+	0x7D,0x01,0x7B,0x01,0x7A,0x44,0x79,0x6A,
+
+	0x7E,0x00,0x7F,0x09,0x12,0x7F,0x9D,0x90,
+
+	0x43,0x8A,0x74,0x07,0xF0,0x7F,0x02,0x7E,
+
+	0x00,0x12,0x6A,0x7A,0x7F,0x14,0x7E,0x00,
+
+	0x12,0x6A,0xBB,0x90,0x43,0x8B,0xE0,0xFF,
+
+	0x12,0x68,0xD9,0x80,0x2E,0x78,0x89,0x7C,
+
+	0x43,0x7D,0x01,0x7B,0x01,0x7A,0x43,0x79,
+
+	0x80,0x7E,0x00,0x7F,0x09,0x12,0x7F,0x9D,
+
+	0x90,0x43,0x8B,0xE0,0xFF,0x12,0x68,0xD9,
+
+	0x7F,0x00,0x7E,0x40,0x12,0x6A,0x7A,0x7F,
+
+	0x02,0x7E,0x00,0x12,0x6A,0xBB,0x80,0x03,
+
+	0x7F,0x07,0x22,0x7F,0x00,0x22,0x90,0x44,
+
+	0x67,0xE0,0xFF,0x14,0x24,0xFD,0x50,0x3A,
+
+	0x24,0xF4,0x70,0x03,0x02,0x5E,0x6D,0x24,
+
+	0xFD,0x70,0x03,0x02,0x5E,0x75,0x24,0xE2,
+
+	0x70,0x03,0x02,0x5E,0xA6,0x14,0x70,0x03,
+
+	0x02,0x5E,0x8D,0x24,0xB2,0x70,0x03,0x02,
+
+	0x5E,0xD6,0x24,0xF0,0x70,0x03,0x02,0x5E,
+
+	0xE6,0x24,0xF0,0x70,0x03,0x02,0x5E,0xF8,
+
+	0x24,0xF0,0x70,0x03,0x02,0x5F,0x08,0x02,
+
+	0x5F,0x1A,0xEF,0xB4,0x01,0x26,0x90,0x44,
+
+	0xC5,0xE0,0x60,0x10,0x90,0x43,0x87,0xE0,
+
+	0xFF,0xC4,0x13,0x13,0x54,0x01,0x90,0xDE,
+
+	0x00,0xF0,0x80,0x32,0x90,0x44,0x71,0xE0,
+
+	0xFF,0xC4,0x13,0x13,0x54,0x01,0x90,0xDE,
+
+	0x00,0xF0,0x80,0x22,0x90,0x44,0x67,0xE0,
+
+	0xB4,0x02,0x07,0xE4,0x90,0xDE,0x00,0xF0,
+
+	0x80,0x14,0x90,0x43,0x58,0xE0,0x54,0x0F,
+
+	0x24,0x5C,0xF5,0x82,0xE4,0x34,0x43,0xF5,
+
+	0x83,0xE0,0x90,0xDE,0x00,0xF0,0xE4,0x90,
+
+	0xDE,0x01,0xF0,0x90,0x44,0x68,0x74,0x02,
+
+	0xF0,0x02,0x5F,0x1D,0xE4,0x90,0x44,0x68,
+
+	0xF0,0x02,0x5F,0x1D,0x90,0x43,0x58,0xE0,
+
+	0x54,0x0F,0x24,0x5C,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0xE4,0xF0,0x90,0x44,0x68,
+
+	0xF0,0x02,0x5F,0x1D,0x90,0x43,0x58,0xE0,
+
+	0x54,0x0F,0x24,0x5C,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0x74,0x01,0xF0,0xE4,0x90,
+
+	0x44,0x68,0xF0,0x80,0x77,0x90,0x44,0xC5,
+
+	0xE0,0x60,0x08,0xE4,0x90,0x44,0xB6,0xF0,
+
+	0x7F,0x07,0x22,0x90,0x43,0x59,0xE0,0x14,
+
+	0x24,0xFC,0x50,0x02,0x80,0x08,0x90,0x44,
+
+	0xB6,0x74,0x01,0xF0,0x80,0x08,0xE4,0x90,
+
+	0x44,0xB6,0xF0,0x7F,0x07,0x22,0xE4,0x90,
+
+	0x44,0x68,0xF0,0x80,0x47,0x90,0x43,0x62,
+
+	0xE0,0x90,0xDE,0x00,0xF0,0x90,0x44,0x68,
+
+	0x74,0x01,0xF0,0x80,0x37,0x12,0x5C,0x55,
+
+	0x90,0x43,0x56,0xE0,0x90,0x43,0x62,0xF0,
+
+	0xE4,0x90,0x44,0x68,0xF0,0x80,0x25,0x90,
+
+	0x43,0x63,0xE0,0x90,0xDE,0x00,0xF0,0x90,
+
+	0x44,0x68,0x74,0x01,0xF0,0x80,0x15,0x12,
+
+	0x5C,0x55,0x90,0x43,0x56,0xE0,0x90,0x43,
+
+	0x63,0xF0,0xE4,0x90,0x44,0x68,0xF0,0x80,
+
+	0x03,0x7F,0x07,0x22,0x7F,0x00,0x22,0x90,
+
+	0x44,0x67,0xE0,0x24,0xDE,0x60,0x1F,0x24,
+
+	0xF7,0x60,0x2B,0x24,0xBF,0x60,0x0D,0x04,
+
+	0x70,0x33,0x90,0x43,0xF3,0xE0,0xFF,0x12,
+
+	0x68,0xD9,0x80,0x2C,0x90,0x43,0xFA,0xE0,
+
+	0xFF,0x12,0x68,0xD9,0x80,0x22,0x90,0x44,
+
+	0xB4,0xE0,0x90,0xDE,0x00,0xF0,0x90,0x44,
+
+	0x68,0x74,0x01,0xF0,0x80,0x12,0x90,0x43,
+
+	0x57,0xE0,0x90,0x44,0xB4,0xF0,0xE4,0x90,
+
+	0x44,0x68,0xF0,0x80,0x03,0x7F,0x07,0x22,
+
+	0x7F,0x00,0x22,0x90,0x44,0x67,0xE0,0x12,
+
+	0x7E,0xB5,0x5F,0xB6,0x01,0x5F,0xB6,0x02,
+
+	0x5F,0xB6,0x03,0x5F,0xB6,0x10,0x5F,0xB6,
+
+	0x13,0x5F,0xB6,0x22,0x5F,0xB6,0x2B,0x5F,
+
+	0xB6,0x31,0x5F,0xB6,0x32,0x5F,0xB6,0x50,
+
+	0x5F,0xC0,0x60,0x5F,0xD6,0x61,0x5F,0xEC,
+
+	0x62,0x5F,0xCB,0x65,0x5F,0xE1,0x66,0x60,
+
+	0x03,0x6B,0x60,0x0E,0x6C,0x5F,0xB6,0x80,
+
+	0x5F,0xB6,0x90,0x5F,0xB6,0xA0,0x5F,0xB6,
+
+	0xB0,0x00,0x00,0x60,0x19,0x90,0x44,0x68,
+
+	0xE0,0x90,0xDD,0x85,0xF0,0x80,0x5C,0x7A,
+
+	0x43,0x79,0x64,0x7B,0x01,0x12,0x68,0xFE,
+
+	0x80,0x51,0x7A,0x43,0x79,0x76,0x7B,0x01,
+
+	0x12,0x68,0xFE,0x80,0x46,0x7A,0x43,0x79,
+
+	0x89,0x7B,0x01,0x12,0x68,0xFE,0x80,0x3B,
+
+	0x7A,0x43,0x79,0x89,0x7B,0x01,0x12,0x68,
+
+	0xFE,0x80,0x30,0x90,0x45,0x03,0xE0,0x75,
+
+	0xF0,0x08,0xA4,0x24,0x00,0xF9,0x74,0x45,
+
+	0x35,0xF0,0xFA,0x7B,0x01,0x12,0x68,0xFE,
+
+	0x80,0x19,0x7A,0x43,0x79,0xF3,0x7B,0x01,
+
+	0x12,0x68,0xFE,0x80,0x0E,0x7B,0x01,0x7A,
+
+	0x44,0x79,0x73,0x12,0x68,0xFE,0x80,0x03,
+
+	0x7F,0x03,0x22,0x7F,0x00,0x22,0x12,0x5A,
+
+	0xBD,0x90,0x44,0x67,0xEF,0xF0,0x90,0x44,
+
+	0x67,0xE0,0x70,0x03,0x7F,0x06,0x22,0x12,
+
+	0x68,0xA2,0xEF,0x60,0x01,0x22,0x7F,0x00,
+
+	0x22,0x12,0x5F,0x6C,0xEF,0x60,0x01,0x22,
+
+	0x7F,0x00,0x22,0x90,0xDE,0xC3,0xE0,0x90,
+
+	0xDE,0x41,0xF0,0xE4,0xA3,0xF0,0x7C,0xDE,
+
+	0x7D,0xC0,0x90,0xDE,0xC0,0xE0,0x04,0xFB,
+
+	0x7F,0x00,0x7E,0xF7,0x12,0x56,0x9C,0x90,
+
+	0xF4,0x10,0xE0,0x54,0xFE,0x44,0x01,0xF0,
+
+	0x22,0xC0,0xE0,0xC0,0xF0,0xC0,0x83,0xC0,
+
+	0x82,0xC0,0x85,0xC0,0x84,0xC0,0x86,0x75,
+
+	0x86,0x00,0xC0,0xD0,0x75,0xD0,0x00,0xC0,
+
+	0x00,0xC0,0x01,0xC0,0x02,0xC0,0x03,0xC0,
+
+	0x04,0xC0,0x05,0xC0,0x06,0xC0,0x07,0x90,
+
+	0xF6,0xA8,0xE0,0x12,0x7E,0xB5,0x60,0xCE,
+
+	0x00,0x63,0x39,0x01,0x63,0x39,0x02,0x60,
+
+	0xEB,0x04,0x61,0x0E,0x05,0x61,0x47,0x07,
+
+	0x62,0x73,0x0D,0x62,0x73,0x0E,0x62,0x73,
+
+	0x0F,0x62,0xC6,0x10,0x62,0x3D,0x11,0x61,
+
+	0x58,0x12,0x61,0xA4,0x13,0x62,0x04,0x14,
+
+	0x62,0x04,0x15,0x64,0x0D,0x16,0x64,0x3E,
+
+	0x17,0x00,0x00,0x64,0x6D,0x7E,0xDE,0x7F,
+
+	0x40,0x90,0xF7,0x00,0xE0,0x04,0xFB,0x7D,
+
+	0x00,0x7C,0xF7,0x12,0x56,0x9C,0x90,0xF7,
+
+	0x00,0xE0,0x04,0x90,0xDD,0x86,0xF0,0x02,
+
+	0x64,0x6D,0x90,0xF6,0xA9,0xE0,0x90,0x41,
+
+	0xD3,0xF0,0x90,0xF6,0xAA,0xE0,0x90,0x41,
+
+	0xD4,0xF0,0x90,0xF6,0xAB,0xE0,0x90,0x41,
+
+	0xD5,0xF0,0x90,0xF6,0xAC,0xE0,0x90,0x41,
+
+	0xD6,0xF0,0x02,0x64,0x6D,0x90,0x41,0x8F,
+
+	0x74,0x05,0xF0,0x90,0xF6,0xA9,0xE0,0x90,
+
+	0x41,0xD7,0xF0,0x90,0xF6,0xAA,0xE0,0x90,
+
+	0x41,0xD9,0xF0,0x90,0xF6,0xAB,0xE0,0x90,
+
+	0x41,0xD8,0xF0,0x90,0xF6,0xAC,0xE0,0x90,
+
+	0x41,0xDA,0xF0,0x90,0xF6,0xAD,0xE0,0x90,
+
+	0x41,0xDB,0xF0,0x90,0xF6,0xAE,0xE0,0x90,
+
+	0x41,0xDC,0xF0,0x02,0x64,0x6D,0x90,0x41,
+
+	0x8F,0x74,0x07,0xF0,0x90,0xF6,0xA9,0xE0,
+
+	0x90,0x41,0xDD,0xF0,0x02,0x64,0x6D,0x90,
+
+	0x41,0xC4,0x74,0x01,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0xF0,0xA3,0x74,0xF0,0xF0,0xA3,0x74,
+
+	0x00,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x10,
+
+	0xF0,0x7B,0x01,0x7D,0xC0,0x7F,0x02,0x12,
+
+	0x57,0x94,0x90,0xF0,0x01,0xE0,0xFF,0x13,
+
+	0x13,0x54,0x01,0xFE,0xEF,0x13,0x13,0x13,
+
+	0x54,0x03,0x2E,0xFF,0xE0,0x54,0x03,0x2F,
+
+	0xFF,0xC4,0x54,0xF0,0xFF,0xA3,0xE0,0xFE,
+
+	0xC4,0x54,0x0F,0x2F,0x90,0xF6,0xA4,0xF0,
+
+	0x02,0x64,0x6D,0x90,0xF6,0xA9,0xE0,0xC3,
+
+	0x94,0x40,0x50,0x1F,0xE0,0x54,0x0F,0x90,
+
+	0x43,0x4B,0xF0,0x90,0xF6,0xA9,0xE0,0xFF,
+
+	0xC4,0x54,0x0F,0x24,0x50,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xE0,0x90,0x43,0x4A,
+
+	0xF0,0x80,0x10,0x90,0xF6,0xA9,0xE0,0x54,
+
+	0x3F,0x90,0x43,0x4B,0xF0,0x90,0x43,0x4A,
+
+	0x74,0xFE,0xF0,0x90,0x41,0xC4,0x74,0x01,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x0A,0xF0,
+
+	0xA3,0x74,0x43,0xF0,0xA3,0x74,0x4A,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x02,0xF0,0xE4,
+
+	0xFB,0x7D,0xC0,0x7F,0x02,0x12,0x57,0x94,
+
+	0x02,0x64,0x6D,0x90,0xF6,0xA8,0xE0,0xB4,
+
+	0x15,0x04,0x7F,0xAC,0x80,0x02,0x7F,0x9C,
+
+	0x90,0x43,0x49,0xEF,0xF0,0x90,0x41,0xC4,
+
+	0x74,0x01,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x04,0xF0,0xA3,0x74,0x43,0xF0,0xA3,0x74,
+
+	0x49,0xF0,0xA3,0xE4,0xF0,0xA3,0x04,0xF0,
+
+	0xE4,0xFB,0x7D,0xC0,0x7F,0x02,0x12,0x57,
+
+	0x94,0x02,0x64,0x6D,0x7C,0x43,0x7D,0x48,
+
+	0x7B,0x01,0x7F,0x1C,0x7E,0x00,0x12,0x58,
+
+	0x9B,0x90,0x43,0x48,0xE0,0x54,0xF7,0xF0,
+
+	0xE0,0xFF,0x90,0xF6,0xA9,0xE0,0xFE,0x33,
+
+	0x33,0x33,0x54,0xF8,0xFE,0xEF,0x4E,0x90,
+
+	0x43,0x48,0xF0,0x7C,0x43,0x7D,0x48,0xE4,
+
+	0xFB,0x7F,0x1C,0xFE,0x12,0x58,0x9B,0x02,
+
+	0x64,0x6D,0x90,0x44,0xB8,0xE0,0x60,0x08,
+
+	0x90,0x43,0x46,0x74,0x01,0xF0,0x80,0x06,
+
+	0x90,0x43,0x46,0x74,0x03,0xF0,0x90,0xF0,
+
+	0x01,0x74,0x05,0xF0,0xA3,0x74,0x80,0xF0,
+
+	0x90,0xF6,0xA8,0xE0,0x90,0xF0,0x03,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x7F,0xF0,0x90,
+
+	0xF6,0xA8,0xE0,0xF4,0x90,0xF0,0x06,0xF0,
+
+	0x90,0x43,0x46,0xE0,0xFF,0x90,0x41,0x8E,
+
+	0xE0,0xFD,0x90,0x41,0xBD,0x74,0x01,0xF0,
+
+	0x7B,0x07,0x12,0x54,0xB6,0x90,0x43,0x45,
+
+	0xEF,0xF0,0x02,0x64,0x6D,0x90,0x41,0xC4,
+
+	0x74,0x01,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x07,0xF0,0xA3,0x74,0x43,0xF0,0xA3,0x74,
+
+	0x44,0xF0,0xA3,0xE4,0xF0,0xA3,0x04,0xF0,
+
+	0xFB,0x7D,0xC0,0x7F,0x02,0x12,0x57,0x94,
+
+	0x90,0xF6,0xA9,0xE0,0x90,0x43,0x4E,0xF0,
+
+	0x90,0x43,0x44,0xE0,0x54,0xC3,0xF0,0xE0,
+
+	0xFF,0x90,0x43,0x4E,0xE0,0xFE,0x25,0xE0,
+
+	0x25,0xE0,0xFE,0xEF,0x4E,0x90,0x43,0x44,
+
+	0xF0,0x90,0x41,0xC4,0x74,0x01,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x74,0x07,0xF0,0xA3,0x74,
+
+	0x43,0xF0,0xA3,0x74,0x44,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0x04,0xF0,0xE4,0xFB,0x7D,0xC0,
+
+	0x7F,0x02,0x12,0x57,0x94,0x90,0x43,0x4E,
+
+	0xE0,0x90,0xF6,0xA9,0xF0,0x02,0x64,0x6D,
+
+	0x90,0xF6,0x41,0xE0,0x24,0xDE,0x70,0x03,
+
+	0x02,0x63,0xEA,0x14,0x60,0x0E,0x24,0xFB,
+
+	0x70,0x03,0x02,0x63,0xEA,0x24,0x07,0x60,
+
+	0x03,0x02,0x64,0x6D,0x90,0xF0,0x02,0x74,
+
+	0x52,0xF0,0x90,0x41,0xC4,0x74,0x01,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x05,0xF0,0xA3,
+
+	0x74,0x43,0xF0,0xA3,0x74,0x44,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x04,0xF0,0xFB,0x7D,0xC0,
+
+	0x7F,0x02,0x12,0x57,0x94,0x90,0xF6,0xA8,
+
+	0xE0,0xB4,0x01,0x0C,0x90,0x43,0x47,0x74,
+
+	0x01,0xF0,0x90,0x43,0x4F,0xF0,0x80,0x12,
+
+	0x90,0xF6,0xA8,0xE0,0xB4,0x02,0x0B,0x90,
+
+	0x43,0x47,0x74,0x02,0xF0,0x90,0x43,0x4F,
+
+	0xE4,0xF0,0x90,0x43,0x44,0xE0,0x54,0xCF,
+
+	0xF0,0xE0,0xFF,0x90,0x43,0x47,0xE0,0xFE,
+
+	0xC4,0x54,0xF0,0xFE,0xEF,0x4E,0x90,0x43,
+
+	0x44,0xF0,0x90,0x41,0xC4,0x74,0x01,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x05,0xF0,0xA3,
+
+	0x74,0x43,0xF0,0xA3,0x74,0x44,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x04,0xF0,0xE4,0xFB,0x7D,
+
+	0xC0,0x7F,0x02,0x12,0x57,0x94,0x90,0x43,
+
+	0x47,0xE0,0x90,0xF6,0xA9,0xF0,0x02,0x64,
+
+	0x6D,0x90,0xF6,0xA8,0xE0,0xB4,0x01,0x0B,
+
+	0x90,0xD8,0xCF,0xE0,0x54,0xFE,0x44,0x01,
+
+	0xF0,0x80,0x71,0x90,0xF6,0xA8,0xE0,0x64,
+
+	0x02,0x70,0x69,0x90,0xD8,0xCF,0xE0,0x54,
+
+	0xFE,0xF0,0x80,0x60,0x90,0x43,0x4C,0x74,
+
+	0xC0,0xF0,0xA3,0x74,0x16,0xF0,0x90,0x41,
+
+	0xC4,0x74,0x01,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0x36,0xF0,0xA3,0x74,0x43,0xF0,0xA3,
+
+	0x74,0x4C,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x02,0xF0,0xE4,0xFB,0x7D,0xC0,0x7F,0x02,
+
+	0x12,0x57,0x94,0x80,0x2F,0x90,0x43,0x4C,
+
+	0x74,0xC0,0xF0,0xA3,0x74,0x13,0xF0,0x90,
+
+	0x41,0xC4,0x74,0x01,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0x36,0xF0,0xA3,0x74,0x43,0xF0,
+
+	0xA3,0x74,0x4C,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0x02,0xF0,0xE4,0xFB,0x7D,0xC0,0x7F,
+
+	0x02,0x12,0x57,0x94,0x53,0x91,0xDF,0x90,
+
+	0xF6,0xDF,0xE0,0x54,0xFE,0xF0,0xD0,0x07,
+
+	0xD0,0x06,0xD0,0x05,0xD0,0x04,0xD0,0x03,
+
+	0xD0,0x02,0xD0,0x01,0xD0,0x00,0xD0,0xD0,
+
+	0xD0,0x86,0xD0,0x84,0xD0,0x85,0xD0,0x82,
+
+	0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,0x44,
+
+	0x43,0x50,0x9E,0xBE,0xDE,0xFE,0x00,0x78,
+
+	0x64,0x7C,0x43,0x7D,0x01,0x7B,0xFF,0x7A,
+
+	0x7F,0x79,0xC3,0x7E,0x01,0x7F,0x03,0x12,
+
+	0x7F,0x9D,0x78,0x6A,0x7C,0x44,0x7D,0x01,
+
+	0x7B,0x01,0x7A,0x43,0x79,0x89,0x7E,0x00,
+
+	0x7F,0x09,0x12,0x7F,0x9D,0x78,0x73,0x7C,
+
+	0x44,0x7D,0x01,0x7B,0xFF,0x7A,0x80,0x79,
+
+	0xC6,0x7E,0x00,0x7F,0x41,0x12,0x7F,0x9D,
+
+	0x22,0x90,0x44,0xB9,0x74,0xAF,0xF0,0xA3,
+
+	0xEF,0xF0,0xA3,0x74,0x22,0xF0,0x7A,0x44,
+
+	0x79,0xB9,0x12,0x7E,0xDB,0x22,0x90,0x44,
+
+	0xB9,0x74,0x8F,0xF0,0xA3,0xEF,0xF0,0xA3,
+
+	0x74,0x22,0xF0,0xAF,0x05,0x7C,0x44,0x7D,
+
+	0xB9,0x90,0x44,0xB9,0x12,0x7E,0xDF,0x22,
+
+	0xE4,0x90,0x44,0xBE,0xF0,0x90,0x44,0xB8,
+
+	0xE0,0x60,0x0D,0x90,0xDD,0xA8,0xE0,0x30,
+
+	0xE0,0x06,0x12,0x68,0x77,0x02,0x67,0x38,
+
+	0x90,0xDF,0x82,0xE0,0x20,0xE1,0x06,0x12,
+
+	0x67,0xD1,0x02,0x67,0x38,0x90,0x44,0xB8,
+
+	0xE0,0x70,0x09,0x90,0x44,0xBF,0xE0,0x04,
+
+	0xF0,0x02,0x67,0x38,0x90,0xDD,0xA8,0xE0,
+
+	0x30,0xE0,0x06,0x12,0x68,0x77,0x02,0x67,
+
+	0x38,0x90,0xDD,0x1B,0xE0,0x30,0xE1,0x12,
+
+	0x90,0xDD,0x1D,0x74,0xFF,0xF0,0x90,0xDD,
+
+	0x1B,0x74,0x02,0xF0,0x12,0x68,0x20,0x02,
+
+	0x67,0x38,0x90,0x45,0x33,0xE0,0x64,0x01,
+
+	0x70,0x29,0x90,0xDD,0x1B,0xE0,0x30,0xE0,
+
+	0x22,0x74,0x01,0xF0,0xE4,0x90,0x44,0xBD,
+
+	0xF0,0x90,0xDD,0x1B,0xE0,0x30,0xE0,0x0D,
+
+	0x74,0x01,0xF0,0x90,0x44,0xBD,0xE0,0x04,
+
+	0xF0,0xE0,0xB4,0x02,0xEC,0x12,0x68,0x3F,
+
+	0x02,0x67,0x38,0x90,0xDD,0x1B,0xE0,0x30,
+
+	0xE2,0x28,0x90,0xDD,0x14,0xE0,0x44,0x01,
+
+	0xF0,0x12,0x69,0x63,0x12,0x60,0x1F,0x90,
+
+	0x44,0xBC,0xEF,0xF0,0x70,0x03,0x02,0x67,
+
+	0x38,0x90,0xDD,0x14,0xE0,0x54,0xFE,0xF0,
+
+	0x90,0xDD,0x12,0xE0,0x44,0x01,0xF0,0x02,
+
+	0x67,0x38,0x90,0xDD,0x19,0xE0,0x30,0xE0,
+
+	0x42,0x90,0xDD,0x14,0xE0,0x44,0x01,0xF0,
+
+	0x90,0xDD,0x19,0x74,0x01,0xF0,0x90,0xDD,
+
+	0x13,0xE0,0x44,0x01,0xF0,0x90,0x44,0xB6,
+
+	0xE0,0x64,0x01,0x60,0x03,0x02,0x67,0x38,
+
+	0x90,0xDD,0x00,0xC0,0x83,0xC0,0x82,0xE0,
+
+	0xFF,0x90,0x43,0x59,0xE0,0xFE,0x33,0x33,
+
+	0x33,0x54,0xF8,0xFE,0xEF,0x4E,0xD0,0x82,
+
+	0xD0,0x83,0xF0,0xE4,0x90,0x44,0xB6,0xF0,
+
+	0x02,0x67,0x38,0x90,0xDD,0x18,0xE0,0x30,
+
+	0xE0,0x31,0x90,0xDD,0x14,0xE0,0x30,0xE0,
+
+	0x2A,0x90,0xDD,0x14,0xE0,0x54,0xFE,0xF0,
+
+	0x12,0x60,0x3A,0x90,0x44,0xBC,0xEF,0xF0,
+
+	0x60,0x09,0x90,0xDD,0x12,0xE0,0x44,0x01,
+
+	0xF0,0x80,0x07,0x90,0xDD,0x13,0xE0,0x54,
+
+	0xFE,0xF0,0x90,0xDD,0x18,0x74,0x01,0xF0,
+
+	0x02,0x67,0x38,0x90,0xDD,0x19,0xE0,0x30,
+
+	0xE1,0x10,0x90,0xDD,0x19,0x74,0x02,0xF0,
+
+	0x90,0xDD,0x13,0xE0,0x44,0x02,0xF0,0x02,
+
+	0x67,0x38,0x90,0xDD,0x18,0xE0,0x30,0xE1,
+
+	0x16,0x90,0xDD,0x84,0x74,0x40,0xF0,0x90,
+
+	0xDD,0x13,0xE0,0x54,0xFD,0xF0,0x90,0xDD,
+
+	0x18,0x74,0x02,0xF0,0x02,0x67,0x38,0x90,
+
+	0xDD,0x19,0xE0,0x30,0xE4,0x6A,0x90,0xDD,
+
+	0x19,0x74,0x10,0xF0,0x90,0x43,0x43,0xE0,
+
+	0x64,0x01,0x60,0x03,0x02,0x67,0x38,0x90,
+
+	0x44,0xDE,0xE0,0xFF,0xB4,0x01,0x31,0xE4,
+
+	0x90,0x44,0xBD,0xF0,0x90,0x44,0xBD,0xE0,
+
+	0xFE,0xC3,0x94,0x08,0x50,0x14,0x74,0x80,
+
+	0x2E,0xF5,0x82,0xE4,0x34,0xDE,0xF5,0x83,
+
+	0xE4,0xF0,0x90,0x44,0xBD,0xE0,0x04,0xF0,
+
+	0x80,0xE2,0x90,0xDD,0x87,0x74,0x08,0xF0,
+
+	0x90,0x44,0xDE,0x74,0x02,0xF0,0x80,0x6F,
+
+	0xEF,0x64,0x02,0x70,0x6A,0x90,0x44,0xDE,
+
+	0xF0,0x90,0xDD,0x13,0xE0,0x44,0x10,0xF0,
+
+	0x90,0x41,0x81,0xE0,0xFF,0x64,0x01,0x60,
+
+	0x56,0x90,0x43,0x43,0xEF,0xF0,0x80,0x4F,
+
+	0x90,0xDD,0x19,0xE0,0x30,0xE3,0x18,0x90,
+
+	0xDD,0x13,0xE0,0x44,0x08,0xF0,0x90,0xDD,
+
+	0x19,0x74,0x08,0xF0,0x12,0x60,0x44,0x90,
+
+	0x44,0xB7,0x74,0x01,0xF0,0x80,0x30,0x90,
+
+	0xDD,0x14,0xE0,0x54,0x08,0xFF,0x13,0x13,
+
+	0x13,0x54,0x1F,0x60,0x1C,0x90,0xDD,0x18,
+
+	0xE0,0x30,0xE3,0x15,0x90,0xDD,0x84,0x74,
+
+	0x40,0xF0,0x90,0xDD,0x13,0xE0,0x54,0xF7,
+
+	0xF0,0x90,0xDD,0x18,0x74,0x08,0xF0,0x80,
+
+	0x06,0x90,0x44,0xC0,0xE0,0x04,0xF0,0xC2,
+
+	0xDC,0x22,0xC0,0xE0,0xC0,0xF0,0xC0,0x83,
+
+	0xC0,0x82,0xC0,0x85,0xC0,0x84,0xC0,0x86,
+
+	0x75,0x86,0x00,0xC0,0xD0,0x75,0xD0,0x00,
+
+	0xC0,0x00,0xC0,0x01,0xC0,0x02,0xC0,0x03,
+
+	0xC0,0x04,0xC0,0x05,0xC0,0x06,0xC0,0x07,
+
+	0x12,0x65,0x09,0xD0,0x07,0xD0,0x06,0xD0,
+
+	0x05,0xD0,0x04,0xD0,0x03,0xD0,0x02,0xD0,
+
+	0x01,0xD0,0x00,0xD0,0xD0,0xD0,0x86,0xD0,
+
+	0x84,0xD0,0x85,0xD0,0x82,0xD0,0x83,0xD0,
+
+	0xF0,0xD0,0xE0,0x32,0xC0,0xE0,0xC0,0xF0,
+
+	0xC0,0x83,0xC0,0x82,0xC0,0x85,0xC0,0x84,
+
+	0xC0,0x86,0x75,0x86,0x00,0xC0,0xD0,0x75,
+
+	0xD0,0x00,0xC0,0x00,0xC0,0x01,0xC0,0x02,
+
+	0xC0,0x03,0xC0,0x04,0xC0,0x05,0xC0,0x06,
+
+	0xC0,0x07,0xC2,0xDB,0x12,0x65,0x09,0xD0,
+
+	0x07,0xD0,0x06,0xD0,0x05,0xD0,0x04,0xD0,
+
+	0x03,0xD0,0x02,0xD0,0x01,0xD0,0x00,0xD0,
+
+	0xD0,0xD0,0x86,0xD0,0x84,0xD0,0x85,0xD0,
+
+	0x82,0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,
+
+	0x90,0x45,0x18,0xE0,0x64,0x01,0x60,0x05,
+
+	0xE0,0x64,0x05,0x70,0x41,0x90,0x45,0x34,
+
+	0xE0,0x70,0x05,0x12,0x6E,0x3F,0x80,0x1B,
+
+	0x90,0x45,0x34,0xE0,0xB4,0x01,0x05,0x12,
+
+	0x6F,0xCD,0x80,0x0F,0x90,0x45,0x34,0xE0,
+
+	0x64,0x02,0x60,0x04,0xE0,0xB4,0xFF,0x03,
+
+	0x12,0x79,0x40,0x90,0x43,0x43,0xE0,0xB4,
+
+	0x01,0x14,0x90,0x44,0xDE,0xE0,0xB4,0x01,
+
+	0x0D,0x90,0xDD,0x13,0xE0,0x54,0xEF,0xF0,
+
+	0x90,0xDD,0x87,0x74,0x08,0xF0,0x22,0x12,
+
+	0x69,0x97,0x90,0xDD,0x01,0xE0,0x54,0x04,
+
+	0x90,0x44,0xC5,0xF0,0x90,0x46,0x00,0xE0,
+
+	0x60,0x03,0x12,0x75,0xD6,0x12,0x75,0xD5,
+
+	0xE4,0x90,0x44,0xDE,0xF0,0x22,0x90,0xD8,
+
+	0x06,0xE0,0x54,0xFE,0x44,0x01,0xF0,0x22,
+
+	0x12,0x69,0x97,0x90,0x45,0x11,0xE0,0x30,
+
+	0xE6,0x09,0x90,0xDD,0xA7,0xE0,0x44,0x01,
+
+	0xF0,0x80,0x07,0x90,0xDD,0x00,0xE0,0x44,
+
+	0x80,0xF0,0xD2,0xAF,0xD2,0xDD,0x22,0x90,
+
+	0x45,0x12,0xE0,0x30,0xE0,0x07,0x90,0xDD,
+
+	0xA8,0xE0,0x30,0xE2,0xF9,0x22,0x90,0xDD,
+
+	0xA7,0xE0,0x30,0xE1,0x06,0xE0,0x54,0xFD,
+
+	0xF0,0x80,0x07,0x90,0xDD,0xA7,0xE0,0x44,
+
+	0x02,0xF0,0x90,0xDD,0xA8,0xE0,0x30,0xE1,
+
+	0x08,0x90,0xDD,0x00,0xE0,0x44,0x80,0xF0,
+
+	0x22,0x90,0xDD,0x00,0xE0,0x54,0x7F,0xF0,
+
+	0x22,0xE4,0x90,0x44,0x69,0xF0,0x12,0x5C,
+
+	0x62,0x90,0x44,0xC1,0xEF,0xF0,0x60,0x25,
+
+	0xE0,0xB4,0x05,0x03,0x7F,0x05,0x22,0x12,
+
+	0x5D,0xCF,0x90,0x44,0xC1,0xEF,0xF0,0x60,
+
+	0x14,0xE0,0xB4,0x05,0x03,0x7F,0x05,0x22,
+
+	0x12,0x5F,0x20,0x90,0x44,0xC1,0xEF,0xF0,
+
+	0x60,0x03,0xE0,0xFF,0x22,0x7F,0x00,0x22,
+
+	0x90,0x43,0x5B,0xE0,0xD3,0x94,0x00,0x40,
+
+	0x06,0x90,0x44,0x68,0xEF,0xF0,0x22,0x90,
+
+	0x43,0x5A,0xE0,0xFE,0xEF,0xC3,0x9E,0x50,
+
+	0x06,0x90,0x44,0x68,0xEF,0xF0,0x22,0x90,
+
+	0x44,0x68,0xEE,0xF0,0x22,0x90,0x44,0xC2,
+
+	0xEB,0xF0,0xA3,0xEA,0xF0,0xA3,0xE9,0xF0,
+
+	0xE4,0xFF,0x90,0x44,0x68,0xE0,0xD3,0x94,
+
+	0x00,0x40,0x04,0x7E,0x01,0x80,0x02,0x7E,
+
+	0x00,0xEF,0xC3,0x94,0x40,0x50,0x04,0x7D,
+
+	0x01,0x80,0x02,0x7D,0x00,0xED,0x5E,0x60,
+
+	0x33,0x90,0x44,0xC2,0xE0,0xFB,0xA3,0xE0,
+
+	0xFA,0xA3,0xE0,0xF9,0x90,0x44,0x69,0xE0,
+
+	0xF5,0x82,0x75,0x83,0x00,0x12,0x7C,0xD8,
+
+	0xFE,0x74,0x00,0x2F,0xF5,0x82,0xE4,0x34,
+
+	0xDE,0xF5,0x83,0xEE,0xF0,0x0F,0x90,0x44,
+
+	0x68,0xE0,0x14,0xF0,0x90,0x44,0x69,0xE0,
+
+	0x04,0xF0,0x80,0xAE,0x90,0xDD,0x85,0xEF,
+
+	0xF0,0x22,0x90,0xDD,0x13,0xE0,0x44,0x01,
+
+	0xF0,0x90,0xDD,0x1B,0x74,0x04,0xF0,0xE4,
+
+	0xFF,0x74,0x00,0x2F,0xF5,0x82,0xE4,0x34,
+
+	0xDF,0xF5,0x83,0xE0,0xFE,0x74,0x54,0x2F,
+
+	0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,0xEE,
+
+	0xF0,0x0F,0xEF,0xB4,0x08,0xE3,0x90,0xDD,
+
+	0x1B,0xE0,0x20,0xE2,0xD4,0x22,0x90,0xDD,
+
+	0x13,0x74,0x7B,0xF0,0x90,0xDD,0x80,0x74,
+
+	0xC0,0xF0,0xA3,0x74,0x00,0xF0,0xA3,0x74,
+
+	0x40,0xF0,0xA3,0x74,0x80,0xF0,0x12,0x5C,
+
+	0x55,0xE4,0x90,0x43,0x62,0xF0,0x90,0x43,
+
+	0x63,0xF0,0x90,0xDD,0x14,0x74,0x0B,0xF0,
+
+	0x90,0xDD,0x17,0x74,0x06,0xF0,0x90,0x45,
+
+	0x33,0xE0,0xB4,0x01,0x07,0x90,0xDD,0x17,
+
+	0xE0,0x44,0x01,0xF0,0x90,0xDD,0x15,0x74,
+
+	0x0B,0xF0,0x90,0xDD,0x0C,0x74,0x80,0xF0,
+
+	0x90,0xDD,0x8E,0xE4,0xF0,0xA3,0x74,0x03,
+
+	0xF0,0x90,0xDD,0x0E,0xE4,0xF0,0xA3,0x04,
+
+	0xF0,0x90,0xDD,0x13,0xE0,0x54,0x7F,0xF0,
+
+	0x90,0xDD,0x20,0xE0,0x54,0xFC,0x44,0x03,
+
+	0xF0,0x90,0xDD,0x11,0x74,0x8F,0xF0,0x90,
+
+	0x45,0x18,0xE0,0x64,0x01,0x70,0x27,0xC3,
+
+	0x74,0x03,0x94,0x89,0x90,0x43,0x82,0xF0,
+
+	0x90,0x44,0x6C,0xF0,0x90,0x43,0x84,0x74,
+
+	0x02,0xF0,0x90,0x44,0x6E,0xF0,0x90,0xDD,
+
+	0x15,0xE0,0x44,0x10,0xF0,0x90,0xDD,0x11,
+
+	0xE0,0x44,0x10,0xF0,0x80,0x17,0xC3,0x74,
+
+	0xEA,0x94,0x89,0x90,0x43,0x82,0xF0,0x90,
+
+	0x44,0x6C,0xF0,0x90,0x43,0x84,0x74,0x01,
+
+	0xF0,0x90,0x44,0x6E,0xF0,0x90,0x46,0x00,
+
+	0xE0,0x60,0x03,0x12,0x75,0xD6,0x90,0xDD,
+
+	0x0C,0x74,0x80,0xF0,0x90,0xDD,0x89,0x74,
+
+	0x03,0xF0,0x90,0xDD,0x88,0x74,0xDB,0xF0,
+
+	0x90,0xDD,0x13,0xE0,0x54,0xDF,0xF0,0x90,
+
+	0xF4,0x1A,0xE0,0x54,0xFE,0x44,0x01,0xF0,
+
+	0x22,0x90,0x43,0xE0,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xD9,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xD2,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xCB,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xB4,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xAD,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0xA6,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x43,0x9F,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x22,0x90,0x43,0xE7,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x22,0x8F,0x82,0x8E,0x83,0xE4,
+
+	0xFF,0xFE,0xED,0x4C,0x60,0x0F,0xED,0x60,
+
+	0x01,0x0C,0xE0,0xA3,0x2F,0xFF,0xE4,0x3E,
+
+	0xFE,0xDD,0xF7,0xDC,0xF5,0x22,0x80,0x02,
+
+	0x80,0xFE,0x90,0xF1,0x03,0x74,0x25,0xF0,
+
+	0x22,0x90,0x44,0xC6,0xEF,0xF0,0xA3,0xED,
+
+	0xF0,0xA3,0xEB,0xF0,0xA3,0xE0,0xFE,0xFD,
+
+	0x7C,0x00,0x90,0x44,0xCC,0xE0,0xFA,0xA3,
+
+	0xE0,0xFB,0x2D,0xFD,0xEC,0x3A,0xFC,0xD3,
+
+	0xED,0x94,0x00,0xEC,0x94,0x01,0x40,0x03,
+
+	0x7F,0x01,0x22,0xE4,0xB5,0x03,0x08,0xEA,
+
+	0xB4,0x01,0x04,0x7F,0x08,0x80,0x0B,0xEE,
+
+	0x54,0x07,0xFF,0xC3,0x74,0x08,0x9F,0x54,
+
+	0x07,0xFF,0x90,0x44,0xCE,0xEF,0xF0,0xC3,
+
+	0xEB,0x9F,0xEA,0x94,0x00,0x50,0x06,0x90,
+
+	0x44,0xCD,0xE0,0xA3,0xF0,0x90,0x44,0xCD,
+
+	0xE0,0xFF,0xA3,0xE0,0xFE,0xC3,0xEF,0x9E,
+
+	0x54,0x07,0xFE,0x90,0x44,0xD0,0xF0,0x90,
+
+	0x44,0xCE,0xE0,0xFD,0xC3,0xEF,0x9D,0xC3,
+
+	0x9E,0xA3,0xF0,0x90,0x44,0xCE,0xE0,0x90,
+
+	0x44,0xD1,0xF0,0xA3,0x74,0x08,0xF0,0x90,
+
+	0x44,0xD0,0xE0,0x90,0x44,0xD3,0xF0,0xE4,
+
+	0xA3,0xF0,0x90,0x44,0xD4,0xE0,0xFB,0x24,
+
+	0xCE,0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,
+
+	0xE0,0x70,0x03,0x02,0x6C,0x90,0x90,0x44,
+
+	0xC9,0xE0,0x90,0xF0,0x01,0xF0,0x90,0x44,
+
+	0xC8,0xE0,0x70,0x4E,0x7E,0xF0,0x7F,0x02,
+
+	0x90,0x44,0xCA,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0x74,0xD1,0x2B,0xF5,0x82,0xE4,0x34,0x44,
+
+	0xF5,0x83,0xE0,0xFB,0x12,0x56,0x9C,0x90,
+
+	0x44,0xC6,0xE0,0xFF,0xA3,0xE0,0xFD,0x90,
+
+	0x44,0xD4,0xE0,0x24,0xD1,0xF5,0x82,0xE4,
+
+	0x34,0x44,0xF5,0x83,0xE0,0x04,0xFB,0x90,
+
+	0x41,0xBD,0x74,0x01,0xF0,0x12,0x54,0xB6,
+
+	0xEF,0x60,0x03,0x7F,0x02,0x22,0x7F,0x35,
+
+	0x7E,0x82,0x12,0x56,0xC5,0x20,0x8D,0x60,
+
+	0x80,0xFB,0x90,0x44,0xC6,0xE0,0xFF,0xA3,
+
+	0xE0,0xFD,0x90,0x41,0xBD,0x74,0x01,0xF0,
+
+	0xFB,0x12,0x54,0xB6,0xEF,0x60,0x03,0x7F,
+
+	0x02,0x22,0x90,0x44,0xC6,0xE0,0xFF,0xA3,
+
+	0xE0,0x44,0x01,0xFD,0x90,0x44,0xD4,0xE0,
+
+	0x24,0xD1,0xF5,0x82,0xE4,0x34,0x44,0xF5,
+
+	0x83,0xE0,0xFB,0x90,0x41,0xBD,0x74,0x01,
+
+	0xF0,0x12,0x54,0xB6,0xEF,0x60,0x03,0x7F,
+
+	0x02,0x22,0x90,0x44,0xCA,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x7C,0xF0,0x7D,0x00,0x90,0x44,
+
+	0xD4,0xE0,0x24,0xD1,0xF5,0x82,0xE4,0x34,
+
+	0x44,0xF5,0x83,0xE0,0xFB,0x12,0x56,0x9C,
+
+	0x90,0x44,0xD4,0xE0,0xFF,0x24,0xD1,0xF5,
+
+	0x82,0xE4,0x34,0x44,0xF5,0x83,0xE0,0xFE,
+
+	0x90,0x44,0xC9,0xE0,0x2E,0xF0,0xEE,0xFD,
+
+	0x90,0x44,0xCB,0xE0,0x2D,0xF0,0x90,0x44,
+
+	0xCA,0xE0,0x34,0x00,0xF0,0x74,0xCE,0x2F,
+
+	0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,0xC0,
+
+	0x83,0xC0,0x82,0xE0,0xFF,0x90,0x44,0xD4,
+
+	0xE0,0x24,0xD1,0xF5,0x82,0xE4,0x34,0x44,
+
+	0xF5,0x83,0xE0,0xFE,0xC3,0xEF,0x9E,0xD0,
+
+	0x82,0xD0,0x83,0xF0,0x02,0x6B,0x73,0x90,
+
+	0x44,0xD4,0xE0,0x04,0xF0,0xE0,0xC3,0x94,
+
+	0x03,0x50,0x03,0x02,0x6B,0x73,0x7F,0x00,
+
+	0x22,0x90,0x44,0xD5,0xEF,0xF0,0xE4,0x90,
+
+	0x44,0xD6,0xF0,0x90,0x44,0xD6,0xE0,0xFE,
+
+	0xC3,0x94,0x10,0x50,0x1F,0x90,0x44,0xD5,
+
+	0xE0,0xFF,0xEE,0x44,0xA0,0xFD,0x90,0x41,
+
+	0xBD,0x74,0x01,0xF0,0xFB,0x12,0x54,0xB6,
+
+	0xEF,0x60,0x09,0x90,0x44,0xD6,0xE0,0x24,
+
+	0x02,0xF0,0x80,0xD7,0x90,0x44,0xD6,0xE0,
+
+	0xFF,0xC3,0x94,0x10,0x50,0x05,0xEF,0x44,
+
+	0xA0,0xFF,0x22,0x7F,0x01,0x22,0x90,0xDF,
+
+	0x82,0xE0,0x54,0xDF,0xF0,0xE4,0x90,0x44,
+
+	0xDE,0xF0,0x90,0x44,0xDD,0xF0,0x90,0x43,
+
+	0x43,0x04,0xF0,0x90,0x41,0x81,0xF0,0x90,
+
+	0x41,0xE1,0x74,0x32,0xF0,0x90,0x41,0xE3,
+
+	0x74,0x14,0xF0,0x90,0x41,0xE2,0x74,0x3E,
+
+	0xF0,0xE4,0x90,0x44,0xE0,0xF0,0x90,0x44,
+
+	0xEB,0xF0,0x90,0x44,0xEF,0xF0,0x90,0x44,
+
+	0xF1,0xF0,0xA3,0xF0,0x90,0x44,0xE1,0xF0,
+
+	0xA3,0xF0,0x90,0x44,0xEC,0xF0,0xA3,0xF0,
+
+	0x90,0x44,0xF7,0xF0,0x90,0xDF,0x80,0x74,
+
+	0x28,0xF0,0xA3,0x74,0x04,0xF0,0x75,0xCA,
+
+	0x01,0xE4,0xF5,0xCB,0xF5,0xC8,0xD2,0xAD,
+
+	0xD2,0xCA,0x22,0x90,0xDF,0x92,0x74,0x50,
+
+	0xF0,0x12,0x6C,0xE7,0x22,0x90,0x41,0xDF,
+
+	0x74,0x7F,0xF0,0xA3,0x74,0xFF,0xF0,0x90,
+
+	0xDF,0x90,0x74,0x50,0xF0,0xE4,0xA3,0xF0,
+
+	0xA3,0x74,0x96,0xF0,0xE4,0xA3,0xF0,0xA3,
+
+	0x74,0x2C,0xF0,0xA3,0x74,0x01,0xF0,0xA3,
+
+	0x74,0x90,0xF0,0xA3,0x74,0x01,0xF0,0xA3,
+
+	0x74,0xC2,0xF0,0xA3,0x74,0x01,0xF0,0xA3,
+
+	0x74,0x26,0xF0,0xA3,0x74,0x02,0xF0,0xE4,
+
+	0xA3,0xF0,0xA3,0x74,0x10,0xF0,0xE4,0xA3,
+
+	0xF0,0xA3,0x74,0x20,0xF0,0xE4,0xA3,0xF0,
+
+	0xA3,0x74,0x40,0xF0,0x12,0x6C,0xE7,0x22,
+
+	0xC0,0xE0,0xC0,0x83,0xC0,0x82,0xC0,0x85,
+
+	0xC0,0x84,0xC0,0x86,0x75,0x86,0x00,0xC0,
+
+	0xD0,0x75,0xD0,0x00,0xC0,0x07,0xC2,0xCF,
+
+	0x90,0x44,0xE1,0xE0,0x60,0x1A,0xA3,0xE0,
+
+	0x04,0xF0,0x90,0x41,0xE3,0xE0,0xFF,0x90,
+
+	0x44,0xE2,0xE0,0xD3,0x9F,0x40,0x10,0x90,
+
+	0x44,0xE1,0xE4,0xF0,0xA3,0xF0,0x80,0x07,
+
+	0x90,0x44,0xE1,0xE4,0xF0,0xA3,0xF0,0x90,
+
+	0x44,0xF1,0xE0,0x60,0x19,0xA3,0xE0,0x04,
+
+	0xF0,0x90,0x41,0xE2,0xE0,0xFF,0x90,0x44,
+
+	0xF2,0xE0,0xD3,0x9F,0x40,0x11,0xE4,0xF0,
+
+	0x90,0x44,0xF1,0xF0,0x80,0x09,0x90,0x44,
+
+	0xF2,0xE4,0xF0,0x90,0x44,0xF1,0xF0,0xD0,
+
+	0x07,0xD0,0xD0,0xD0,0x86,0xD0,0x84,0xD0,
+
+	0x85,0xD0,0x82,0xD0,0x83,0xD0,0xE0,0x32,
+
+	0x90,0xDF,0x82,0xE0,0x30,0xE0,0x14,0x74,
+
+	0x20,0xF0,0xE0,0x90,0x44,0xD7,0xF0,0xE4,
+
+	0x90,0xDF,0x82,0xF0,0x90,0x44,0xE0,0xF0,
+
+	0x7F,0x01,0x22,0x7F,0x00,0x22,0x12,0x6E,
+
+	0x21,0xEF,0x60,0x03,0x02,0x6F,0xCC,0x90,
+
+	0xDF,0x82,0xE0,0x30,0xE1,0x03,0x02,0x6F,
+
+	0xCC,0x90,0x44,0xD9,0xE5,0xE4,0xF0,0x90,
+
+	0x44,0xE0,0xE0,0x14,0x60,0x68,0x14,0x70,
+
+	0x03,0x02,0x6F,0x51,0x24,0x02,0x60,0x03,
+
+	0x02,0x6F,0xC2,0x90,0x44,0xD9,0xE0,0x64,
+
+	0xBC,0x70,0x3B,0x90,0x44,0xEB,0xF0,0x90,
+
+	0x44,0xED,0xF0,0x90,0x44,0xEC,0xF0,0x90,
+
+	0x44,0xEF,0xF0,0x90,0x44,0xD8,0xF0,0x90,
+
+	0x44,0xD8,0xE0,0xFF,0xC3,0x94,0x08,0x50,
+
+	0x14,0x74,0xE3,0x2F,0xF5,0x82,0xE4,0x34,
+
+	0x44,0xF5,0x83,0xE4,0xF0,0x90,0x44,0xD8,
+
+	0xE0,0x04,0xF0,0x80,0xE2,0x90,0x44,0xE0,
+
+	0x74,0x01,0xF0,0x02,0x6F,0xC2,0x90,0x44,
+
+	0xD9,0xE0,0xB4,0xAC,0x09,0x90,0x44,0xE0,
+
+	0x74,0x02,0xF0,0x02,0x6F,0xC2,0xE4,0x90,
+
+	0x44,0xE0,0xF0,0x02,0x6F,0xC2,0x90,0x44,
+
+	0xD9,0xE0,0xC3,0x94,0xE8,0x40,0x17,0x12,
+
+	0x72,0x67,0xE4,0x90,0x44,0xE0,0xF0,0x90,
+
+	0x44,0xED,0xF0,0x90,0x44,0xEC,0xF0,0x90,
+
+	0x44,0xEB,0xF0,0x02,0x6F,0xC2,0x90,0x44,
+
+	0xD9,0xE0,0xB4,0x98,0x1F,0x90,0x44,0xEC,
+
+	0xE0,0xFF,0x74,0x01,0xA8,0x07,0x08,0x80,
+
+	0x02,0xC3,0x33,0xD8,0xFC,0xFF,0x90,0x44,
+
+	0xED,0xE0,0x2F,0xF0,0x90,0x44,0xEC,0xE0,
+
+	0x04,0xF0,0x80,0x1A,0x90,0x44,0xD9,0xE0,
+
+	0xB4,0x88,0x08,0x90,0x44,0xEC,0xE0,0x04,
+
+	0xF0,0x80,0x0B,0xE4,0x90,0x44,0xE0,0xF0,
+
+	0x90,0x44,0xEC,0xE0,0x04,0xF0,0x90,0x44,
+
+	0xEC,0xE0,0x64,0x08,0x60,0x03,0x02,0x6F,
+
+	0xC2,0xA3,0xE0,0xFF,0x90,0x44,0xEB,0xE0,
+
+	0xFE,0x04,0xF0,0x74,0xE3,0x2E,0xF5,0x82,
+
+	0xE4,0x34,0x44,0xF5,0x83,0xEF,0xF0,0xE4,
+
+	0x90,0x44,0xEC,0xF0,0xA3,0xF0,0x80,0x71,
+
+	0x90,0x44,0xD9,0xE0,0xC3,0x94,0xF8,0x40,
+
+	0x68,0x90,0x44,0xEF,0xE0,0x04,0xF0,0x90,
+
+	0x44,0xDE,0xE0,0x70,0x41,0x90,0x41,0xE3,
+
+	0xE0,0x75,0xF0,0x05,0x84,0xFF,0x90,0x44,
+
+	0xEF,0xE0,0xB5,0x07,0x31,0xE4,0x90,0x44,
+
+	0xD8,0xF0,0x90,0x44,0xD8,0xE0,0xFF,0x24,
+
+	0xE3,0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,
+
+	0xE0,0xFE,0x74,0x80,0x2F,0xF5,0x82,0xE4,
+
+	0x34,0xDE,0xF5,0x83,0xEE,0xF0,0x90,0x44,
+
+	0xD8,0xE0,0x04,0xF0,0xE0,0xB4,0x08,0xDA,
+
+	0x90,0x44,0xDE,0x74,0x01,0xF0,0x90,0x41,
+
+	0xE3,0xE0,0x75,0xF0,0x05,0x84,0xFF,0x90,
+
+	0x44,0xEF,0xE0,0xB5,0x07,0x02,0xE4,0xF0,
+
+	0xE4,0x90,0x44,0xE0,0xF0,0x90,0x44,0xEB,
+
+	0xF0,0x90,0xDF,0x82,0xE0,0x20,0xE1,0x03,
+
+	0x02,0x6E,0x52,0x22,0x12,0x6E,0x21,0xEF,
+
+	0x60,0x03,0x02,0x72,0x66,0x90,0xDF,0x82,
+
+	0xE0,0x30,0xE1,0x03,0x02,0x72,0x66,0x90,
+
+	0x44,0xDA,0xE5,0xE4,0xF0,0x90,0x44,0xE0,
+
+	0xE0,0x14,0x60,0x3F,0x14,0x70,0x03,0x02,
+
+	0x71,0x33,0x24,0x02,0x60,0x03,0x02,0x72,
+
+	0x5C,0x90,0x44,0xDA,0xE0,0xB4,0x8C,0x23,
+
+	0xE4,0x90,0x44,0xEB,0xF0,0xA3,0xF0,0xA3,
+
+	0xF0,0xFF,0x7F,0x03,0x90,0x44,0xF3,0xE4,
+
+	0xF0,0xA3,0xDF,0xFC,0x7F,0x03,0x90,0x44,
+
+	0xE0,0x74,0x01,0xF0,0x90,0x44,0xF8,0xF0,
+
+	0x02,0x72,0x5C,0xE4,0x90,0x44,0xE0,0xF0,
+
+	0x02,0x72,0x5C,0x90,0x44,0xDA,0xE0,0x54,
+
+	0x0F,0xA3,0xF0,0x90,0x44,0xDA,0xE0,0xFF,
+
+	0xC4,0x54,0x0F,0x90,0x44,0xDC,0xF0,0x90,
+
+	0x44,0xF8,0xE0,0x24,0xFE,0x60,0x34,0x14,
+
+	0x60,0x52,0x14,0x60,0x70,0x14,0x70,0x03,
+
+	0x02,0x70,0xDF,0x24,0x04,0x60,0x03,0x02,
+
+	0x72,0x5C,0x90,0x44,0xDB,0xE0,0xB4,0x07,
+
+	0x0E,0xA3,0xE0,0xB4,0x07,0x09,0x90,0x44,
+
+	0xF8,0x74,0x02,0xF0,0x02,0x72,0x5C,0xE4,
+
+	0x90,0x44,0xE0,0xF0,0x90,0x44,0xF8,0xF0,
+
+	0x02,0x72,0x5C,0x90,0x44,0xDB,0xE0,0xB4,
+
+	0x07,0x0E,0xA3,0xE0,0xB4,0x07,0x09,0x90,
+
+	0x44,0xF8,0x74,0x03,0xF0,0x02,0x72,0x5C,
+
+	0xE4,0x90,0x44,0xE0,0xF0,0x90,0x44,0xF8,
+
+	0xF0,0x02,0x72,0x5C,0x90,0x44,0xDB,0xE0,
+
+	0xB4,0x07,0x0E,0xA3,0xE0,0xB4,0x08,0x09,
+
+	0x90,0x44,0xF8,0x74,0x04,0xF0,0x02,0x72,
+
+	0x5C,0xE4,0x90,0x44,0xE0,0xF0,0x90,0x44,
+
+	0xF8,0xF0,0x02,0x72,0x5C,0x90,0x44,0xDB,
+
+	0xE0,0xB4,0x07,0x0E,0xA3,0xE0,0xB4,0x08,
+
+	0x09,0x90,0x44,0xF8,0x74,0x05,0xF0,0x02,
+
+	0x72,0x5C,0xE4,0x90,0x44,0xE0,0xF0,0x90,
+
+	0x44,0xF8,0xF0,0x02,0x72,0x5C,0x90,0x44,
+
+	0xDB,0xE0,0x64,0x09,0x70,0x40,0x90,0x44,
+
+	0xF3,0x74,0x08,0xF0,0x90,0x44,0xDC,0xE0,
+
+	0xB4,0x08,0x0F,0x90,0x44,0xF4,0x74,0x88,
+
+	0xF0,0xA3,0xF0,0xE4,0xA3,0xF0,0xA3,0x74,
+
+	0x03,0xF0,0x90,0x44,0xDC,0xE0,0xB4,0x07,
+
+	0x0F,0x90,0x44,0xF4,0x74,0x88,0xF0,0xE4,
+
+	0xA3,0xF0,0xA3,0xF0,0xA3,0x74,0x02,0xF0,
+
+	0x90,0x44,0xE0,0x74,0x02,0xF0,0xE4,0x90,
+
+	0x44,0xF8,0xF0,0x02,0x72,0x5C,0xE4,0x90,
+
+	0x44,0xE0,0xF0,0x90,0x44,0xF8,0xF0,0x02,
+
+	0x72,0x5C,0x90,0x44,0xDA,0xE0,0x54,0x0F,
+
+	0xA3,0xF0,0x90,0x44,0xDA,0xE0,0xFF,0xC4,
+
+	0x54,0x0F,0x90,0x44,0xDC,0xF0,0x90,0x44,
+
+	0xDB,0xE0,0xB4,0x07,0x21,0x90,0x44,0xF7,
+
+	0xE0,0xFF,0x04,0xF0,0x74,0xF3,0x2F,0xF5,
+
+	0x82,0xE4,0x34,0x44,0xF5,0x83,0x74,0x08,
+
+	0xF0,0x90,0x44,0xF7,0xE0,0x64,0x04,0x70,
+
+	0x50,0x12,0x72,0xAA,0x80,0x4B,0x90,0x44,
+
+	0xDB,0xE0,0x64,0x08,0x70,0x3E,0x90,0x44,
+
+	0xF7,0xE0,0xFF,0x04,0xF0,0x74,0xF3,0x2F,
+
+	0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,0x74,
+
+	0x08,0xF0,0x90,0x44,0xF7,0xE0,0xB4,0x04,
+
+	0x03,0x12,0x72,0xAA,0x90,0x44,0xF7,0xE0,
+
+	0xFF,0x04,0xF0,0x74,0xF3,0x2F,0xF5,0x82,
+
+	0xE4,0x34,0x44,0xF5,0x83,0x74,0x08,0xF0,
+
+	0x90,0x44,0xF7,0xE0,0xB4,0x04,0x0A,0x12,
+
+	0x72,0xAA,0x80,0x05,0xE4,0x90,0x44,0xE0,
+
+	0xF0,0x90,0x44,0xDC,0xE0,0xC3,0x94,0x0C,
+
+	0x40,0x26,0x90,0x44,0xF7,0xE0,0x94,0x04,
+
+	0x50,0x14,0xE0,0xFF,0x04,0xF0,0x74,0xF3,
+
+	0x2F,0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,
+
+	0x74,0x88,0xF0,0x12,0x72,0xAA,0x12,0x72,
+
+	0x67,0xE4,0x90,0x44,0xE0,0xF0,0x80,0x73,
+
+	0x90,0x44,0xDC,0xE0,0xB4,0x07,0x21,0x90,
+
+	0x44,0xF7,0xE0,0xFF,0x04,0xF0,0x74,0xF3,
+
+	0x2F,0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,
+
+	0x74,0x88,0xF0,0x90,0x44,0xF7,0xE0,0x64,
+
+	0x04,0x70,0x50,0x12,0x72,0xAA,0x80,0x4B,
+
+	0x90,0x44,0xDC,0xE0,0x64,0x08,0x70,0x3E,
+
+	0x90,0x44,0xF7,0xE0,0xFF,0x04,0xF0,0x74,
+
+	0xF3,0x2F,0xF5,0x82,0xE4,0x34,0x44,0xF5,
+
+	0x83,0x74,0x88,0xF0,0x90,0x44,0xF7,0xE0,
+
+	0xB4,0x04,0x03,0x12,0x72,0xAA,0x90,0x44,
+
+	0xF7,0xE0,0xFF,0x04,0xF0,0x74,0xF3,0x2F,
+
+	0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,0x74,
+
+	0x88,0xF0,0x90,0x44,0xF7,0xE0,0xB4,0x04,
+
+	0x0A,0x12,0x72,0xAA,0x80,0x05,0xE4,0x90,
+
+	0x44,0xE0,0xF0,0x90,0xDF,0x82,0xE0,0x20,
+
+	0xE1,0x03,0x02,0x6F,0xE0,0x22,0x90,0x45,
+
+	0x18,0xE0,0xB4,0x01,0x0D,0x90,0x43,0x43,
+
+	0xE0,0xB4,0x01,0x06,0x12,0x73,0x64,0xEF,
+
+	0x60,0x2E,0x90,0x44,0xE1,0xE0,0x70,0x28,
+
+	0x7E,0xDE,0x7F,0x80,0x7C,0x44,0x7D,0xE3,
+
+	0x7B,0x08,0x12,0x56,0x9C,0x90,0x44,0xE1,
+
+	0x74,0x01,0xF0,0xE4,0xA3,0xF0,0x90,0x44,
+
+	0xDD,0xE0,0x60,0x06,0x90,0x44,0xDF,0xE0,
+
+	0x04,0xF0,0x90,0x44,0xDE,0x74,0x01,0xF0,
+
+	0x22,0xE4,0xFF,0xEF,0xC3,0x94,0x04,0x50,
+
+	0x65,0x74,0xF3,0x2F,0xF5,0x82,0xE4,0x34,
+
+	0x44,0xF5,0x83,0xE0,0xFE,0xB4,0x08,0x32,
+
+	0x74,0xF4,0x2F,0xF5,0x82,0xE4,0x34,0x44,
+
+	0xF5,0x83,0xE0,0xB4,0x88,0x24,0x90,0x44,
+
+	0xEC,0xE0,0xFD,0xC3,0x74,0x07,0x9D,0xFD,
+
+	0x74,0x01,0xA8,0x05,0x08,0x80,0x02,0xC3,
+
+	0x33,0xD8,0xFC,0xFD,0x90,0x44,0xED,0xE0,
+
+	0x2D,0xF0,0x90,0x44,0xEC,0xE0,0x04,0xF0,
+
+	0x80,0x20,0xEE,0xB4,0x88,0x16,0x74,0xF4,
+
+	0x2F,0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,
+
+	0xE0,0xB4,0x08,0x08,0x90,0x44,0xEC,0xE0,
+
+	0x04,0xF0,0x80,0x06,0x90,0x44,0xEC,0xE0,
+
+	0x04,0xF0,0x0F,0x0F,0x80,0x95,0xE4,0x90,
+
+	0x44,0xF7,0xF0,0x90,0x44,0xEC,0xE0,0x64,
+
+	0x08,0x70,0x3F,0xA3,0xE0,0xFF,0x90,0x44,
+
+	0xEB,0xE0,0xFE,0x04,0xF0,0x74,0xE3,0x2E,
+
+	0xF5,0x82,0xE4,0x34,0x44,0xF5,0x83,0xEF,
+
+	0xF0,0xE4,0x90,0x44,0xEC,0xF0,0xA3,0xF0,
+
+	0x90,0x44,0xEB,0xE0,0xB4,0x04,0x1B,0x90,
+
+	0x41,0xDF,0xE0,0xFF,0x90,0x44,0xE5,0xE0,
+
+	0x5F,0xF0,0x90,0x41,0xE0,0xE0,0xFF,0x90,
+
+	0x44,0xE6,0xE0,0x5F,0xF0,0xE4,0x90,0x44,
+
+	0xEB,0xF0,0x22,0xE4,0xFD,0xFC,0x90,0x41,
+
+	0xE1,0xE0,0x75,0xF0,0x07,0xA4,0xFF,0xC3,
+
+	0xED,0x9F,0xEC,0x95,0xF0,0x40,0x03,0x02,
+
+	0x75,0x01,0x74,0xE4,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFF,0x90,0x44,
+
+	0xE3,0xE0,0xFE,0xEF,0x6E,0x60,0x03,0x02,
+
+	0x74,0xF7,0x74,0xE5,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFF,0x90,0x44,
+
+	0xE4,0xE0,0xFE,0xEF,0x6E,0x60,0x03,0x02,
+
+	0x74,0xF7,0x74,0xE6,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFF,0x90,0x44,
+
+	0xE5,0xE0,0xFE,0xEF,0x6E,0x60,0x03,0x02,
+
+	0x74,0xF7,0x74,0xE7,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFF,0x90,0x44,
+
+	0xE6,0xE0,0xFE,0xEF,0x6E,0x60,0x03,0x02,
+
+	0x74,0xF7,0x74,0xEA,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFE,0x30,0xE7,
+
+	0x0B,0x90,0x44,0xF1,0x74,0x01,0xF0,0xE4,
+
+	0xA3,0xF0,0xFF,0x22,0x90,0x44,0xF1,0xE0,
+
+	0x60,0x3D,0xE4,0xF0,0xA3,0xF0,0xEE,0x64,
+
+	0x40,0x70,0x2B,0x90,0x44,0xE3,0xF0,0xA3,
+
+	0xF0,0x74,0xEF,0x2D,0xF5,0x82,0x74,0x41,
+
+	0x3C,0xF5,0x83,0xE0,0x90,0x44,0xE5,0xF0,
+
+	0xE4,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,
+
+	0xF0,0xA3,0xF0,0x90,0x44,0xF1,0x04,0xF0,
+
+	0xE4,0xA3,0xF0,0x7F,0x01,0x22,0xE4,0x90,
+
+	0x44,0xF1,0xF0,0xA3,0xF0,0xFF,0x22,0xE4,
+
+	0x90,0x44,0xE3,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0x74,0xE9,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFE,0x70,0x1F,
+
+	0x74,0xEA,0x2D,0xF5,0x82,0x74,0x41,0x3C,
+
+	0xF5,0x83,0xE0,0x70,0x12,0x74,0xE8,0x2D,
+
+	0xF5,0x82,0x74,0x41,0x3C,0xF5,0x83,0xE0,
+
+	0x90,0x44,0xE5,0xF0,0x7F,0x01,0x22,0xEE,
+
+	0x70,0x20,0x74,0xEA,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xB4,0x40,0x12,
+
+	0x74,0xE8,0x2D,0xF5,0x82,0x74,0x41,0x3C,
+
+	0xF5,0x83,0xE0,0x90,0x44,0xE5,0xF0,0x7F,
+
+	0x01,0x22,0x74,0xE9,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0xFF,0x60,0x16,
+
+	0x90,0x44,0xE3,0xF0,0x74,0xE8,0x2D,0xF5,
+
+	0x82,0x74,0x41,0x3C,0xF5,0x83,0xE0,0x90,
+
+	0x44,0xE5,0xF0,0x7F,0x01,0x22,0x74,0xEA,
+
+	0x2D,0xF5,0x82,0x74,0x41,0x3C,0xF5,0x83,
+
+	0xE0,0x30,0xE0,0x18,0x90,0x44,0xE5,0x74,
+
+	0x9A,0xF0,0x74,0xE8,0x2D,0xF5,0x82,0x74,
+
+	0x41,0x3C,0xF5,0x83,0xE0,0x90,0x44,0xE6,
+
+	0xF0,0x7F,0x01,0x22,0x74,0xE8,0x2D,0xF5,
+
+	0x82,0x74,0x41,0x3C,0xF5,0x83,0xE0,0x90,
+
+	0x44,0xE5,0xF0,0x7F,0x01,0x22,0x74,0x07,
+
+	0x2D,0xFD,0xE4,0x3C,0xFC,0x02,0x73,0x67,
+
+	0x7F,0x00,0x22,0xAE,0x07,0x90,0x41,0xDE,
+
+	0xE0,0xFD,0xB4,0x01,0x03,0x7F,0x03,0x22,
+
+	0xAF,0x06,0xE4,0x90,0x44,0xC9,0xF0,0x7A,
+
+	0x45,0x7B,0x00,0xA3,0x74,0x45,0xF0,0xA3,
+
+	0x74,0x00,0xF0,0xA3,0x74,0x01,0xF0,0xA3,
+
+	0xE4,0xF0,0x7B,0x01,0x12,0x6A,0xEA,0xEF,
+
+	0x60,0x03,0x7F,0x04,0x22,0x7E,0x45,0x7F,
+
+	0x02,0x90,0x45,0x02,0xE0,0xFD,0x7C,0x00,
+
+	0x12,0x6A,0xC4,0x90,0x45,0x00,0xE0,0x6E,
+
+	0x70,0x03,0xA3,0xE0,0x6F,0x60,0x03,0x7F,
+
+	0x05,0x22,0x7F,0x00,0x22,0x90,0x45,0x08,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x43,0x6C,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x90,0x45,0x0A,0xE0,
+
+	0xFF,0xA3,0xE0,0x90,0x43,0x6E,0xCF,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x45,0x0C,0xE0,0xFF,
+
+	0xA3,0xE0,0x90,0x43,0x70,0xCF,0xF0,0xA3,
+
+	0xEF,0xF0,0x90,0x45,0x0E,0xE0,0x90,0x43,
+
+	0x72,0xF0,0x90,0x45,0x0F,0xE0,0x90,0x43,
+
+	0x73,0xF0,0x90,0x45,0x10,0xE0,0x90,0x43,
+
+	0x74,0xF0,0x90,0x45,0x15,0xE0,0x90,0x44,
+
+	0x02,0xF0,0x90,0x45,0x13,0xE0,0x90,0x43,
+
+	0x88,0xF0,0x90,0x45,0x11,0xE0,0xFF,0x90,
+
+	0x44,0x71,0xF0,0x90,0x43,0x87,0xF0,0x90,
+
+	0x45,0x14,0xE0,0x90,0x44,0x72,0xF0,0x90,
+
+	0x45,0x16,0xE0,0x90,0xF1,0x03,0xF0,0x90,
+
+	0x45,0x56,0xE0,0xF4,0x60,0x05,0xE0,0x90,
+
+	0xDD,0x93,0xF0,0x22,0x22,0x90,0x45,0x04,
+
+	0xE0,0x70,0x03,0x02,0x78,0x4A,0x90,0x45,
+
+	0x04,0xE0,0x75,0xF0,0x08,0xA4,0x90,0x44,
+
+	0xF9,0xF0,0xE0,0x24,0x01,0xF5,0x82,0xE4,
+
+	0x34,0x45,0xF5,0x83,0xE0,0x90,0x44,0xFC,
+
+	0xF0,0x90,0x44,0xFC,0xE0,0x70,0x03,0x02,
+
+	0x78,0x4A,0x90,0x44,0xF9,0xE0,0xFE,0x24,
+
+	0x02,0xA3,0xF0,0x74,0x00,0x2E,0xF5,0x82,
+
+	0xE4,0x34,0x45,0xF5,0x83,0xE0,0x90,0x44,
+
+	0xFB,0xF0,0xE0,0x54,0xC0,0xFF,0x70,0x06,
+
+	0x90,0x44,0xC5,0xE0,0x70,0x16,0xBF,0x40,
+
+	0x06,0x90,0x44,0xC5,0xE0,0x60,0x0D,0x90,
+
+	0x44,0xFB,0xE0,0x54,0xC0,0x64,0xC0,0x60,
+
+	0x03,0x02,0x77,0xD7,0x90,0x44,0xFB,0xE0,
+
+	0x54,0x03,0x14,0x60,0x54,0x14,0x70,0x03,
+
+	0x02,0x76,0xEF,0x14,0x70,0x03,0x02,0x77,
+
+	0x6D,0x24,0x03,0x60,0x03,0x02,0x77,0xD7,
+
+	0xE4,0x90,0x44,0xFD,0xF0,0x90,0x44,0xFC,
+
+	0xE0,0xFF,0xA3,0xE0,0xC3,0x9F,0x40,0x03,
+
+	0x02,0x77,0xD7,0x90,0x44,0xFA,0xE0,0xFE,
+
+	0x24,0x00,0xF5,0x82,0xE4,0x34,0x45,0xF5,
+
+	0x83,0xE0,0xFF,0x74,0x01,0x2E,0xF5,0x82,
+
+	0xE4,0x34,0x45,0xF5,0x83,0xE0,0xFD,0x12,
+
+	0x64,0xEF,0x90,0x44,0xFA,0xE0,0x24,0x02,
+
+	0xF0,0x90,0x44,0xFD,0xE0,0x04,0xF0,0x80,
+
+	0xC4,0xE4,0x90,0x44,0xFD,0xF0,0x90,0x44,
+
+	0xFC,0xE0,0xFF,0xA3,0xE0,0xC3,0x9F,0x40,
+
+	0x03,0x02,0x77,0xD7,0x90,0x44,0xFA,0xE0,
+
+	0xFF,0x24,0x02,0xF5,0x82,0xE4,0x34,0x45,
+
+	0xF5,0x83,0xE0,0xFD,0x74,0x00,0x2F,0xF5,
+
+	0x82,0xE4,0x34,0x45,0xF5,0x83,0xE0,0xFE,
+
+	0x90,0x44,0xFA,0xE0,0x24,0x01,0xF5,0x82,
+
+	0xE4,0x34,0x45,0xF5,0x83,0xE0,0xFB,0xEE,
+
+	0xEB,0xF5,0x82,0x8E,0x83,0xED,0xF0,0x90,
+
+	0x44,0xFA,0xE0,0x24,0x03,0xF0,0x90,0x44,
+
+	0xFD,0xE0,0x04,0xF0,0x80,0xB0,0x90,0x44,
+
+	0xFA,0xE0,0xFD,0x24,0x00,0xF5,0x82,0xE4,
+
+	0x34,0x45,0xF5,0x83,0xE0,0xFE,0x74,0x01,
+
+	0x2D,0xF5,0x82,0xE4,0x34,0x45,0xF5,0x83,
+
+	0xE0,0xFD,0xEE,0xED,0xFF,0x90,0x44,0xFE,
+
+	0xEE,0xF0,0xA3,0xEF,0xF0,0x90,0x44,0xFA,
+
+	0xE0,0x24,0x02,0xF0,0xE4,0x90,0x44,0xFD,
+
+	0xF0,0x90,0x44,0xFC,0xE0,0xFF,0xA3,0xE0,
+
+	0xC3,0x9F,0x40,0x03,0x02,0x77,0xD7,0x90,
+
+	0x44,0xFA,0xE0,0xFF,0x24,0x01,0xF5,0x82,
+
+	0xE4,0x34,0x45,0xF5,0x83,0xE0,0xFE,0x74,
+
+	0x00,0x2F,0xF5,0x82,0xE4,0x34,0x45,0xF5,
+
+	0x83,0xE0,0xFD,0x90,0x44,0xFF,0xE0,0x2D,
+
+	0xFD,0x90,0x44,0xFE,0xE0,0x34,0x00,0x8D,
+
+	0x82,0xF5,0x83,0xEE,0xF0,0x90,0x44,0xFA,
+
+	0xE0,0x24,0x02,0xF0,0x90,0x44,0xFD,0xE0,
+
+	0x04,0xF0,0x80,0xB5,0x90,0x44,0xFA,0xE0,
+
+	0xFD,0x24,0x00,0xF5,0x82,0xE4,0x34,0x45,
+
+	0xF5,0x83,0xE0,0xFE,0x74,0x01,0x2D,0xF5,
+
+	0x82,0xE4,0x34,0x45,0xF5,0x83,0xE0,0xFD,
+
+	0xEE,0xED,0xFF,0x90,0x44,0xFE,0xEE,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x44,0xFA,0xE0,0x24,
+
+	0x02,0xF0,0xE4,0x90,0x44,0xFD,0xF0,0x90,
+
+	0x44,0xFC,0xE0,0xFF,0xA3,0xE0,0xC3,0x9F,
+
+	0x50,0x2C,0x90,0x44,0xFA,0xE0,0xFF,0x04,
+
+	0xF0,0x74,0x00,0x2F,0xF5,0x82,0xE4,0x34,
+
+	0x45,0xF5,0x83,0xE0,0xFF,0x90,0x44,0xFE,
+
+	0xE4,0x75,0xF0,0x01,0x12,0x7D,0x82,0x85,
+
+	0xF0,0x82,0xF5,0x83,0xEF,0xF0,0x90,0x44,
+
+	0xFD,0xE0,0x04,0xF0,0x80,0xC9,0x90,0x44,
+
+	0xF9,0xE0,0x24,0x02,0xF0,0x90,0x44,0xFB,
+
+	0xE0,0x54,0x03,0x14,0x60,0x19,0x14,0x60,
+
+	0x27,0x14,0x60,0x38,0x24,0x03,0x70,0x44,
+
+	0x90,0x44,0xFC,0xE0,0x25,0xE0,0xFF,0x90,
+
+	0x44,0xF9,0xE0,0x2F,0xF0,0x80,0x35,0x90,
+
+	0x44,0xFC,0xE0,0x75,0xF0,0x03,0xA4,0xFF,
+
+	0x90,0x44,0xF9,0xE0,0x2F,0xF0,0x80,0x24,
+
+	0x90,0x44,0xF9,0xE0,0x24,0x02,0xFF,0x90,
+
+	0x44,0xFC,0xE0,0x25,0xE0,0x2F,0x90,0x44,
+
+	0xF9,0xF0,0x80,0x10,0x90,0x44,0xF9,0xE0,
+
+	0x24,0x02,0xFF,0x90,0x44,0xFC,0xE0,0x2F,
+
+	0x90,0x44,0xF9,0xF0,0x90,0x44,0xF9,0xE0,
+
+	0x24,0x01,0xF5,0x82,0xE4,0x34,0x45,0xF5,
+
+	0x83,0xE0,0x90,0x44,0xFC,0xF0,0x02,0x75,
+
+	0xFA,0x22,0x90,0x44,0xB8,0xE0,0x60,0x08,
+
+	0x90,0x46,0x01,0x74,0x01,0xF0,0x80,0x06,
+
+	0x90,0x46,0x01,0x74,0x03,0xF0,0x12,0x56,
+
+	0xBB,0x12,0x6A,0xDF,0x90,0xF1,0x03,0xE0,
+
+	0x90,0x41,0x91,0xF0,0x90,0xF6,0xB5,0xE0,
+
+	0x54,0xF7,0x44,0x08,0xF0,0xE0,0x54,0xF7,
+
+	0xF0,0x90,0x41,0x91,0xE0,0x90,0xF1,0x03,
+
+	0xF0,0x90,0x46,0x01,0xE0,0xFF,0x12,0x6C,
+
+	0xA2,0x90,0x41,0xDE,0xEF,0xF0,0x90,0x44,
+
+	0xB8,0xE0,0x60,0x03,0x12,0x5A,0x5A,0x90,
+
+	0x46,0x01,0xE0,0xFF,0x12,0x75,0x04,0xEF,
+
+	0x70,0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,
+
+	0x90,0x46,0x00,0xEF,0xF0,0x60,0x1C,0x90,
+
+	0x45,0x57,0xE0,0x60,0x16,0xE0,0x90,0xF6,
+
+	0x32,0xF0,0x90,0x45,0x57,0xE0,0x90,0xF6,
+
+	0x33,0xF0,0x90,0xF6,0x31,0xE0,0x54,0xFE,
+
+	0x44,0x01,0xF0,0x90,0x46,0x00,0xE0,0x60,
+
+	0x07,0x12,0x75,0x56,0x12,0x75,0xD6,0x22,
+
+	0x90,0x44,0xB8,0xE0,0x60,0x1E,0xE4,0x90,
+
+	0x45,0x31,0xF0,0x90,0x45,0x33,0xF0,0x90,
+
+	0x45,0x12,0xF0,0x90,0x45,0x18,0x74,0x05,
+
+	0xF0,0xE4,0x90,0x45,0x34,0xF0,0x90,0x45,
+
+	0x11,0x74,0x80,0xF0,0x22,0xE4,0x90,0x46,
+
+	0x06,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0x90,0xDF,0x84,0x74,0x64,0xF0,
+
+	0xE4,0x90,0xDF,0x85,0xF0,0x90,0xDF,0x86,
+
+	0x74,0x2C,0xF0,0x90,0xDF,0x87,0x74,0x01,
+
+	0xF0,0xE4,0x90,0xDF,0x88,0xF0,0x90,0xDF,
+
+	0x89,0x74,0x02,0xF0,0x12,0x6C,0xE7,0x90,
+
+	0xDF,0x82,0xE0,0x20,0xE1,0x08,0x90,0x46,
+
+	0x05,0xE5,0xE4,0xF0,0x80,0xF1,0x22,0x90,
+
+	0xDF,0x82,0xE0,0x30,0xE0,0x0E,0x74,0x20,
+
+	0xF0,0xE0,0x90,0x46,0x02,0xF0,0xE4,0x90,
+
+	0xDF,0x82,0xF0,0x22,0x90,0xDF,0x82,0xE0,
+
+	0x30,0xE1,0x03,0x02,0x7B,0x3D,0x90,0x46,
+
+	0x02,0xE5,0xE4,0xF0,0xE0,0x54,0x0F,0xA3,
+
+	0xF0,0x90,0x46,0x02,0xE0,0xFF,0xC4,0x54,
+
+	0x0F,0x90,0x46,0x04,0xF0,0x90,0x44,0xE0,
+
+	0xE0,0x14,0x70,0x03,0x02,0x7A,0x25,0x04,
+
+	0x60,0x03,0x02,0x7A,0x92,0x90,0x46,0x07,
+
+	0xE0,0x25,0xE0,0xF0,0x90,0x46,0x06,0xE0,
+
+	0x33,0xF0,0xA3,0xE0,0x44,0x01,0xF0,0xA3,
+
+	0xE0,0x04,0xF0,0x90,0x46,0x02,0xE0,0x24,
+
+	0xEF,0x70,0x03,0x02,0x7A,0x92,0x24,0xEF,
+
+	0x60,0x20,0x24,0x10,0x70,0x37,0x90,0x46,
+
+	0x07,0xE0,0x25,0xE0,0xF0,0x90,0x46,0x06,
+
+	0xE0,0x33,0xF0,0x90,0x46,0x08,0xE0,0x04,
+
+	0xF0,0x90,0x44,0xE0,0x74,0x01,0xF0,0x02,
+
+	0x7A,0x92,0x90,0x46,0x07,0xE0,0x25,0xE0,
+
+	0xF0,0x90,0x46,0x06,0xE0,0x33,0xF0,0x90,
+
+	0x46,0x08,0xE0,0x04,0xF0,0xE4,0x90,0x44,
+
+	0xE0,0xF0,0x02,0x7A,0x92,0x90,0x46,0x03,
+
+	0xE0,0xB4,0x02,0x13,0x90,0x46,0x07,0xE0,
+
+	0x25,0xE0,0xF0,0x90,0x46,0x06,0xE0,0x33,
+
+	0xF0,0x90,0x46,0x08,0xE0,0x04,0xF0,0x90,
+
+	0x46,0x04,0xE0,0xD3,0x94,0x02,0x40,0x14,
+
+	0x90,0x46,0x03,0xE0,0x64,0x01,0x60,0x04,
+
+	0xE0,0xB4,0x02,0x08,0x90,0x46,0x04,0x74,
+
+	0xFF,0xF0,0x80,0x75,0x90,0x46,0x04,0x74,
+
+	0xFE,0xF0,0x80,0x6D,0x90,0x46,0x02,0xE0,
+
+	0x24,0xDF,0x60,0x1F,0x24,0x10,0x70,0x35,
+
+	0x90,0x46,0x07,0xE0,0x25,0xE0,0xF0,0x90,
+
+	0x46,0x06,0xE0,0x33,0xF0,0x90,0x46,0x08,
+
+	0xE0,0x04,0xF0,0x90,0x44,0xE0,0x74,0x01,
+
+	0xF0,0x80,0x46,0x90,0x46,0x07,0xE0,0x25,
+
+	0xE0,0xF0,0x90,0x46,0x06,0xE0,0x33,0xF0,
+
+	0x90,0x46,0x08,0xE0,0x04,0xF0,0xE4,0x90,
+
+	0x44,0xE0,0xF0,0x80,0x2C,0x90,0x46,0x07,
+
+	0xE0,0x25,0xE0,0xF0,0x90,0x46,0x06,0xE0,
+
+	0x33,0xF0,0x90,0x46,0x08,0xE0,0x04,0xF0,
+
+	0x90,0x46,0x03,0xE0,0xB4,0x01,0x0C,0xA3,
+
+	0xE0,0xD3,0x94,0x02,0x40,0x05,0x74,0xFF,
+
+	0xF0,0x80,0x06,0x90,0x46,0x04,0x74,0xFE,
+
+	0xF0,0x90,0x46,0x04,0xE0,0xD3,0x94,0x0F,
+
+	0x50,0x03,0x02,0x79,0x55,0x90,0x46,0x08,
+
+	0xE0,0xFF,0xD3,0x94,0x10,0x50,0x7E,0xEF,
+
+	0x94,0x0A,0x40,0x79,0x90,0x46,0x04,0xE0,
+
+	0xF4,0x70,0x72,0xFF,0x7F,0x08,0x90,0x44,
+
+	0xE3,0xE4,0xF0,0xA3,0xDF,0xFC,0x7F,0x08,
+
+	0x90,0x45,0x34,0xE0,0xB4,0xFF,0x1A,0x90,
+
+	0x46,0x06,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x46,0x09,0xE0,0x6E,0x70,0x03,0xA3,0xE0,
+
+	0x6F,0x60,0x06,0x90,0x44,0xE3,0x74,0x01,
+
+	0xF0,0x90,0x46,0x06,0xE0,0xFF,0xA3,0xE0,
+
+	0x90,0x46,0x09,0xCF,0xF0,0xA3,0xEF,0xF0,
+
+	0x90,0x46,0x06,0xE0,0x54,0xF7,0xF0,0x90,
+
+	0x45,0x34,0xE0,0xB4,0xFF,0x12,0x90,0x46,
+
+	0x09,0xE0,0x90,0x44,0xE5,0xF0,0x90,0x46,
+
+	0x0A,0xE0,0x90,0x44,0xE6,0xF0,0x80,0x10,
+
+	0x90,0x46,0x06,0xE0,0x90,0x44,0xE5,0xF0,
+
+	0x90,0x46,0x07,0xE0,0x90,0x44,0xE6,0xF0,
+
+	0x12,0x72,0x67,0x80,0x07,0xE4,0x90,0x46,
+
+	0x09,0xF0,0xA3,0xF0,0xE4,0x90,0x46,0x06,
+
+	0xF0,0xA3,0xF0,0xA3,0xF0,0x90,0x44,0xE0,
+
+	0xF0,0x02,0x79,0x55,0x22,0x90,0x41,0x92,
+
+	0xE0,0x70,0x0A,0x90,0xF1,0x02,0xE0,0x54,
+
+	0xFE,0x44,0x01,0xF0,0x22,0x90,0x41,0x96,
+
+	0xE0,0x90,0xF1,0x03,0xF0,0x90,0x83,0xFE,
+
+	0xE0,0x54,0xFE,0x44,0x01,0xF0,0xE0,0x54,
+
+	0xFE,0xF0,0xE0,0x54,0xFE,0x44,0x01,0xF0,
+
+	0xE0,0x54,0xFE,0xF0,0x12,0x56,0xBB,0xC2,
+
+	0xAF,0x90,0x41,0x93,0xE0,0xFF,0x90,0xF1,
+
+	0x01,0xE0,0x8F,0xF0,0xA4,0xFF,0xAE,0xF0,
+
+	0x90,0x41,0x94,0xE0,0x7C,0x00,0x2F,0xF5,
+
+	0x17,0xEC,0x3E,0xF5,0x16,0xE4,0xF5,0x18,
+
+	0xF5,0x14,0xF5,0x15,0xC3,0xE5,0x15,0x95,
+
+	0x17,0xE5,0x14,0x95,0x16,0x50,0x6A,0xE5,
+
+	0x15,0x45,0x14,0x70,0x16,0x90,0xF1,0x02,
+
+	0xE0,0x54,0xFE,0x44,0x01,0xF0,0x90,0x83,
+
+	0xFE,0xE0,0x54,0xFE,0x44,0x01,0xF0,0xE0,
+
+	0x54,0xFE,0xF0,0xE5,0x18,0x25,0xE0,0x24,
+
+	0x99,0xF5,0x82,0xE4,0x34,0x41,0xF5,0x83,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x12,0x7C,0x73,
+
+	0x7E,0x00,0xE5,0x15,0x54,0x01,0x24,0x95,
+
+	0xF5,0x82,0xEE,0x34,0x41,0xF5,0x83,0xE0,
+
+	0x90,0xF1,0x03,0xF0,0x90,0x83,0xFE,0xE0,
+
+	0x54,0xFE,0x44,0x01,0xF0,0xE0,0x54,0xFE,
+
+	0xF0,0x05,0x15,0xE5,0x15,0x70,0x02,0x05,
+
+	0x14,0x74,0x0B,0x25,0x18,0xF5,0x82,0xE4,
+
+	0x34,0x46,0xF5,0x83,0xE0,0xF5,0x18,0x80,
+
+	0x8B,0xD2,0xAF,0xE4,0x22,0xE4,0xFF,0x90,
+
+	0x41,0x98,0xE0,0xFE,0x90,0x41,0x97,0xE0,
+
+	0xFD,0x2E,0x14,0xFE,0xEF,0xC3,0x9E,0x50,
+
+	0x12,0xEF,0x04,0xFE,0x74,0x0B,0x2F,0xF5,
+
+	0x82,0xE4,0x34,0x46,0xF5,0x83,0xEE,0xF0,
+
+	0x0F,0x80,0xDC,0x74,0x0B,0x2F,0xF5,0x82,
+
+	0xE4,0x34,0x46,0xF5,0x83,0xED,0xF0,0x22,
+
+	0xE4,0x90,0x41,0x92,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0x14,0xF0,0xA3,0x74,0xFF,0xF0,
+
+	0xA3,0x74,0x07,0xF0,0xA3,0x74,0x01,0xF0,
+
+	0xA3,0x04,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x77,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,
+
+	0x40,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x24,
+
+	0xF0,0x22,0xC0,0x07,0x85,0x06,0x07,0x12,
+
+	0x7C,0x8F,0xD0,0xE0,0xC0,0xE0,0xC4,0x54,
+
+	0x0F,0xFF,0x12,0x7C,0xAF,0xD0,0xE0,0x54,
+
+	0x0F,0xFF,0x12,0x7C,0xC0,0x22,0xEF,0x70,
+
+	0x02,0x80,0x0B,0x80,0x00,0xC0,0x07,0x12,
+
+	0x7C,0xA0,0xD0,0x07,0xDF,0xF7,0x22,0x7F,
+
+	0x0C,0x12,0x7C,0xAF,0x7F,0x04,0x90,0x7C,
+
+	0xA0,0xE0,0xDF,0xFD,0xE0,0x22,0xEF,0x70,
+
+	0x02,0x80,0x0B,0x80,0x00,0x90,0x7C,0xB6,
+
+	0xE0,0xE0,0xE0,0x04,0xDF,0xF7,0x22,0x90,
+
+	0x7C,0xC8,0xEF,0xF4,0x54,0x0F,0x73,0x04,
+
+	0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
+
+	0x04,0x04,0x04,0x04,0x04,0x04,0x22,0xBB,
+
+	0x01,0x0C,0xE5,0x82,0x29,0xF5,0x82,0xE5,
+
+	0x83,0x3A,0xF5,0x83,0xE0,0x22,0x50,0x06,
+
+	0xE9,0x25,0x82,0xF8,0xE6,0x22,0xBB,0xFE,
+
+	0x06,0xE9,0x25,0x82,0xF8,0xE2,0x22,0xE5,
+
+	0x82,0x29,0xF5,0x82,0xE5,0x83,0x3A,0xF5,
+
+	0x83,0xE4,0x93,0x22,0xEF,0x8D,0xF0,0xA4,
+
+	0xA8,0xF0,0xCF,0x8C,0xF0,0xA4,0x28,0xCE,
+
+	0x8D,0xF0,0xA4,0x2E,0xFE,0x22,0xBC,0x00,
+
+	0x0B,0xBE,0x00,0x29,0xEF,0x8D,0xF0,0x84,
+
+	0xFF,0xAD,0xF0,0x22,0xE4,0xCC,0xF8,0x75,
+
+	0xF0,0x08,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
+
+	0xEC,0x33,0xFC,0xEE,0x9D,0xEC,0x98,0x40,
+
+	0x05,0xFC,0xEE,0x9D,0xFE,0x0F,0xD5,0xF0,
+
+	0xE9,0xE4,0xCE,0xFD,0x22,0xED,0xF8,0xF5,
+
+	0xF0,0xEE,0x84,0x20,0xD2,0x1C,0xFE,0xAD,
+
+	0xF0,0x75,0xF0,0x08,0xEF,0x2F,0xFF,0xED,
+
+	0x33,0xFD,0x40,0x07,0x98,0x50,0x06,0xD5,
+
+	0xF0,0xF2,0x22,0xC3,0x98,0xFD,0x0F,0xD5,
+
+	0xF0,0xEA,0x22,0xC5,0xF0,0xF8,0xA3,0xE0,
+
+	0x28,0xF0,0xC5,0xF0,0xF8,0xE5,0x82,0x15,
+
+	0x82,0x70,0x02,0x15,0x83,0xE0,0x38,0xF0,
+
+	0x22,0xA3,0xF8,0xE0,0xC5,0xF0,0x25,0xF0,
+
+	0xF0,0xE5,0x82,0x15,0x82,0x70,0x02,0x15,
+
+	0x83,0xE0,0xC8,0x38,0xF0,0xE8,0x22,0xE8,
+
+	0x8F,0xF0,0xA4,0xCC,0x8B,0xF0,0xA4,0x2C,
+
+	0xFC,0xE9,0x8E,0xF0,0xA4,0x2C,0xFC,0x8A,
+
+	0xF0,0xED,0xA4,0x2C,0xFC,0xEA,0x8E,0xF0,
+
+	0xA4,0xCD,0xA8,0xF0,0x8B,0xF0,0xA4,0x2D,
+
+	0xCC,0x38,0x25,0xF0,0xFD,0xE9,0x8F,0xF0,
+
+	0xA4,0x2C,0xCD,0x35,0xF0,0xFC,0xEB,0x8E,
+
+	0xF0,0xA4,0xFE,0xA9,0xF0,0xEB,0x8F,0xF0,
+
+	0xA4,0xCF,0xC5,0xF0,0x2E,0xCD,0x39,0xFE,
+
+	0xE4,0x3C,0xFC,0xEA,0xA4,0x2D,0xCE,0x35,
+
+	0xF0,0xFD,0xE4,0x3C,0xFC,0x22,0x75,0xF0,
+
+	0x08,0x75,0x82,0x00,0xEF,0x2F,0xFF,0xEE,
+
+	0x33,0xFE,0xCD,0x33,0xCD,0xCC,0x33,0xCC,
+
+	0xC5,0x82,0x33,0xC5,0x82,0x9B,0xED,0x9A,
+
+	0xEC,0x99,0xE5,0x82,0x98,0x40,0x0C,0xF5,
+
+	0x82,0xEE,0x9B,0xFE,0xED,0x9A,0xFD,0xEC,
+
+	0x99,0xFC,0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,
+
+	0xFB,0xE4,0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,
+
+	0x82,0x22,0xB8,0x00,0xC1,0xB9,0x00,0x59,
+
+	0xBA,0x00,0x2D,0xEC,0x8B,0xF0,0x84,0xCF,
+
+	0xCE,0xCD,0xFC,0xE5,0xF0,0xCB,0xF9,0x78,
+
+	0x18,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,
+
+	0x33,0xFD,0xEC,0x33,0xFC,0xEB,0x33,0xFB,
+
+	0x10,0xD7,0x03,0x99,0x40,0x04,0xEB,0x99,
+
+	0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,0x22,
+
+	0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
+
+	0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,0x33,
+
+	0xC9,0x10,0xD7,0x05,0x9B,0xE9,0x9A,0x40,
+
+	0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,
+
+	0xD8,0xE0,0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,
+
+	0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,0xEE,
+
+	0x33,0xFE,0xED,0x33,0xFD,0xCC,0x33,0xCC,
+
+	0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,0xEC,
+
+	0x9A,0xE8,0x99,0x40,0x0A,0xED,0x9B,0xFD,
+
+	0xEC,0x9A,0xFC,0xE8,0x99,0xF8,0x0F,0xD5,
+
+	0xF0,0xDA,0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,
+
+	0xE4,0xC8,0xF9,0x22,0xD0,0x83,0xD0,0x82,
+
+	0xF8,0xE4,0x93,0x70,0x12,0x74,0x01,0x93,
+
+	0x70,0x0D,0xA3,0xA3,0x93,0xF8,0x74,0x01,
+
+	0x93,0xF5,0x82,0x88,0x83,0xE4,0x73,0x74,
+
+	0x02,0x93,0x68,0x60,0xEF,0xA3,0xA3,0xA3,
+
+	0x80,0xDF,0x8A,0x83,0x89,0x82,0xE4,0x73,
+
+	0xE7,0x09,0xF6,0x08,0xDF,0xFA,0x80,0x46,
+
+	0xE7,0x09,0xF2,0x08,0xDF,0xFA,0x80,0x3E,
+
+	0x88,0x82,0x8C,0x83,0xE7,0x09,0xF0,0xA3,
+
+	0xDF,0xFA,0x80,0x32,0xE3,0x09,0xF6,0x08,
+
+	0xDF,0xFA,0x80,0x6E,0xE3,0x09,0xF2,0x08,
+
+	0xDF,0xFA,0x80,0x66,0x88,0x82,0x8C,0x83,
+
+	0xE3,0x09,0xF0,0xA3,0xDF,0xFA,0x80,0x5A,
+
+	0x89,0x82,0x8A,0x83,0xE0,0xA3,0xF6,0x08,
+
+	0xDF,0xFA,0x80,0x4E,0x89,0x82,0x8A,0x83,
+
+	0xE0,0xA3,0xF2,0x08,0xDF,0xFA,0x80,0x42,
+
+	0x80,0xD2,0x80,0xFA,0x80,0xC6,0x80,0xD4,
+
+	0x80,0x55,0x80,0xF2,0x80,0x29,0x80,0x10,
+
+	0x80,0xA6,0x80,0xEA,0x80,0x9A,0x80,0xA8,
+
+	0x80,0xDA,0x80,0xE2,0x80,0xCA,0x80,0x29,
+
+	0x88,0x84,0x8C,0x85,0x89,0x82,0x8A,0x83,
+
+	0xE4,0x93,0xA3,0x05,0x86,0xF0,0xA3,0x05,
+
+	0x86,0xDF,0xF5,0xDE,0xF3,0x80,0x0B,0x89,
+
+	0x82,0x8A,0x83,0xE4,0x93,0xA3,0xF6,0x08,
+
+	0xDF,0xF9,0xEC,0xFA,0xA9,0xF0,0xED,0xFB,
+
+	0x22,0x88,0x84,0x8C,0x85,0x89,0x82,0x8A,
+
+	0x83,0xE0,0xA3,0x05,0x86,0xF0,0xA3,0x05,
+
+	0x86,0xDF,0xF6,0xDE,0xF4,0x80,0xE3,0x89,
+
+	0x82,0x8A,0x83,0xE4,0x93,0xA3,0xF2,0x08,
+
+	0xDF,0xF9,0x80,0xD6,0x88,0xF0,0xEF,0x60,
+
+	0x01,0x0E,0x4E,0x60,0xCD,0x88,0xF0,0xED,
+
+	0x24,0x02,0xB4,0x04,0x00,0x50,0xC3,0xF5,
+
+	0x82,0xEB,0x24,0x02,0xB4,0x04,0x00,0x50,
+
+	0xB9,0x23,0x23,0x45,0x82,0x23,0x90,0x7F,
+
+	0x31,0x73,0x12,0x01,0x00,0x02,0x00,0x00,
+
+	0x00,0x40,0xA4,0x15,0x50,0x03,0x00,0x02,
+
+	0x00,0x00,0x00,0x01,0x0A,0x06,0x00,0x02,
+
+	0x00,0x00,0x00,0x40,0x01,0x00,0x09,0x07,
+
+	0x35,0x00,0x01,0x01,0x00,0x80,0xFA,0x09,
+
+	0x02,0x35,0x00,0x01,0x01,0x00,0x80,0xFA,
+
+	0x09,0x04,0x00,0x00,0x05,0xFF,0x00,0x00,
+
+	0x00,0x07,0x05,0x81,0x02,0x40,0x00,0x00,
+
+	0x07,0x05,0x02,0x02,0x40,0x00,0x00,0x07,
+
+	0x05,0x84,0x02,0x40,0x00,0x00,0x07,0x05,
+
+	0x85,0x02,0x40,0x00,0x00,0x07,0x05,0x86,
+
+	0x01,0x00,0x00,0x01,0x09,0x04,0x00,0x01,
+
+	0x05,0xFF,0x00,0x00,0x00,0x07,0x05,0x81,
+
+	0x02,0x40,0x00,0x00,0x07,0x05,0x02,0x02,
+
+	0x40,0x00,0x00,0x07,0x05,0x84,0x02,0x40,
+
+	0x00,0x00,0x07,0x05,0x85,0x02,0x40,0x00,
+
+	0x00,0x07,0x05,0x86,0x01,0x00,0x14,0x01,
+
+	0x09,0x04,0x01,0x00,0x01,0x03,0x00,0x01,
+
+	0x00,0x09,0x21,0x01,0x01,0x00,0x01,0x22,
+
+	0x41,0x00,0x07,0x05,0x83,0x03,0x40,0x00,
+
+	0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x05,0x01,0x09,
+
+	0x06,0xA1,0x01,0x05,0x07,0x19,0xE0,0x29,
+
+	0xE7,0x15,0x00,0x25,0x01,0x95,0x08,0x75,
+
+	0x01,0x81,0x02,0x95,0x08,0x75,0x01,0x81,
+
+	0x01,0x05,0x08,0x19,0x01,0x29,0x03,0x95,
+
+	0x03,0x75,0x01,0x91,0x02,0x95,0x01,0x75,
+
+	0x05,0x91,0x01,0x05,0x07,0x19,0x00,0x2A,
+
+	0xFF,0x00,0x15,0x00,0x26,0xFF,0x00,0x95,
+
+	0x06,0x75,0x08,0x81,0x00,0xC0,
+
+	0x02,0x41,0x00,0x00,0x03,0xFA,0xBE,0x02,
+
+	0x99,0x14,
+
+	0x02,0x45,0x50,0x6A,0xAD,0x00,0x50,0x90,
+
+	0x43,0x66,0xE0,0xFE,0x90,0x44,0x02,0xF0,
+
+	0xE4,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,
+
+	0xF0,0xA3,0xF0,0xA3,0xCE,0xF0,0xE4,0xA3,
+
+	0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0x90,
+
+	0x44,0x02,0xE0,0x04,0xFF,0x90,0x41,0xEF,
+
+	0xE0,0xFE,0x2F,0x8E,0xF0,0x84,0xAF,0xF0,
+
+	0x90,0x44,0x02,0xEF,0xF0,0xA3,0xE0,0xFD,
+
+	0xA3,0xE0,0xA3,0xCD,0xF0,0xA3,0xED,0xF0,
+
+	0xEF,0x25,0xE0,0x24,0x58,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0x90,0x43,0x61,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xEF,0x2D,0xFF,0xEE,0x3C,0xFE,0x90,
+
+	0x43,0x66,0xE0,0x25,0xE0,0x24,0x58,0xF5,
+
+	0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0xC3,0xEF,0x9B,0xFF,0xEE,
+
+	0x9A,0xFE,0xED,0x24,0x01,0xFD,0xE4,0x3C,
+
+	0xFC,0x12,0x4A,0x78,0x90,0x44,0x03,0xEC,
+
+	0xF0,0xA3,0xED,0xF0,0xD3,0x90,0x43,0x72,
+
+	0xE0,0x9D,0xEC,0x64,0x80,0xF8,0x90,0x43,
+
+	0x71,0xE0,0x64,0x80,0x98,0x50,0x80,0x90,
+
+	0x41,0xEF,0xE0,0xFD,0x7C,0x00,0x90,0x44,
+
+	0x08,0xE0,0x2D,0xFF,0x90,0x44,0x07,0xE0,
+
+	0x3C,0xCF,0x24,0xFF,0xCF,0x34,0xFF,0xFE,
+
+	0x12,0x4A,0x78,0xEC,0xF0,0xA3,0xED,0xF0,
+
+	0xA3,0xE0,0xFF,0xA3,0xE0,0xA3,0xCF,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x44,0x08,0xE0,0x25,
+
+	0xE0,0xFF,0x90,0x44,0x07,0xE0,0x33,0xFE,
+
+	0x74,0x58,0x2F,0xF5,0x82,0x74,0x43,0x3E,
+
+	0xF5,0x83,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x43,0x66,0xE0,0x25,0xE0,0x24,0x58,0xF5,
+
+	0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFC,
+
+	0xA3,0xE0,0xFD,0x90,0x43,0x61,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0xED,0x2B,0xFD,0xEC,0x3A,
+
+	0xCD,0xC3,0x9F,0xFF,0xED,0x9E,0xFE,0xEB,
+
+	0x24,0x01,0xFD,0xE4,0x3A,0xFC,0x12,0x4A,
+
+	0x78,0x90,0x44,0x09,0xEC,0xF0,0xA3,0xED,
+
+	0xF0,0xD3,0x90,0x43,0x72,0xE0,0x9D,0xEC,
+
+	0x64,0x80,0xF8,0x90,0x43,0x71,0xE0,0x64,
+
+	0x80,0x98,0x40,0x03,0x02,0x45,0xF0,0x90,
+
+	0x44,0x05,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x44,0x0B,0xE0,0xFC,0xA3,0xE0,0xFD,0x9F,
+
+	0xEE,0x64,0x80,0xF8,0xEC,0x64,0x80,0x98,
+
+	0x40,0x08,0xA3,0xEC,0xF0,0xA3,0xED,0xF0,
+
+	0x80,0x08,0x90,0x44,0x0D,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x90,0x44,0x03,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x44,0x09,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xC3,0x9F,0xEE,0x64,0x80,0xF8,
+
+	0xEC,0x64,0x80,0x98,0x50,0x2B,0x90,0x44,
+
+	0x0F,0xEC,0xF0,0xA3,0xED,0xF0,0x90,0x41,
+
+	0xEF,0xE0,0xFD,0x7C,0x00,0x90,0x44,0x08,
+
+	0xE0,0x2D,0xFF,0x90,0x44,0x07,0xE0,0x3C,
+
+	0xCF,0x24,0xFF,0xCF,0x34,0xFF,0xFE,0x12,
+
+	0x4A,0x78,0xEC,0xF0,0xA3,0xED,0xF0,0x80,
+
+	0x24,0x90,0x44,0x03,0xE0,0xFF,0xA3,0xE0,
+
+	0x90,0x44,0x0F,0xCF,0xF0,0xA3,0xEF,0xF0,
+
+	0x90,0x44,0x02,0xE0,0x04,0xFF,0x90,0x41,
+
+	0xEF,0xE0,0xFE,0x2F,0x8E,0xF0,0x84,0x90,
+
+	0x44,0x02,0xE5,0xF0,0xF0,0x90,0x44,0x0D,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x90,0x44,
+
+	0x10,0xE0,0x9F,0xFF,0x90,0x44,0x0F,0xE0,
+
+	0x9E,0x90,0x44,0x11,0xF0,0xA3,0xEF,0xF0,
+
+	0xE4,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0x90,
+
+	0x44,0x01,0xF0,0x90,0x43,0x69,0xE0,0x75,
+
+	0xF0,0x04,0xA4,0xFF,0xC3,0x90,0x44,0x12,
+
+	0xE0,0x9F,0xE5,0xF0,0x64,0x80,0xF8,0x90,
+
+	0x44,0x11,0xE0,0x64,0x80,0x98,0x40,0x03,
+
+	0x02,0x49,0x21,0x90,0x44,0x13,0xE0,0x60,
+
+	0x03,0x02,0x49,0x21,0x90,0x44,0x01,0xE0,
+
+	0x94,0x14,0x40,0x17,0x90,0xF5,0xE7,0xE4,
+
+	0xF0,0x90,0xF5,0xE1,0xF0,0xF5,0x13,0x7B,
+
+	0x01,0x7A,0x44,0x79,0x6A,0x7D,0x01,0xFC,
+
+	0x12,0xA1,0x83,0x90,0x44,0x01,0xE0,0x04,
+
+	0xF0,0x90,0x44,0x0F,0xE0,0xFF,0xA3,0xE0,
+
+	0x90,0x44,0x0D,0xCF,0xF0,0xA3,0xEF,0xF0,
+
+	0x90,0x44,0x02,0xE0,0x25,0xE0,0x24,0x58,
+
+	0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x43,0x61,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xEF,0x2D,0xFF,0xEE,
+
+	0x3C,0xFE,0x90,0x43,0x66,0xE0,0x25,0xE0,
+
+	0x24,0x58,0xF5,0x82,0xE4,0x34,0x43,0xF5,
+
+	0x83,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0xEF,
+
+	0x9B,0xFF,0xEE,0x9A,0xFE,0xED,0x24,0x01,
+
+	0xFD,0xE4,0x3C,0xFC,0x12,0x4A,0x78,0x90,
+
+	0x44,0x03,0xEC,0xF0,0xA3,0xED,0xF0,0x90,
+
+	0x44,0x08,0xE0,0x25,0xE0,0xFF,0x90,0x44,
+
+	0x07,0xE0,0x33,0xFE,0x74,0x58,0x2F,0xF5,
+
+	0x82,0x74,0x43,0x3E,0xF5,0x83,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x90,0x43,0x66,0xE0,0x25,
+
+	0xE0,0x24,0x58,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xE0,0xFC,0xA3,0xE0,0xFD,0x90,
+
+	0x43,0x61,0xE0,0xFA,0xA3,0xE0,0xFB,0xED,
+
+	0x2B,0xFD,0xEC,0x3A,0xCD,0xC3,0x9F,0xFF,
+
+	0xED,0x9E,0xFE,0xEB,0x24,0x01,0xFD,0xE4,
+
+	0x3A,0xFC,0x12,0x4A,0x78,0x90,0x44,0x09,
+
+	0xEC,0xF0,0xA3,0xED,0xF0,0x90,0x44,0x03,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x9D,0xEC,
+
+	0x64,0x80,0xF8,0xEE,0x64,0x80,0x98,0x50,
+
+	0x3F,0x90,0x44,0x0F,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x44,0x15,0xE0,0x60,0x03,0x02,
+
+	0x48,0xEE,0x90,0x43,0x66,0xE0,0xFF,0x90,
+
+	0x44,0x02,0xE0,0xFE,0xB5,0x07,0x04,0x7F,
+
+	0x01,0x80,0x02,0x7F,0x00,0x90,0x44,0x15,
+
+	0xEF,0xF0,0x70,0x69,0xEE,0x04,0xFF,0x90,
+
+	0x41,0xEF,0xE0,0xFE,0x2F,0x8E,0xF0,0x84,
+
+	0x90,0x44,0x02,0xE5,0xF0,0xF0,0x80,0x55,
+
+	0x90,0x44,0x09,0xE0,0xFF,0xA3,0xE0,0x90,
+
+	0x44,0x0F,0xCF,0xF0,0xA3,0xEF,0xF0,0x90,
+
+	0x44,0x14,0xE0,0x70,0x40,0x90,0x43,0x66,
+
+	0xE0,0xFF,0x7E,0x00,0x90,0x44,0x07,0xE0,
+
+	0xFA,0xA3,0xE0,0xFB,0xB5,0x07,0x08,0xEE,
+
+	0xB5,0x02,0x04,0x7F,0x01,0x80,0x02,0x7F,
+
+	0x00,0x90,0x44,0x14,0xEF,0xF0,0x70,0x1D,
+
+	0x90,0x41,0xEF,0xE0,0xFD,0x7C,0x00,0x2B,
+
+	0xFF,0xEC,0x3A,0xCF,0x24,0xFF,0xCF,0x34,
+
+	0xFF,0xFE,0x12,0x4A,0x78,0x90,0x44,0x07,
+
+	0xEC,0xF0,0xA3,0xED,0xF0,0x90,0x44,0x0D,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x90,0x44,
+
+	0x10,0xE0,0x9F,0xFF,0x90,0x44,0x0F,0xE0,
+
+	0x9E,0x90,0x44,0x11,0xF0,0xA3,0xEF,0xF0,
+
+	0x90,0x44,0x14,0xE0,0x60,0x08,0xA3,0xE0,
+
+	0x60,0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,
+
+	0x90,0x44,0x13,0xEF,0xF0,0x02,0x47,0x44,
+
+	0x90,0x44,0x13,0xE0,0x60,0x0F,0x90,0x43,
+
+	0x4D,0x74,0x07,0xF0,0x90,0x43,0x6E,0x74,
+
+	0x01,0xF0,0x02,0x49,0xDB,0x90,0x43,0x69,
+
+	0xE0,0xF9,0x25,0xE0,0xFF,0xE4,0x33,0xFE,
+
+	0x90,0x43,0x71,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0x90,0x44,0x0F,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xC3,0x9D,0xFD,0xEA,0x9C,0xFC,0xC3,0xED,
+
+	0x9F,0xEE,0x64,0x80,0xF8,0xEC,0x64,0x80,
+
+	0x98,0x50,0x22,0xE9,0x75,0xF0,0x02,0xA4,
+
+	0xFF,0x90,0x43,0x72,0xE0,0x2F,0xFF,0x90,
+
+	0x43,0x71,0xE0,0x35,0xF0,0xFE,0xC3,0xEB,
+
+	0x9F,0xFF,0xEA,0x9E,0x90,0x43,0x67,0xF0,
+
+	0xA3,0xEF,0xF0,0x80,0x55,0xE9,0x25,0xE0,
+
+	0xFF,0xE4,0x33,0xFE,0x90,0x44,0x0D,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0x90,0x43,0x71,0xE0,
+
+	0xFA,0xA3,0xE0,0xFB,0xC3,0x9D,0xFD,0xEA,
+
+	0x9C,0xFC,0xC3,0xED,0x9F,0xEE,0x64,0x80,
+
+	0xF8,0xEC,0x64,0x80,0x98,0x50,0x24,0xE9,
+
+	0x25,0xE0,0xFF,0xE4,0x33,0xFE,0xEB,0x2F,
+
+	0xFF,0xEA,0x3E,0xFE,0x90,0x44,0x0D,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xC3,0xEF,0x9D,0xFF,
+
+	0xEE,0x9C,0x90,0x43,0x67,0xF0,0xA3,0xEF,
+
+	0xF0,0x80,0x07,0xE4,0x90,0x43,0x67,0xF0,
+
+	0xA3,0xF0,0x90,0x43,0x6E,0x74,0x03,0xF0,
+
+	0x90,0xF5,0xE6,0xF0,0x90,0x43,0x67,0xE0,
+
+	0xA2,0xE7,0x13,0xF0,0xA3,0xE0,0x13,0xF0,
+
+	0x90,0x43,0x4D,0x74,0x07,0xF0,0x22,0xBB,
+
+	0x01,0x06,0x89,0x82,0x8A,0x83,0xE0,0x22,
+
+	0x50,0x02,0xE7,0x22,0xBB,0xFE,0x02,0xE3,
+
+	0x22,0x89,0x82,0x8A,0x83,0xE4,0x93,0x22,
+
+	0xEF,0x8D,0xF0,0xA4,0xA8,0xF0,0xCF,0x8C,
+
+	0xF0,0xA4,0x28,0xCE,0x8D,0xF0,0xA4,0x2E,
+
+	0xFE,0x22,0xBC,0x00,0x0B,0xBE,0x00,0x29,
+
+	0xEF,0x8D,0xF0,0x84,0xFF,0xAD,0xF0,0x22,
+
+	0xE4,0xCC,0xF8,0x75,0xF0,0x08,0xEF,0x2F,
+
+	0xFF,0xEE,0x33,0xFE,0xEC,0x33,0xFC,0xEE,
+
+	0x9D,0xEC,0x98,0x40,0x05,0xFC,0xEE,0x9D,
+
+	0xFE,0x0F,0xD5,0xF0,0xE9,0xE4,0xCE,0xFD,
+
+	0x22,0xED,0xF8,0xF5,0xF0,0xEE,0x84,0x20,
+
+	0xD2,0x1C,0xFE,0xAD,0xF0,0x75,0xF0,0x08,
+
+	0xEF,0x2F,0xFF,0xED,0x33,0xFD,0x40,0x07,
+
+	0x98,0x50,0x06,0xD5,0xF0,0xF2,0x22,0xC3,
+
+	0x98,0xFD,0x0F,0xD5,0xF0,0xEA,0x22,0xC2,
+
+	0xD5,0xEC,0x30,0xE7,0x09,0xB2,0xD5,0xE4,
+
+	0xC3,0x9D,0xFD,0xE4,0x9C,0xFC,0xEE,0x30,
+
+	0xE7,0x15,0xB2,0xD5,0xE4,0xC3,0x9F,0xFF,
+
+	0xE4,0x9E,0xFE,0x12,0x4A,0x23,0xC3,0xE4,
+
+	0x9D,0xFD,0xE4,0x9C,0xFC,0x80,0x03,0x12,
+
+	0x4A,0x23,0x30,0xD5,0x07,0xC3,0xE4,0x9F,
+
+	0xFF,0xE4,0x9E,0xFE,0x22,0xE8,0x8F,0xF0,
+
+	0xA4,0xCC,0x8B,0xF0,0xA4,0x2C,0xFC,0xE9,
+
+	0x8E,0xF0,0xA4,0x2C,0xFC,0x8A,0xF0,0xED,
+
+	0xA4,0x2C,0xFC,0xEA,0x8E,0xF0,0xA4,0xCD,
+
+	0xA8,0xF0,0x8B,0xF0,0xA4,0x2D,0xCC,0x38,
+
+	0x25,0xF0,0xFD,0xE9,0x8F,0xF0,0xA4,0x2C,
+
+	0xCD,0x35,0xF0,0xFC,0xEB,0x8E,0xF0,0xA4,
+
+	0xFE,0xA9,0xF0,0xEB,0x8F,0xF0,0xA4,0xCF,
+
+	0xC5,0xF0,0x2E,0xCD,0x39,0xFE,0xE4,0x3C,
+
+	0xFC,0xEA,0xA4,0x2D,0xCE,0x35,0xF0,0xFD,
+
+	0xE4,0x3C,0xFC,0x22,0xC3,0xE4,0x9F,0xFF,
+
+	0xE4,0x9E,0xFE,0xE4,0x9D,0xFD,0xE4,0x9C,
+
+	0xFC,0x22,0xEB,0x9F,0xF5,0xF0,0xEA,0x9E,
+
+	0x42,0xF0,0xE9,0x9D,0x42,0xF0,0xEC,0x64,
+
+	0x80,0xC8,0x64,0x80,0x98,0x45,0xF0,0x22,
+
+	0xEB,0x9F,0xF5,0xF0,0xEA,0x9E,0x42,0xF0,
+
+	0xE9,0x9D,0x42,0xF0,0xE8,0x9C,0x45,0xF0,
+
+	0x22,0xE8,0x60,0x0F,0xEC,0xC3,0x13,0xFC,
+
+	0xED,0x13,0xFD,0xEE,0x13,0xFE,0xEF,0x13,
+
+	0xFF,0xD8,0xF1,0x22,0xE8,0x60,0x10,0xEC,
+
+	0xA2,0xE7,0x13,0xFC,0xED,0x13,0xFD,0xEE,
+
+	0x13,0xFE,0xEF,0x13,0xFF,0xD8,0xF0,0x22,
+
+	0xE8,0x60,0x0F,0xEF,0xC3,0x33,0xFF,0xEE,
+
+	0x33,0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,
+
+	0xD8,0xF1,0x22,0xEC,0xF0,0xA3,0xED,0xF0,
+
+	0xA3,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0xA8,
+
+	0x82,0x85,0x83,0xF0,0xD0,0x83,0xD0,0x82,
+
+	0x12,0x4B,0x8F,0x12,0x4B,0x8F,0x12,0x4B,
+
+	0x8F,0x12,0x4B,0x8F,0xE4,0x73,0xE4,0x93,
+
+	0xA3,0xC5,0x83,0xC5,0xF0,0xC5,0x83,0xC8,
+
+	0xC5,0x82,0xC8,0xF0,0xA3,0xC5,0x83,0xC5,
+
+	0xF0,0xC5,0x83,0xC8,0xC5,0x82,0xC8,0x22,
+
+	0x8A,0x83,0x89,0x82,0xE4,0x73,0xBB,0x01,
+
+	0x0C,0xE5,0x82,0x29,0xF5,0x82,0xE5,0x83,
+
+	0x3A,0xF5,0x83,0xE0,0x22,0x50,0x06,0xE9,
+
+	0x25,0x82,0xF8,0xE6,0x22,0xBB,0xFE,0x06,
+
+	0xE9,0x25,0x82,0xF8,0xE2,0x22,0xE5,0x82,
+
+	0x29,0xF5,0x82,0xE5,0x83,0x3A,0xF5,0x83,
+
+	0xE4,0x93,0x22,0xF8,0xBB,0x01,0x0D,0xE5,
+
+	0x82,0x29,0xF5,0x82,0xE5,0x83,0x3A,0xF5,
+
+	0x83,0xE8,0xF0,0x22,0x50,0x06,0xE9,0x25,
+
+	0x82,0xC8,0xF6,0x22,0xBB,0xFE,0x05,0xE9,
+
+	0x25,0x82,0xC8,0xF2,0x22,0xBB,0x01,0x0A,
+
+	0x89,0x82,0x8A,0x83,0xE0,0xF5,0xF0,0xA3,
+
+	0xE0,0x22,0x50,0x06,0x87,0xF0,0x09,0xE7,
+
+	0x19,0x22,0xBB,0xFE,0x07,0xE3,0xF5,0xF0,
+
+	0x09,0xE3,0x19,0x22,0x89,0x82,0x8A,0x83,
+
+	0xE4,0x93,0xF5,0xF0,0x74,0x01,0x93,0x22,
+
+	0xBB,0x01,0x10,0xE5,0x82,0x29,0xF5,0x82,
+
+	0xE5,0x83,0x3A,0xF5,0x83,0xE0,0xF5,0xF0,
+
+	0xA3,0xE0,0x22,0x50,0x09,0xE9,0x25,0x82,
+
+	0xF8,0x86,0xF0,0x08,0xE6,0x22,0xBB,0xFE,
+
+	0x0A,0xE9,0x25,0x82,0xF8,0xE2,0xF5,0xF0,
+
+	0x08,0xE2,0x22,0xE5,0x83,0x2A,0xF5,0x83,
+
+	0xE9,0x93,0xF5,0xF0,0xA3,0xE9,0x93,0x22,
+
+	0xBB,0x01,0x0A,0x89,0x82,0x8A,0x83,0xF0,
+
+	0xE5,0xF0,0xA3,0xF0,0x22,0x50,0x06,0xF7,
+
+	0x09,0xA7,0xF0,0x19,0x22,0xBB,0xFE,0x06,
+
+	0xF3,0xE5,0xF0,0x09,0xF3,0x19,0x22,0xF8,
+
+	0xBB,0x01,0x11,0xE5,0x82,0x29,0xF5,0x82,
+
+	0xE5,0x83,0x3A,0xF5,0x83,0xE8,0xF0,0xE5,
+
+	0xF0,0xA3,0xF0,0x22,0x50,0x09,0xE9,0x25,
+
+	0x82,0xC8,0xF6,0x08,0xA6,0xF0,0x22,0xBB,
+
+	0xFE,0x09,0xE9,0x25,0x82,0xC8,0xF2,0xE5,
+
+	0xF0,0x08,0xF2,0x22,0x75,0xF0,0x08,0x75,
+
+	0x82,0x00,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
+
+	0xCD,0x33,0xCD,0xCC,0x33,0xCC,0xC5,0x82,
+
+	0x33,0xC5,0x82,0x9B,0xED,0x9A,0xEC,0x99,
+
+	0xE5,0x82,0x98,0x40,0x0C,0xF5,0x82,0xEE,
+
+	0x9B,0xFE,0xED,0x9A,0xFD,0xEC,0x99,0xFC,
+
+	0x0F,0xD5,0xF0,0xD6,0xE4,0xCE,0xFB,0xE4,
+
+	0xCD,0xFA,0xE4,0xCC,0xF9,0xA8,0x82,0x22,
+
+	0xB8,0x00,0xC1,0xB9,0x00,0x59,0xBA,0x00,
+
+	0x2D,0xEC,0x8B,0xF0,0x84,0xCF,0xCE,0xCD,
+
+	0xFC,0xE5,0xF0,0xCB,0xF9,0x78,0x18,0xEF,
+
+	0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,
+
+	0xEC,0x33,0xFC,0xEB,0x33,0xFB,0x10,0xD7,
+
+	0x03,0x99,0x40,0x04,0xEB,0x99,0xFB,0x0F,
+
+	0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,
+
+	0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33,
+
+	0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,
+
+	0xD7,0x05,0x9B,0xE9,0x9A,0x40,0x07,0xEC,
+
+	0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,
+
+	0xE4,0xC9,0xFA,0xE4,0xCC,0xFB,0x22,0x75,
+
+	0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
+
+	0xED,0x33,0xFD,0xCC,0x33,0xCC,0xC8,0x33,
+
+	0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,
+
+	0x99,0x40,0x0A,0xED,0x9B,0xFD,0xEC,0x9A,
+
+	0xFC,0xE8,0x99,0xF8,0x0F,0xD5,0xF0,0xDA,
+
+	0xE4,0xCD,0xFB,0xE4,0xCC,0xFA,0xE4,0xC8,
+
+	0xF9,0x22,0x90,0x44,0x7E,0xEF,0xF0,0xA9,
+
+	0x05,0xE4,0x90,0x44,0x84,0xF0,0xFB,0x90,
+
+	0x43,0x60,0xE0,0xFD,0xEB,0xC3,0x9D,0x50,
+
+	0x4F,0x90,0xF5,0xF1,0xE0,0xFF,0xEB,0x25,
+
+	0xE0,0x24,0x50,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xEF,0xF0,0x90,0xF5,0xF0,0xE0,
+
+	0xFF,0xEB,0x25,0xE0,0x24,0x51,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xEF,0xF0,0x90,
+
+	0xF5,0xF1,0xE0,0xFF,0xEB,0x25,0xE0,0x24,
+
+	0x58,0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,
+
+	0xEF,0xF0,0x90,0xF5,0xF0,0xE0,0xFF,0xEB,
+
+	0x25,0xE0,0x24,0x59,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0xEF,0xF0,0x0B,0x80,0xA7,
+
+	0x90,0x41,0xEF,0xED,0xF0,0x90,0x43,0x50,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xEE,0xC3,0x13,
+
+	0xFE,0xEF,0x13,0xFF,0x90,0x44,0x7F,0xEE,
+
+	0xF0,0xA3,0xEF,0xF0,0x7A,0x01,0x90,0x41,
+
+	0xEF,0xE0,0xFF,0xEA,0xC3,0x9F,0x50,0x4E,
+
+	0xEA,0x25,0xE0,0x24,0x50,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,0xE0,
+
+	0x78,0x02,0xCE,0xC3,0x13,0xCE,0x13,0xD8,
+
+	0xF9,0xFD,0xAC,0x06,0xEA,0x25,0xE0,0x24,
+
+	0x50,0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xEE,0xC3,0x13,
+
+	0xFE,0xEF,0x13,0x2D,0xFF,0xEE,0x3C,0xFE,
+
+	0x90,0x44,0x7F,0xE0,0xFC,0xA3,0xE0,0xC3,
+
+	0x9F,0xEC,0x9E,0x50,0x06,0x90,0x43,0x4C,
+
+	0x74,0x01,0xF0,0x0A,0x80,0xA8,0x90,0x43,
+
+	0x78,0xE0,0xFE,0x70,0x14,0x90,0x41,0xEF,
+
+	0xE0,0x64,0x01,0x70,0x31,0x90,0x43,0x78,
+
+	0x04,0xF0,0x90,0xF5,0xE2,0xE9,0xF0,0x80,
+
+	0x25,0xEE,0xB4,0x01,0x17,0x90,0x41,0xEF,
+
+	0xE0,0xB4,0x01,0x08,0x90,0x43,0x78,0x74,
+
+	0x03,0xF0,0x80,0x12,0x90,0x43,0x78,0x74,
+
+	0x02,0xF0,0x80,0x0A,0x90,0x43,0x78,0xE0,
+
+	0xB4,0x02,0x03,0x74,0x03,0xF0,0x90,0x43,
+
+	0x78,0xE0,0xB4,0x03,0x0F,0x90,0x42,0x0F,
+
+	0xE0,0x14,0x90,0x43,0x77,0xF0,0x90,0x41,
+
+	0xEF,0x74,0x01,0xF0,0x90,0x44,0x7E,0xE0,
+
+	0x60,0x03,0x02,0x50,0xDD,0x7A,0x01,0x90,
+
+	0x43,0x60,0xE0,0xFF,0xEA,0xC3,0x9F,0x50,
+
+	0x34,0xEA,0x25,0xE0,0x24,0x58,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x43,0x58,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xC3,0xEF,0x9D,0xFF,0xEE,0x9C,
+
+	0xFE,0xEA,0x25,0xE0,0x24,0x77,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x0A,0x80,0xC2,0x90,0x43,0x8A,
+
+	0xE0,0xFC,0x70,0x39,0xFA,0x90,0x43,0x60,
+
+	0xE0,0xFF,0xEA,0xC3,0x9F,0x50,0x25,0xEA,
+
+	0x25,0xE0,0x24,0x79,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0xEA,0x25,0xE0,0x24,0x81,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x0A,0x80,0xD1,0x90,0x41,0xEF,0xE0,
+
+	0x90,0x43,0x8A,0xF0,0x22,0xEC,0x64,0x01,
+
+	0x70,0x03,0x02,0x50,0x96,0x90,0x44,0x83,
+
+	0x74,0x01,0xF0,0x90,0x44,0x82,0xF0,0xE4,
+
+	0xFA,0xF9,0xE9,0x25,0xE0,0x24,0x81,0xF5,
+
+	0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0xEA,0x25,0xE0,0x24,0x79,
+
+	0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,
+
+	0xFC,0xA3,0xE0,0xC3,0x9F,0xFF,0xEC,0x9E,
+
+	0xFE,0xC3,0x64,0x80,0x94,0x80,0x50,0x24,
+
+	0xC3,0xE4,0x9F,0xFF,0xE4,0x9E,0xFE,0x90,
+
+	0x43,0x60,0xE0,0x24,0xFE,0xFD,0xEA,0xC3,
+
+	0x9D,0x50,0x03,0x0A,0x80,0x06,0x90,0x44,
+
+	0x84,0x74,0x01,0xF0,0x90,0x44,0x81,0x74,
+
+	0x01,0xF0,0x80,0x1A,0xE4,0x90,0x44,0x81,
+
+	0xF0,0x90,0x43,0x8A,0xE0,0x24,0xFE,0xFD,
+
+	0xE9,0xC3,0x9D,0x50,0x03,0x09,0x80,0x06,
+
+	0x90,0x44,0x84,0x74,0x01,0xF0,0x90,0x42,
+
+	0x12,0xE0,0xFD,0xC3,0xEF,0x9D,0x74,0x80,
+
+	0xF8,0x6E,0x98,0x40,0x2A,0x90,0x43,0x50,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xEE,0x13,0xFE,
+
+	0xEF,0x13,0xFF,0x90,0x44,0x83,0xE0,0x25,
+
+	0xE0,0x24,0x50,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xE0,0xFC,0xA3,0xE0,0xD3,0x9F,
+
+	0xEC,0x9E,0x50,0x03,0x02,0x50,0x75,0x90,
+
+	0x44,0x83,0xE0,0xFC,0x25,0xE0,0x24,0x58,
+
+	0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x44,0x82,0xE0,
+
+	0xFD,0x25,0xE0,0x24,0x58,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0xEC,0x25,0xE0,0x24,0x50,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0xED,0x25,0xE0,0x24,0x50,0xF5,
+
+	0x82,0xE4,0x34,0x43,0xF5,0x83,0xEE,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x44,0x82,0xE0,0x04,
+
+	0xF0,0x90,0x44,0x81,0xE0,0xB4,0x01,0x17,
+
+	0x90,0x43,0x8A,0xE0,0x24,0xFE,0xFF,0xE9,
+
+	0xC3,0x9F,0x50,0x03,0x09,0x80,0x1D,0x90,
+
+	0x44,0x84,0x74,0x01,0xF0,0x80,0x15,0x90,
+
+	0x43,0x60,0xE0,0x24,0xFE,0xFF,0xEA,0xC3,
+
+	0x9F,0x50,0x03,0x0A,0x80,0x06,0x90,0x44,
+
+	0x84,0x74,0x01,0xF0,0x90,0x44,0x82,0xE0,
+
+	0x90,0x41,0xEF,0xF0,0xEA,0x04,0x90,0x44,
+
+	0x83,0xF0,0xA3,0xE0,0x64,0x01,0x60,0x03,
+
+	0x02,0x4F,0x4B,0x90,0x41,0xEF,0xE0,0x90,
+
+	0x43,0x8A,0xF0,0x80,0x06,0x90,0x41,0xEF,
+
+	0x74,0x01,0xF0,0x7B,0x01,0x90,0x43,0x8A,
+
+	0xE0,0x14,0xFF,0xEB,0xC3,0x9F,0x50,0x34,
+
+	0xEB,0x25,0xE0,0x24,0x58,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0x90,0x43,0x58,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xC3,0xEF,0x9D,0xFF,0xEE,0x9C,0xFE,
+
+	0xEB,0x25,0xE0,0x24,0x7F,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xEE,0xF0,0xA3,0xEF,
+
+	0xF0,0x0B,0x80,0xC1,0x22,0x90,0xF9,0x00,
+
+	0xE0,0x70,0x0A,0x90,0x42,0x72,0xF0,0xA3,
+
+	0x74,0x32,0xF0,0x80,0x1B,0x90,0xF9,0x00,
+
+	0xE0,0xB4,0x01,0x0B,0x90,0x42,0x72,0xE4,
+
+	0xF0,0xA3,0x74,0xC8,0xF0,0x80,0x09,0x90,
+
+	0x42,0x72,0xE4,0xF0,0xA3,0x74,0x64,0xF0,
+
+	0x90,0x41,0xE2,0x74,0x40,0xF0,0x12,0x5A,
+
+	0x62,0x7F,0x01,0x12,0xAE,0x43,0x90,0x42,
+
+	0x72,0xE4,0xF0,0xA3,0x74,0x1E,0xF0,0x90,
+
+	0x41,0xE2,0x74,0x50,0xF0,0x12,0x5A,0x62,
+
+	0x90,0xF4,0x0C,0xE0,0x60,0x5A,0x90,0xF1,
+
+	0xEB,0x74,0x01,0xF0,0xE4,0xF0,0x90,0xF9,
+
+	0x00,0xE0,0x70,0x0A,0x90,0x42,0x72,0xF0,
+
+	0xA3,0x74,0x96,0xF0,0x80,0x1D,0x90,0xF9,
+
+	0x00,0xE0,0xB4,0x01,0x0C,0x90,0x42,0x72,
+
+	0x74,0x02,0xF0,0xA3,0x74,0x58,0xF0,0x80,
+
+	0x0A,0x90,0x42,0x72,0x74,0x01,0xF0,0xA3,
+
+	0x74,0x2C,0xF0,0x7F,0x01,0x12,0xAE,0x43,
+
+	0x90,0x41,0xE2,0x74,0x60,0xF0,0x12,0x5A,
+
+	0x62,0x90,0x42,0x72,0xE4,0xF0,0xA3,0x74,
+
+	0x1E,0xF0,0x7F,0x01,0x12,0xAE,0x43,0x90,
+
+	0x41,0xE2,0x74,0x70,0xF0,0x12,0x5A,0x62,
+
+	0x90,0xF4,0x0C,0xE0,0x60,0x10,0x90,0x41,
+
+	0xD8,0x74,0x02,0xF0,0x90,0xF2,0x1C,0xF0,
+
+	0xE4,0x90,0x43,0xBB,0xF0,0x22,0x90,0x41,
+
+	0xD8,0x74,0x01,0xF0,0x90,0xF2,0x1C,0xF0,
+
+	0x90,0x43,0xBB,0xF0,0xE4,0x90,0x42,0x6E,
+
+	0xF0,0x90,0xF1,0xB5,0xE0,0x90,0x42,0x6F,
+
+	0xF0,0x90,0xF1,0xB4,0xE0,0x90,0x42,0x70,
+
+	0xF0,0x90,0xF1,0xB3,0xE0,0x90,0x42,0x71,
+
+	0xF0,0x90,0x42,0x6E,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x42,0x60,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
+
+	0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0xEF,0x9B,
+
+	0xFF,0xEE,0x9A,0xFE,0xED,0x99,0xFD,0xEC,
+
+	0x98,0xFC,0x90,0x42,0x6E,0x12,0x4B,0x6C,
+
+	0x7F,0xFF,0x7E,0xFF,0x7D,0x3F,0x7C,0x00,
+
+	0x90,0x42,0x6E,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xD3,0x12,
+
+	0x4B,0x0B,0x40,0x21,0x90,0x42,0x6E,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0x24,0x00,0xFF,0xE4,0x3E,0xFE,0xED,
+
+	0x34,0x80,0xFD,0xEC,0x34,0xFF,0xFC,0x90,
+
+	0x42,0x6E,0x12,0x4B,0x6C,0x90,0x42,0x6E,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x78,0x09,0x12,0x4B,0x45,
+
+	0x90,0x42,0x6E,0x12,0x4B,0x6C,0x90,0x43,
+
+	0xE1,0xE0,0x60,0x04,0x7F,0x01,0x80,0x02,
+
+	0x7F,0x00,0x90,0x42,0x1F,0xE0,0x5F,0x70,
+
+	0x0F,0x90,0xF1,0x33,0xE0,0x70,0x09,0x90,
+
+	0xF1,0x35,0xE0,0x70,0x03,0x02,0x54,0x10,
+
+	0xE4,0x90,0x42,0x60,0xF0,0xA3,0xF0,0x90,
+
+	0xF1,0x0F,0xE0,0x90,0x42,0x62,0xF0,0x90,
+
+	0xF1,0x0E,0xE0,0x90,0x42,0x63,0xF0,0x90,
+
+	0x42,0x60,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x42,0x6E,
+
+	0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,
+
+	0xA3,0xE0,0x2F,0xFF,0xEA,0x3E,0xFE,0xE9,
+
+	0x3D,0xFD,0xE8,0x3C,0xFC,0x90,0x42,0x60,
+
+	0x12,0x4B,0x6C,0xE4,0xFF,0x7E,0x40,0xFD,
+
+	0xFC,0x90,0x42,0x60,0xE0,0xF8,0xA3,0xE0,
+
+	0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,
+
+	0x12,0x4B,0x0B,0x40,0x24,0x90,0x42,0x60,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,
+
+	0xA3,0xE0,0x24,0x00,0xFF,0xEE,0x34,0xC0,
+
+	0xFE,0xED,0x34,0xFF,0xFD,0xEC,0x34,0xFF,
+
+	0xFC,0x90,0x42,0x60,0x12,0x4B,0x6C,0x80,
+
+	0x39,0xE4,0xFF,0xFE,0xFD,0xFC,0x90,0x42,
+
+	0x60,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,
+
+	0xFA,0xA3,0xE0,0xFB,0xC3,0x12,0x4B,0x0B,
+
+	0x50,0x20,0x90,0x42,0x60,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0x24,
+
+	0x00,0xFF,0xEE,0x34,0x40,0xFE,0xE4,0x3D,
+
+	0xFD,0xE4,0x3C,0xFC,0x90,0x42,0x60,0x12,
+
+	0x4B,0x6C,0x90,0x42,0x63,0xE0,0x90,0xF1,
+
+	0x0E,0xF0,0x90,0x42,0x62,0xE0,0x90,0xF1,
+
+	0x0F,0xF0,0xE4,0x90,0x42,0x60,0xF0,0xA3,
+
+	0xF0,0x90,0xF1,0x13,0xE0,0x90,0x42,0x62,
+
+	0xF0,0x90,0xF1,0x12,0xE0,0x90,0x42,0x63,
+
+	0xF0,0x90,0x42,0x60,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x42,0x6E,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
+
+	0xE0,0xFA,0xA3,0xE0,0x2F,0xFF,0xEA,0x3E,
+
+	0xFE,0xE9,0x3D,0xFD,0xE8,0x3C,0xFC,0x90,
+
+	0x42,0x60,0x12,0x4B,0x6C,0xE4,0xFF,0x7E,
+
+	0x40,0xFD,0xFC,0x90,0x42,0x60,0xE0,0xF8,
+
+	0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,
+
+	0xFB,0xC3,0x12,0x4B,0x0B,0x40,0x24,0x90,
+
+	0x42,0x60,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFE,0xA3,0xE0,0x24,0x00,0xFF,0xEE,
+
+	0x34,0xC0,0xFE,0xED,0x34,0xFF,0xFD,0xEC,
+
+	0x34,0xFF,0xFC,0x90,0x42,0x60,0x12,0x4B,
+
+	0x6C,0x80,0x39,0xE4,0xFF,0xFE,0xFD,0xFC,
+
+	0x90,0x42,0x60,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0x12,
+
+	0x4B,0x0B,0x50,0x20,0x90,0x42,0x60,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0x24,0x00,0xFF,0xEE,0x34,0x40,0xFE,
+
+	0xE4,0x3D,0xFD,0xE4,0x3C,0xFC,0x90,0x42,
+
+	0x60,0x12,0x4B,0x6C,0x90,0x42,0x63,0xE0,
+
+	0x90,0xF1,0x12,0xF0,0x90,0x42,0x62,0xE0,
+
+	0x90,0xF1,0x13,0xF0,0x90,0x43,0xDF,0xE0,
+
+	0x70,0x05,0x90,0xF1,0x0A,0x04,0xF0,0xE4,
+
+	0x90,0x42,0x60,0xF0,0x90,0xF1,0xB5,0xE0,
+
+	0x90,0x42,0x61,0xF0,0x90,0xF1,0xB4,0xE0,
+
+	0x90,0x42,0x62,0xF0,0x90,0xF1,0xB3,0xE0,
+
+	0x90,0x42,0x63,0xF0,0x22,0xE4,0x90,0x43,
+
+	0xEE,0xF0,0x90,0x43,0xE1,0xF0,0x90,0x42,
+
+	0x21,0xE0,0x90,0x44,0x8D,0xF0,0x90,0x42,
+
+	0x22,0xE0,0x90,0x44,0x8C,0xF0,0x90,0xF6,
+
+	0x25,0xE4,0xF0,0x90,0x42,0x20,0xE0,0x90,
+
+	0xF6,0x26,0xF0,0x90,0xF6,0x2B,0x74,0x02,
+
+	0xF0,0xA3,0xF0,0xA3,0xE4,0xF0,0x90,0xF6,
+
+	0x25,0x04,0xF0,0x90,0xF6,0x2F,0xF0,0x90,
+
+	0xF6,0x2F,0xE0,0xB4,0x01,0xF9,0x90,0xF6,
+
+	0x32,0xE0,0x90,0x43,0xF0,0xF0,0x90,0xF6,
+
+	0x33,0xE0,0x90,0x43,0xEF,0xF0,0x90,0x44,
+
+	0x8C,0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x90,
+
+	0x43,0xF0,0xE0,0x9F,0x90,0x43,0xEF,0xE0,
+
+	0x9E,0x40,0x03,0x02,0x57,0x34,0x90,0x44,
+
+	0x8C,0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x90,
+
+	0x43,0xF0,0xE0,0x9F,0x90,0x43,0xEF,0xE0,
+
+	0x9E,0x50,0x3A,0x90,0xF6,0x2C,0xE0,0xB4,
+
+	0x02,0x05,0x74,0x01,0xF0,0x80,0x0A,0x90,
+
+	0xF6,0x2B,0xE0,0x04,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0x90,0xF6,0x2F,0x74,0x01,0xF0,0x90,
+
+	0xF6,0x2F,0xE0,0xB4,0x01,0xF9,0x90,0xF6,
+
+	0x32,0xE0,0x90,0x43,0xF0,0xF0,0x90,0xF6,
+
+	0x33,0xE0,0x90,0x43,0xEF,0xF0,0x90,0xF6,
+
+	0x2B,0xE0,0xB4,0x0F,0xB1,0x90,0x42,0x23,
+
+	0xE0,0xFF,0x90,0xF6,0x2B,0xE0,0xC3,0x9F,
+
+	0x40,0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,
+
+	0x90,0x43,0xDF,0xEF,0xF0,0x60,0x5C,0x90,
+
+	0xF1,0x2F,0xE4,0xF0,0x90,0xF1,0x34,0x04,
+
+	0xF0,0x90,0xF1,0x37,0x74,0x10,0xF0,0xA3,
+
+	0x74,0x06,0xF0,0x90,0xF1,0x3B,0x74,0x60,
+
+	0xF0,0xA3,0x74,0x1A,0xF0,0x90,0xF1,0x3F,
+
+	0x74,0xC0,0xF0,0xA3,0x74,0x2D,0xF0,0x90,
+
+	0xF1,0x33,0x74,0x01,0xF0,0x90,0xF1,0x36,
+
+	0x74,0x0D,0xF0,0x90,0xF1,0x39,0x74,0x10,
+
+	0xF0,0xA3,0x74,0x18,0xF0,0x90,0xF1,0x3D,
+
+	0x74,0x60,0xF0,0xA3,0x74,0x1B,0xF0,0x90,
+
+	0xF1,0x41,0x74,0x40,0xF0,0xA3,0x74,0x3A,
+
+	0xF0,0x90,0xF1,0x35,0x74,0x01,0xF0,0x90,
+
+	0xF1,0x11,0xF0,0x90,0xF6,0x2B,0xE0,0x14,
+
+	0xF0,0xC2,0xAF,0x90,0xF6,0x2D,0x74,0x01,
+
+	0xF0,0x90,0xF6,0x2F,0xF0,0x90,0xF6,0x2F,
+
+	0xE0,0xB4,0x01,0xF9,0xD2,0xAF,0x90,0xF6,
+
+	0x4C,0xE0,0x90,0x44,0x8F,0xF0,0x90,0xF6,
+
+	0x4D,0xE0,0x90,0x44,0x90,0xF0,0x90,0xF6,
+
+	0x4E,0xE0,0x90,0x44,0x91,0xF0,0x90,0xF6,
+
+	0x4F,0xE0,0x90,0x44,0x92,0xF0,0x90,0x44,
+
+	0x90,0xE0,0xFF,0x90,0x44,0x8F,0xE0,0xFE,
+
+	0x6F,0x60,0x20,0x90,0x44,0x91,0xE0,0xFD,
+
+	0xEE,0x6D,0x60,0x17,0xA3,0xE0,0xFC,0xEE,
+
+	0x6C,0x60,0x10,0xEF,0x6D,0x60,0x0C,0x90,
+
+	0x44,0x90,0xE0,0x6C,0x60,0x05,0xA3,0xE0,
+
+	0xB5,0x04,0x06,0x90,0x43,0xEE,0x74,0x01,
+
+	0xF0,0x90,0x44,0x8E,0x74,0x04,0xF0,0x90,
+
+	0x44,0x8E,0xE0,0xFF,0xC3,0x94,0x06,0x40,
+
+	0x03,0x02,0x57,0x34,0x90,0xF6,0x4C,0xE0,
+
+	0x6F,0x70,0x4B,0x90,0x43,0xEE,0xE0,0xB4,
+
+	0x01,0x21,0x90,0x44,0x8E,0xE0,0xB4,0x05,
+
+	0x1A,0x90,0x43,0xE3,0x74,0xAC,0xF0,0x90,
+
+	0x43,0xE2,0x74,0x0D,0xF0,0x90,0x43,0xE5,
+
+	0x74,0x9F,0xF0,0x90,0x43,0xE4,0x74,0x1A,
+
+	0xF0,0x80,0x20,0x90,0xF6,0x34,0xE0,0x90,
+
+	0x43,0xE3,0xF0,0x90,0xF6,0x35,0xE0,0x90,
+
+	0x43,0xE2,0xF0,0x90,0xF6,0x36,0xE0,0x90,
+
+	0x43,0xE5,0xF0,0x90,0xF6,0x37,0xE0,0x90,
+
+	0x43,0xE4,0xF0,0x12,0x75,0xDF,0x90,0x44,
+
+	0x8E,0xE0,0xFF,0x90,0xF6,0x4D,0xE0,0x6F,
+
+	0x70,0x48,0x90,0x43,0xEE,0xE0,0xB4,0x01,
+
+	0x1E,0xEF,0xB4,0x05,0x1A,0x90,0x43,0xE3,
+
+	0x74,0xAC,0xF0,0x90,0x43,0xE2,0x74,0x0D,
+
+	0xF0,0x90,0x43,0xE5,0x74,0x9F,0xF0,0x90,
+
+	0x43,0xE4,0x74,0x1A,0xF0,0x80,0x20,0x90,
+
+	0xF6,0x3A,0xE0,0x90,0x43,0xE3,0xF0,0x90,
+
+	0xF6,0x3B,0xE0,0x90,0x43,0xE2,0xF0,0x90,
+
+	0xF6,0x3C,0xE0,0x90,0x43,0xE5,0xF0,0x90,
+
+	0xF6,0x3D,0xE0,0x90,0x43,0xE4,0xF0,0x12,
+
+	0x75,0xDF,0x90,0x44,0x8E,0xE0,0xFF,0x90,
+
+	0xF6,0x4E,0xE0,0x6F,0x70,0x48,0x90,0x43,
+
+	0xEE,0xE0,0xB4,0x01,0x1E,0xEF,0xB4,0x05,
+
+	0x1A,0x90,0x43,0xE3,0x74,0xAC,0xF0,0x90,
+
+	0x43,0xE2,0x74,0x0D,0xF0,0x90,0x43,0xE5,
+
+	0x74,0x9F,0xF0,0x90,0x43,0xE4,0x74,0x1A,
+
+	0xF0,0x80,0x20,0x90,0xF6,0x40,0xE0,0x90,
+
+	0x43,0xE3,0xF0,0x90,0xF6,0x41,0xE0,0x90,
+
+	0x43,0xE2,0xF0,0x90,0xF6,0x42,0xE0,0x90,
+
+	0x43,0xE5,0xF0,0x90,0xF6,0x43,0xE0,0x90,
+
+	0x43,0xE4,0xF0,0x12,0x75,0xDF,0x90,0x44,
+
+	0x8E,0xE0,0xFF,0x90,0xF6,0x4F,0xE0,0x6F,
+
+	0x70,0x48,0x90,0x43,0xEE,0xE0,0xB4,0x01,
+
+	0x1E,0xEF,0xB4,0x05,0x1A,0x90,0x43,0xE3,
+
+	0x74,0xAC,0xF0,0x90,0x43,0xE2,0x74,0x0D,
+
+	0xF0,0x90,0x43,0xE5,0x74,0x9F,0xF0,0x90,
+
+	0x43,0xE4,0x74,0x1A,0xF0,0x80,0x20,0x90,
+
+	0xF6,0x46,0xE0,0x90,0x43,0xE3,0xF0,0x90,
+
+	0xF6,0x47,0xE0,0x90,0x43,0xE2,0xF0,0x90,
+
+	0xF6,0x48,0xE0,0x90,0x43,0xE5,0xF0,0x90,
+
+	0xF6,0x49,0xE0,0x90,0x43,0xE4,0xF0,0x12,
+
+	0x75,0xDF,0x90,0x44,0x8E,0xE0,0x04,0xF0,
+
+	0x02,0x55,0xD0,0x90,0xF6,0x25,0xE4,0xF0,
+
+	0x90,0x43,0xDF,0xE0,0x70,0x0D,0x90,0x43,
+
+	0xE1,0xE0,0xB4,0x01,0x06,0x90,0xF1,0x0A,
+
+	0x74,0x01,0xF0,0x7F,0x01,0x12,0xAE,0x43,
+
+	0x22,0x90,0xF4,0xC1,0xE0,0xC3,0x94,0x01,
+
+	0x50,0x03,0x02,0x5A,0x4D,0x90,0x43,0x26,
+
+	0xE0,0x70,0x1E,0x90,0x43,0x12,0x12,0x4B,
+
+	0x78,0x00,0x00,0x00,0x00,0x90,0x43,0x16,
+
+	0x12,0x4B,0x78,0x00,0x00,0x00,0x00,0x90,
+
+	0x43,0x0E,0x12,0x4B,0x78,0x00,0x00,0x00,
+
+	0x00,0x90,0x43,0x25,0xE0,0x25,0xE0,0x24,
+
+	0x36,0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x43,0x23,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x90,0xF9,0x00,0xE0,
+
+	0x70,0x19,0x90,0x43,0x23,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x7C,0x06,0x7D,0xA8,0x12,0x4A,
+
+	0x23,0x90,0x43,0x23,0xEC,0xF0,0xA3,0xED,
+
+	0xF0,0x80,0x1E,0x90,0xF9,0x00,0xE0,0xB4,
+
+	0x02,0x17,0x90,0x43,0x23,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x7C,0x0D,0x7D,0x50,0x12,0x4A,
+
+	0x23,0x90,0x43,0x23,0xEC,0xF0,0xA3,0xED,
+
+	0xF0,0x12,0xAC,0x5B,0x12,0x8E,0xE5,0x12,
+
+	0xAD,0x5A,0x90,0x42,0xFE,0xE0,0xFF,0xC4,
+
+	0x13,0x13,0x13,0x54,0x01,0x90,0x44,0xD5,
+
+	0xF0,0xE0,0xB4,0x01,0x31,0x90,0x43,0x12,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x90,0x42,0xFE,0xE0,0xF8,
+
+	0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,
+
+	0xFB,0xC3,0xEF,0x9B,0xFF,0xEE,0x9A,0xFE,
+
+	0xED,0x99,0xFD,0xEC,0x98,0xFC,0x90,0x43,
+
+	0x12,0x12,0x4B,0x6C,0x80,0x2E,0x90,0x43,
+
+	0x12,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x42,0xFE,0xE0,
+
+	0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
+
+	0xE0,0xFB,0xEF,0x2B,0xFF,0xEE,0x3A,0xFE,
+
+	0xED,0x39,0xFD,0xEC,0x38,0xFC,0x90,0x43,
+
+	0x12,0x12,0x4B,0x6C,0x90,0x44,0xD5,0xE0,
+
+	0xB4,0x01,0x31,0x90,0x43,0x16,0xE0,0xFC,
+
+	0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0x90,0x43,0x02,0xE0,0xF8,0xA3,0xE0,
+
+	0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,
+
+	0xEF,0x9B,0xFF,0xEE,0x9A,0xFE,0xED,0x99,
+
+	0xFD,0xEC,0x98,0xFC,0x90,0x43,0x16,0x12,
+
+	0x4B,0x6C,0x80,0x2E,0x90,0x43,0x16,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x43,0x02,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xEF,0x2B,0xFF,0xEE,0x3A,0xFE,0xED,0x39,
+
+	0xFD,0xEC,0x38,0xFC,0x90,0x43,0x16,0x12,
+
+	0x4B,0x6C,0x90,0x43,0x0E,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0x90,0x43,0x06,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xEF,0x2B,
+
+	0xFF,0xEE,0x3A,0xFE,0xED,0x39,0xFD,0xEC,
+
+	0x38,0xFC,0x90,0x43,0x0E,0x12,0x4B,0x6C,
+
+	0x90,0x43,0x26,0xE0,0x04,0xF0,0xE0,0xC3,
+
+	0x94,0x64,0x50,0x03,0x02,0x5A,0x61,0x90,
+
+	0x43,0x0E,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,0x12,
+
+	0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0xEF,0x9B,0xFF,0xEE,0x9A,
+
+	0xFE,0xED,0x99,0xFD,0xEC,0x98,0xFC,0x90,
+
+	0x43,0x1A,0x12,0x4B,0x6C,0x90,0x43,0x1A,
+
+	0xE0,0xFF,0xC4,0x13,0x13,0x13,0x54,0x01,
+
+	0xFF,0xBF,0x01,0x14,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x12,
+
+	0x4A,0xFD,0x90,0x43,0x1A,0x12,0x4B,0x6C,
+
+	0x90,0x43,0x16,0xE0,0xFF,0xC4,0x13,0x13,
+
+	0x13,0x54,0x01,0xFF,0xBF,0x01,0x31,0x90,
+
+	0x43,0x1A,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,0x16,
+
+	0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0xC3,0xEF,0x9B,0xFF,0xEE,
+
+	0x9A,0xFE,0xED,0x99,0xFD,0xEC,0x98,0xFC,
+
+	0x90,0x43,0x1A,0x12,0x4B,0x6C,0x80,0x2E,
+
+	0x90,0x43,0x1A,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,
+
+	0x16,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,
+
+	0xFA,0xA3,0xE0,0xFB,0xEF,0x2B,0xFF,0xEE,
+
+	0x3A,0xFE,0xED,0x39,0xFD,0xEC,0x38,0xFC,
+
+	0x90,0x43,0x1A,0x12,0x4B,0x6C,0x90,0x43,
+
+	0x1A,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x78,0x04,0x12,0x4B,
+
+	0x59,0x90,0x43,0x0E,0xE0,0xF8,0xA3,0xE0,
+
+	0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,
+
+	0x12,0x4B,0x21,0x50,0x06,0x90,0x43,0x27,
+
+	0xE0,0x04,0xF0,0x90,0x43,0x25,0xE0,0x04,
+
+	0xF0,0xE4,0xA3,0xF0,0x90,0x43,0x25,0xE0,
+
+	0xC3,0x94,0x08,0x40,0x6B,0x90,0x43,0x27,
+
+	0xE0,0xFF,0x70,0x1A,0x90,0x42,0x38,0xF0,
+
+	0x90,0xF7,0x07,0x74,0xFC,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0x74,0xC9,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0x5E,0xF0,0x80,0x26,0xEF,0xD3,
+
+	0x94,0x07,0x40,0x20,0x90,0x42,0x38,0x74,
+
+	0x01,0xF0,0x90,0xF7,0x07,0x74,0xFC,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x7E,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x74,0x2F,0xF0,0x90,0x42,
+
+	0x39,0x74,0x01,0xF0,0x90,0x42,0xF7,0xE0,
+
+	0x04,0xF0,0xE4,0x90,0x43,0x25,0xF0,0x90,
+
+	0x43,0x27,0xF0,0x22,0x90,0xF7,0x07,0x74,
+
+	0xFC,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x7E,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x2F,0xF0,
+
+	0x22,0xE4,0x90,0x42,0x68,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0x90,0xF5,0xB3,0x04,0xF0,0x90,0xF5,0xB1,
+
+	0xE4,0xF0,0x90,0xF5,0xB0,0xF0,0x90,0xF5,
+
+	0xC2,0x04,0xF0,0x90,0xF5,0xB0,0xF0,0x90,
+
+	0xF5,0xC2,0xE4,0xF0,0x90,0x42,0x74,0xF0,
+
+	0x90,0x42,0x5F,0xE0,0x70,0x05,0x90,0x42,
+
+	0x74,0x04,0xF0,0x90,0x42,0x64,0x12,0x4B,
+
+	0x78,0x00,0x00,0x00,0x00,0x90,0xF2,0x1B,
+
+	0x74,0x40,0xF0,0xE4,0x90,0x42,0x78,0xF0,
+
+	0x90,0x42,0x74,0xE0,0xFF,0x90,0x42,0x78,
+
+	0xE0,0xFE,0xD3,0x9F,0x40,0x03,0x02,0x5B,
+
+	0x8B,0x90,0xF5,0xB8,0xEE,0xF0,0x90,0x42,
+
+	0x72,0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0xE4,
+
+	0x9F,0xFF,0xE4,0x9E,0x90,0x42,0x75,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x42,0x72,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x90,0x42,0x75,0xE0,0xFC,
+
+	0xA3,0xE0,0xFD,0xD3,0x9F,0xEE,0x64,0x80,
+
+	0xF8,0xEC,0x64,0x80,0x98,0x40,0x03,0x02,
+
+	0x5B,0x82,0xE0,0x90,0xF4,0x11,0xF0,0xEC,
+
+	0xFF,0x33,0x95,0xE0,0xA3,0xEF,0xF0,0x90,
+
+	0xF5,0xB5,0x74,0x01,0xF0,0x90,0x42,0x78,
+
+	0xE0,0xFF,0x25,0xE0,0x24,0x41,0x90,0xF2,
+
+	0x1B,0xF0,0x7D,0x80,0x7C,0x3E,0xE4,0xFF,
+
+	0x12,0xAB,0xED,0x90,0x44,0xAA,0xE0,0xB4,
+
+	0x01,0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,
+
+	0x90,0xF5,0xB5,0xE0,0x64,0x01,0x60,0x04,
+
+	0x7E,0x01,0x80,0x02,0x7E,0x00,0xEE,0x5F,
+
+	0x70,0xE1,0x90,0xF5,0xB5,0xE0,0xB4,0x01,
+
+	0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,0x90,
+
+	0x42,0x77,0xEF,0xF0,0x90,0x41,0xF8,0xF0,
+
+	0x90,0x42,0x78,0xE0,0xFD,0x25,0xE0,0x24,
+
+	0x42,0x90,0xF2,0x1B,0xF0,0x90,0x42,0x75,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x12,0x9A,0x29,
+
+	0x90,0x42,0x76,0xE0,0x04,0xF0,0x70,0x06,
+
+	0x90,0x42,0x75,0xE0,0x04,0xF0,0x02,0x5A,
+
+	0xDC,0x90,0x42,0x78,0xE0,0x04,0xF0,0x02,
+
+	0x5A,0xB1,0x90,0x42,0x68,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0xD3,0x90,0x42,0x6B,0xE0,0x9F,
+
+	0x90,0x42,0x6A,0xE0,0x9E,0x50,0x03,0x02,
+
+	0x5C,0x86,0x90,0x41,0xE7,0xE0,0x64,0x01,
+
+	0xF0,0x90,0xF0,0x76,0xF0,0xE4,0x90,0x42,
+
+	0x6E,0xF0,0x90,0xF1,0xB5,0xE0,0x90,0x42,
+
+	0x6F,0xF0,0x90,0xF1,0xB4,0xE0,0x90,0x42,
+
+	0x70,0xF0,0x90,0xF1,0xB3,0xE0,0x90,0x42,
+
+	0x71,0xF0,0xE4,0xFF,0xFE,0x7D,0x40,0xFC,
+
+	0x90,0x42,0x6E,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0x12,0x4B,
+
+	0x0B,0x40,0x23,0x90,0x42,0x6E,0xE0,0xF8,
+
+	0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,
+
+	0xFB,0xE4,0x9B,0xFF,0xE4,0x9A,0xFE,0x74,
+
+	0x80,0x99,0xFD,0xE4,0x98,0xFC,0x90,0x42,
+
+	0x6E,0x12,0x4B,0x6C,0x80,0x17,0x90,0x42,
+
+	0x6E,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x12,0x4A,0xFD,0x90,
+
+	0x42,0x6E,0x12,0x4B,0x6C,0x90,0x42,0x60,
+
+	0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0xC3,0xE4,0x9B,0xFF,0xE4,
+
+	0x9A,0xFE,0x74,0x80,0x99,0xFD,0xE4,0x98,
+
+	0xFC,0x90,0x42,0x60,0x12,0x4B,0x6C,0x90,
+
+	0xF1,0xEB,0x74,0x01,0xF0,0xE4,0xF0,0x90,
+
+	0x42,0x6F,0xE0,0x90,0xF1,0xA5,0xF0,0x90,
+
+	0x42,0x70,0xE0,0x90,0xF1,0xA4,0xF0,0x90,
+
+	0x42,0x71,0xE0,0x90,0xF1,0xA3,0xF0,0x90,
+
+	0xF1,0x14,0xE0,0x70,0x06,0x90,0xF1,0x10,
+
+	0xE0,0x60,0x1A,0x90,0xF1,0x0E,0xE0,0xF4,
+
+	0xF0,0xA3,0xE0,0xF4,0xF0,0x90,0xF1,0x12,
+
+	0xE0,0xF4,0xF0,0xA3,0xE0,0xF4,0xF0,0x90,
+
+	0xF1,0x0A,0x74,0x01,0xF0,0x90,0x42,0x6C,
+
+	0xE0,0xFF,0x33,0x95,0xE0,0x90,0xF4,0x0D,
+
+	0xEF,0xF0,0x90,0x42,0x6D,0xE0,0x90,0xF4,
+
+	0x0C,0xF0,0x90,0xF5,0xB6,0x74,0x01,0xF0,
+
+	0x90,0xF2,0x1B,0x74,0x45,0xF0,0x7D,0x80,
+
+	0x7C,0x3E,0xE4,0xFF,0x12,0xAB,0xED,0x90,
+
+	0x44,0xAA,0xE0,0xB4,0x01,0x04,0x7F,0x01,
+
+	0x80,0x02,0x7F,0x00,0x90,0xF5,0xB7,0xE0,
+
+	0x64,0x01,0x60,0x04,0x7E,0x01,0x80,0x02,
+
+	0x7E,0x00,0xEE,0x5F,0x70,0xE1,0x90,0xF5,
+
+	0xB7,0xE0,0xB4,0x01,0x04,0x7F,0x01,0x80,
+
+	0x02,0x7F,0x00,0x90,0x42,0x77,0xEF,0xF0,
+
+	0x90,0x41,0xFF,0xF0,0x90,0xF2,0x1B,0x74,
+
+	0x46,0xF0,0x04,0xF0,0x90,0xF5,0xB6,0xE4,
+
+	0xF0,0x90,0xF5,0xC2,0x04,0xF0,0x90,0xF5,
+
+	0xB0,0xE4,0xF0,0x90,0xF5,0xC2,0xF0,0x22,
+
+	0xE4,0x90,0x44,0x2F,0xF0,0xA3,0xF0,0x90,
+
+	0x44,0x33,0xF0,0xA3,0x04,0xF0,0xE4,0x90,
+
+	0x44,0xB1,0xF0,0x90,0xF5,0xAD,0xF0,0x90,
+
+	0x44,0x2D,0xF0,0xA3,0xF0,0x90,0x44,0x2D,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x94,0x03,
+
+	0xEE,0x94,0x00,0x40,0x03,0x02,0x5E,0xA1,
+
+	0xEF,0x4E,0x70,0x22,0x90,0xF4,0x61,0xF0,
+
+	0x90,0xF4,0x60,0xF0,0x90,0xF4,0x64,0x74,
+
+	0x02,0xF0,0x90,0xF4,0x63,0x74,0x06,0xF0,
+
+	0x90,0x43,0xDF,0xE0,0x60,0x5A,0x90,0xF4,
+
+	0x63,0x74,0x07,0xF0,0x80,0x52,0x90,0x44,
+
+	0x2D,0xE0,0x70,0x04,0xA3,0xE0,0x64,0x01,
+
+	0x70,0x22,0x90,0xF4,0x61,0x74,0x02,0xF0,
+
+	0x90,0xF4,0x60,0xF0,0x90,0xF4,0x6C,0xF0,
+
+	0x90,0xF4,0x6B,0x74,0x04,0xF0,0x90,0x43,
+
+	0xDF,0xE0,0x60,0x2C,0x90,0xF4,0x6B,0x74,
+
+	0x07,0xF0,0x80,0x24,0x90,0xF4,0x61,0x74,
+
+	0x01,0xF0,0x90,0xF4,0x60,0x74,0x04,0xF0,
+
+	0x90,0xF4,0x68,0x74,0x02,0xF0,0x90,0xF4,
+
+	0x65,0x74,0x05,0xF0,0x90,0x43,0xDF,0xE0,
+
+	0x60,0x06,0x90,0xF4,0x65,0x74,0x07,0xF0,
+
+	0x90,0xF5,0xAC,0x74,0x01,0xF0,0x90,0xF5,
+
+	0xAE,0xE0,0xB4,0x01,0xF9,0x90,0xF5,0xAE,
+
+	0x74,0x01,0xF0,0x90,0xF4,0x6F,0xE0,0xFE,
+
+	0x90,0xF4,0x6E,0xE0,0xFD,0xEE,0xED,0xFF,
+
+	0x90,0x44,0x31,0xEE,0xF0,0xA3,0xEF,0xF0,
+
+	0x90,0xF4,0x73,0xE0,0xFE,0x90,0xF4,0x72,
+
+	0xE0,0xFD,0xEE,0xED,0xFF,0x90,0x44,0x35,
+
+	0xEE,0xF0,0xA3,0xEF,0xF0,0x90,0x44,0x33,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xFB,0xAA,0x06,
+
+	0xE4,0xF9,0xF8,0x90,0x44,0x31,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0xE4,0xFC,0xFD,0x12,0x4A,
+
+	0xAE,0xC0,0x04,0xC0,0x05,0xC0,0x06,0xC0,
+
+	0x07,0x90,0x44,0x35,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0xFB,0xAA,0x06,0xE4,0xF9,0xF8,0x90,
+
+	0x44,0x2F,0xE0,0xFE,0xA3,0xE0,0xFF,0xE4,
+
+	0xFC,0xFD,0x12,0x4A,0xAE,0xA8,0x04,0xA9,
+
+	0x05,0xAA,0x06,0xAB,0x07,0xD0,0x07,0xD0,
+
+	0x06,0xD0,0x05,0xD0,0x04,0xC3,0x12,0x4B,
+
+	0x21,0x50,0x4F,0x90,0x44,0x31,0xE0,0xFF,
+
+	0xA3,0xE0,0x90,0x44,0x2F,0xCF,0xF0,0xA3,
+
+	0xEF,0xF0,0x90,0x44,0x35,0xE0,0xFF,0xA3,
+
+	0xE0,0x90,0x44,0x33,0xCF,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0xF4,0x74,0xE0,0x90,0x44,0x29,
+
+	0xF0,0x90,0xF4,0x75,0xE0,0x90,0x44,0x2A,
+
+	0xF0,0x90,0xF4,0x76,0xE0,0x90,0x44,0x2B,
+
+	0xF0,0x90,0xF4,0x77,0xE0,0x90,0x44,0x2C,
+
+	0xF0,0x90,0x44,0x2E,0xE0,0x25,0xE0,0xFF,
+
+	0x90,0x44,0x2D,0xE0,0x33,0x90,0x44,0xB1,
+
+	0xEF,0xF0,0x90,0xF5,0xAC,0xE4,0xF0,0x90,
+
+	0x44,0x2E,0xE0,0x04,0xF0,0x70,0x06,0x90,
+
+	0x44,0x2D,0xE0,0x04,0xF0,0x02,0x5D,0x1E,
+
+	0x90,0x44,0x2C,0xE0,0xFF,0x90,0x44,0x2B,
+
+	0xE0,0xC3,0x9F,0x50,0x0D,0x90,0x44,0x28,
+
+	0x74,0x03,0xF0,0x90,0x44,0x2B,0xEF,0xF0,
+
+	0x80,0x06,0x90,0x44,0x28,0x74,0x02,0xF0,
+
+	0x90,0x44,0x2A,0xE0,0xFF,0x90,0x44,0x29,
+
+	0xE0,0xC3,0x9F,0x50,0x0D,0x90,0x44,0xB2,
+
+	0x74,0x01,0xF0,0x90,0x44,0x29,0xEF,0xF0,
+
+	0x80,0x05,0xE4,0x90,0x44,0xB2,0xF0,0x90,
+
+	0x44,0x2B,0xE0,0xFF,0x90,0x44,0x29,0xE0,
+
+	0xC3,0x9F,0x50,0x08,0x90,0x44,0x28,0xE0,
+
+	0x90,0x44,0xB2,0xF0,0x90,0x44,0x9A,0xE0,
+
+	0xB4,0x01,0x1F,0x90,0x44,0x9C,0xE0,0xFF,
+
+	0x70,0x06,0x90,0x44,0xB1,0xF0,0x80,0x12,
+
+	0xEF,0xB4,0x01,0x08,0x90,0x44,0xB1,0x74,
+
+	0x02,0xF0,0x80,0x06,0x90,0x44,0xB1,0x74,
+
+	0x04,0xF0,0x90,0x44,0xB2,0xE0,0x90,0xF9,
+
+	0x01,0xF0,0x90,0x44,0xB1,0xE0,0xFF,0x70,
+
+	0x06,0x90,0xF9,0x00,0xF0,0x80,0x21,0xEF,
+
+	0xC3,0x94,0x04,0x40,0x0E,0x90,0xF9,0x00,
+
+	0x74,0x02,0xF0,0x90,0x44,0xB2,0xE0,0x04,
+
+	0xF0,0x80,0x0D,0x90,0xF9,0x00,0x74,0x01,
+
+	0xF0,0x90,0x44,0xB2,0xE0,0x24,0x02,0xF0,
+
+	0x90,0x44,0xB2,0xE0,0xFD,0x12,0xAF,0x75,
+
+	0x90,0x44,0xB2,0xE0,0x24,0x06,0xFF,0x74,
+
+	0x01,0x7E,0x00,0xA8,0x07,0x08,0x80,0x05,
+
+	0xC3,0x33,0xCE,0x33,0xCE,0xD8,0xF9,0x24,
+
+	0xF6,0xFF,0xEE,0x34,0xFF,0x90,0x44,0x2D,
+
+	0xF0,0xA3,0xEF,0xF0,0xE0,0x90,0xF4,0x69,
+
+	0xF0,0x90,0x44,0x2D,0xE0,0x90,0xF4,0x6A,
+
+	0xF0,0x90,0xF4,0x6D,0x74,0x14,0xF0,0x90,
+
+	0xF5,0xAC,0xE4,0xF0,0x22,0xE4,0x90,0x44,
+
+	0x99,0xF0,0x90,0xFE,0x01,0xE0,0x54,0x7F,
+
+	0xFB,0x90,0xFE,0x08,0xE0,0xFD,0xA3,0xE0,
+
+	0x90,0x44,0x97,0xCD,0xF0,0xA3,0xED,0xF0,
+
+	0xAF,0x03,0xEF,0x60,0x0F,0x90,0xFE,0x02,
+
+	0xE0,0xFD,0xA3,0xE0,0x90,0x44,0x97,0xCD,
+
+	0xF0,0xA3,0xED,0xF0,0x90,0x44,0x97,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xC3,0xEC,0x94,0x40,
+
+	0x50,0x12,0x90,0x41,0x8C,0xE0,0x2D,0xFE,
+
+	0x90,0x41,0x8B,0xE0,0x3C,0x90,0x44,0x97,
+
+	0xF0,0xA3,0xCE,0xF0,0x90,0xFE,0x00,0xE0,
+
+	0x64,0x03,0x70,0x29,0xEB,0x64,0x02,0x70,
+
+	0x24,0x04,0xF0,0x90,0x44,0x97,0xE0,0xFE,
+
+	0xA3,0xE0,0xF5,0x82,0x8E,0x83,0xE0,0x90,
+
+	0xFE,0x01,0xF0,0x90,0xFB,0x90,0x74,0x02,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xF0,0x90,0x44,
+
+	0x99,0xF0,0x02,0x61,0xC7,0x90,0xFE,0x00,
+
+	0xE0,0x64,0x04,0x70,0x42,0xAF,0x03,0xEB,
+
+	0x64,0x03,0x70,0x3B,0x90,0x41,0x8B,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x44,0x97,0xE0,
+
+	0xB5,0x06,0x11,0xA3,0xE0,0xB5,0x07,0x0C,
+
+	0x12,0xA1,0xB1,0x90,0x44,0x99,0x74,0x03,
+
+	0xF0,0x02,0x61,0xC7,0x90,0xFE,0x04,0xE0,
+
+	0xFF,0x90,0x44,0x97,0xE0,0xFC,0xA3,0xE0,
+
+	0xF5,0x82,0x8C,0x83,0xEF,0xF0,0x90,0x44,
+
+	0x99,0x74,0x02,0xF0,0x02,0x61,0xC7,0x90,
+
+	0x44,0x95,0x74,0xFE,0xF0,0xA3,0x74,0x0A,
+
+	0xF0,0x90,0xFE,0x00,0xE0,0xFF,0x24,0xFF,
+
+	0xF5,0x82,0xE4,0x34,0xFD,0xF5,0x83,0xE0,
+
+	0xFC,0xA3,0xE0,0xF4,0xFD,0xEC,0xF4,0x90,
+
+	0x44,0x93,0xF0,0xA3,0xED,0xF0,0xEF,0x24,
+
+	0xFE,0xFF,0x12,0xA2,0xC2,0x90,0x44,0x93,
+
+	0xE0,0x6E,0x70,0x03,0xA3,0xE0,0x6F,0x60,
+
+	0x09,0x90,0x44,0x99,0x74,0x02,0xF0,0x02,
+
+	0x61,0xC7,0x90,0x41,0x8B,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x44,0x97,0xE0,0xB5,0x06,
+
+	0x27,0xA3,0xE0,0xB5,0x07,0x22,0x12,0xA1,
+
+	0xB1,0x90,0x44,0x99,0x74,0x01,0xF0,0xE4,
+
+	0xFD,0xFF,0x12,0xAC,0xC0,0x90,0xFE,0x01,
+
+	0xE0,0xFE,0xA3,0xE0,0xF4,0xFF,0xEE,0xF4,
+
+	0xA3,0xF0,0xA3,0xEF,0xF0,0x02,0x61,0xC7,
+
+	0x90,0xFE,0x04,0xE0,0xFF,0xFC,0x90,0xFE,
+
+	0x01,0xE0,0x54,0x3F,0xFA,0xA3,0xE0,0xFB,
+
+	0xEA,0x60,0x03,0x02,0x62,0x27,0xEB,0x60,
+
+	0x57,0x24,0xF8,0x60,0x53,0x14,0x60,0x12,
+
+	0x24,0xFC,0x70,0x03,0x02,0x61,0xBE,0x24,
+
+	0xEB,0x60,0x7D,0x24,0x21,0x60,0x03,0x02,
+
+	0x62,0x27,0xEF,0x60,0x23,0x1F,0x90,0x44,
+
+	0x95,0xE0,0xFA,0xA3,0xE0,0x2F,0xF5,0x82,
+
+	0xE4,0x3A,0xF5,0x83,0xE0,0xFE,0x90,0x44,
+
+	0x97,0xE0,0xFA,0xA3,0xE0,0x2F,0xF5,0x82,
+
+	0xE4,0x3A,0xF5,0x83,0xEE,0xF0,0x80,0xDA,
+
+	0xE4,0xFD,0xFF,0x12,0xAC,0xC0,0x90,0xFE,
+
+	0x01,0xE0,0xFE,0xA3,0xE0,0xF4,0xFF,0xEE,
+
+	0xF4,0xA3,0xF0,0xA3,0xEF,0xF0,0x80,0x7E,
+
+	0xAF,0x04,0xE4,0xFD,0x12,0xAC,0xC0,0x90,
+
+	0x44,0x97,0xE0,0xFE,0xA3,0xE0,0xFF,0xAD,
+
+	0x04,0x12,0xA6,0x5B,0x90,0xFE,0x00,0xE0,
+
+	0x24,0xFE,0xFF,0x12,0xA2,0xC2,0xEF,0xF4,
+
+	0xFF,0xEE,0xF4,0xFE,0x90,0xFE,0x00,0xE0,
+
+	0x24,0xFF,0xF5,0x82,0xE4,0x34,0xFD,0xF5,
+
+	0x83,0xEE,0xF0,0xA3,0xEF,0xF0,0x80,0x46,
+
+	0xE4,0xFD,0x7F,0x04,0x12,0xAC,0xC0,0x90,
+
+	0xFE,0x03,0x74,0x04,0xF0,0xA3,0x74,0x15,
+
+	0xF0,0xA3,0x74,0x06,0xF0,0xA3,0x74,0xFB,
+
+	0xF0,0x90,0xFE,0x00,0xE0,0x24,0xFE,0xFF,
+
+	0x12,0xA2,0xC2,0xEF,0xF4,0xFF,0xEE,0xF4,
+
+	0xFE,0x90,0xFE,0x00,0xE0,0x24,0xFF,0xF5,
+
+	0x82,0xE4,0x34,0xFD,0xF5,0x83,0xEE,0xF0,
+
+	0xA3,0xEF,0xF0,0x80,0x09,0x90,0xFB,0x86,
+
+	0x74,0x01,0xF0,0x12,0xA6,0xD7,0x90,0xFB,
+
+	0x86,0x74,0x01,0xF0,0x90,0x44,0x99,0xE0,
+
+	0xFF,0x64,0x02,0x60,0x24,0xEF,0x64,0x03,
+
+	0x60,0x1F,0x90,0xF9,0x9F,0xE0,0x60,0x14,
+
+	0x90,0xFB,0x88,0xE0,0x64,0x01,0x60,0xF8,
+
+	0x90,0xFB,0x96,0xE4,0xF0,0x90,0xFB,0x88,
+
+	0x04,0xF0,0x80,0x05,0x90,0xFB,0x93,0xE4,
+
+	0xF0,0x90,0x44,0x99,0xE0,0xFF,0x64,0x01,
+
+	0x60,0x04,0xEF,0xB4,0x03,0x20,0xE4,0xF5,
+
+	0x13,0xC2,0xAF,0x7A,0xAF,0x79,0xA0,0x12,
+
+	0x4B,0xA9,0x7A,0xAF,0x79,0xA0,0x12,0x4B,
+
+	0xA9,0x7B,0x01,0x7A,0x44,0x79,0x6A,0x7D,
+
+	0x01,0x7C,0x00,0x12,0xA1,0x83,0x22,0x90,
+
+	0x44,0xBB,0xEF,0xF0,0xC2,0xEB,0xE4,0x90,
+
+	0x43,0x6A,0xF0,0xA3,0xF0,0x90,0xF9,0x01,
+
+	0xE0,0xD3,0x94,0x01,0x50,0x0A,0x90,0x43,
+
+	0x6A,0x74,0x05,0xF0,0xA3,0x74,0x55,0xF0,
+
+	0x90,0xF9,0x01,0xE0,0x24,0x06,0xFF,0x74,
+
+	0x01,0x7E,0x00,0xA8,0x07,0x08,0x80,0x05,
+
+	0xC3,0x33,0xCE,0x33,0xCE,0xD8,0xF9,0x90,
+
+	0x43,0x72,0xF0,0xEE,0x90,0x43,0x71,0xF0,
+
+	0x90,0xF9,0x00,0xE0,0x70,0x34,0x90,0x43,
+
+	0x61,0x74,0x02,0xF0,0xA3,0x74,0xAB,0xF0,
+
+	0x90,0x43,0x69,0x74,0x28,0xF0,0x90,0x44,
+
+	0xBD,0x74,0x05,0xF0,0x90,0xF5,0xEF,0x74,
+
+	0x28,0xF0,0x90,0x43,0x6A,0xE0,0xFE,0xA3,
+
+	0xE0,0x78,0x02,0xCE,0xC3,0x13,0xCE,0x13,
+
+	0xD8,0xF9,0xF0,0xEE,0x90,0x43,0x6A,0xF0,
+
+	0x80,0x6F,0x90,0xF9,0x00,0xE0,0xB4,0x01,
+
+	0x34,0x90,0x43,0x61,0x74,0x0A,0xF0,0xA3,
+
+	0x74,0xAB,0xF0,0x90,0x43,0x69,0x74,0x50,
+
+	0xF0,0x90,0x44,0xBD,0x74,0x12,0xF0,0x90,
+
+	0xF5,0xEF,0x74,0x50,0xF0,0x90,0x43,0x71,
+
+	0xE0,0xFE,0xA3,0xE0,0x78,0x02,0xC3,0x33,
+
+	0xCE,0x33,0xCE,0xD8,0xF9,0xF0,0xEE,0x90,
+
+	0x43,0x71,0xF0,0x80,0x34,0x90,0x43,0x61,
+
+	0x74,0x05,0xF0,0xA3,0x74,0x55,0xF0,0x90,
+
+	0x43,0x69,0x74,0x3C,0xF0,0x90,0x44,0xBD,
+
+	0x74,0x09,0xF0,0x90,0xF5,0xEF,0x74,0x3C,
+
+	0xF0,0x90,0x43,0x72,0xE0,0x25,0xE0,0xF0,
+
+	0x90,0x43,0x71,0xE0,0x33,0xF0,0x90,0x43,
+
+	0x6A,0xE0,0xC3,0x13,0xF0,0xA3,0xE0,0x13,
+
+	0xF0,0x90,0x43,0x6A,0xE0,0xFF,0xA3,0xE0,
+
+	0xA3,0xCF,0xF0,0xA3,0xEF,0xF0,0x90,0x43,
+
+	0x69,0xE0,0x90,0xF5,0xE2,0xF0,0x90,0x43,
+
+	0x71,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,
+
+	0x62,0xE0,0x2F,0xFF,0x90,0x43,0x61,0xE0,
+
+	0x3E,0xA2,0xE7,0x13,0xFE,0xEF,0x13,0xFF,
+
+	0x90,0xF5,0xFE,0xF0,0xEE,0xA3,0xF0,0xE4,
+
+	0x90,0x43,0x6F,0xF0,0xA3,0xF0,0x90,0xF5,
+
+	0x3B,0xF0,0x90,0xF5,0xBB,0xF0,0x90,0xF5,
+
+	0xB1,0xF0,0x90,0xF5,0xC8,0xF0,0x90,0xF5,
+
+	0xF8,0x04,0xF0,0x90,0xF5,0xDF,0x74,0xFB,
+
+	0xF0,0xA3,0xE4,0xF0,0x90,0xF5,0xE3,0x74,
+
+	0x09,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0xF0,
+
+	0x90,0xF5,0xFD,0xF0,0x90,0xF6,0x6D,0xE4,
+
+	0xF0,0x90,0xF5,0xF9,0x74,0x04,0xF0,0x90,
+
+	0x42,0x0E,0xE0,0xB4,0x01,0x1B,0x90,0x44,
+
+	0xBB,0xE0,0xB4,0x01,0x14,0x90,0xF5,0xE3,
+
+	0x74,0x01,0xF0,0x90,0xF5,0xF9,0xF0,0x90,
+
+	0xF5,0xFE,0x74,0xFF,0xF0,0xA3,0x74,0x0F,
+
+	0xF0,0xE4,0x90,0x44,0xBC,0xF0,0x90,0x43,
+
+	0x4B,0xE0,0xB4,0x01,0x22,0xE4,0x90,0x41,
+
+	0xEF,0xF0,0x90,0x43,0x8A,0xF0,0x90,0x43,
+
+	0x4C,0xF0,0x90,0x43,0x77,0xF0,0xA3,0xF0,
+
+	0x90,0xF0,0x2B,0xE0,0xB4,0x01,0x11,0x90,
+
+	0x42,0x12,0x74,0x25,0xF0,0x80,0x09,0x90,
+
+	0x42,0x0F,0xE0,0x14,0x90,0x43,0x77,0xF0,
+
+	0x90,0x42,0x0F,0xE0,0xFF,0x90,0x43,0x77,
+
+	0xE0,0xC3,0x9F,0x50,0x53,0x90,0x44,0xBC,
+
+	0xE0,0x04,0xF0,0x90,0xF5,0xE7,0xE4,0xF0,
+
+	0xA3,0x04,0xF0,0x90,0xF5,0xE1,0xE4,0xF0,
+
+	0x90,0xF5,0xE7,0x04,0xF0,0x90,0xF5,0xE8,
+
+	0xE0,0xB4,0x01,0xF9,0x90,0xF5,0xE1,0xE0,
+
+	0x90,0x43,0x4D,0xF0,0xE0,0xB4,0x05,0x20,
+
+	0x74,0x06,0xF0,0x90,0xF5,0xEA,0xE0,0x90,
+
+	0x43,0x60,0xF0,0x90,0x43,0x4D,0xE0,0x90,
+
+	0xF5,0xE1,0xF0,0x90,0x44,0xBB,0xE0,0xFF,
+
+	0x90,0x44,0xBD,0xE0,0xFD,0x12,0x4D,0x7B,
+
+	0x90,0x43,0x77,0xE0,0x04,0xF0,0x80,0xA0,
+
+	0x12,0x6C,0xF4,0xE4,0x90,0x43,0x4B,0xF0,
+
+	0x90,0x43,0x4D,0xE0,0xFF,0x64,0x0E,0x60,
+
+	0x47,0xEF,0xB4,0x06,0x05,0x12,0x45,0x50,
+
+	0x80,0xEE,0x90,0x43,0x4D,0xE0,0x64,0x07,
+
+	0x70,0x22,0x12,0x84,0x03,0x90,0xF5,0xE8,
+
+	0x74,0x01,0xF0,0x90,0x43,0x4D,0xE0,0x90,
+
+	0xF5,0xE1,0xF0,0x90,0xF5,0xE8,0xE0,0xB4,
+
+	0x01,0xF9,0x90,0xF5,0xE6,0xE4,0xF0,0x12,
+
+	0x8A,0xED,0x80,0xC4,0x90,0x43,0x4D,0xE0,
+
+	0xB4,0x0C,0xBD,0x90,0x44,0xBB,0xE0,0xFF,
+
+	0x12,0x81,0x24,0x12,0x9B,0x32,0x80,0xB0,
+
+	0x90,0xF5,0xE7,0xE4,0xF0,0x90,0xF5,0xE1,
+
+	0xF0,0xD2,0xEB,0x22,0xC2,0xE9,0xC2,0xEA,
+
+	0xD2,0xA8,0xD2,0xAF,0x90,0x43,0xB8,0xE0,
+
+	0x60,0x12,0x90,0xF9,0x57,0xE0,0x54,0xFD,
+
+	0x44,0x02,0xF0,0xE0,0x54,0xFD,0xF0,0xE4,
+
+	0x90,0x43,0xB8,0xF0,0x90,0xF5,0xA9,0x74,
+
+	0x01,0xF0,0x90,0xF0,0x71,0xE4,0xF0,0x90,
+
+	0xF1,0xE9,0xF0,0x90,0xF0,0xD5,0xF0,0x90,
+
+	0xF0,0xE3,0xF0,0x90,0xF0,0xE2,0xF0,0x90,
+
+	0xF1,0xEA,0xF0,0x90,0xF1,0xEF,0xF0,0x90,
+
+	0xF1,0xF2,0xF0,0x90,0xF1,0xF7,0xF0,0x90,
+
+	0xF1,0xFB,0xF0,0x90,0xF5,0xAF,0xF0,0xA3,
+
+	0xF0,0xA3,0xF0,0x90,0xF5,0xBB,0xF0,0x90,
+
+	0xF5,0xA8,0xF0,0x90,0xF5,0xAC,0xF0,0x90,
+
+	0xF5,0xC8,0xF0,0x90,0xF4,0x71,0xF0,0x90,
+
+	0xF9,0x0B,0xF0,0x90,0xF5,0xE7,0xF0,0x90,
+
+	0xF5,0xE1,0xF0,0x90,0xF4,0x71,0xF0,0x90,
+
+	0xF5,0xD7,0xF0,0x90,0xF6,0x25,0xF0,0x90,
+
+	0xFD,0xA2,0xF0,0x90,0xF1,0xE8,0x04,0xF0,
+
+	0x90,0xF0,0x6C,0xF0,0x90,0xF1,0x75,0xF0,
+
+	0x90,0xF1,0x31,0xF0,0xE4,0x90,0x43,0xDF,
+
+	0xF0,0x90,0xF1,0xF6,0x04,0xF0,0x90,0xF1,
+
+	0xFA,0xF0,0x90,0xF1,0xF3,0xF0,0x90,0xF1,
+
+	0xF0,0xF0,0x90,0xF0,0x7D,0xF0,0x90,0xF1,
+
+	0xEB,0xF0,0x90,0xF5,0xC2,0xF0,0x90,0xF5,
+
+	0xB3,0xF0,0x90,0xF5,0xBD,0xF0,0x90,0xF1,
+
+	0xE8,0xF0,0xE4,0xF0,0x90,0xF0,0x6C,0xF0,
+
+	0x90,0xF1,0x75,0xF0,0x90,0xF1,0x31,0xF0,
+
+	0x90,0xF1,0xFA,0xF0,0x90,0x41,0xBA,0xE0,
+
+	0x90,0xF1,0xA3,0xF0,0x90,0x41,0xBB,0xE0,
+
+	0x90,0xF1,0xA4,0xF0,0x90,0x41,0xBC,0xE0,
+
+	0x90,0xF1,0xA5,0xF0,0x90,0xF6,0x21,0x74,
+
+	0x02,0xF0,0x90,0xF6,0x23,0xF0,0x90,0xF5,
+
+	0xC6,0xE4,0xF0,0xA3,0xF0,0x90,0xF5,0xC3,
+
+	0xF0,0xA3,0xF0,0x90,0x41,0xB2,0xE0,0x90,
+
+	0xF1,0x54,0xF0,0x90,0x41,0xB3,0xE0,0x90,
+
+	0xF1,0x55,0xF0,0x90,0x41,0xB4,0xE0,0x90,
+
+	0xF1,0x52,0xF0,0x90,0x41,0xB5,0xE0,0x90,
+
+	0xF1,0x53,0xF0,0x90,0xF1,0x93,0xE4,0xF0,
+
+	0x90,0xF1,0x69,0x74,0x08,0xF0,0x90,0xF1,
+
+	0x5F,0x74,0x02,0xF0,0x90,0xF1,0x4E,0x74,
+
+	0x40,0xF0,0x74,0xFF,0xF0,0x90,0xF1,0x85,
+
+	0xE4,0xF0,0x90,0xF1,0x2F,0x04,0xF0,0x90,
+
+	0xFD,0x02,0xF0,0x90,0xF7,0x0F,0xE4,0xF0,
+
+	0x90,0xF7,0x8A,0x74,0x0F,0xF0,0x90,0xF7,
+
+	0x98,0x74,0x0D,0xF0,0x90,0xF7,0x8B,0x74,
+
+	0x01,0xF0,0x90,0xFD,0xA5,0xE4,0xF0,0x90,
+
+	0xF5,0x52,0x74,0x3F,0xF0,0xA3,0x74,0x05,
+
+	0xF0,0x90,0x44,0x9D,0x74,0x0A,0xF0,0x90,
+
+	0xF0,0x71,0x74,0x01,0xF0,0x90,0xF7,0x15,
+
+	0xF0,0x90,0xF9,0x0E,0xF0,0x90,0xF5,0x06,
+
+	0x74,0x04,0xF0,0x90,0xF7,0x3C,0xE0,0x70,
+
+	0x04,0x90,0xF7,0x2F,0xF0,0x12,0xAE,0x16,
+
+	0x90,0xF7,0x34,0xE4,0xF0,0x90,0xF7,0x33,
+
+	0xF0,0x90,0xF7,0x35,0x74,0x05,0xF0,0xA3,
+
+	0xF0,0x90,0xF7,0x39,0x74,0xFF,0xF0,0xA3,
+
+	0x74,0x9C,0xF0,0x90,0xF7,0x7E,0x74,0x01,
+
+	0xF0,0x90,0xFD,0x00,0xF0,0x90,0xFD,0x90,
+
+	0x74,0x03,0xF0,0x90,0xF2,0x17,0x74,0xFE,
+
+	0xF0,0x90,0xF0,0x42,0x04,0xF0,0xA3,0xF0,
+
+	0xA3,0x74,0x07,0xF0,0xA3,0xF0,0x90,0xF7,
+
+	0x74,0x74,0x01,0xF0,0x90,0xF7,0x6A,0xF0,
+
+	0x12,0xAB,0x75,0x90,0xF7,0x3E,0x74,0x01,
+
+	0xF0,0x90,0xF7,0x3C,0xE0,0x70,0x0B,0x90,
+
+	0x44,0x9B,0xF0,0xD2,0xEA,0x90,0xF7,0x76,
+
+	0x04,0xF0,0x90,0xF7,0x37,0x74,0xDC,0xF0,
+
+	0xA3,0x74,0x05,0xF0,0x90,0xFD,0xA2,0xE4,
+
+	0xF0,0xA3,0xF0,0xA3,0x74,0x05,0xF0,0x90,
+
+	0xF5,0x4D,0x74,0x01,0xF0,0x90,0xF5,0x41,
+
+	0xE4,0xF0,0xA3,0x74,0x02,0xF0,0x90,0xF6,
+
+	0x5C,0xE4,0xF0,0xA3,0xF0,0x90,0xF0,0x5F,
+
+	0x04,0xF0,0x90,0x42,0x0A,0xE0,0x90,0xF0,
+
+	0x06,0xF0,0x90,0xF0,0x58,0xE4,0xF0,0xF0,
+
+	0x90,0x42,0x2B,0xF0,0x90,0x42,0x38,0x74,
+
+	0xFF,0xF0,0x90,0x42,0xFC,0xF0,0x90,0x42,
+
+	0xF7,0xF0,0x90,0xF9,0xE5,0x74,0x1E,0xF0,
+
+	0xA3,0x74,0x05,0xF0,0xA3,0xE4,0xF0,0x90,
+
+	0x42,0x3D,0x74,0xFF,0xF0,0x22,0x90,0xF4,
+
+	0x60,0xE0,0x60,0x03,0x02,0x67,0xA0,0x90,
+
+	0x41,0x92,0xE0,0x90,0xF4,0x03,0xF0,0x90,
+
+	0x41,0x93,0xE0,0x90,0xF4,0x02,0xF0,0x90,
+
+	0x41,0x94,0xE0,0x90,0xF4,0x01,0xF0,0x90,
+
+	0x41,0x95,0xE0,0x90,0xF4,0x00,0xF0,0x90,
+
+	0x41,0x96,0xE0,0x90,0xF4,0x07,0xF0,0x90,
+
+	0x41,0x97,0xE0,0x90,0xF4,0x06,0xF0,0x90,
+
+	0x41,0x98,0xE0,0x90,0xF4,0x05,0xF0,0x90,
+
+	0x41,0x99,0xE0,0x90,0xF4,0x04,0xF0,0x12,
+
+	0xAE,0xA0,0x90,0xF9,0x01,0xE0,0x14,0x60,
+
+	0x16,0x14,0x60,0x1F,0x14,0x60,0x28,0x24,
+
+	0x03,0x70,0x2E,0x90,0xF5,0x59,0x74,0xFA,
+
+	0xF0,0xA3,0x74,0x54,0xF0,0x80,0x22,0x90,
+
+	0xF5,0x59,0x74,0x7A,0xF0,0xA3,0x74,0x52,
+
+	0xF0,0x80,0x16,0x90,0xF5,0x59,0x74,0xE5,
+
+	0xF0,0xA3,0x74,0x4D,0xF0,0x80,0x0A,0x90,
+
+	0xF5,0x59,0x74,0x1B,0xF0,0xA3,0x74,0x46,
+
+	0xF0,0x12,0xAF,0x0C,0x90,0xF7,0x37,0x74,
+
+	0xDC,0xF0,0xA3,0x74,0x05,0xF0,0x22,0x90,
+
+	0xF4,0x60,0xE0,0x64,0x04,0x60,0x03,0x02,
+
+	0x68,0x3B,0x90,0x41,0xAA,0xE0,0x90,0xF4,
+
+	0x03,0xF0,0x90,0x41,0xAB,0xE0,0x90,0xF4,
+
+	0x02,0xF0,0x90,0x41,0xAC,0xE0,0x90,0xF4,
+
+	0x01,0xF0,0x90,0x41,0xAD,0xE0,0x90,0xF4,
+
+	0x00,0xF0,0x90,0x41,0xAE,0xE0,0x90,0xF4,
+
+	0x07,0xF0,0x90,0x41,0xAF,0xE0,0x90,0xF4,
+
+	0x06,0xF0,0x90,0x41,0xB0,0xE0,0x90,0xF4,
+
+	0x05,0xF0,0x90,0x41,0xB1,0xE0,0x90,0xF4,
+
+	0x04,0xF0,0x12,0xAE,0xC0,0x90,0xF9,0x01,
+
+	0xE0,0x14,0x60,0x16,0x14,0x60,0x1F,0x14,
+
+	0x60,0x28,0x24,0x03,0x70,0x2E,0x90,0xF5,
+
+	0x59,0x74,0xA4,0xF0,0xA3,0x74,0x28,0xF0,
+
+	0x80,0x22,0x90,0xF5,0x59,0x74,0x72,0xF0,
+
+	0xA3,0x74,0x27,0xF0,0x80,0x16,0x90,0xF5,
+
+	0x59,0x74,0x41,0xF0,0xA3,0x74,0x25,0xF0,
+
+	0x80,0x0A,0x90,0xF5,0x59,0x74,0x87,0xF0,
+
+	0xA3,0x74,0x21,0xF0,0x12,0xAE,0xD0,0x90,
+
+	0xF7,0x37,0x74,0xB8,0xF0,0xA3,0x74,0x0B,
+
+	0xF0,0x22,0x90,0xF4,0x60,0xE0,0x24,0xFE,
+
+	0x60,0x29,0x14,0x60,0x48,0x24,0x02,0x70,
+
+	0x64,0x90,0x41,0x9A,0xE0,0x90,0xF4,0x03,
+
+	0xF0,0x90,0x41,0x9B,0xE0,0x90,0xF4,0x02,
+
+	0xF0,0x90,0x41,0x9C,0xE0,0x90,0xF4,0x01,
+
+	0xF0,0x90,0x41,0x9D,0xE0,0x90,0xF4,0x00,
+
+	0xF0,0x80,0x42,0x90,0x41,0x9E,0xE0,0x90,
+
+	0xF4,0x03,0xF0,0x90,0x41,0x9F,0xE0,0x90,
+
+	0xF4,0x02,0xF0,0x90,0x41,0xA0,0xE0,0x90,
+
+	0xF4,0x01,0xF0,0x90,0x41,0xA1,0xE0,0x90,
+
+	0xF4,0x00,0xF0,0x80,0x20,0x90,0x41,0xA2,
+
+	0xE0,0x90,0xF4,0x03,0xF0,0x90,0x41,0xA3,
+
+	0xE0,0x90,0xF4,0x02,0xF0,0x90,0x41,0xA4,
+
+	0xE0,0x90,0xF4,0x01,0xF0,0x90,0x41,0xA5,
+
+	0xE0,0x90,0xF4,0x00,0xF0,0x90,0x41,0xA6,
+
+	0xE0,0x90,0xF4,0x07,0xF0,0x90,0x41,0xA7,
+
+	0xE0,0x90,0xF4,0x06,0xF0,0x90,0x41,0xA8,
+
+	0xE0,0x90,0xF4,0x05,0xF0,0x90,0x41,0xA9,
+
+	0xE0,0x90,0xF4,0x04,0xF0,0x12,0xAE,0xB0,
+
+	0x90,0xF9,0x01,0xE0,0x14,0x60,0x16,0x14,
+
+	0x60,0x1F,0x14,0x60,0x28,0x24,0x03,0x70,
+
+	0x2E,0x90,0xF5,0x59,0x74,0x52,0xF0,0xA3,
+
+	0x74,0x14,0xF0,0x80,0x22,0x90,0xF5,0x59,
+
+	0x74,0xB9,0xF0,0xA3,0x74,0x13,0xF0,0x80,
+
+	0x16,0x90,0xF5,0x59,0x74,0xA1,0xF0,0xA3,
+
+	0x74,0x12,0xF0,0x80,0x0A,0x90,0xF5,0x59,
+
+	0x74,0xC4,0xF0,0xA3,0x74,0x10,0xF0,0x12,
+
+	0xAE,0x7E,0x90,0xF7,0x37,0x74,0xB8,0xF0,
+
+	0xA3,0x74,0x0B,0xF0,0x22,0x90,0x41,0xE8,
+
+	0xE0,0x60,0x03,0x02,0x69,0xEB,0x90,0xF0,
+
+	0x60,0xE0,0xC3,0x94,0xD5,0x50,0x27,0x90,
+
+	0x42,0x54,0xE0,0x90,0x44,0x45,0xF0,0x94,
+
+	0x00,0x40,0x06,0xE0,0x14,0x90,0x42,0x54,
+
+	0xF0,0x90,0xF0,0x60,0xE0,0xD3,0x94,0x60,
+
+	0x50,0x24,0x90,0x44,0x47,0x74,0x86,0xF0,
+
+	0x90,0xFB,0x28,0xF0,0x80,0x18,0x90,0xF0,
+
+	0x60,0xE0,0xD3,0x94,0xF7,0x40,0x0F,0xE0,
+
+	0x94,0xFF,0x40,0x0A,0x90,0x44,0x47,0x74,
+
+	0x82,0xF0,0x90,0xFB,0x28,0xF0,0x90,0x41,
+
+	0xE3,0xE0,0x60,0x47,0x90,0xF0,0x61,0xE0,
+
+	0xD3,0x94,0xBA,0x50,0x26,0x90,0x41,0xD5,
+
+	0xE0,0x60,0x38,0x90,0x44,0x46,0xE0,0x25,
+
+	0xE0,0xFF,0xE4,0x33,0xFE,0xEF,0x24,0xA0,
+
+	0xFF,0xE4,0x3E,0xFE,0x90,0xF0,0x61,0xE0,
+
+	0xD3,0x9F,0xEE,0x64,0x80,0xF8,0x74,0x80,
+
+	0x98,0x40,0x18,0x90,0x41,0xDC,0xE0,0xB4,
+
+	0x01,0x07,0x7F,0x02,0x12,0xAD,0x3C,0x80,
+
+	0x05,0x7F,0x0C,0x12,0xAD,0x3C,0xE4,0x90,
+
+	0x41,0xE3,0xF0,0x90,0x41,0xE3,0xE0,0x70,
+
+	0x24,0x90,0xF0,0x61,0xE0,0xC3,0x94,0x5A,
+
+	0x50,0x1B,0x90,0x41,0xDC,0xE0,0xB4,0x01,
+
+	0x07,0x7F,0x01,0x12,0xAD,0x3C,0x80,0x05,
+
+	0x7F,0x0B,0x12,0xAD,0x3C,0x90,0x41,0xE3,
+
+	0x74,0x01,0xF0,0x80,0x05,0x90,0xF0,0x60,
+
+	0xE0,0xFF,0x90,0x41,0xE9,0xE0,0x60,0x03,
+
+	0x02,0x6B,0x1A,0x12,0xA3,0x15,0x90,0x42,
+
+	0x13,0xE0,0xFE,0xEF,0xD3,0x9E,0x50,0x13,
+
+	0x12,0xA3,0x15,0x90,0x42,0x14,0xE0,0xFE,
+
+	0xEF,0xD3,0x9E,0x40,0x68,0x90,0x41,0xD5,
+
+	0xE0,0x60,0x62,0x90,0x42,0x54,0xE0,0xD3,
+
+	0x94,0x00,0x40,0x59,0xE0,0x14,0xF0,0xE0,
+
+	0x90,0x44,0x45,0xF0,0x90,0x41,0xE3,0xE0,
+
+	0x60,0x4B,0x90,0xF0,0x1C,0xE0,0xFE,0x90,
+
+	0xF0,0x1B,0xE0,0x7C,0x00,0x24,0x00,0xFF,
+
+	0xEC,0x3E,0x90,0x44,0x4E,0xF0,0xA3,0xEF,
+
+	0xF0,0xE0,0x24,0xF9,0xF0,0x90,0x44,0x4E,
+
+	0xE0,0x34,0xFF,0xF0,0x90,0xF0,0x0F,0xE0,
+
+	0xFE,0x90,0xF0,0x0E,0xE0,0x24,0x00,0xFF,
+
+	0xEC,0x3E,0x90,0x44,0x4A,0xF0,0xA3,0xEF,
+
+	0xF0,0xE0,0x24,0xF9,0xF0,0x90,0x44,0x4A,
+
+	0xE0,0x34,0xFF,0xF0,0x12,0xA9,0xA8,0x90,
+
+	0x44,0x46,0xE0,0x04,0xF0,0x12,0xA3,0x15,
+
+	0x90,0x42,0x15,0xE0,0xFE,0xEF,0xC3,0x9E,
+
+	0x50,0x06,0x90,0x41,0xD5,0xE0,0x60,0x10,
+
+	0x12,0xA3,0x15,0x90,0x42,0x16,0xE0,0xFE,
+
+	0xEF,0xC3,0x9E,0x40,0x03,0x02,0x6B,0x1A,
+
+	0x90,0x41,0xDC,0xE0,0xB4,0x01,0x04,0x7F,
+
+	0x0F,0x80,0x02,0x7F,0x0B,0x90,0x42,0x54,
+
+	0xE0,0xC3,0x9F,0x50,0x58,0xE0,0x04,0xF0,
+
+	0x90,0x44,0x46,0xE0,0x94,0x00,0x40,0x59,
+
+	0x90,0xF0,0x1C,0xE0,0xFE,0x90,0xF0,0x1B,
+
+	0xE0,0x7C,0x00,0x24,0x00,0xFF,0xEC,0x3E,
+
+	0x90,0x44,0x4E,0xF0,0xA3,0xEF,0xF0,0xE0,
+
+	0x24,0x07,0xF0,0x90,0x44,0x4E,0xE0,0x34,
+
+	0x00,0xF0,0x90,0xF0,0x0F,0xE0,0xFE,0x90,
+
+	0xF0,0x0E,0xE0,0x24,0x00,0xFF,0xEC,0x3E,
+
+	0x90,0x44,0x4A,0xF0,0xA3,0xEF,0xF0,0xE0,
+
+	0x24,0x07,0xF0,0x90,0x44,0x4A,0xE0,0x34,
+
+	0x00,0xF0,0x12,0xA9,0xA8,0x90,0x44,0x46,
+
+	0xE0,0x14,0xF0,0x80,0x0C,0x90,0x44,0x46,
+
+	0xE0,0xD3,0x94,0x00,0x40,0x03,0x12,0xAA,
+
+	0x3A,0x90,0x42,0x54,0xE0,0x90,0x44,0x45,
+
+	0xF0,0x22,0x90,0x41,0xD1,0xE0,0x60,0x6E,
+
+	0x90,0xF9,0x00,0xE0,0x90,0x44,0xB1,0xF0,
+
+	0x90,0xF9,0x01,0xE0,0x90,0x44,0xB2,0xF0,
+
+	0x90,0x44,0xB1,0xE0,0x70,0x0A,0xA3,0xE0,
+
+	0xFD,0xE4,0xFF,0x12,0xAF,0x75,0x80,0x22,
+
+	0x90,0x44,0xB1,0xE0,0xB4,0x02,0x0D,0xA3,
+
+	0xE0,0x04,0xF0,0xE0,0xFD,0x7F,0x04,0x12,
+
+	0xAF,0x75,0x80,0x0E,0x90,0x44,0xB2,0xE0,
+
+	0x24,0x02,0xF0,0xE0,0xFD,0x7F,0x02,0x12,
+
+	0xAF,0x75,0x90,0x44,0xB2,0xE0,0x24,0x06,
+
+	0xFF,0x74,0x01,0x7E,0x00,0xA8,0x07,0x08,
+
+	0x80,0x05,0xC3,0x33,0xCE,0x33,0xCE,0xD8,
+
+	0xF9,0x24,0xF6,0xFF,0xEE,0x34,0xFF,0xFE,
+
+	0xEF,0x90,0xF4,0x69,0xF0,0xEE,0xA3,0xF0,
+
+	0x90,0xF4,0x6D,0x74,0x14,0xF0,0x90,0xF4,
+
+	0x63,0x74,0x05,0xF0,0x90,0x43,0xDF,0xE0,
+
+	0x60,0x06,0x90,0xF4,0x63,0x74,0x07,0xF0,
+
+	0x90,0xF5,0xAD,0x74,0x01,0xF0,0x90,0xF5,
+
+	0xAC,0xE4,0xF0,0x04,0xF0,0x90,0xF5,0xAE,
+
+	0xE0,0xB4,0x01,0xF9,0x90,0xF5,0xAE,0x74,
+
+	0x01,0xF0,0x90,0xF4,0x83,0xE0,0x90,0x44,
+
+	0x52,0xF0,0x90,0xF4,0x82,0xE0,0x90,0x44,
+
+	0x53,0xF0,0x90,0xF4,0x81,0xE0,0x90,0x44,
+
+	0x54,0xF0,0x90,0xF4,0x80,0xE0,0x90,0x44,
+
+	0x55,0xF0,0x90,0xF4,0x86,0xE0,0x30,0xE2,
+
+	0x04,0x7F,0xFF,0x80,0x02,0x7F,0x00,0x90,
+
+	0x44,0x56,0xEF,0xF0,0xE0,0xB4,0xFF,0x09,
+
+	0x90,0xF4,0x86,0xE0,0x44,0xF8,0xFF,0x80,
+
+	0x07,0x90,0xF4,0x86,0xE0,0x54,0x07,0xFF,
+
+	0x90,0x44,0x57,0xEF,0xF0,0x90,0xF4,0x85,
+
+	0xE0,0x90,0x44,0x58,0xF0,0x90,0xF4,0x84,
+
+	0xE0,0x90,0x44,0x59,0xF0,0x90,0x44,0xB2,
+
+	0xE0,0x24,0x05,0xFF,0x74,0x01,0x7E,0x00,
+
+	0xA8,0x07,0x08,0x80,0x05,0xC3,0x33,0xCE,
+
+	0x33,0xCE,0xD8,0xF9,0x90,0x44,0xB0,0xF0,
+
+	0xEE,0x90,0x44,0xAF,0xF0,0x90,0x44,0x56,
+
+	0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,
+
+	0xA3,0xE0,0xFB,0x90,0x44,0x52,0xE0,0xFC,
+
+	0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0x12,0xA4,0xD1,0xA8,0x04,0xA9,0x05,
+
+	0xAA,0x06,0xAB,0x07,0x90,0x44,0xAF,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0xE4,0xFC,0xFD,0xEB,
+
+	0x2F,0xFF,0xEA,0x3E,0xFE,0xED,0x39,0xFD,
+
+	0xEC,0x38,0xFC,0x90,0x44,0x5A,0x12,0x4B,
+
+	0x6C,0x90,0x44,0xB0,0xE0,0x90,0xF5,0x3C,
+
+	0xF0,0x90,0x44,0xAF,0xE0,0x90,0xF5,0x3D,
+
+	0xF0,0xE4,0x7F,0xFF,0x7E,0x07,0xFD,0xFC,
+
+	0x90,0x44,0x5A,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xD3,0x12,
+
+	0x4B,0x0B,0x40,0x0C,0x90,0x44,0x5A,0x12,
+
+	0x4B,0x78,0x00,0x00,0x07,0xFF,0x80,0x26,
+
+	0x7F,0x00,0x7E,0xF8,0x7D,0xFF,0x7C,0xFF,
+
+	0x90,0x44,0x5A,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0x12,
+
+	0x4B,0x0B,0x50,0x0A,0x90,0x44,0x5A,0x12,
+
+	0x4B,0x78,0xFF,0xFF,0xF8,0x00,0x90,0x44,
+
+	0x5D,0xE0,0x90,0xF4,0x66,0xF0,0x90,0x44,
+
+	0x5C,0xE0,0x90,0xF4,0x67,0xF0,0x90,0xF4,
+
+	0x67,0xE0,0x70,0xFA,0x90,0xF4,0x66,0xE0,
+
+	0x70,0xF4,0x22,0x90,0x43,0x63,0x74,0x01,
+
+	0xF0,0x90,0x41,0xEF,0xE0,0xFF,0xD3,0x94,
+
+	0x01,0x40,0x05,0xEF,0x14,0xFF,0x80,0x02,
+
+	0x7F,0x01,0x90,0x43,0x64,0xEF,0xF0,0x90,
+
+	0xF6,0x6D,0x74,0x01,0xF0,0x90,0x41,0xEF,
+
+	0xE0,0x90,0xF6,0x6C,0xF0,0x90,0xF6,0x69,
+
+	0x74,0x01,0xF0,0xE4,0xF9,0x90,0x41,0xEF,
+
+	0xE0,0xFE,0xE9,0xC3,0x9E,0x50,0x47,0xE9,
+
+	0x25,0xE0,0x24,0x50,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0xE0,0x90,0xF6,0x6B,0xF0,
+
+	0xE9,0x25,0xE0,0x24,0x51,0xF5,0x82,0xE4,
+
+	0x34,0x43,0xF5,0x83,0xE0,0x90,0xF6,0x6A,
+
+	0xF0,0xE9,0x25,0xE0,0x24,0x58,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xE0,0x90,0xF6,
+
+	0x6B,0xF0,0xE9,0x25,0xE0,0x24,0x59,0xF5,
+
+	0x82,0xE4,0x34,0x43,0xF5,0x83,0xE0,0x90,
+
+	0xF6,0x6A,0xF0,0x09,0x80,0xAF,0x90,0x42,
+
+	0x0E,0xE0,0xB4,0x01,0x46,0x90,0x43,0x47,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xC3,0x90,0x43,
+
+	0x6B,0xE0,0x9D,0x90,0x43,0x6A,0xE0,0x9C,
+
+	0x50,0x0E,0x90,0x43,0x47,0xE0,0xA3,0xE0,
+
+	0x90,0x43,0x6A,0xEC,0xF0,0xA3,0xED,0xF0,
+
+	0x90,0x43,0x49,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0xC3,0x90,0x43,0x6D,0xE0,0x9D,0x90,0x43,
+
+	0x6C,0xE0,0x9C,0x50,0x0E,0x90,0x43,0x49,
+
+	0xE0,0xA3,0xE0,0x90,0x43,0x6C,0xEC,0xF0,
+
+	0xA3,0xED,0xF0,0x79,0x01,0x90,0x41,0xEF,
+
+	0xE0,0xFE,0xE9,0xC3,0x9E,0x50,0x79,0xE9,
+
+	0x25,0xE0,0x24,0x58,0xF5,0x82,0xE4,0x34,
+
+	0x43,0xF5,0x83,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0x90,0x43,0x58,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xC3,0xED,0x9B,0xFD,0xEC,0x9A,0xFC,0xD3,
+
+	0x90,0x43,0x6B,0xE0,0x9D,0x90,0x43,0x6A,
+
+	0xE0,0x9C,0x40,0x06,0xE9,0x04,0x90,0x43,
+
+	0x63,0xF0,0x90,0x43,0x61,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0x90,0x43,0x59,0xE0,0x2D,0xFD,
+
+	0x90,0x43,0x58,0xE0,0x3C,0xFC,0xC3,0xEE,
+
+	0x99,0xFF,0x25,0xE0,0x24,0x58,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFA,0xA3,
+
+	0xE0,0xFB,0xC3,0xED,0x9B,0xFD,0xEC,0x9A,
+
+	0xFC,0xD3,0x90,0x43,0x6D,0xE0,0x9D,0x90,
+
+	0x43,0x6C,0xE0,0x9C,0x40,0x06,0xEF,0x14,
+
+	0x90,0x43,0x64,0xF0,0x09,0x02,0x6D,0xC6,
+
+	0x90,0x43,0x64,0xE0,0xFF,0x90,0x43,0x63,
+
+	0xE0,0xFE,0xD3,0x9F,0x40,0x0F,0xEF,0x24,
+
+	0x01,0xFD,0xE4,0x33,0xFC,0xEE,0xB5,0x05,
+
+	0xE7,0xE4,0xB5,0x04,0xE3,0x90,0x41,0xEF,
+
+	0xE0,0xFF,0xB4,0x01,0x0C,0xE4,0x90,0x43,
+
+	0x65,0xF0,0x90,0x43,0x4D,0x74,0x0C,0xF0,
+
+	0x22,0x90,0x43,0x64,0xE0,0xF9,0x24,0x01,
+
+	0xFD,0xE4,0x33,0xFC,0x90,0x43,0x63,0xE0,
+
+	0xFE,0xB5,0x05,0x1E,0xE4,0xB5,0x04,0x1A,
+
+	0xEE,0xB5,0x07,0x07,0xE4,0x90,0x43,0x65,
+
+	0xF0,0x80,0x08,0x90,0x43,0x63,0xE0,0x90,
+
+	0x43,0x65,0xF0,0x90,0x43,0x4D,0x74,0x0C,
+
+	0xF0,0x22,0xE9,0xFF,0x90,0x43,0x63,0xE0,
+
+	0x2F,0xFF,0xE4,0x33,0xA2,0xE7,0x13,0xEF,
+
+	0x13,0x90,0x43,0x66,0xF0,0x90,0x43,0x4D,
+
+	0x74,0x06,0xF0,0x22,0x90,0x44,0x20,0x12,
+
+	0x4B,0x78,0x00,0x00,0x00,0x00,0x90,0x44,
+
+	0x24,0x12,0x4B,0x78,0x00,0x00,0x00,0x00,
+
+	0xE4,0x90,0x43,0xF5,0xF0,0xA3,0xF0,0x90,
+
+	0x43,0xF7,0xF0,0xA3,0xF0,0x90,0x43,0xE2,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x44,0x16,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x90,0x43,0xE4,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0xD3,0x90,0x44,0x17,
+
+	0xE0,0x9F,0x90,0x44,0x16,0xE0,0x9E,0x40,
+
+	0x03,0x02,0x70,0x4D,0xA3,0xE0,0x90,0xF6,
+
+	0x67,0xF0,0x90,0x44,0x16,0xE0,0x90,0xF6,
+
+	0x68,0xF0,0x90,0xF6,0x66,0x74,0x01,0xF0,
+
+	0x90,0xF6,0x66,0xE0,0xB4,0x01,0xF9,0x90,
+
+	0xF6,0x30,0xE0,0x54,0x0F,0xFB,0xA3,0xE0,
+
+	0x75,0xF0,0x10,0xA4,0xFF,0x90,0xF6,0x30,
+
+	0xE0,0xFD,0xC4,0x54,0x0F,0x7C,0x00,0x2F,
+
+	0xFF,0xEC,0x35,0xF0,0xFE,0xE4,0xFD,0x90,
+
+	0x44,0x18,0x12,0x4B,0x6C,0xEB,0xB4,0x0F,
+
+	0x16,0x90,0x44,0x18,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x44,0x1C,0x12,0x4B,0x6C,0x80,0x25,0x90,
+
+	0x44,0x18,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,
+
+	0xE0,0xFE,0xA3,0xE0,0x24,0x00,0xFF,0xEE,
+
+	0x34,0x10,0xFE,0xE4,0x3D,0xFD,0xE4,0x3C,
+
+	0xFC,0xA8,0x03,0x12,0x4B,0x59,0x90,0x44,
+
+	0x1C,0x12,0x4B,0x6C,0x90,0x44,0x20,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x44,0x1C,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xD3,0x12,0x4B,0x21,0x40,0x48,0x90,0x44,
+
+	0x20,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x44,0x24,0x12,
+
+	0x4B,0x6C,0x90,0x43,0xF5,0xE0,0xFF,0xA3,
+
+	0xE0,0x90,0x43,0xF7,0xCF,0xF0,0xA3,0xEF,
+
+	0xF0,0x90,0x44,0x1C,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,
+
+	0x44,0x20,0x12,0x4B,0x6C,0x90,0x44,0x16,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x43,0xF5,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x80,0x45,0x90,0x44,
+
+	0x24,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x44,0x1C,0xE0,
+
+	0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
+
+	0xE0,0xFB,0xD3,0x12,0x4B,0x21,0x40,0x23,
+
+	0x90,0x44,0x1C,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x44,
+
+	0x24,0x12,0x4B,0x6C,0x90,0x44,0x16,0xE0,
+
+	0xFF,0xA3,0xE0,0x90,0x43,0xF7,0xCF,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x44,0x17,0xE0,0x04,
+
+	0xF0,0x70,0x06,0x90,0x44,0x16,0xE0,0x04,
+
+	0xF0,0x02,0x6E,0xF5,0x22,0x12,0xA5,0x58,
+
+	0x12,0x99,0xA0,0x12,0x88,0x66,0x12,0x79,
+
+	0x8A,0x90,0xF7,0x8E,0x74,0x01,0xF0,0x90,
+
+	0xF7,0x91,0xF0,0x90,0xF7,0x31,0xE0,0x60,
+
+	0x08,0x90,0xF5,0xA9,0xE0,0xFF,0x12,0xA3,
+
+	0xFB,0xE4,0x90,0x44,0xCF,0xF0,0x12,0x87,
+
+	0x8B,0x12,0x95,0x68,0x12,0xA8,0x4D,0x12,
+
+	0x78,0x57,0x90,0x42,0x1B,0xE0,0x64,0x01,
+
+	0x70,0x34,0x90,0xF1,0x33,0xE0,0x70,0x2E,
+
+	0x90,0xF1,0x35,0xE0,0x70,0x28,0x90,0xF4,
+
+	0xC1,0xE0,0x64,0x02,0x70,0x20,0x90,0xF9,
+
+	0x00,0xE0,0x60,0x1A,0x90,0xF0,0x2B,0xE0,
+
+	0x70,0x14,0x90,0x42,0xFD,0xE0,0x70,0x0E,
+
+	0x90,0x43,0x4C,0xE0,0x60,0x08,0x90,0xFD,
+
+	0xA2,0x74,0x01,0xF0,0x80,0x05,0x90,0xFD,
+
+	0xA2,0xE4,0xF0,0x90,0xF5,0x4E,0xE0,0x60,
+
+	0x36,0xA3,0xE0,0x60,0x32,0x90,0xF9,0x03,
+
+	0xE0,0xFF,0x90,0xF4,0xC1,0xE0,0x6F,0x70,
+
+	0x23,0x90,0xF9,0x05,0xE0,0xB4,0x01,0x0A,
+
+	0xA3,0xE0,0xFF,0x90,0xF4,0xC4,0xE0,0xB5,
+
+	0x07,0x12,0x90,0xF9,0x05,0xE0,0x70,0x0F,
+
+	0x90,0xF9,0x07,0xE0,0xFF,0x90,0xF4,0xC5,
+
+	0xE0,0x6F,0x60,0x03,0x12,0xAF,0x97,0x7D,
+
+	0x00,0x7C,0x07,0xE4,0xFF,0x12,0xAB,0xED,
+
+	0x90,0xF9,0x99,0xE0,0x60,0x0E,0x90,0xF2,
+
+	0x1B,0x74,0x0C,0xF0,0x90,0x42,0x5F,0x74,
+
+	0x01,0xF0,0x80,0x06,0x90,0xF2,0x1B,0x74,
+
+	0x0D,0xF0,0x90,0xFD,0x33,0xE4,0xF0,0x04,
+
+	0xF0,0x90,0xFD,0x36,0xE0,0xB4,0x01,0xF9,
+
+	0x12,0xA3,0xB2,0x12,0xA5,0x15,0x90,0x43,
+
+	0xBC,0xE0,0x64,0x01,0x60,0x1E,0x90,0x43,
+
+	0xDD,0xE0,0xFF,0x90,0xFD,0x54,0xE0,0xC3,
+
+	0x9F,0x50,0x08,0x90,0x44,0xCA,0x74,0x01,
+
+	0xF0,0x80,0x09,0x90,0x44,0xCA,0xE0,0xB4,
+
+	0x01,0x02,0xE4,0xF0,0x12,0x82,0x1E,0x90,
+
+	0x44,0xAA,0xE0,0xB4,0x01,0x08,0x12,0x9E,
+
+	0xF5,0x12,0x78,0x57,0x80,0xF1,0x90,0x43,
+
+	0xDE,0xE0,0xB4,0x01,0x11,0x90,0xF5,0x4E,
+
+	0xE0,0x64,0x01,0x60,0x09,0xA3,0xE0,0x64,
+
+	0x01,0x60,0x03,0x12,0xAF,0x97,0x90,0x44,
+
+	0xCF,0xE0,0x75,0xF0,0x50,0x84,0xE5,0xF0,
+
+	0x70,0x03,0x12,0x79,0x8A,0x12,0x99,0xA0,
+
+	0x12,0x88,0x66,0x90,0x44,0xCF,0xE0,0x04,
+
+	0xF0,0xE0,0xC3,0x94,0xFA,0x50,0x03,0x02,
+
+	0x70,0x77,0x90,0x43,0xDE,0x74,0x01,0xF0,
+
+	0x90,0x42,0x0D,0xE0,0x64,0x01,0x60,0x09,
+
+	0x90,0x43,0x8D,0xE0,0x70,0x03,0x12,0x7E,
+
+	0x10,0x90,0x43,0xBB,0x74,0x01,0xF0,0x22,
+
+	0x90,0x41,0xEF,0xE0,0xD3,0x94,0x01,0x40,
+
+	0x0E,0x90,0xFD,0x0F,0x74,0x07,0xF0,0x90,
+
+	0xFD,0x29,0x74,0x01,0xF0,0x80,0x0A,0x90,
+
+	0xFD,0x0F,0xE4,0xF0,0x90,0xFD,0x29,0x04,
+
+	0xF0,0x90,0x42,0x46,0xE0,0x60,0x03,0x02,
+
+	0x72,0xA0,0x90,0x44,0xA6,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x7C,0x00,0x7D,0x64,0x12,0x4A,
+
+	0x23,0xED,0x4C,0x60,0x03,0x02,0x72,0xA0,
+
+	0x90,0xF9,0x80,0xE0,0xB4,0x01,0x15,0x90,
+
+	0x42,0x4C,0xE0,0x70,0x0F,0x04,0xF0,0x90,
+
+	0xF9,0x80,0xE4,0xF0,0xFF,0x7E,0x05,0x12,
+
+	0xAF,0x5E,0x80,0x7B,0x90,0xF9,0x80,0xE0,
+
+	0xB4,0x01,0x17,0x90,0x42,0x4C,0xE0,0xB4,
+
+	0x01,0x10,0x74,0x01,0xF0,0x90,0xF9,0x80,
+
+	0xE4,0xF0,0xFF,0x7E,0x05,0x12,0xAF,0x5E,
+
+	0x80,0x5D,0x90,0xF9,0x80,0xE0,0x70,0x57,
+
+	0x90,0x42,0x4C,0xE0,0x64,0x01,0x70,0x4F,
+
+	0xA2,0xAF,0x33,0x90,0x44,0xCC,0xF0,0xE4,
+
+	0x90,0x42,0x4C,0xF0,0xC2,0xAF,0x90,0xF7,
+
+	0x14,0xF0,0x7F,0xD4,0x7E,0x27,0x12,0xAF,
+
+	0x5E,0x90,0xF9,0x9D,0x74,0x01,0xF0,0x90,
+
+	0xF7,0x16,0xF0,0x90,0xF7,0x11,0xE4,0xF0,
+
+	0x74,0xFF,0xFF,0xFE,0x12,0xAF,0x5E,0x90,
+
+	0xF9,0x9D,0xE4,0xF0,0x90,0xF7,0x14,0x04,
+
+	0xF0,0x90,0xF7,0x0D,0xF0,0x90,0xF7,0x86,
+
+	0xF0,0xA3,0xF0,0x90,0xF7,0x11,0xF0,0x90,
+
+	0x44,0xCC,0xE0,0x24,0xFF,0x92,0xAF,0x90,
+
+	0x44,0xA7,0xE0,0x04,0xF0,0x70,0x06,0x90,
+
+	0x44,0xA6,0xE0,0x04,0xF0,0x90,0x42,0x44,
+
+	0xE0,0x70,0x0B,0x90,0x42,0x56,0xE0,0x70,
+
+	0x05,0x12,0xAD,0xFF,0x80,0x09,0x90,0xF0,
+
+	0x01,0xE0,0x60,0x03,0x12,0x83,0x14,0x90,
+
+	0x44,0xA6,0xE0,0xFE,0xA3,0xE0,0xFF,0x7C,
+
+	0x00,0x7D,0x0A,0x12,0x4A,0x23,0xED,0x4C,
+
+	0x70,0x13,0x90,0x43,0xBE,0xE0,0x60,0x0D,
+
+	0x90,0x41,0xD7,0xE0,0xB4,0x23,0x03,0x12,
+
+	0x69,0x1E,0x12,0xA5,0x99,0x90,0xF9,0x99,
+
+	0xE0,0x90,0x41,0xCE,0xF0,0x90,0x42,0x42,
+
+	0xE0,0x70,0x06,0x90,0x42,0x43,0xE0,0x60,
+
+	0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,0x90,
+
+	0x41,0xCD,0xEF,0xF0,0x90,0x44,0xA6,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x7C,0x00,0x7D,0x32,
+
+	0x12,0x4A,0x23,0xED,0x4C,0x70,0x0E,0x12,
+
+	0x8A,0x18,0x12,0x89,0x40,0x90,0x43,0x8D,
+
+	0xE0,0x60,0x02,0x14,0xF0,0xC2,0xCF,0x22,
+
+	0xE4,0x90,0x43,0xDE,0xF0,0x12,0xAE,0xFD,
+
+	0xE4,0x90,0x42,0xFB,0xF0,0x90,0x42,0xF9,
+
+	0xF0,0xA3,0xF0,0x12,0x8E,0x1F,0x90,0x42,
+
+	0xF8,0x74,0x01,0xF0,0x90,0x43,0xDF,0xE0,
+
+	0x60,0x0A,0x90,0xF1,0x2F,0x74,0x01,0xF0,
+
+	0x90,0xF1,0x0A,0xF0,0x90,0xF7,0x3C,0xE0,
+
+	0x70,0x03,0xA3,0x04,0xF0,0x12,0x9A,0xAE,
+
+	0x12,0xAF,0x90,0x12,0x7B,0xDB,0xE4,0xFF,
+
+	0x12,0xA7,0xB4,0x90,0xFD,0x32,0xE0,0x90,
+
+	0xFD,0x92,0xF0,0x90,0xFD,0x31,0xE0,0x90,
+
+	0xFD,0x91,0xF0,0x90,0xF2,0x1B,0x74,0x09,
+
+	0xF0,0xE4,0xFF,0x12,0x62,0x28,0x90,0xF2,
+
+	0x1B,0x74,0x0A,0xF0,0x90,0xFD,0xA1,0xE0,
+
+	0x60,0x06,0x90,0xF7,0x81,0x74,0x40,0xF0,
+
+	0x7F,0x04,0x12,0xAE,0x43,0x90,0xF5,0x3B,
+
+	0x74,0x01,0xF0,0xE4,0xFF,0x12,0xA7,0xB4,
+
+	0x12,0x7F,0x1C,0x90,0x43,0xBD,0xE0,0x60,
+
+	0x21,0x90,0xF7,0x3C,0xE0,0x70,0x16,0x90,
+
+	0xF7,0x40,0xF0,0x90,0xF5,0x54,0x04,0xF0,
+
+	0xE4,0x90,0x44,0x9E,0xF0,0x90,0x44,0x9D,
+
+	0xE0,0x90,0xF5,0x52,0xF0,0xE4,0x90,0x43,
+
+	0xB9,0xF0,0x90,0x41,0xCD,0x74,0x01,0xF0,
+
+	0x90,0x42,0x42,0xF0,0x12,0x7E,0x10,0x12,
+
+	0xAD,0xCE,0x7F,0x0A,0x12,0xAE,0x43,0x90,
+
+	0xF5,0xC8,0x74,0x01,0xF0,0x90,0xF7,0x8E,
+
+	0xF0,0x90,0x44,0x3B,0xF0,0x90,0x42,0x41,
+
+	0xE0,0x64,0x01,0x70,0x6D,0x90,0x43,0xD0,
+
+	0xE0,0x64,0x01,0x70,0x65,0x90,0xF0,0x2B,
+
+	0xE0,0x64,0x01,0x70,0x5D,0x90,0xF6,0x08,
+
+	0xE0,0x70,0x57,0xC2,0xEB,0x90,0xF7,0x8B,
+
+	0x74,0x02,0xF0,0x7F,0x01,0x12,0x80,0x20,
+
+	0x90,0x42,0x33,0xE0,0x90,0x44,0xCE,0xF0,
+
+	0x90,0xFD,0xA5,0x74,0x01,0xF0,0x90,0x43,
+
+	0xBC,0xF0,0x7F,0x08,0x12,0xAE,0x43,0x7F,
+
+	0x01,0x12,0x80,0x20,0x90,0x42,0x33,0xE0,
+
+	0xFF,0x90,0x44,0xCE,0xE0,0xC3,0x9F,0x40,
+
+	0x0B,0x90,0xFD,0xA5,0xE4,0xF0,0x90,0x43,
+
+	0xBC,0xF0,0x80,0x0A,0x90,0xFD,0xA5,0x74,
+
+	0x01,0xF0,0x90,0x43,0xBC,0xF0,0xE4,0x90,
+
+	0x43,0xD0,0xF0,0x90,0xF7,0x8B,0x04,0xF0,
+
+	0xD2,0xEB,0x12,0xA5,0x15,0x90,0xF7,0x31,
+
+	0xE0,0x60,0x05,0x7F,0x01,0x12,0xA3,0xFB,
+
+	0xE4,0x90,0x43,0xC7,0xF0,0x90,0x42,0xFD,
+
+	0x04,0xF0,0x12,0xAF,0x36,0x90,0xF2,0x1B,
+
+	0x74,0x0B,0xF0,0x22,0x90,0x42,0x5C,0xE0,
+
+	0x70,0x1A,0xA3,0xE0,0x64,0x0C,0x60,0x05,
+
+	0xE0,0x64,0x0D,0x70,0x22,0x90,0xF5,0x68,
+
+	0xE0,0xB4,0x0A,0x1B,0x90,0x42,0x5C,0x74,
+
+	0x01,0xF0,0x80,0x13,0x90,0x42,0x5D,0xE0,
+
+	0xB4,0x0C,0x0C,0x90,0xF5,0x69,0xE0,0xB4,
+
+	0x05,0x05,0xE4,0x90,0x42,0x5C,0xF0,0x90,
+
+	0x42,0x5C,0xE0,0xB4,0x01,0x19,0xA3,0xE0,
+
+	0xB4,0x0C,0x14,0x90,0xF5,0xC1,0xE0,0xB4,
+
+	0x01,0x0D,0x90,0x42,0x5D,0x74,0x03,0xF0,
+
+	0x90,0xF5,0x66,0xF0,0x02,0x75,0x99,0x90,
+
+	0x42,0x5C,0xE0,0xB4,0x01,0x0F,0xA3,0xE0,
+
+	0xB4,0x0D,0x0A,0x74,0x03,0xF0,0x90,0xF5,
+
+	0x66,0xF0,0x02,0x75,0x99,0x90,0x42,0x5C,
+
+	0xE0,0x70,0x15,0xA3,0xE0,0xB4,0x0C,0x10,
+
+	0x90,0xF5,0xC1,0xE0,0xB4,0x01,0x09,0x90,
+
+	0xF5,0x66,0x74,0x0C,0xF0,0x02,0x75,0x99,
+
+	0x90,0x42,0x5C,0xE0,0x70,0x16,0xA3,0xE0,
+
+	0xB4,0x0C,0x11,0x90,0xF5,0x69,0xE0,0xC3,
+
+	0x94,0x05,0x50,0x08,0x90,0xF5,0x66,0x74,
+
+	0x0C,0xF0,0x80,0x64,0x90,0x42,0x5C,0xE0,
+
+	0x64,0x01,0x70,0x1C,0xA3,0xE0,0xB4,0x0C,
+
+	0x17,0x90,0xF5,0xC1,0xE0,0x70,0x11,0x90,
+
+	0xF5,0x68,0xE0,0xC3,0x94,0x0A,0x50,0x08,
+
+	0x90,0xF5,0x66,0x74,0x0C,0xF0,0x80,0x40,
+
+	0x90,0x42,0x5C,0xE0,0x64,0x01,0x70,0x1E,
+
+	0xA3,0xE0,0xB4,0x0C,0x19,0x90,0xF5,0xC1,
+
+	0xE0,0x70,0x13,0x90,0xF5,0x68,0xE0,0xB4,
+
+	0x0A,0x0C,0x90,0x42,0x5D,0x74,0x03,0xF0,
+
+	0x90,0xF5,0x66,0xF0,0x80,0x1A,0x90,0x42,
+
+	0x5D,0xE0,0xB4,0x0D,0x08,0x90,0xF5,0x66,
+
+	0x74,0x0D,0xF0,0x80,0x0B,0x90,0x42,0x5D,
+
+	0xE0,0x04,0xF0,0xE0,0x90,0xF5,0x66,0xF0,
+
+	0x90,0x42,0x5D,0xE0,0x25,0xE0,0x24,0xA3,
+
+	0xF5,0x82,0xE4,0x34,0x42,0xF5,0x83,0xE0,
+
+	0xA3,0xE0,0x90,0xF5,0x5B,0xF0,0x90,0x42,
+
+	0x5D,0xE0,0x25,0xE0,0x24,0xBF,0xF5,0x82,
+
+	0xE4,0x34,0x42,0xF5,0x83,0xE0,0xA3,0xE0,
+
+	0x90,0xF5,0x5C,0xF0,0x90,0x42,0x5D,0xE0,
+
+	0x25,0xE0,0x24,0xDB,0xF5,0x82,0xE4,0x34,
+
+	0x42,0xF5,0x83,0xE0,0xA3,0xE0,0x90,0xF5,
+
+	0x5D,0xF0,0xA3,0xE4,0xF0,0x22,0x74,0xFF,
+
+	0x90,0x44,0xB9,0xF0,0xA3,0xF0,0x90,0x43,
+
+	0xE2,0xE0,0xFE,0xA3,0xE0,0xFF,0xC3,0x90,
+
+	0x43,0xE5,0xE0,0x9F,0xFF,0x90,0x43,0xE4,
+
+	0xE0,0x9E,0xFE,0x90,0x42,0x1D,0xE0,0xFD,
+
+	0x7C,0x00,0x12,0x4A,0x11,0x90,0x42,0x1C,
+
+	0xE0,0xFD,0xEF,0xA8,0x05,0x08,0x80,0x05,
+
+	0xCE,0xC3,0x13,0xCE,0x13,0xD8,0xF9,0xFF,
+
+	0x90,0x42,0x1E,0xE0,0x2F,0x90,0x44,0xB7,
+
+	0xF0,0x90,0x43,0xE1,0xE0,0x70,0x34,0x90,
+
+	0x43,0xE4,0xE0,0xFF,0xA3,0xE0,0x90,0x43,
+
+	0xF3,0xCF,0xF0,0xA3,0xEF,0xF0,0x90,0x43,
+
+	0xE2,0xE0,0xFF,0xA3,0xE0,0x90,0x43,0xF1,
+
+	0xCF,0xF0,0xA3,0xEF,0xF0,0x12,0x6E,0xC5,
+
+	0x90,0x43,0xF5,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0xE4,0xFC,0xFD,0x90,0x43,0xEA,0x12,0x4B,
+
+	0x6C,0x80,0x3F,0x90,0x43,0xE1,0xE0,0xB4,
+
+	0x01,0x16,0x12,0x6E,0xC5,0x90,0x43,0xF5,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xE4,0xFC,0xFD,
+
+	0x90,0x43,0xEA,0x12,0x4B,0x6C,0x80,0x22,
+
+	0x90,0x43,0xE4,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0x90,0x43,0xE3,0xE0,0x2F,0xFF,0x90,0x43,
+
+	0xE2,0xE0,0x3E,0xC3,0x13,0xFE,0xEF,0x13,
+
+	0xFF,0xE4,0xFC,0xFD,0x90,0x43,0xEA,0x12,
+
+	0x4B,0x6C,0x12,0x86,0xAE,0x90,0x43,0xE3,
+
+	0xE0,0x24,0xB0,0xF0,0x90,0x43,0xE2,0xE0,
+
+	0x34,0x02,0xF0,0x90,0x43,0xE5,0xE0,0x24,
+
+	0xB0,0xF0,0x90,0x43,0xE4,0xE0,0x34,0x02,
+
+	0xF0,0x90,0x43,0xE1,0xE0,0xFF,0x70,0x20,
+
+	0x90,0x44,0xB7,0xE0,0xA3,0xF0,0x90,0xF1,
+
+	0x09,0xF0,0x90,0x43,0xE9,0xE0,0x90,0xF1,
+
+	0x0E,0xF0,0x90,0x43,0xE8,0xE0,0x90,0xF1,
+
+	0x0F,0xF0,0xA3,0x74,0x01,0xF0,0x80,0x34,
+
+	0xEF,0x64,0x01,0x70,0x2F,0x90,0x43,0xEE,
+
+	0xE0,0x70,0x0A,0x90,0x44,0xB7,0xE0,0x90,
+
+	0xF1,0x0B,0xF0,0x80,0x0B,0x90,0x44,0xB8,
+
+	0xE0,0xFF,0xC3,0x13,0x90,0xF1,0x0B,0xF0,
+
+	0x90,0x43,0xE9,0xE0,0x90,0xF1,0x12,0xF0,
+
+	0x90,0x43,0xE8,0xE0,0x90,0xF1,0x13,0xF0,
+
+	0xA3,0x74,0x01,0xF0,0x90,0x43,0xE1,0xE0,
+
+	0x04,0xF0,0x22,0x90,0x42,0x59,0xE0,0x70,
+
+	0x1A,0xA3,0xE0,0x64,0x0C,0x60,0x05,0xE0,
+
+	0x64,0x0D,0x70,0x22,0x90,0xF4,0x1B,0xE0,
+
+	0xB4,0x0A,0x1B,0x90,0x42,0x59,0x74,0x01,
+
+	0xF0,0x80,0x13,0x90,0x42,0x5A,0xE0,0xB4,
+
+	0x0C,0x0C,0x90,0xF4,0x1C,0xE0,0xB4,0x0A,
+
+	0x05,0xE4,0x90,0x42,0x59,0xF0,0x90,0x42,
+
+	0x59,0xE0,0xB4,0x01,0x19,0xA3,0xE0,0xB4,
+
+	0x0C,0x14,0x90,0xF5,0xBA,0xE0,0xB4,0x01,
+
+	0x0D,0x90,0x42,0x5A,0x74,0x03,0xF0,0x90,
+
+	0xF4,0x19,0xF0,0x02,0x78,0x20,0x90,0x42,
+
+	0x59,0xE0,0xB4,0x01,0x0F,0xA3,0xE0,0xB4,
+
+	0x0D,0x0A,0x74,0x03,0xF0,0x90,0xF4,0x19,
+
+	0xF0,0x02,0x78,0x20,0x90,0x42,0x59,0xE0,
+
+	0x70,0x15,0xA3,0xE0,0xB4,0x0C,0x10,0x90,
+
+	0xF5,0xBA,0xE0,0xB4,0x01,0x09,0x90,0xF4,
+
+	0x19,0x74,0x0C,0xF0,0x02,0x78,0x20,0x90,
+
+	0x42,0x59,0xE0,0x70,0x16,0xA3,0xE0,0xB4,
+
+	0x0C,0x11,0x90,0xF4,0x1C,0xE0,0xC3,0x94,
+
+	0x0A,0x50,0x08,0x90,0xF4,0x19,0x74,0x0C,
+
+	0xF0,0x80,0x64,0x90,0x42,0x59,0xE0,0x64,
+
+	0x01,0x70,0x1C,0xA3,0xE0,0xB4,0x0C,0x17,
+
+	0x90,0xF5,0xBA,0xE0,0x70,0x11,0x90,0xF4,
+
+	0x1B,0xE0,0xC3,0x94,0x0A,0x50,0x08,0x90,
+
+	0xF4,0x19,0x74,0x0C,0xF0,0x80,0x40,0x90,
+
+	0x42,0x59,0xE0,0x64,0x01,0x70,0x1E,0xA3,
+
+	0xE0,0xB4,0x0C,0x19,0x90,0xF5,0xBA,0xE0,
+
+	0x70,0x13,0x90,0xF4,0x1B,0xE0,0xB4,0x0A,
+
+	0x0C,0x90,0x42,0x5A,0x74,0x03,0xF0,0x90,
+
+	0xF4,0x19,0xF0,0x80,0x1A,0x90,0x42,0x5A,
+
+	0xE0,0xB4,0x0D,0x08,0x90,0xF4,0x19,0x74,
+
+	0x0D,0xF0,0x80,0x0B,0x90,0x42,0x5A,0xE0,
+
+	0x04,0xF0,0xE0,0x90,0xF4,0x19,0xF0,0x90,
+
+	0x42,0x5A,0xE0,0x24,0x79,0xF5,0x82,0xE4,
+
+	0x34,0x42,0xF5,0x83,0xE0,0x90,0xF4,0x08,
+
+	0xF0,0x90,0x42,0x5A,0xE0,0x24,0x87,0xF5,
+
+	0x82,0xE4,0x34,0x42,0xF5,0x83,0xE0,0x90,
+
+	0xF4,0x09,0xF0,0x90,0x42,0x5A,0xE0,0x24,
+
+	0x95,0xF5,0x82,0xE4,0x34,0x42,0xF5,0x83,
+
+	0xE0,0x90,0xF4,0x0A,0xF0,0x22,0x90,0x42,
+
+	0x34,0xE0,0x70,0x03,0x02,0x79,0x89,0x90,
+
+	0xF0,0x2B,0xE0,0x70,0x16,0x90,0xF5,0x3E,
+
+	0xE0,0xD3,0x94,0x20,0x40,0x0D,0x90,0xF2,
+
+	0x17,0x74,0xFE,0xF0,0x90,0xF7,0x87,0x74,
+
+	0x01,0xF0,0x22,0x90,0xF7,0x32,0xE0,0x64,
+
+	0x01,0x70,0x2D,0x90,0x42,0x33,0xE0,0xFE,
+
+	0x90,0x44,0x9F,0xE0,0xFD,0xD3,0x9E,0x40,
+
+	0x05,0xED,0x9E,0xFF,0x80,0x0C,0x90,0x44,
+
+	0x9F,0xE0,0xFE,0x90,0x42,0x33,0xE0,0xC3,
+
+	0x9E,0xFF,0xEF,0xC3,0x94,0x0A,0x50,0x08,
+
+	0x90,0x44,0x9F,0xE0,0x90,0x42,0x33,0xF0,
+
+	0x90,0x42,0x33,0xE0,0xFE,0xC3,0x94,0x23,
+
+	0x50,0x07,0x90,0xF2,0x17,0x74,0xFE,0xF0,
+
+	0x22,0xEE,0xC3,0x94,0x28,0x50,0x13,0x90,
+
+	0xF2,0x17,0xE0,0xB4,0xFE,0x05,0xE0,0x64,
+
+	0xA6,0x60,0x07,0x90,0xF2,0x17,0x74,0xFE,
+
+	0xF0,0x22,0x90,0x42,0x33,0xE0,0xC3,0x94,
+
+	0x2D,0x50,0x13,0x90,0xF2,0x17,0xE0,0xB4,
+
+	0xFE,0x05,0xE0,0x64,0xA6,0x60,0x07,0x90,
+
+	0xF2,0x17,0x74,0xA6,0xF0,0x22,0x90,0x42,
+
+	0x33,0xE0,0xFE,0xC3,0x94,0x37,0x50,0x07,
+
+	0x90,0xF2,0x17,0x74,0xA6,0xF0,0x22,0xEE,
+
+	0xC3,0x94,0x3C,0x50,0x13,0x90,0xF2,0x17,
+
+	0xE0,0xB4,0xA6,0x05,0xE0,0x64,0x26,0x60,
+
+	0x07,0x90,0xF2,0x17,0x74,0xA6,0xF0,0x22,
+
+	0x90,0x42,0x33,0xE0,0xC3,0x94,0x41,0x50,
+
+	0x13,0x90,0xF2,0x17,0xE0,0xB4,0xA6,0x05,
+
+	0xE0,0x64,0x26,0x60,0x07,0x90,0xF2,0x17,
+
+	0x74,0x26,0xF0,0x22,0x90,0x42,0x33,0xE0,
+
+	0xFE,0xC3,0x94,0x4B,0x50,0x07,0x90,0xF2,
+
+	0x17,0x74,0x26,0xF0,0x22,0xEE,0xC3,0x94,
+
+	0x50,0x50,0x13,0x90,0xF2,0x17,0xE0,0xB4,
+
+	0x26,0x05,0xE0,0x64,0x25,0x60,0x07,0x90,
+
+	0xF2,0x17,0x74,0x26,0xF0,0x22,0x90,0x42,
+
+	0x33,0xE0,0xC3,0x94,0x55,0x50,0x13,0x90,
+
+	0xF2,0x17,0xE0,0xB4,0x26,0x05,0xE0,0x64,
+
+	0x25,0x60,0x07,0x90,0xF2,0x17,0x74,0x25,
+
+	0xF0,0x22,0x90,0xF2,0x17,0x74,0x25,0xF0,
+
+	0x22,0x90,0xF6,0x08,0xE0,0x90,0x44,0xA3,
+
+	0xF0,0x90,0xFD,0x29,0xE0,0x90,0x44,0xA4,
+
+	0xF0,0xE4,0xA3,0xF0,0x90,0x41,0xD5,0xE0,
+
+	0x70,0x05,0x90,0x43,0xC7,0xF0,0x22,0x90,
+
+	0xF5,0x4C,0xE0,0xFF,0x90,0xF5,0x41,0xE0,
+
+	0x4F,0x70,0x03,0x02,0x7A,0xB2,0x90,0x44,
+
+	0x62,0x74,0x02,0xF0,0xA3,0x74,0x39,0xF0,
+
+	0xE4,0xFB,0xFA,0xFD,0xFF,0x12,0x7C,0xF8,
+
+	0x90,0x44,0xA2,0xEF,0xF0,0xD3,0x94,0x32,
+
+	0x40,0x04,0xE0,0xFF,0x80,0x02,0x7F,0xFF,
+
+	0x90,0x44,0xA2,0xEF,0xF0,0xFD,0x90,0x44,
+
+	0x62,0xE4,0xF0,0xA3,0x74,0x32,0xF0,0xE4,
+
+	0xFB,0xFA,0x7F,0x01,0x12,0x7C,0xF8,0x90,
+
+	0x44,0xA1,0xEF,0xF0,0xD3,0x94,0x0A,0x40,
+
+	0x58,0x90,0xF1,0x14,0xE0,0x70,0x1E,0x04,
+
+	0xF0,0x90,0x43,0xDC,0xE0,0x90,0xF1,0x12,
+
+	0xF0,0x90,0x43,0xDB,0xE0,0x90,0xF1,0x13,
+
+	0xF0,0x90,0xF1,0x0B,0xE4,0xF0,0x90,0xF1,
+
+	0x0A,0x04,0xF0,0x80,0x34,0x90,0xF1,0x10,
+
+	0xE0,0x70,0x2E,0x90,0x43,0xDC,0xE0,0xFF,
+
+	0x90,0xF1,0x12,0xE0,0x6F,0x60,0x22,0x90,
+
+	0x43,0xDB,0xE0,0xFE,0x90,0xF1,0x13,0xE0,
+
+	0x6E,0x60,0x16,0x90,0xF1,0x10,0x74,0x01,
+
+	0xF0,0x90,0xF1,0x0E,0xEF,0xF0,0xA3,0xEE,
+
+	0xF0,0x90,0xF1,0x09,0xE4,0xF0,0xA3,0x04,
+
+	0xF0,0x90,0x44,0xA2,0xE0,0xFD,0x90,0x44,
+
+	0x62,0x74,0x02,0xF0,0xA3,0x74,0x39,0xF0,
+
+	0x7B,0xF4,0x7A,0x01,0x7F,0x01,0x12,0x7C,
+
+	0xF8,0x90,0x44,0xA1,0xEF,0xF0,0xD3,0x94,
+
+	0x19,0x40,0x3E,0x90,0xF1,0x14,0xE0,0x70,
+
+	0x38,0x04,0xF0,0x90,0x43,0xDA,0xE0,0x90,
+
+	0xF1,0x12,0xF0,0x90,0x43,0xD9,0xE0,0x90,
+
+	0xF1,0x13,0xF0,0x90,0xF1,0x0B,0x74,0x15,
+
+	0xF0,0x90,0xF1,0x10,0x74,0x01,0xF0,0x90,
+
+	0x43,0xD8,0xE0,0x90,0xF1,0x0E,0xF0,0x90,
+
+	0x43,0xD7,0xE0,0x90,0xF1,0x0F,0xF0,0x90,
+
+	0xF1,0x09,0x74,0x10,0xF0,0xA3,0x74,0x01,
+
+	0xF0,0x22,0x7E,0x41,0x7F,0x91,0xD3,0xEF,
+
+	0x94,0x56,0xEE,0x94,0x42,0x50,0x0D,0x8F,
+
+	0x82,0x8E,0x83,0xE4,0xF0,0x0F,0xBF,0x00,
+
+	0x01,0x0E,0x80,0xEA,0x12,0xAA,0xC8,0x12,
+
+	0xAA,0xF5,0x90,0x41,0x8B,0x74,0x41,0xF0,
+
+	0xA3,0x74,0x91,0xF0,0xE4,0x90,0x43,0xBE,
+
+	0xF0,0xD2,0xAF,0xD2,0xA8,0xC2,0xDB,0xD2,
+
+	0xEC,0xF5,0x13,0xF5,0x14,0x90,0x43,0xCE,
+
+	0xF0,0xA3,0xF0,0x90,0x43,0xB8,0xF0,0x90,
+
+	0x41,0xD2,0x04,0xF0,0x90,0x42,0x0F,0x74,
+
+	0x04,0xF0,0x90,0x42,0x12,0x74,0x0A,0xF0,
+
+	0x90,0x41,0xE0,0x74,0x03,0xF0,0xE4,0x90,
+
+	0x41,0xE1,0xF0,0xF5,0xF8,0x75,0xB8,0x12,
+
+	0xD2,0x88,0xD2,0xEB,0x90,0x43,0xB6,0xF0,
+
+	0x90,0x41,0xD1,0xF0,0x90,0x43,0xBD,0x04,
+
+	0xF0,0xE4,0x90,0x41,0xE7,0xF0,0x90,0x41,
+
+	0xE6,0x04,0xF0,0x90,0x41,0xEB,0xF0,0x90,
+
+	0x41,0xEC,0x04,0xF0,0xE4,0x90,0x41,0xED,
+
+	0xF0,0x90,0x41,0xEE,0xF0,0x90,0x42,0x0E,
+
+	0x04,0xF0,0x90,0x41,0xCB,0x74,0x10,0xF0,
+
+	0x90,0x41,0xCC,0x74,0x27,0xF0,0x90,0x41,
+
+	0xF6,0x74,0x50,0xF0,0x90,0x41,0xCA,0x74,
+
+	0x01,0xF0,0x90,0x42,0x20,0x74,0x20,0xF0,
+
+	0x90,0x42,0x21,0x74,0x2C,0xF0,0x90,0x42,
+
+	0x22,0x74,0x01,0xF0,0x90,0x42,0x1C,0x74,
+
+	0x07,0xF0,0x90,0x42,0x1D,0xF0,0x90,0x42,
+
+	0x1E,0x14,0xF0,0xE4,0x90,0x43,0xE1,0xF0,
+
+	0x90,0xF6,0x2E,0x74,0x64,0xF0,0xE4,0x90,
+
+	0x42,0x3F,0xF0,0x90,0x41,0xDC,0x04,0xF0,
+
+	0x90,0x44,0x37,0x12,0x4B,0x78,0x00,0x00,
+
+	0x00,0x00,0xE4,0x90,0x41,0xF3,0xF0,0x90,
+
+	0x41,0xF4,0xF0,0x90,0x41,0xF5,0xF0,0x90,
+
+	0x41,0xC0,0x04,0xF0,0x90,0x41,0xC8,0x74,
+
+	0x10,0xF0,0x90,0x41,0xC9,0x74,0x27,0xF0,
+
+	0xE4,0x90,0x41,0xD9,0xF0,0x90,0x41,0xDA,
+
+	0xF0,0x90,0x41,0xDB,0xF0,0x90,0x43,0xC8,
+
+	0xF0,0x90,0x43,0x90,0xF0,0x90,0x41,0xE3,
+
+	0xF0,0x22,0x90,0xF4,0xC1,0xE0,0x14,0x60,
+
+	0x46,0x14,0x60,0x7C,0x24,0x02,0x60,0x03,
+
+	0x02,0x7C,0x97,0x90,0xFD,0x19,0x74,0xCA,
+
+	0xF0,0xA3,0x74,0x08,0xF0,0xA3,0x74,0x4A,
+
+	0xF0,0xA3,0x74,0x0A,0xF0,0xA3,0x74,0xCA,
+
+	0xF0,0xA3,0x74,0x0C,0xF0,0xA3,0x74,0x4A,
+
+	0xF0,0xA3,0x74,0x10,0xF0,0xA3,0x74,0xCA,
+
+	0xF0,0xA3,0x74,0x14,0xF0,0xA3,0x74,0x4A,
+
+	0xF0,0xA3,0x74,0x1A,0xF0,0xA3,0x74,0xCA,
+
+	0xF0,0xA3,0x74,0x20,0xF0,0x80,0x6F,0x90,
+
+	0xFD,0x19,0x74,0x80,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0xF0,0xA3,0x74,0x02,0xF0,0xA3,0x74,
+
+	0x20,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,
+
+	0xE8,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,
+
+	0xB0,0xF0,0xA3,0x74,0x04,0xF0,0xA3,0x74,
+
+	0xDC,0xF0,0xA3,0x74,0x05,0xF0,0xA3,0x74,
+
+	0x34,0xF0,0xA3,0x74,0x08,0xF0,0x80,0x36,
+
+	0x90,0xFD,0x19,0x74,0x7D,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0x74,0xB4,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0xC8,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0xFA,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x2C,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0x52,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,
+
+	0x34,0xF0,0xA3,0x74,0x08,0xF0,0xE4,0xFD,
+
+	0xED,0x75,0xF0,0x02,0xA4,0x24,0x19,0xFF,
+
+	0xE5,0xF0,0x34,0xFD,0xFE,0x8F,0x82,0xF5,
+
+	0x83,0xE0,0xF9,0xA3,0xE0,0xFC,0x90,0xF9,
+
+	0x00,0xE0,0x70,0x18,0xEC,0x54,0x0F,0xFB,
+
+	0xC4,0x54,0xF0,0xFB,0xE9,0xC4,0x54,0x0F,
+
+	0x4B,0x8F,0x82,0x8E,0x83,0xF0,0xEC,0xC4,
+
+	0x54,0x0F,0xA3,0xF0,0x90,0xF9,0x00,0xE0,
+
+	0x64,0x02,0x70,0x1D,0xEC,0x54,0x0F,0xFB,
+
+	0x25,0xE0,0x25,0xE0,0xFB,0xAA,0x01,0xEA,
+
+	0x13,0x13,0x54,0x3F,0x4B,0x8F,0x82,0x8E,
+
+	0x83,0xF0,0xEC,0x13,0x13,0x54,0x3F,0xA3,
+
+	0xF0,0x0D,0xED,0xB4,0x07,0xA2,0x22,0x90,
+
+	0x44,0x5E,0xEF,0xF0,0xA3,0xED,0xF0,0xE4,
+
+	0x90,0x44,0x66,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0xAF,0x03,0x90,0x44,0x64,0xEA,
+
+	0xF0,0xA3,0xEF,0xF0,0x90,0x44,0x62,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0xA3,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xC3,0x9F,0xEC,0x9E,0x40,0x03,
+
+	0x02,0x7D,0xC4,0x90,0xF9,0x00,0xE0,0xB4,
+
+	0x02,0x0F,0x90,0x44,0x65,0xE0,0x25,0xE0,
+
+	0xFD,0x90,0x44,0x64,0xE0,0x33,0xFC,0x80,
+
+	0x1A,0x90,0xF9,0x00,0xE0,0xB4,0x01,0x13,
+
+	0x90,0x44,0x64,0xE0,0xFE,0xA3,0xE0,0x78,
+
+	0x02,0xC3,0x33,0xCE,0x33,0xCE,0xD8,0xF9,
+
+	0xFD,0xAC,0x06,0xED,0x90,0xF5,0x50,0xF0,
+
+	0xEC,0xA3,0xF0,0x90,0xF6,0x5B,0x74,0x01,
+
+	0xF0,0x7F,0x55,0x7E,0x0D,0x12,0xAF,0x5E,
+
+	0x20,0x8C,0xFD,0x90,0xF6,0x5F,0xE0,0xFF,
+
+	0x13,0x13,0x54,0x3F,0xFF,0x90,0x44,0x67,
+
+	0xE0,0x2F,0xF0,0x90,0x44,0x66,0xE0,0x34,
+
+	0x00,0xF0,0x90,0xF6,0x5F,0xE0,0xFF,0x90,
+
+	0x44,0x69,0xE0,0xC3,0x9F,0x50,0x08,0x90,
+
+	0xF6,0x5F,0xE0,0x90,0x44,0x69,0xF0,0x90,
+
+	0x44,0x5F,0xE0,0xFF,0x90,0xF6,0x5F,0xE0,
+
+	0xD3,0x9F,0x40,0x06,0x90,0x44,0x68,0xE0,
+
+	0x04,0xF0,0x90,0x44,0x65,0xE0,0x04,0xF0,
+
+	0x70,0x06,0x90,0x44,0x64,0xE0,0x04,0xF0,
+
+	0x02,0x7D,0x15,0x90,0x44,0x66,0xE0,0xFE,
+
+	0xA3,0xE0,0x78,0x07,0xCE,0xC3,0x13,0xCE,
+
+	0x13,0xD8,0xF9,0xFF,0x90,0x44,0x69,0xE0,
+
+	0xFE,0x13,0x13,0x54,0x3F,0xFD,0xEF,0xD3,
+
+	0x9D,0x40,0x13,0xEF,0x94,0x80,0x40,0x05,
+
+	0x74,0xFF,0xF0,0x80,0x10,0xEF,0x25,0xE0,
+
+	0x90,0x44,0x69,0xF0,0x80,0x07,0xEE,0xC3,
+
+	0x13,0x90,0x44,0x69,0xF0,0x90,0x44,0x5E,
+
+	0xE0,0x70,0x06,0x90,0x44,0x69,0xE0,0xFF,
+
+	0x22,0x90,0x44,0x68,0xE0,0xFF,0x22,0x90,
+
+	0x44,0xB3,0x74,0x01,0xF0,0xA3,0x04,0xF0,
+
+	0xA3,0xF0,0x90,0x43,0x91,0xE0,0x60,0x0A,
+
+	0x90,0x42,0x53,0xE0,0x60,0x04,0x7F,0x00,
+
+	0x80,0x05,0x90,0x42,0x1F,0xE0,0xFF,0x90,
+
+	0x44,0xB6,0xEF,0xF0,0x90,0x43,0xE0,0xE0,
+
+	0x14,0x70,0x03,0x02,0x7E,0xCC,0x04,0x60,
+
+	0x03,0x02,0x7E,0xFE,0x90,0x44,0xB6,0xE0,
+
+	0x60,0x09,0xE4,0xFD,0x7F,0x02,0x12,0xAF,
+
+	0x75,0x80,0x35,0x90,0x41,0xD1,0xE0,0xB4,
+
+	0x01,0x23,0x90,0xF9,0x01,0xE0,0x90,0x44,
+
+	0xB5,0xF0,0x90,0xF9,0x00,0xE0,0xFF,0x90,
+
+	0x44,0xB3,0xF0,0x60,0x0B,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0xE0,0x24,0x02,0xF0,0x80,0x05,
+
+	0xE4,0x90,0x44,0xB4,0xF0,0x90,0x44,0xB4,
+
+	0xE0,0xFF,0xA3,0xE0,0xFD,0x12,0xAF,0x75,
+
+	0x90,0xF4,0x63,0xE4,0xF0,0x90,0xF4,0x69,
+
+	0x74,0xFB,0xF0,0xA3,0xE4,0xF0,0x90,0xF4,
+
+	0x6D,0x74,0x05,0xF0,0x7F,0x01,0x12,0xAD,
+
+	0x78,0x12,0x9C,0x33,0x90,0x44,0xB6,0xE0,
+
+	0xFF,0x60,0x08,0x90,0xF9,0x00,0x74,0x01,
+
+	0xF0,0x80,0x08,0x90,0x44,0xB3,0xE0,0x90,
+
+	0xF9,0x00,0xF0,0x90,0xF5,0xC2,0x74,0x01,
+
+	0xF0,0xE4,0xF0,0xEF,0x60,0x05,0x12,0x54,
+
+	0x2E,0x80,0x32,0x90,0xF1,0x57,0xE0,0x60,
+
+	0x08,0x90,0xF1,0x49,0x74,0x01,0xF0,0xE4,
+
+	0xF0,0x7D,0xFF,0x7C,0x7F,0xE4,0xFF,0x12,
+
+	0xAB,0xED,0x90,0xF1,0x82,0xE0,0x70,0x15,
+
+	0x90,0xF1,0x57,0xE0,0x60,0x0F,0x90,0x44,
+
+	0xAA,0xE0,0xB4,0x01,0x08,0x90,0xF1,0x7C,
+
+	0xE0,0x60,0xE7,0x80,0xE5,0xE4,0x90,0x42,
+
+	0x60,0xF0,0x90,0xF1,0xB5,0xE0,0x90,0x42,
+
+	0x61,0xF0,0x90,0xF1,0xB4,0xE0,0x90,0x42,
+
+	0x62,0xF0,0x90,0xF1,0xB3,0xE0,0x90,0x42,
+
+	0x63,0xF0,0x22,0x90,0xF5,0xC8,0xE4,0xF0,
+
+	0x90,0xF5,0x75,0xF0,0x90,0xF5,0x74,0xF0,
+
+	0x90,0xF1,0xD0,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0x90,0xF5,0x6E,0x74,0x0A,0xF0,0x90,0xF5,
+
+	0x71,0x74,0x02,0xF0,0xA3,0x74,0x27,0xF0,
+
+	0xA3,0xE4,0xF0,0x90,0x42,0x3F,0xE0,0x64,
+
+	0x01,0x60,0x03,0x02,0x7F,0xD4,0x90,0xF5,
+
+	0xF7,0xE0,0xFE,0x90,0xF5,0xF6,0xE0,0x7C,
+
+	0x00,0x24,0x00,0xFF,0xEC,0x3E,0xFE,0xEF,
+
+	0x78,0x06,0xCE,0xC3,0x13,0xCE,0x13,0xD8,
+
+	0xF9,0x90,0x44,0xCB,0xF0,0x90,0xF9,0x00,
+
+	0xE0,0xB4,0x01,0x0C,0x90,0x44,0xCB,0xE0,
+
+	0xFF,0x13,0x13,0x54,0x3F,0xF0,0x80,0x0F,
+
+	0x90,0xF9,0x00,0xE0,0xB4,0x02,0x08,0x90,
+
+	0x44,0xCB,0xE0,0xFF,0xC3,0x13,0xF0,0x90,
+
+	0x44,0xCB,0xE0,0xFF,0xC3,0x94,0x04,0x40,
+
+	0x05,0x74,0x03,0xF0,0x80,0x21,0xEF,0xC3,
+
+	0x94,0x02,0x40,0x08,0x90,0x44,0xCB,0x74,
+
+	0x02,0xF0,0x80,0x13,0xEF,0xC3,0x94,0x01,
+
+	0x40,0x08,0x90,0x44,0xCB,0x74,0x01,0xF0,
+
+	0x80,0x05,0xE4,0x90,0x44,0xCB,0xF0,0x90,
+
+	0x44,0xCB,0xE0,0xFF,0x90,0xF9,0x01,0xE0,
+
+	0xC3,0x9F,0x50,0x0F,0xE0,0x90,0x44,0xCB,
+
+	0xF0,0x80,0x08,0x90,0xF9,0x01,0xE0,0x90,
+
+	0x44,0xCB,0xF0,0x90,0x44,0xCB,0xE0,0x14,
+
+	0x60,0x0F,0x14,0x60,0x11,0x14,0x60,0x13,
+
+	0x24,0x03,0x70,0x12,0x12,0x92,0x9B,0x80,
+
+	0x0D,0x12,0x94,0xB7,0x80,0x08,0x12,0x90,
+
+	0x6C,0x80,0x03,0x12,0x94,0x05,0x90,0xF9,
+
+	0x01,0xE0,0x14,0x60,0x0E,0x14,0x60,0x0F,
+
+	0x14,0x60,0x10,0x24,0x03,0x70,0x0F,0x12,
+
+	0x9E,0x25,0x22,0x12,0x9E,0x8D,0x22,0x12,
+
+	0xA0,0x27,0x22,0x12,0xA0,0x8B,0x22,0xAA,
+
+	0x07,0xEA,0x70,0x10,0x90,0xF7,0x86,0x04,
+
+	0xF0,0xA3,0xF0,0xE4,0x90,0x44,0x41,0xF0,
+
+	0x90,0x44,0x3F,0xF0,0xEA,0x64,0x01,0x70,
+
+	0x1D,0x90,0x44,0x3F,0x04,0xF0,0x90,0xF7,
+
+	0x86,0xF0,0xA3,0xF0,0x90,0xF7,0x86,0xE0,
+
+	0x70,0x06,0x90,0xF7,0x32,0xE0,0x70,0xF4,
+
+	0x90,0xF7,0x87,0xE0,0x60,0xEE,0x90,0xF7,
+
+	0x86,0xE0,0x70,0x09,0x90,0xF7,0x31,0xE0,
+
+	0x70,0x03,0x02,0x81,0x1A,0x90,0x44,0x3B,
+
+	0xE0,0xC3,0x94,0x01,0x50,0x03,0x02,0x81,
+
+	0x1A,0x90,0xF7,0x87,0xE0,0x70,0x03,0x02,
+
+	0x81,0x1A,0x90,0xF9,0x00,0xE0,0x70,0x04,
+
+	0x7B,0x04,0x80,0x0D,0x90,0xF9,0x00,0xE0,
+
+	0xB4,0x01,0x04,0x7B,0x06,0x80,0x02,0x7B,
+
+	0x05,0x90,0xF9,0x03,0xE0,0xFF,0xC3,0xEB,
+
+	0x9F,0xFB,0x90,0xF7,0x92,0xE0,0x90,0x41,
+
+	0xBD,0xF0,0x90,0xF7,0x93,0xE0,0x90,0x41,
+
+	0xBE,0xF0,0x90,0xF7,0x94,0xE0,0x90,0x41,
+
+	0xBF,0xF0,0x90,0xF7,0x8B,0xE0,0x90,0x41,
+
+	0xC0,0xF0,0x90,0xF7,0x97,0xE0,0x90,0x44,
+
+	0x3C,0xF0,0x90,0xF7,0x96,0xE0,0x90,0x44,
+
+	0x3D,0xF0,0x90,0xF7,0x95,0xE0,0x90,0x44,
+
+	0x3E,0xF0,0x90,0x44,0x3C,0xE0,0x90,0x44,
+
+	0x42,0xF0,0x90,0x44,0x3D,0xE0,0x90,0x44,
+
+	0x43,0xF0,0xAF,0x03,0x12,0xA9,0xD9,0x90,
+
+	0x44,0x43,0xE0,0x90,0x42,0x33,0xF0,0x90,
+
+	0x41,0xBF,0xE0,0x90,0x44,0x42,0xF0,0x90,
+
+	0x41,0xBE,0xE0,0x90,0x44,0x43,0xF0,0xAF,
+
+	0x03,0x12,0xA9,0xD9,0x90,0x44,0x43,0xE0,
+
+	0x90,0x42,0x32,0xF0,0x90,0xF7,0x86,0x74,
+
+	0x01,0xF0,0xA3,0xF0,0xE4,0x90,0x44,0x41,
+
+	0xF0,0xEA,0xB4,0x01,0x05,0xE4,0x90,0x44,
+
+	0x3F,0xF0,0x22,0xAD,0x07,0x90,0x43,0x70,
+
+	0xE0,0x90,0xF5,0xDB,0xF0,0x90,0x43,0x6F,
+
+	0xE0,0xFF,0x33,0x95,0xE0,0x90,0xF5,0xDC,
+
+	0xEF,0xF0,0x90,0x43,0x65,0xE0,0x90,0xF5,
+
+	0xFA,0xF0,0x90,0xF5,0xE8,0xE4,0xF0,0x90,
+
+	0x43,0x4D,0xE0,0x90,0xF5,0xE1,0xF0,0x90,
+
+	0xF5,0xE8,0xE0,0xB4,0x01,0xF9,0x90,0xF5,
+
+	0xE8,0xE4,0xF0,0x90,0xF5,0xE1,0x74,0x0D,
+
+	0xF0,0x90,0xF5,0xE8,0xE0,0xB4,0x01,0xF9,
+
+	0x90,0x43,0x4D,0x74,0x0E,0xF0,0x90,0xF5,
+
+	0xDD,0xE0,0x90,0x44,0xBF,0xF0,0x90,0xF5,
+
+	0xDE,0xE0,0x90,0x44,0xBE,0xF0,0xE0,0xC3,
+
+	0x94,0x20,0x40,0x04,0xE0,0x24,0xC0,0xF0,
+
+	0xED,0xB4,0x01,0x1C,0x90,0x43,0x73,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0x90,0x44,0xBF,0xE0,
+
+	0x2F,0xFF,0x90,0x44,0xBE,0xE0,0x3E,0x90,
+
+	0x43,0x75,0xF0,0xA3,0xEF,0xF0,0x80,0x1F,
+
+	0x90,0x44,0xBE,0xE0,0xFF,0xA3,0xE0,0x90,
+
+	0x43,0x75,0xCF,0xF0,0xA3,0xEF,0xF0,0x90,
+
+	0xF5,0xFB,0xE0,0x90,0x43,0x74,0xF0,0x90,
+
+	0xF5,0xFC,0xE0,0x90,0x43,0x73,0xF0,0x90,
+
+	0x43,0x76,0xE0,0x90,0xF4,0x66,0xF0,0x90,
+
+	0x43,0x75,0xE0,0x90,0xF4,0x67,0xF0,0x90,
+
+	0xF6,0x08,0xE0,0xFF,0x13,0x13,0x13,0x54,
+
+	0x1F,0x90,0xFD,0xA1,0xF0,0x90,0xF5,0xFC,
+
+	0xE0,0xFE,0x90,0xF5,0xFB,0xE0,0x7C,0x00,
+
+	0x24,0x00,0xFF,0xEC,0x3E,0xAD,0x07,0xFC,
+
+	0x90,0xF5,0x3D,0xE0,0xFE,0x90,0xF5,0x3C,
+
+	0xE0,0x7A,0x00,0x24,0x00,0xFF,0xEA,0x3E,
+
+	0xFE,0xEF,0x2D,0xFD,0xEE,0x3C,0xFF,0x33,
+
+	0x95,0xE0,0xA3,0xEF,0xF0,0xAF,0x05,0xEF,
+
+	0x90,0xF5,0x3C,0xF0,0x22,0x90,0x42,0x37,
+
+	0xE0,0x70,0x03,0x02,0x83,0x10,0xE4,0x90,
+
+	0x44,0xD4,0xF0,0x90,0x44,0xD4,0xE0,0xF9,
+
+	0xC3,0x94,0x08,0x50,0x7E,0x90,0x42,0xFB,
+
+	0xE0,0x75,0xF0,0x05,0xA4,0x24,0x64,0xFB,
+
+	0xE4,0x35,0xF0,0xFA,0xE9,0xFF,0x7E,0x00,
+
+	0x7C,0x02,0x7D,0x58,0x12,0x4A,0x11,0xEF,
+
+	0x2B,0xFF,0xEE,0x3A,0xFE,0x90,0x43,0x21,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0x12,0x4A,0x23,
+
+	0xA3,0xEC,0xF0,0xA3,0xED,0xF0,0x12,0xAC,
+
+	0x5B,0x12,0xAD,0x5A,0x90,0x44,0xD4,0xE0,
+
+	0x70,0x03,0x12,0xA6,0x99,0x90,0x43,0x0A,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x78,0x04,0x12,0x4B,0x32,
+
+	0x90,0x43,0x06,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0x12,
+
+	0x4B,0x21,0x50,0x0E,0x90,0x42,0xFA,0xE0,
+
+	0x04,0xF0,0x70,0x06,0x90,0x42,0xF9,0xE0,
+
+	0x04,0xF0,0x90,0x44,0xD4,0xE0,0x04,0xF0,
+
+	0x02,0x82,0x2C,0x90,0x42,0xFB,0xE0,0x04,
+
+	0xF0,0xE0,0x64,0x64,0x70,0x51,0x90,0xF9,
+
+	0x00,0xE0,0x60,0x08,0x90,0x43,0x35,0x74,
+
+	0x28,0xF0,0x80,0x06,0x90,0x43,0x35,0x74,
+
+	0x3E,0xF0,0x90,0x42,0x2B,0x74,0x01,0xF0,
+
+	0x90,0x43,0x35,0xE0,0xFF,0xD3,0x90,0x42,
+
+	0xFA,0xE0,0x9F,0x90,0x42,0xF9,0xE0,0x94,
+
+	0x00,0x40,0x0B,0xE4,0x90,0x41,0xE4,0xF0,
+
+	0x90,0x41,0xE5,0xF0,0x80,0x0A,0x90,0x41,
+
+	0xE4,0x74,0x01,0xF0,0x90,0x41,0xE5,0xF0,
+
+	0x90,0x42,0xFC,0xE0,0x04,0xF0,0xE4,0x90,
+
+	0x42,0xF9,0xF0,0xA3,0xF0,0xA3,0xF0,0x12,
+
+	0xA7,0x80,0x22,0x90,0xF0,0x02,0xE0,0x90,
+
+	0x43,0x8C,0xF0,0x90,0xF0,0x03,0xE0,0x90,
+
+	0x43,0x8B,0xF0,0x90,0xF0,0x03,0xE0,0x60,
+
+	0x04,0x7F,0xFF,0x80,0x05,0x90,0xF0,0x02,
+
+	0xE0,0xFF,0x90,0x42,0x40,0xEF,0xF0,0x90,
+
+	0xF0,0x63,0xE0,0xFE,0x90,0xF0,0x62,0xE0,
+
+	0x7C,0x00,0x24,0x00,0xFF,0xEC,0x3E,0x90,
+
+	0x43,0x9A,0xF0,0xA3,0xEF,0xF0,0x90,0x43,
+
+	0xAA,0xE0,0xFB,0x7A,0x00,0x90,0x43,0x9B,
+
+	0xE0,0x2B,0xFE,0x90,0x43,0x9A,0xE0,0x3A,
+
+	0x90,0x43,0x96,0xF0,0xA3,0xCE,0xF0,0xC3,
+
+	0x90,0x43,0x9B,0xE0,0x9B,0xFE,0x90,0x43,
+
+	0x9A,0xE0,0x9A,0x90,0x43,0x98,0xF0,0xA3,
+
+	0xCE,0xF0,0x90,0x43,0x97,0xE0,0x25,0xE0,
+
+	0xFF,0x90,0x43,0x96,0xE0,0x33,0xFE,0xD3,
+
+	0x90,0x43,0x8C,0xE0,0x9F,0x90,0x43,0x8B,
+
+	0xE0,0x9E,0x40,0x08,0x90,0x43,0x9C,0x74,
+
+	0xFC,0xF0,0x80,0x5F,0x90,0x43,0x96,0xE0,
+
+	0xFE,0xA3,0xE0,0xFF,0xD3,0x90,0x43,0x8C,
+
+	0xE0,0x9F,0x90,0x43,0x8B,0xE0,0x9E,0x40,
+
+	0x08,0x90,0x43,0x9C,0x74,0xFF,0xF0,0x80,
+
+	0x42,0x90,0x43,0x98,0xE0,0xC3,0x13,0xFE,
+
+	0xA3,0xE0,0x13,0xFF,0xC3,0x90,0x43,0x8C,
+
+	0xE0,0x9F,0x90,0x43,0x8B,0xE0,0x9E,0x50,
+
+	0x08,0x90,0x43,0x9C,0x74,0x04,0xF0,0x80,
+
+	0x22,0x90,0x43,0x98,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0xC3,0x90,0x43,0x8C,0xE0,0x9F,0x90,
+
+	0x43,0x8B,0xE0,0x9E,0x50,0x08,0x90,0x43,
+
+	0x9C,0x74,0x01,0xF0,0x80,0x05,0xE4,0x90,
+
+	0x43,0x9C,0xF0,0x90,0xF0,0x01,0x74,0x01,
+
+	0xF0,0x22,0x90,0x43,0x6E,0xE0,0xF9,0xB4,
+
+	0x01,0x37,0x90,0x43,0x66,0xE0,0x25,0xE0,
+
+	0x24,0x58,0xF5,0x82,0xE4,0x34,0x43,0xF5,
+
+	0x83,0xE0,0xFC,0xA3,0xE0,0xFD,0x90,0x43,
+
+	0x6F,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0xED,
+
+	0x9B,0xFD,0xEC,0x9A,0xFC,0x90,0x43,0x68,
+
+	0xE0,0x2D,0xFE,0x90,0x43,0x67,0xE0,0x3C,
+
+	0x90,0x44,0xC0,0xF0,0xA3,0xCE,0xF0,0x80,
+
+	0x72,0xE9,0xB4,0x02,0x32,0x90,0x43,0x71,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,0x62,
+
+	0xE0,0x2F,0xFF,0x90,0x43,0x61,0xE0,0x3E,
+
+	0xFE,0x90,0x43,0x67,0xE0,0xFC,0xA3,0xE0,
+
+	0xFD,0xC3,0xEF,0x9D,0xFF,0xEE,0x9C,0xFE,
+
+	0xC3,0xE4,0x9F,0xFF,0xE4,0x9E,0x90,0x44,
+
+	0xC0,0xF0,0xA3,0xEF,0xF0,0x80,0x3C,0x90,
+
+	0x43,0x6E,0xE0,0xB4,0x03,0x35,0x90,0x43,
+
+	0x66,0xE0,0x25,0xE0,0x24,0x58,0xF5,0x82,
+
+	0xE4,0x34,0x43,0xF5,0x83,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x43,0x6F,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xC3,0xEF,0x9D,0xFF,0xEE,0x9C,
+
+	0xFE,0x90,0x43,0x68,0xE0,0x2F,0xFF,0x90,
+
+	0x43,0x67,0xE0,0x3E,0x90,0x44,0xC0,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x44,0xC0,0xE0,0xFE,
+
+	0xA3,0xE0,0xFF,0x90,0x43,0x70,0xE0,0x2F,
+
+	0xF0,0x90,0x43,0x6F,0xE0,0x3E,0xF0,0x90,
+
+	0x44,0xC1,0xE0,0x90,0xF4,0x66,0xF0,0x90,
+
+	0x44,0xC0,0xE0,0x90,0xF4,0x67,0xF0,0x90,
+
+	0x43,0x68,0xE0,0x90,0xF5,0xF4,0xF0,0x90,
+
+	0x43,0x67,0xE0,0x90,0xF5,0xF5,0xF0,0x90,
+
+	0x43,0x4D,0x74,0x08,0xF0,0x22,0xC2,0xAF,
+
+	0x90,0xF7,0x7D,0xE0,0x64,0x01,0x70,0x57,
+
+	0x90,0xF7,0x32,0xE0,0x60,0x03,0x12,0x96,
+
+	0xBA,0x90,0xF7,0x3C,0xE0,0x60,0x03,0x02,
+
+	0x85,0xBF,0x90,0xF5,0xA9,0xE0,0x60,0x03,
+
+	0x02,0x85,0xBF,0x90,0xF7,0x32,0xE0,0xB4,
+
+	0x01,0x10,0x90,0xF7,0x7B,0xE0,0xB4,0x01,
+
+	0x09,0x90,0x43,0xBA,0x74,0x02,0xF0,0x12,
+
+	0xA4,0x44,0x90,0xF7,0x31,0xE0,0x64,0x01,
+
+	0x60,0x03,0x02,0x85,0xBF,0x90,0xF7,0x7C,
+
+	0xE0,0x64,0x01,0x60,0x03,0x02,0x85,0xBF,
+
+	0x90,0x44,0x9A,0x04,0xF0,0x90,0xF7,0x49,
+
+	0xE0,0x90,0x44,0x9C,0xF0,0x80,0x6F,0x90,
+
+	0x44,0x9B,0xE0,0x64,0x01,0x70,0x67,0x90,
+
+	0xF5,0xB9,0xE0,0x64,0x01,0x70,0x29,0x90,
+
+	0xF5,0xB3,0x04,0xF0,0x90,0xF4,0x60,0xE0,
+
+	0x70,0x05,0x12,0xAE,0xA0,0x80,0x0F,0x90,
+
+	0xF4,0x60,0xE0,0xB4,0x01,0x05,0x12,0xAE,
+
+	0xB0,0x80,0x03,0x12,0xAE,0xC0,0x90,0xF5,
+
+	0xB3,0xE4,0xF0,0x90,0x42,0x58,0x04,0xF0,
+
+	0x90,0xF5,0xC0,0xE0,0x64,0x01,0x70,0x29,
+
+	0x90,0xF5,0xBD,0x04,0xF0,0x90,0xF4,0x60,
+
+	0xE0,0x70,0x05,0x12,0xAF,0x0C,0x80,0x0F,
+
+	0x90,0xF4,0x60,0xE0,0xB4,0x01,0x05,0x12,
+
+	0xAE,0x7E,0x80,0x03,0x12,0xAE,0xD0,0x90,
+
+	0xF5,0xBD,0xE4,0xF0,0x90,0x42,0x57,0x04,
+
+	0xF0,0xE4,0x90,0x44,0xCD,0xF0,0x12,0xAB,
+
+	0x75,0x53,0x91,0xBF,0xE4,0x90,0x44,0x9B,
+
+	0xF0,0xD2,0xEA,0xD2,0xE9,0xD2,0xAF,0x22,
+
+	0x12,0xAC,0x9F,0x12,0x8F,0xAB,0x12,0x7A,
+
+	0xB3,0x90,0x44,0x71,0x74,0x01,0xF0,0xFB,
+
+	0x7A,0x44,0x79,0x6A,0x12,0xA1,0x52,0xD2,
+
+	0xAF,0x90,0xF2,0x1B,0xE4,0xF0,0x90,0x44,
+
+	0x71,0xE0,0x70,0xFA,0x12,0xAD,0xCE,0xE5,
+
+	0x13,0xB4,0x0A,0x00,0x40,0x03,0x02,0x86,
+
+	0x9E,0x90,0x86,0x09,0xF8,0x28,0x28,0x73,
+
+	0x02,0x86,0x27,0x02,0x86,0x2C,0x02,0x86,
+
+	0x31,0x02,0x86,0x36,0x02,0x86,0x3B,0x02,
+
+	0x86,0x40,0x02,0x86,0x45,0x02,0x86,0x4A,
+
+	0x02,0x86,0x6A,0x02,0x86,0x99,0x12,0xAE,
+
+	0x6C,0x80,0x75,0x12,0x9B,0xB3,0x80,0x70,
+
+	0x12,0x8B,0xBB,0x80,0x6B,0x12,0xAA,0x6A,
+
+	0x80,0x66,0x12,0x9C,0x33,0x80,0x61,0x12,
+
+	0xA8,0xE4,0x80,0x5C,0x12,0xA4,0x8D,0x80,
+
+	0x57,0x90,0xF5,0x05,0x74,0x01,0xF0,0x90,
+
+	0x43,0x8E,0xF0,0x12,0xAF,0x7E,0x90,0x43,
+
+	0xBB,0xE0,0xB4,0x01,0x05,0x7F,0x01,0x12,
+
+	0xAD,0x78,0x7F,0x01,0x12,0xAE,0x43,0x80,
+
+	0x37,0x12,0xA0,0xEF,0x12,0x8D,0x56,0x90,
+
+	0xF5,0x05,0xE4,0xF0,0x90,0x43,0xBB,0xE0,
+
+	0xB4,0x01,0x06,0x12,0x73,0x31,0x12,0xA0,
+
+	0xEF,0x90,0x43,0xBB,0xE0,0xB4,0x01,0x06,
+
+	0xE5,0x13,0x64,0x08,0x60,0x12,0xE4,0x90,
+
+	0x42,0x42,0xF0,0x12,0xAD,0xCE,0x80,0x08,
+
+	0x12,0x70,0x4E,0x80,0x03,0x12,0xAF,0x87,
+
+	0x12,0x9F,0xC1,0x12,0x97,0xF3,0x12,0xAD,
+
+	0xCE,0x02,0x85,0xF8,0x22,0x90,0x41,0xB5,
+
+	0xE0,0xFE,0x90,0x41,0xB4,0xE0,0x7C,0x00,
+
+	0x24,0x00,0xFF,0xEC,0x3E,0x90,0x44,0xC2,
+
+	0xF0,0xA3,0xEF,0xF0,0xE4,0x7F,0x50,0x7E,
+
+	0x0D,0xFD,0x90,0x43,0xEA,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xC3,0x12,0x4B,0x21,0x40,0x24,0x90,0x43,
+
+	0xEA,0xE0,0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,
+
+	0xFE,0xA3,0xE0,0x24,0xB0,0xFF,0xEE,0x34,
+
+	0xF2,0xFE,0xED,0x34,0xFF,0xFD,0xEC,0x34,
+
+	0xFF,0xFC,0x90,0x43,0xE6,0x12,0x4B,0x6C,
+
+	0x80,0x23,0x90,0x43,0xEA,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xC3,0x74,0x50,0x9B,0xFF,0x74,0x0D,0x9A,
+
+	0xFE,0xE4,0x99,0xFD,0xE4,0x98,0xFC,0x90,
+
+	0x43,0xE6,0x12,0x4B,0x6C,0x90,0x44,0xC2,
+
+	0xE0,0xFE,0xA3,0xE0,0xFF,0xE4,0xFC,0xFD,
+
+	0x90,0x43,0xE6,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0x12,0x4A,
+
+	0xAE,0x78,0x09,0x12,0x4B,0x32,0x90,0x43,
+
+	0xE6,0x12,0x4B,0x6C,0xE4,0x7F,0x50,0x7E,
+
+	0x0D,0xFD,0xFC,0x90,0x43,0xEA,0xE0,0xF8,
+
+	0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,
+
+	0xFB,0xC3,0x12,0x4B,0x21,0x50,0x22,0x90,
+
+	0x43,0xE6,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
+
+	0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0xE4,0x9B,
+
+	0xFF,0x74,0x40,0x9A,0xFE,0xE4,0x99,0xFD,
+
+	0xE4,0x98,0xFC,0x90,0x43,0xE6,0x12,0x4B,
+
+	0x6C,0x22,0xE4,0xFF,0xFE,0x90,0x44,0xD3,
+
+	0xF0,0x90,0x41,0xD7,0xE0,0xFD,0xB4,0x22,
+
+	0x07,0x90,0x42,0x04,0xE0,0x70,0x01,0x0F,
+
+	0xED,0xB4,0x28,0x08,0x90,0xF0,0x61,0xE0,
+
+	0x70,0x02,0x7F,0x01,0x90,0x41,0xD7,0xE0,
+
+	0xB4,0x22,0x19,0x90,0x43,0xAE,0xE0,0x24,
+
+	0xAB,0xF5,0x82,0xE4,0x34,0x43,0xF5,0x83,
+
+	0xE0,0xFD,0x90,0x42,0x04,0xE0,0xC3,0x9D,
+
+	0x50,0x02,0x7E,0x01,0x90,0x41,0xD7,0xE0,
+
+	0xB4,0x28,0x0B,0x90,0xF0,0x61,0xE0,0xC3,
+
+	0x94,0x70,0x50,0x02,0x7E,0x01,0x90,0x43,
+
+	0x8E,0xE0,0x64,0x03,0x60,0x08,0x90,0x42,
+
+	0x52,0xE0,0x64,0x01,0x60,0xF0,0x90,0x41,
+
+	0xE8,0xE0,0x70,0x70,0x90,0x41,0xE3,0xE0,
+
+	0x70,0x2C,0xEF,0x70,0x09,0x90,0x41,0xD5,
+
+	0xE0,0x60,0x61,0xEE,0x60,0x5E,0x90,0x41,
+
+	0xD7,0xE0,0xB4,0x22,0x06,0x90,0x43,0x8F,
+
+	0x74,0x14,0xF0,0x12,0xAB,0x20,0x90,0x43,
+
+	0x8D,0x74,0x32,0xF0,0x90,0x41,0xD5,0xE0,
+
+	0x60,0x42,0x12,0xAF,0x6A,0x22,0x90,0x41,
+
+	0xD7,0xE0,0xFF,0xB4,0x22,0x14,0x90,0x42,
+
+	0x04,0xE0,0xD3,0x94,0x40,0x40,0x0B,0x90,
+
+	0x41,0xD5,0xE0,0x70,0x05,0x90,0x44,0xD3,
+
+	0x04,0xF0,0xEF,0xB4,0x28,0x0F,0x90,0xF0,
+
+	0x61,0xE0,0xD3,0x94,0x90,0x40,0x06,0x90,
+
+	0x44,0xD3,0x74,0x01,0xF0,0x90,0x44,0xD3,
+
+	0xE0,0x60,0x09,0x90,0x43,0x8F,0x74,0x14,
+
+	0xF0,0x12,0xAB,0x4B,0x22,0xE4,0xFF,0x90,
+
+	0x43,0xCA,0xF0,0xA3,0xF0,0xA3,0xF0,0x90,
+
+	0xF9,0x00,0xE0,0x70,0x08,0x90,0x43,0xCD,
+
+	0x74,0x2D,0xF0,0x80,0x15,0x90,0xF9,0x00,
+
+	0xE0,0xB4,0x02,0x08,0x90,0x43,0xCD,0x74,
+
+	0x59,0xF0,0x80,0x06,0x90,0x43,0xCD,0x74,
+
+	0xB1,0xF0,0x90,0xF5,0x56,0xE4,0xF0,0xFF,
+
+	0x90,0x43,0xCD,0xE0,0xFE,0xEF,0xC3,0x9E,
+
+	0x40,0x03,0x02,0x89,0x39,0x90,0xF6,0x56,
+
+	0xEF,0xF0,0x90,0xF6,0x5A,0x74,0x01,0xF0,
+
+	0x90,0xF6,0x5A,0xE0,0x70,0xFA,0x90,0xF6,
+
+	0x5E,0xE0,0x90,0x43,0xC9,0xF0,0x90,0x43,
+
+	0xC7,0xE0,0xC3,0x94,0xC8,0x50,0x25,0x90,
+
+	0x41,0xD5,0xE0,0xB4,0x01,0x1E,0xEF,0xC3,
+
+	0x94,0x0E,0x40,0x0C,0x90,0x43,0xCD,0xE0,
+
+	0x24,0xF2,0xFE,0xEF,0xD3,0x9E,0x40,0x06,
+
+	0x90,0x43,0xC9,0x74,0x01,0xF0,0x90,0x43,
+
+	0xC7,0xE0,0x04,0xF0,0x90,0x43,0xC9,0xE0,
+
+	0x60,0x17,0x90,0x43,0xCB,0xE0,0xFE,0x74,
+
+	0x01,0xA8,0x06,0x08,0x80,0x02,0xC3,0x33,
+
+	0xD8,0xFC,0xFE,0x90,0x43,0xCA,0xE0,0x2E,
+
+	0xF0,0x90,0x43,0xCB,0xE0,0x04,0xF0,0xE0,
+
+	0x64,0x08,0x60,0x05,0xA3,0xE0,0xB4,0x16,
+
+	0x1B,0x90,0x43,0xCC,0xE0,0x90,0xF5,0x57,
+
+	0xF0,0x90,0x43,0xCA,0xE0,0x90,0xF5,0x55,
+
+	0xF0,0xE4,0x90,0x43,0xCA,0xF0,0xA3,0xF0,
+
+	0xA3,0xE0,0x04,0xF0,0x0F,0x02,0x88,0x99,
+
+	0x90,0xF5,0x56,0x74,0x01,0xF0,0x22,0x90,
+
+	0x44,0x44,0xE0,0x54,0x01,0xF0,0xC2,0xAF,
+
+	0x70,0x27,0x90,0xF7,0x02,0xE0,0x90,0xFB,
+
+	0x97,0xF0,0x90,0xF7,0x03,0xE0,0x90,0xFB,
+
+	0x98,0xF0,0x90,0xF7,0x04,0xE0,0x90,0xFB,
+
+	0x99,0xF0,0x90,0xF9,0x99,0xE0,0x90,0xFB,
+
+	0x9A,0xF0,0x7F,0x04,0x12,0xAD,0x3C,0x80,
+
+	0x53,0x90,0x44,0x44,0xE0,0x64,0x01,0x70,
+
+	0x4B,0x90,0x41,0xD7,0xE0,0xB4,0x22,0x0F,
+
+	0x90,0x42,0x04,0xE0,0x90,0xFB,0x97,0xF0,
+
+	0x7F,0x07,0x12,0xAD,0x3C,0x80,0x35,0x90,
+
+	0x43,0x8C,0xE0,0x90,0xFB,0x97,0xF0,0x90,
+
+	0x43,0x8B,0xE0,0x90,0xFB,0x98,0xF0,0x90,
+
+	0x42,0x2E,0xE0,0x90,0xFB,0x99,0xF0,0x90,
+
+	0x42,0x2F,0xE0,0x90,0xFB,0x9A,0xF0,0x90,
+
+	0xF0,0x60,0xE0,0x90,0xFB,0x9B,0xF0,0x90,
+
+	0xF0,0x61,0xE0,0x90,0xFB,0x9C,0xF0,0x7F,
+
+	0x05,0x12,0xAD,0x3C,0xD2,0xAF,0x90,0x44,
+
+	0x44,0xE0,0x04,0xF0,0x90,0xFB,0xA3,0xE0,
+
+	0x90,0x41,0xDA,0xF0,0x90,0xFB,0xA4,0xE0,
+
+	0x25,0xE0,0x25,0xE0,0x24,0x82,0x90,0x41,
+
+	0xDB,0xF0,0xE0,0xFF,0xC3,0x94,0x54,0x40,
+
+	0x06,0xE4,0x90,0x41,0xD9,0xF0,0x22,0xEF,
+
+	0xC3,0x94,0x32,0x40,0x12,0xEF,0x94,0x54,
+
+	0x50,0x0D,0xC3,0x74,0x53,0x9F,0x75,0xF0,
+
+	0x03,0xA4,0x90,0x41,0xD9,0xF0,0x22,0x90,
+
+	0x41,0xDB,0xE0,0xC3,0x94,0x32,0x50,0x06,
+
+	0x90,0x41,0xD9,0x74,0x64,0xF0,0x22,0x90,
+
+	0xF9,0x03,0xE0,0x90,0x41,0xC1,0xF0,0x90,
+
+	0xF9,0x00,0xE0,0x90,0x41,0xC2,0xF0,0x90,
+
+	0x44,0x41,0xE0,0x04,0xF0,0xE0,0xC3,0x94,
+
+	0x32,0x40,0x05,0xE4,0xFF,0x12,0x80,0x20,
+
+	0x90,0x44,0x3F,0xE0,0x70,0x05,0x7F,0x02,
+
+	0x12,0x80,0x20,0x90,0x44,0x40,0xE0,0x04,
+
+	0xF0,0xE0,0xC3,0x94,0x32,0x40,0x0B,0x90,
+
+	0xF7,0x0D,0x74,0x01,0xF0,0xE4,0x90,0x44,
+
+	0x40,0xF0,0x90,0xF7,0x0D,0xE0,0x60,0x5A,
+
+	0x90,0xF7,0x05,0xE0,0x90,0x41,0xC3,0xF0,
+
+	0x90,0xF7,0x06,0xE0,0x90,0x41,0xC4,0xF0,
+
+	0x90,0xF7,0x02,0xE0,0x90,0x41,0xC5,0xF0,
+
+	0x90,0xF7,0x03,0xE0,0x90,0x41,0xC6,0xF0,
+
+	0x90,0xF7,0x04,0xE0,0x90,0x41,0xC7,0xF0,
+
+	0x90,0xF7,0x00,0xE0,0x90,0x41,0xC8,0xF0,
+
+	0x90,0xF7,0x01,0xE0,0x90,0x41,0xC9,0xF0,
+
+	0x90,0xF7,0x0D,0x74,0x01,0xF0,0xE4,0x90,
+
+	0x44,0x40,0xF0,0x90,0x41,0xCF,0xE0,0x04,
+
+	0xF0,0xE0,0xFF,0x90,0x41,0xF6,0xE0,0xFE,
+
+	0xEF,0x8E,0xF0,0x84,0x90,0x41,0xCF,0xE5,
+
+	0xF0,0xF0,0x90,0xF7,0x00,0xE0,0xFF,0x90,
+
+	0x41,0xCB,0xE0,0xFE,0xB5,0x07,0x0C,0x90,
+
+	0xF7,0x01,0xE0,0xFF,0x90,0x41,0xCC,0xE0,
+
+	0x6F,0x60,0x18,0x90,0xF7,0x00,0xEE,0xF0,
+
+	0x90,0x41,0xCC,0xE0,0x90,0xF7,0x01,0xF0,
+
+	0x90,0xF7,0x0C,0x74,0x01,0xF0,0xE4,0xF0,
+
+	0xA3,0x04,0xF0,0x22,0x90,0xF5,0xEB,0xE0,
+
+	0x90,0x44,0xAC,0xF0,0x90,0xF5,0xEC,0xE0,
+
+	0x90,0x44,0xAB,0xF0,0x90,0xF5,0xED,0xE0,
+
+	0x90,0x44,0xAE,0xF0,0x90,0xF5,0xEE,0xE0,
+
+	0x90,0x44,0xAD,0xF0,0x90,0x43,0x6E,0xE0,
+
+	0xFF,0xB4,0x01,0x0A,0x74,0x02,0xF0,0x90,
+
+	0x43,0x4D,0x74,0x07,0xF0,0x22,0xEF,0x64,
+
+	0x02,0x60,0x08,0xEF,0x64,0x03,0x60,0x03,
+
+	0x02,0x8B,0xBA,0x90,0x43,0x64,0xE0,0xFF,
+
+	0x90,0x43,0x63,0xE0,0xFE,0x6F,0x70,0x2C,
+
+	0x90,0xF5,0xE9,0xE0,0x70,0x07,0x90,0x43,
+
+	0x65,0xEE,0xF0,0x80,0x18,0x90,0x41,0xEF,
+
+	0xE0,0x14,0xB5,0x06,0x07,0xE4,0x90,0x43,
+
+	0x65,0xF0,0x80,0x09,0x90,0x43,0x63,0xE0,
+
+	0x04,0x90,0x43,0x65,0xF0,0x90,0x43,0x4D,
+
+	0x74,0x0C,0xF0,0x22,0x90,0xF5,0xE9,0xE0,
+
+	0x70,0x18,0x90,0x43,0x63,0xE0,0xFF,0x90,
+
+	0x43,0x66,0xE0,0xB5,0x07,0x0C,0x90,0x43,
+
+	0x65,0xEF,0xF0,0x90,0x43,0x4D,0x74,0x0C,
+
+	0xF0,0x22,0x90,0xF5,0xE9,0xE0,0x70,0x0B,
+
+	0x90,0x43,0x66,0xE0,0x14,0x90,0x43,0x64,
+
+	0xF0,0x80,0x09,0x90,0x43,0x66,0xE0,0x04,
+
+	0x90,0x43,0x63,0xF0,0x90,0x43,0x64,0xE0,
+
+	0xFF,0x90,0x43,0x63,0xE0,0x2F,0xFF,0xC3,
+
+	0x13,0x90,0x43,0x66,0xF0,0x90,0x43,0x6E,
+
+	0x74,0x03,0xF0,0x90,0x43,0x4D,0x74,0x06,
+
+	0xF0,0x22,0x90,0xF0,0x2B,0xE4,0xF0,0x90,
+
+	0x42,0x44,0xE0,0x70,0x17,0x90,0xF1,0xE5,
+
+	0x04,0xF0,0x12,0xAE,0x59,0x12,0xAB,0x4B,
+
+	0x12,0x96,0x16,0x90,0x43,0xBB,0x74,0x01,
+
+	0xF0,0x02,0x8C,0x5E,0x90,0x44,0x47,0x74,
+
+	0x82,0xF0,0x90,0xFB,0x28,0xF0,0x12,0xAF,
+
+	0xA6,0x90,0x42,0x05,0xE0,0x90,0xF0,0x41,
+
+	0xF0,0x90,0xF0,0x2C,0x74,0x01,0xF0,0x90,
+
+	0xF1,0xE5,0xF0,0x75,0xF0,0x02,0xE5,0x13,
+
+	0xA4,0x24,0xC5,0xF5,0x82,0xE5,0xF0,0x34,
+
+	0xAF,0xF5,0x83,0xE4,0x93,0xFC,0x74,0x01,
+
+	0x93,0xFD,0xE4,0xFF,0x12,0xAB,0xED,0x90,
+
+	0x44,0xAA,0xE0,0xB4,0x01,0x04,0x7F,0x01,
+
+	0x80,0x02,0x7F,0x00,0x90,0xF1,0xE7,0xE0,
+
+	0x64,0x01,0x60,0x04,0x7E,0x01,0x80,0x02,
+
+	0x7E,0x00,0xEE,0x5F,0x70,0xE1,0x90,0xF1,
+
+	0xE7,0xE0,0xB4,0x01,0x04,0x7F,0x01,0x80,
+
+	0x02,0x7F,0x00,0x90,0x43,0xBB,0xEF,0xF0,
+
+	0xE0,0xB4,0x01,0x11,0x7D,0xFE,0x7C,0x27,
+
+	0xE4,0xFF,0x12,0xAB,0xED,0x90,0x44,0xAA,
+
+	0xE0,0x64,0x01,0x60,0xF8,0x90,0xF1,0x75,
+
+	0x74,0x01,0xF0,0x90,0x41,0xD7,0xE0,0xB4,
+
+	0x23,0x08,0x90,0x42,0x54,0xE0,0x90,0x44,
+
+	0x45,0xF0,0x12,0xAC,0x37,0x90,0xF0,0xD5,
+
+	0x74,0x01,0xF0,0x90,0xF0,0xE3,0xF0,0x90,
+
+	0xF0,0xE2,0xF0,0x90,0x43,0xBE,0xF0,0x22,
+
+	0x90,0x43,0xBD,0xE0,0x70,0x03,0x02,0x8D,
+
+	0x4F,0xC2,0xE9,0xE4,0x90,0x44,0x9B,0xF0,
+
+	0x90,0xF7,0x3C,0xE0,0xB4,0x01,0x04,0xC2,
+
+	0xEA,0x80,0x02,0xD2,0xEA,0x90,0xF7,0x0E,
+
+	0xE0,0xB4,0x01,0x20,0x90,0x43,0xB9,0xE0,
+
+	0xC3,0x94,0x02,0x50,0x11,0xE5,0x13,0xB4,
+
+	0x09,0x0C,0x12,0xAD,0xB2,0x90,0x43,0xB9,
+
+	0xE0,0x04,0xF0,0x02,0x8D,0x4F,0x12,0xA6,
+
+	0xD7,0x02,0x8D,0x4F,0x90,0xF5,0x54,0xE0,
+
+	0x64,0x01,0x70,0x7A,0x90,0xF0,0x2B,0xE0,
+
+	0x70,0x12,0x90,0x42,0x34,0xE0,0xB4,0x01,
+
+	0x0B,0x90,0xF2,0x17,0x74,0xFE,0xF0,0x90,
+
+	0x42,0x33,0x04,0xF0,0x90,0x44,0x9E,0xE0,
+
+	0xC3,0x94,0x02,0x50,0x18,0xE5,0x13,0xB4,
+
+	0x09,0x13,0x12,0xAD,0xB2,0x90,0x44,0x9D,
+
+	0xE0,0x90,0xF5,0x52,0xF0,0x90,0x44,0x9E,
+
+	0xE0,0x04,0xF0,0x80,0x41,0x90,0x43,0xBA,
+
+	0x74,0x02,0xF0,0x90,0xF7,0x0E,0xE0,0x64,
+
+	0x01,0x60,0x07,0x90,0xF7,0x40,0xE0,0xB4,
+
+	0x01,0x05,0x12,0xA6,0xD7,0x80,0x27,0x90,
+
+	0xF7,0x31,0xE0,0x60,0x0A,0xE4,0xFF,0x12,
+
+	0xA3,0xFB,0x12,0xAB,0xC7,0x80,0x11,0x90,
+
+	0xF7,0x3C,0xE0,0x70,0x03,0x12,0xAE,0x16,
+
+	0xE4,0x90,0x42,0x42,0xF0,0x12,0xAE,0xDF,
+
+	0x12,0xAE,0x8F,0x12,0xAD,0x95,0x12,0xAE,
+
+	0x8F,0x53,0x91,0x7F,0x22,0x90,0xF5,0xA8,
+
+	0xE4,0xF0,0x04,0xF0,0x75,0xF0,0x02,0xE5,
+
+	0x13,0xA4,0x24,0xC5,0xF5,0x82,0xE5,0xF0,
+
+	0x34,0xAF,0xF5,0x83,0xE4,0x93,0xFC,0x74,
+
+	0x01,0x93,0xFD,0xE4,0xFF,0x12,0xAB,0xED,
+
+	0x90,0x44,0xAA,0xE0,0xB4,0x01,0x04,0x7F,
+
+	0x01,0x80,0x02,0x7F,0x00,0x90,0xF5,0xA9,
+
+	0xE0,0x64,0x01,0x60,0x04,0x7E,0x01,0x80,
+
+	0x02,0x7E,0x00,0xEE,0x5F,0x70,0xE1,0x90,
+
+	0xF5,0xA9,0xE0,0xB4,0x01,0x04,0x7F,0x01,
+
+	0x80,0x02,0x7F,0x00,0x90,0x43,0xBB,0xEF,
+
+	0xF0,0xE0,0x64,0x01,0x70,0x40,0x90,0xF4,
+
+	0xCC,0xE0,0xFF,0x90,0xF9,0x08,0xF0,0x90,
+
+	0xF4,0xC1,0xE0,0xFF,0x90,0xF9,0x03,0xF0,
+
+	0x90,0xF4,0xC4,0xE0,0xFF,0x90,0xF9,0x06,
+
+	0xF0,0x90,0xF4,0xC5,0xE0,0xFF,0x90,0xF9,
+
+	0x07,0xF0,0x90,0xF4,0xC6,0xE0,0x54,0x03,
+
+	0xFF,0x90,0xF9,0x02,0xF0,0x70,0x05,0x90,
+
+	0xF9,0x05,0x04,0xF0,0x90,0x41,0xD1,0x74,
+
+	0x01,0xF0,0x90,0xF7,0x2F,0xF0,0x90,0xF1,
+
+	0x0F,0xE0,0xFE,0x90,0xF1,0x0E,0xE0,0x7C,
+
+	0x00,0x24,0x00,0xFF,0xEC,0x3E,0x90,0x43,
+
+	0xD1,0xF0,0xA3,0xEF,0xF0,0x90,0xF1,0x13,
+
+	0xE0,0xFE,0x90,0xF1,0x12,0xE0,0x24,0x00,
+
+	0xFF,0xEC,0x3E,0x90,0x43,0xD3,0xF0,0xA3,
+
+	0xEF,0xF0,0x12,0x95,0x68,0x22,0x90,0xF9,
+
+	0x00,0xE0,0xB4,0x01,0x10,0x90,0x43,0x20,
+
+	0x74,0x0C,0xF0,0xA3,0x74,0x1A,0xF0,0xA3,
+
+	0x74,0xA1,0xF0,0x80,0x24,0x90,0xF9,0x00,
+
+	0xE0,0x70,0x10,0x90,0x43,0x20,0x74,0x0A,
+
+	0xF0,0xA3,0x74,0x06,0xF0,0xA3,0x74,0xA9,
+
+	0xF0,0x80,0x0E,0x90,0x43,0x20,0x74,0x0B,
+
+	0xF0,0xA3,0x74,0x0D,0xF0,0xA3,0x74,0x51,
+
+	0xF0,0xE4,0xFF,0x7F,0x08,0x90,0x43,0x28,
+
+	0xE4,0xF0,0xA3,0xDF,0xFC,0x7F,0x08,0x90,
+
+	0xF4,0xC1,0xE0,0x14,0x60,0x12,0x14,0x60,
+
+	0x41,0x24,0x02,0x70,0x6E,0x90,0x43,0x1E,
+
+	0x74,0xB5,0xF0,0xA3,0x74,0x08,0xF0,0x22,
+
+	0x90,0xF4,0xC6,0xE0,0x14,0x60,0x0A,0x14,
+
+	0x60,0x12,0x14,0x60,0x1A,0x24,0x03,0x70,
+
+	0x52,0x90,0x43,0x1E,0x74,0xA2,0xF0,0xA3,
+
+	0x74,0x09,0xF0,0x22,0x90,0x43,0x1E,0x74,
+
+	0xE5,0xF0,0xA3,0x74,0x0A,0xF0,0x22,0x90,
+
+	0x43,0x1E,0x74,0x8E,0xF0,0xA3,0x74,0x0A,
+
+	0xF0,0x22,0x90,0xF4,0xC6,0xE0,0x14,0x60,
+
+	0x0A,0x14,0x60,0x12,0x14,0x60,0x1A,0x24,
+
+	0x03,0x70,0x20,0x90,0x43,0x1E,0x74,0x9E,
+
+	0xF0,0xA3,0x74,0x0A,0xF0,0x22,0x90,0x43,
+
+	0x1E,0x74,0x84,0xF0,0xA3,0x74,0x0A,0xF0,
+
+	0x22,0x90,0x43,0x1E,0x74,0xC5,0xF0,0xA3,
+
+	0x74,0x0B,0xF0,0x22,0x90,0xF5,0xCB,0xE0,
+
+	0xB4,0x01,0xF9,0x90,0xF5,0xD0,0xE0,0x90,
+
+	0x42,0xFF,0xF0,0x90,0xF5,0xCF,0xE0,0x90,
+
+	0x43,0x00,0xF0,0x90,0xF5,0xCE,0xE0,0x90,
+
+	0x43,0x01,0xF0,0x90,0x42,0xFE,0xE0,0xFC,
+
+	0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
+
+	0xFF,0x78,0x0A,0x12,0x4B,0x59,0x78,0x0A,
+
+	0x12,0x4B,0x45,0x90,0x42,0xFE,0x12,0x4B,
+
+	0x6C,0x90,0x43,0x1E,0xE0,0xFF,0xE4,0xFC,
+
+	0xFD,0xFE,0x90,0x42,0xFE,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0x12,0x4A,0xAE,0x90,0x43,0x1F,0xE0,0xF9,
+
+	0xF8,0x12,0x4B,0x45,0x90,0x42,0xFE,0x12,
+
+	0x4B,0x6C,0x90,0xF5,0xD3,0xE0,0x90,0x43,
+
+	0x03,0xF0,0x90,0xF5,0xD2,0xE0,0x90,0x43,
+
+	0x04,0xF0,0x90,0xF5,0xD1,0xE0,0x90,0x43,
+
+	0x05,0xF0,0x90,0x43,0x02,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0x78,0x0A,0x12,0x4B,0x59,0x78,0x0A,0x12,
+
+	0x4B,0x45,0x90,0x43,0x02,0x12,0x4B,0x6C,
+
+	0x90,0x43,0x1E,0xE0,0xFF,0xE4,0xFC,0xFD,
+
+	0xFE,0x90,0x43,0x02,0xE0,0xF8,0xA3,0xE0,
+
+	0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0x12,
+
+	0x4A,0xAE,0x90,0x43,0x1F,0xE0,0xF9,0xF8,
+
+	0x12,0x4B,0x45,0x90,0x43,0x02,0x12,0x4B,
+
+	0x6C,0x22,0xC2,0xAF,0x90,0x41,0x03,0x74,
+
+	0x02,0xF0,0xA3,0x74,0x91,0xF0,0xA3,0x74,
+
+	0x2C,0xF0,0x90,0x41,0x0B,0x74,0x02,0xF0,
+
+	0xA3,0x74,0x91,0xF0,0xA3,0x74,0x34,0xF0,
+
+	0x90,0x41,0x13,0x74,0x02,0xF0,0xA3,0x74,
+
+	0x91,0xF0,0xA3,0x74,0x3C,0xF0,0x90,0x41,
+
+	0x1B,0x74,0x02,0xF0,0xA3,0x74,0x91,0xF0,
+
+	0xA3,0x74,0x44,0xF0,0x90,0x41,0x23,0x74,
+
+	0x02,0xF0,0xA3,0x74,0x91,0xF0,0xA3,0x74,
+
+	0x4C,0xF0,0x90,0x41,0x2B,0x74,0x02,0xF0,
+
+	0xA3,0x74,0x91,0xF0,0xA3,0x74,0x54,0xF0,
+
+	0x90,0x41,0x33,0x74,0x02,0xF0,0xA3,0x74,
+
+	0x91,0xF0,0xA3,0x74,0x5C,0xF0,0x90,0x41,
+
+	0x3B,0x74,0x02,0xF0,0xA3,0x74,0x91,0xF0,
+
+	0xA3,0x74,0x64,0xF0,0x90,0x41,0x43,0x74,
+
+	0x02,0xF0,0xA3,0x74,0x91,0xF0,0xA3,0x74,
+
+	0x6C,0xF0,0x90,0x41,0x4B,0x74,0x02,0xF0,
+
+	0xA3,0x74,0x91,0xF0,0xA3,0x74,0x74,0xF0,
+
+	0x90,0x41,0x53,0x74,0x02,0xF0,0xA3,0x74,
+
+	0x91,0xF0,0xA3,0x74,0x7C,0xF0,0x90,0x41,
+
+	0x5B,0x74,0x02,0xF0,0xA3,0x74,0x91,0xF0,
+
+	0xA3,0x74,0x84,0xF0,0x90,0x41,0x63,0x74,
+
+	0x02,0xF0,0xA3,0x74,0x91,0xF0,0xA3,0x74,
+
+	0x8C,0xF0,0x90,0xAF,0xA0,0x74,0x32,0xF0,
+
+	0xD2,0xAF,0x22,0x90,0xF5,0x76,0x74,0xFF,
+
+	0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,0x9E,
+
+	0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,0x31,
+
+	0xF0,0xA3,0x74,0x02,0xF0,0xA3,0x74,0xB0,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x7B,0xF0,
+
+	0xA3,0x74,0x01,0xF0,0xA3,0x74,0x25,0xF0,
+
+	0xA3,0x74,0x03,0xF0,0xA3,0x74,0xEC,0xF0,
+
+	0xA3,0x74,0x02,0xF0,0xA3,0x74,0xE1,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0xB0,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x74,0x3A,0xF0,0xA3,0x74,
+
+	0x03,0xF0,0xA3,0x74,0xA2,0xF0,0xA3,0x74,
+
+	0x03,0xF0,0xA3,0x74,0x97,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0x74,0x26,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0x9C,0xF0,0xA3,0x74,0x03,0xF0,
+
+	0xA3,0x74,0xF9,0xF0,0xA3,0x74,0x03,0xF0,
+
+	0xA3,0x74,0x37,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0xFC,0xF0,0xA3,0x74,0x03,0xF0,0xA3,
+
+	0x74,0xE8,0xF0,0xA3,0x74,0x03,0xF0,0x90,
+
+	0xF5,0x6C,0xE4,0xF0,0xA3,0x74,0x05,0xF0,
+
+	0x90,0xF9,0x00,0xE0,0x70,0x0A,0x90,0xF5,
+
+	0x9E,0x74,0x19,0xF0,0xA3,0xE4,0xF0,0x22,
+
+	0x90,0xF9,0x00,0xE0,0xB4,0x01,0x0A,0x90,
+
+	0xF5,0x9E,0x74,0x65,0xF0,0xA3,0xE4,0xF0,
+
+	0x22,0x90,0xF5,0x9E,0x74,0x65,0xF0,0xA3,
+
+	0xE4,0xF0,0x22,0xC0,0xE0,0x75,0xE0,0x00,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x02,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x04,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x06,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x08,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x0A,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x0C,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x0E,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x10,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x12,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x14,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x16,
+
+	0x02,0x91,0x94,0xC0,0xE0,0x75,0xE0,0x18,
+
+	0x02,0x91,0x94,0xC0,0xD0,0x75,0xD0,0x00,
+
+	0xC0,0x86,0x75,0x86,0x00,0xC0,0x83,0xC0,
+
+	0x82,0xC0,0x85,0xC0,0x84,0xC0,0xF0,0xC0,
+
+	0x00,0xC0,0x01,0xC0,0x02,0xC0,0x03,0xC0,
+
+	0x04,0xC0,0x05,0xC0,0x06,0xC0,0x07,0x90,
+
+	0xAF,0xE3,0xF9,0x93,0xFA,0xE9,0x04,0x93,
+
+	0xF9,0x12,0x4B,0xA9,0xD0,0x07,0xD0,0x06,
+
+	0xD0,0x05,0xD0,0x04,0xD0,0x03,0xD0,0x02,
+
+	0xD0,0x01,0xD0,0x00,0xD0,0xF0,0xD0,0x84,
+
+	0xD0,0x85,0xD0,0x82,0xD0,0x83,0xD0,0x86,
+
+	0xD0,0xD0,0xD0,0xE0,0x32,0x4E,0x42,0x79,
+
+	0x99,0x46,0x01,0xE9,0x50,0x06,0xC6,0xB3,
+
+	0xB0,0xB0,0xAE,0xA8,0x9E,0x74,0x4E,0x42,
+
+	0x87,0x02,0x02,0x02,0x01,0x01,0x01,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x4E,
+
+	0x42,0x95,0x00,0x00,0x00,0x03,0x05,0x08,
+
+	0x0C,0x0F,0x10,0x10,0x10,0x0D,0x0B,0x05,
+
+	0x5C,0x42,0xA3,0x00,0x00,0x00,0x99,0x00,
+
+	0x00,0x00,0xE8,0x00,0x4B,0x00,0xFC,0x00,
+
+	0xAE,0x00,0x8B,0x00,0x79,0x00,0x70,0x00,
+
+	0x6C,0x00,0x6B,0x00,0x6B,0x00,0x14,0x5C,
+
+	0x42,0xBF,0x00,0x03,0x00,0x02,0x00,0x02,
+
+	0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x5C,0x42,
+
+	0xDB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+	0x01,0x00,0x01,0x00,0x02,0x00,0x03,0x00,
+
+	0x03,0x00,0x04,0x00,0x05,0x00,0x05,0x00,
+
+	0x06,0x00,0x06,0x00,0x03,0x43,0x43,0xAB,
+
+	0x3A,0x44,0x40,0x48,0x43,0x28,0x00,0x00,
+
+	0x00,0x00,0x00,0x00,0x00,0x00,0x50,0x43,
+
+	0x36,0x02,0x39,0x04,0xEE,0x08,0xFB,0x0E,
+
+	0xAA,0x10,0xD5,0x13,0x0D,0x14,0xC9,0x18,
+
+	0xFE,0x00,0x90,0xF5,0x76,0x74,0x20,0xF0,
+
+	0xA3,0x74,0x01,0xF0,0xA3,0x74,0x22,0xF0,
+
+	0xA3,0x74,0x02,0xF0,0xA3,0x74,0xFF,0xF0,
+
+	0xA3,0x74,0x01,0xF0,0xA3,0x74,0x7E,0xF0,
+
+	0xA3,0x74,0x02,0xF0,0xA3,0x74,0xA0,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0x74,0x51,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0xF0,0xA3,0x74,0x03,0xF0,
+
+	0xA3,0x74,0x40,0xF0,0xA3,0x74,0x01,0xF0,
+
+	0xA3,0x74,0xED,0xF0,0xA3,0x74,0x02,0xF0,
+
+	0xA3,0x74,0xA1,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0xDF,0xF0,0xA3,0x74,0x03,0xF0,0xA3,
+
+	0x74,0xC1,0xF0,0xA3,0x74,0x03,0xF0,0xA3,
+
+	0x74,0x68,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x9F,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,
+
+	0x3E,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0xE8,
+
+	0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,0xFF,
+
+	0xF0,0xA3,0x74,0x03,0xF0,0xA3,0x74,0x0A,
+
+	0xF0,0xA3,0xE4,0xF0,0x90,0xF9,0x00,0xE0,
+
+	0x70,0x0A,0x90,0xF5,0x9E,0x74,0x3F,0xF0,
+
+	0xA3,0xE4,0xF0,0x22,0x90,0xF9,0x00,0xE0,
+
+	0xB4,0x01,0x0A,0x90,0xF5,0x9E,0x74,0xFB,
+
+	0xF0,0xA3,0xE4,0xF0,0x22,0x90,0xF5,0x9E,
+
+	0x74,0x7D,0xF0,0xA3,0xE4,0xF0,0x22,0x90,
+
+	0x41,0xD7,0xE0,0x64,0x22,0x70,0x34,0x90,
+
+	0x41,0xD4,0xE0,0x70,0x06,0x90,0x41,0xD5,
+
+	0xE0,0x60,0x28,0x90,0x43,0x9C,0xE0,0x60,
+
+	0x22,0x90,0x42,0x0B,0xE0,0xFF,0x90,0x42,
+
+	0x04,0xE0,0xB5,0x07,0x16,0x7F,0x12,0x12,
+
+	0xAD,0x3C,0x90,0xFB,0xA2,0xE0,0x90,0x42,
+
+	0x04,0xF0,0x90,0x43,0x8F,0x74,0x14,0xF0,
+
+	0x12,0xA8,0x1A,0x90,0x42,0x04,0xE0,0x90,
+
+	0x43,0xA6,0xF0,0x90,0x43,0x9C,0xE0,0xFF,
+
+	0x60,0x42,0x90,0x43,0xA9,0xE0,0x60,0x02,
+
+	0x14,0xF0,0xEF,0x30,0xE7,0x0B,0x12,0xAD,
+
+	0xE8,0x90,0x43,0x9C,0xE0,0x04,0xF0,0x80,
+
+	0x09,0x12,0xAC,0xFE,0x90,0x43,0x9C,0xE0,
+
+	0x14,0xF0,0x90,0x41,0xD5,0xE0,0x60,0x17,
+
+	0x90,0x43,0xA7,0xE0,0xB4,0x03,0x15,0x12,
+
+	0xA8,0x1A,0xE4,0x90,0x43,0xA7,0xF0,0x90,
+
+	0x43,0xA9,0x74,0x20,0xF0,0x80,0x05,0x12,
+
+	0xAF,0x28,0x80,0xB7,0x90,0x42,0x04,0xE0,
+
+	0xFF,0x90,0x42,0x3D,0xF0,0x90,0x42,0x53,
+
+	0xE0,0x60,0x18,0x90,0x42,0x0B,0xE0,0xFE,
+
+	0xEF,0xB5,0x06,0x0F,0x90,0x43,0x9D,0xE0,
+
+	0xD3,0x94,0x40,0x50,0x06,0x90,0x43,0x90,
+
+	0x74,0x01,0xF0,0x22,0x90,0xF5,0x76,0x74,
+
+	0x06,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0xC1,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0xFF,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0xB8,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0x0C,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0x36,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x79,
+
+	0xF0,0xA3,0x74,0x03,0xF0,0xA3,0xF0,0xA3,
+
+	0xF0,0xA3,0x74,0xE7,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0x74,0x18,0xF0,0xA3,0x74,0x03,
+
+	0xF0,0xA3,0x74,0x74,0xF0,0xA3,0x74,0x03,
+
+	0xF0,0xA3,0x74,0xD6,0xF0,0xA3,0x74,0x03,
+
+	0xF0,0xA3,0x74,0x1E,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0x41,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0x43,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x30,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x18,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x07,0xF0,
+
+	0xA3,0xE4,0xF0,0x90,0xF9,0x00,0xE0,0x70,
+
+	0x0A,0x90,0xF5,0x9E,0x74,0x19,0xF0,0xA3,
+
+	0xE4,0xF0,0x22,0x90,0xF9,0x00,0xE0,0xB4,
+
+	0x01,0x0A,0x90,0xF5,0x9E,0x74,0x65,0xF0,
+
+	0xA3,0xE4,0xF0,0x22,0x90,0xF5,0x9E,0x74,
+
+	0x32,0xF0,0xA3,0xE4,0xF0,0x22,0x90,0xF5,
+
+	0x76,0x74,0x72,0xF0,0xA3,0x74,0x01,0xF0,
+
+	0xA3,0xF0,0xA3,0x04,0xF0,0xA3,0x74,0x5C,
+
+	0xF0,0xA3,0x74,0x01,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0xF0,0xA3,0x74,0xCD,0xF0,0xA3,0x74,
+
+	0x02,0xF0,0xA3,0x74,0x8E,0xF0,0xA3,0x74,
+
+	0x01,0xF0,0xA3,0x04,0xF0,0xA3,0x04,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0xF0,0xA3,0x74,0xC3,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0x74,0x16,0xF0,
+
+	0xA3,0x74,0x03,0xF0,0xA3,0x74,0x89,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,
+
+	0x74,0xA9,0xF0,0xA3,0x74,0x03,0xF0,0xA3,
+
+	0x74,0x5D,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0xD0,0xF0,0xA3,0x74,0x03,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0xF0,0xA3,0x74,0x15,0xF0,0xA3,
+
+	0xE4,0xF0,0xA3,0x74,0xEF,0xF0,0xA3,0x74,
+
+	0x03,0xF0,0x90,0xF5,0x6C,0x74,0x80,0xF0,
+
+	0xA3,0x74,0x06,0xF0,0x90,0xF9,0x00,0xE0,
+
+	0x70,0x0A,0x90,0xF5,0x9E,0x74,0x3F,0xF0,
+
+	0xA3,0xE4,0xF0,0x22,0x90,0xF9,0x00,0xE0,
+
+	0xB4,0x01,0x0A,0x90,0xF5,0x9E,0x74,0xFB,
+
+	0xF0,0xA3,0xE4,0xF0,0x22,0x90,0xF5,0x9E,
+
+	0x74,0x7D,0xF0,0xA3,0xE4,0xF0,0x22,0x90,
+
+	0xF1,0x10,0xE0,0x64,0x01,0x60,0x03,0x02,
+
+	0x96,0x09,0x90,0xF1,0x14,0xE0,0x64,0x01,
+
+	0x60,0x03,0x02,0x96,0x09,0xD3,0x90,0x43,
+
+	0xD2,0xE0,0x94,0x10,0x90,0x43,0xD1,0xE0,
+
+	0x94,0x35,0x40,0x0C,0xA3,0xE0,0x94,0x30,
+
+	0x90,0x43,0xD1,0xE0,0x94,0x38,0x40,0x1B,
+
+	0xD3,0x90,0x43,0xD4,0xE0,0x94,0x10,0x90,
+
+	0x43,0xD3,0xE0,0x94,0x35,0x40,0x61,0xA3,
+
+	0xE0,0x94,0x30,0x90,0x43,0xD3,0xE0,0x94,
+
+	0x38,0x50,0x55,0x90,0xF4,0xC1,0xE0,0x64,
+
+	0x01,0x70,0x25,0x90,0xF9,0x00,0xE0,0x70,
+
+	0x0C,0x90,0xF5,0x4B,0x74,0x05,0xF0,0x90,
+
+	0xF6,0x55,0x74,0x20,0xF0,0x90,0xF9,0x00,
+
+	0xE0,0xB4,0x01,0x0C,0x90,0xF5,0x4B,0x74,
+
+	0x04,0xF0,0x90,0xF6,0x55,0x74,0x10,0xF0,
+
+	0x90,0xF4,0xC1,0xE0,0x64,0x02,0x70,0x2C,
+
+	0x90,0xF9,0x00,0xE0,0x70,0x06,0x90,0xF5,
+
+	0x4B,0x74,0x09,0xF0,0x90,0xF9,0x00,0xE0,
+
+	0xB4,0x01,0x06,0x90,0xF5,0x4B,0x74,0x08,
+
+	0xF0,0x90,0xF6,0x55,0x74,0x20,0xF0,0x22,
+
+	0x90,0xF5,0x4B,0x74,0x14,0xF0,0x90,0xF6,
+
+	0x55,0x74,0x20,0xF0,0x22,0xC2,0xAD,0x90,
+
+	0x41,0xD7,0xE0,0xB4,0x22,0x0B,0x7F,0x14,
+
+	0x12,0xAD,0x3C,0x90,0x43,0xAF,0x74,0x01,
+
+	0xF0,0x12,0xA7,0xE7,0x90,0x42,0x53,0xE0,
+
+	0x60,0x05,0xE4,0x90,0x43,0x8D,0xF0,0x90,
+
+	0xF0,0x01,0x74,0x01,0xF0,0xE4,0x90,0x44,
+
+	0xD2,0xF0,0x90,0xF0,0x01,0xE0,0xB4,0x01,
+
+	0xF9,0x12,0x83,0x14,0x90,0x43,0x9C,0xE0,
+
+	0x60,0x20,0x12,0x93,0x50,0x7D,0x33,0x7C,
+
+	0x01,0xE4,0xFF,0x12,0xAB,0xED,0x90,0x44,
+
+	0xAA,0xE0,0x64,0x01,0x60,0xF8,0x90,0x44,
+
+	0xD2,0xE0,0x04,0xF0,0xE0,0xC3,0x94,0x30,
+
+	0x40,0xD0,0xE4,0x90,0x43,0x94,0xF0,0xA3,
+
+	0xF0,0x90,0x43,0x92,0xF0,0xA3,0xF0,0x90,
+
+	0x42,0x04,0xE0,0x90,0x43,0x9D,0xF0,0xD2,
+
+	0xAD,0x90,0x41,0xD7,0xE0,0xB4,0x22,0x10,
+
+	0x90,0x42,0x4B,0xE0,0x60,0x0A,0x7F,0x15,
+
+	0x12,0xAD,0x3C,0xE4,0x90,0x43,0xAF,0xF0,
+
+	0x90,0x42,0x53,0xE0,0x60,0x12,0x90,0x42,
+
+	0x04,0xE0,0x70,0x0C,0x90,0x42,0x40,0xE0,
+
+	0xD3,0x94,0xD0,0x40,0x03,0x12,0xAB,0x20,
+
+	0x22,0x90,0xF7,0x66,0xE0,0x90,0x44,0xC8,
+
+	0xF0,0xE0,0xFF,0x90,0x42,0x43,0xF0,0x90,
+
+	0xF7,0x68,0xE0,0x90,0x44,0xA0,0xF0,0x90,
+
+	0xF5,0xA9,0xE0,0x70,0x09,0xEF,0x60,0x06,
+
+	0x90,0x44,0x9A,0xE0,0x60,0x04,0x7F,0x01,
+
+	0x80,0x02,0x7F,0x00,0x90,0x44,0x9A,0xEF,
+
+	0xF0,0x70,0x03,0x12,0xA4,0x44,0x90,0xF5,
+
+	0xA9,0xE0,0x70,0x2A,0x90,0xF7,0x63,0xE0,
+
+	0x90,0x42,0x2B,0xF0,0x90,0xF7,0x64,0xE0,
+
+	0x90,0x41,0xE4,0xF0,0x90,0xF7,0x65,0xE0,
+
+	0x90,0x44,0x9F,0xF0,0x12,0x9A,0xAE,0x90,
+
+	0x44,0xC8,0xE0,0x90,0x41,0xCD,0xF0,0xE4,
+
+	0x90,0x42,0x42,0xF0,0x80,0x0A,0x90,0x41,
+
+	0xCD,0x74,0x01,0xF0,0x90,0x42,0x42,0xF0,
+
+	0x12,0xA7,0x80,0xE4,0x90,0x44,0xC9,0xF0,
+
+	0x7F,0x00,0x7E,0x28,0x12,0xAF,0x5E,0x20,
+
+	0x8C,0xFD,0x90,0x44,0xC9,0xE0,0x04,0xF0,
+
+	0xE0,0xC3,0x94,0x05,0x40,0xEA,0x12,0xAD,
+
+	0xCE,0x90,0xF7,0x69,0xE0,0x70,0xFA,0x90,
+
+	0xF7,0x6B,0x74,0x01,0xF0,0xE4,0xF0,0x22,
+
+	0x90,0xF5,0xCC,0xE4,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0x90,0xF5,0xD4,0xE0,0x90,0x43,0x09,
+
+	0xF0,0x90,0xF5,0xCB,0xE0,0xB4,0x01,0xF9,
+
+	0x12,0xAD,0x5A,0x90,0xFD,0x33,0xE4,0xF0,
+
+	0x04,0xF0,0x90,0xFD,0x36,0xE0,0xB4,0x01,
+
+	0xF9,0x12,0xA6,0x99,0x90,0x43,0x06,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x43,0x0A,0xE0,0xF8,0xA3,
+
+	0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,
+
+	0xC3,0x12,0x4B,0x21,0x50,0x06,0x90,0x43,
+
+	0x33,0xE0,0x04,0xF0,0x90,0x43,0x06,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x78,0x02,0x12,0x4B,0x45,0x90,
+
+	0x43,0x06,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
+
+	0xE0,0xFA,0xA3,0xE0,0x2F,0xFF,0xEA,0x3E,
+
+	0xFE,0xE9,0x3D,0xFD,0xE8,0x3C,0xFC,0x90,
+
+	0x43,0x0A,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
+
+	0xE0,0xFA,0xA3,0xE0,0xFB,0xD3,0x12,0x4B,
+
+	0x21,0x40,0x06,0x90,0x43,0x32,0xE0,0x04,
+
+	0xF0,0x22,0x90,0x41,0xD2,0xE0,0x70,0x1D,
+
+	0x90,0xF9,0x57,0xE0,0x54,0xFD,0x44,0x02,
+
+	0xF0,0x90,0x41,0xD2,0x74,0x01,0xF0,0xE4,
+
+	0x90,0x43,0xB8,0xF0,0x90,0x43,0xB6,0xF0,
+
+	0xA3,0xF0,0xF5,0x13,0x22,0x90,0x43,0xB7,
+
+	0xE0,0x60,0x68,0x90,0x43,0xBB,0xE0,0xB4,
+
+	0x01,0x0C,0xE5,0x13,0x90,0xAF,0xA7,0x93,
+
+	0xF5,0x13,0xE4,0xF5,0x14,0x22,0xE5,0x13,
+
+	0x70,0x05,0xF5,0x13,0xF5,0x14,0x22,0xE5,
+
+	0x13,0x90,0xAF,0xD9,0x93,0xB5,0x14,0x1C,
+
+	0x90,0x43,0xCE,0xE0,0xB5,0x13,0x05,0x75,
+
+	0x13,0x01,0x80,0x0C,0x90,0x43,0xCE,0xE5,
+
+	0x13,0xF0,0x90,0xAF,0xBB,0x93,0xF5,0x13,
+
+	0xE4,0xF5,0x14,0x22,0xE5,0x13,0x90,0xAF,
+
+	0xB1,0x93,0xFF,0xB5,0x13,0x03,0x05,0x14,
+
+	0x22,0x90,0x43,0xCF,0xE0,0xB5,0x13,0x08,
+
+	0x90,0xAF,0xBB,0x93,0xF5,0x13,0x80,0x08,
+
+	0x90,0x43,0xCF,0xE5,0x13,0xF0,0x8F,0x13,
+
+	0xE4,0xF5,0x14,0x22,0xE4,0xFB,0xEB,0x25,
+
+	0xE0,0x24,0x36,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xE0,0xFF,0xA3,0xE0,0x90,0x43,
+
+	0x23,0xCF,0xF0,0xA3,0xEF,0xF0,0x12,0xA5,
+
+	0xDA,0x90,0xF5,0xD0,0xE0,0xFF,0xC4,0x13,
+
+	0x54,0x07,0xFF,0x90,0xF5,0xD3,0xE0,0xFE,
+
+	0xC4,0x13,0x54,0x07,0x6F,0x60,0x0D,0x74,
+
+	0x28,0x2B,0xF5,0x82,0xE4,0x34,0x43,0xF5,
+
+	0x83,0xE0,0x04,0xF0,0x0B,0xEB,0xB4,0x08,
+
+	0xBD,0x90,0x43,0x26,0xE0,0x04,0xF0,0xE0,
+
+	0xC3,0x94,0x13,0x40,0x3D,0xE4,0xFF,0xFB,
+
+	0x74,0x28,0x2B,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xE0,0xFE,0xD3,0x94,0x0E,0x50,
+
+	0x06,0xEE,0xC3,0x94,0x05,0x50,0x01,0x0F,
+
+	0x74,0x28,0x2B,0xF5,0x82,0xE4,0x34,0x43,
+
+	0xF5,0x83,0xE4,0xF0,0x0B,0xEB,0xB4,0x08,
+
+	0xD7,0xEF,0xD3,0x94,0x06,0x40,0x06,0x90,
+
+	0x42,0x38,0x74,0x01,0xF0,0xE4,0x90,0x43,
+
+	0x26,0xF0,0x22,0x78,0x7F,0xE4,0xF6,0xD8,
+
+	0xFD,0x75,0x81,0x14,0x02,0x99,0x5B,0x02,
+
+	0x85,0xD1,0xE4,0x93,0xA3,0xF8,0xE4,0x93,
+
+	0xA3,0x40,0x03,0xF6,0x80,0x01,0xF2,0x08,
+
+	0xDF,0xF4,0x80,0x29,0xE4,0x93,0xA3,0xF8,
+
+	0x54,0x07,0x24,0x0C,0xC8,0xC3,0x33,0xC4,
+
+	0x54,0x0F,0x44,0x20,0xC8,0x83,0x40,0x04,
+
+	0xF4,0x56,0x80,0x01,0x46,0xF6,0xDF,0xE4,
+
+	0x80,0x0B,0x01,0x02,0x04,0x08,0x10,0x20,
+
+	0x40,0x80,0x90,0x91,0xE6,0xE4,0x7E,0x01,
+
+	0x93,0x60,0xBC,0xA3,0xFF,0x54,0x3F,0x30,
+
+	0xE5,0x09,0x54,0x1F,0xFE,0xE4,0x93,0xA3,
+
+	0x60,0x01,0x0E,0xCF,0x54,0xC0,0x25,0xE0,
+
+	0x60,0xA8,0x40,0xB8,0xE4,0x93,0xA3,0xFA,
+
+	0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0xC8,
+
+	0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xF0,
+
+	0xA3,0xC8,0xC5,0x82,0xC8,0xCA,0xC5,0x83,
+
+	0xCA,0xDF,0xE9,0xDE,0xE7,0x80,0xBE,0x90,
+
+	0xF1,0x14,0xE0,0xFF,0x90,0x43,0xD6,0xE0,
+
+	0x6F,0x60,0x04,0x7F,0x01,0x80,0x02,0x7F,
+
+	0x00,0x90,0xF1,0x10,0xE0,0xFE,0x90,0x43,
+
+	0xD5,0xE0,0x6E,0x60,0x04,0x7E,0x01,0x80,
+
+	0x02,0x7E,0x00,0xEE,0x4F,0xFF,0x90,0x42,
+
+	0x2A,0xE0,0x64,0x01,0x70,0x3C,0x90,0xF5,
+
+	0x41,0xE0,0x60,0x03,0xEF,0x60,0x40,0x90,
+
+	0xF5,0x41,0xE4,0xF0,0x04,0xF0,0x90,0xF5,
+
+	0x4C,0xE0,0xB4,0x01,0xF9,0x90,0xF6,0x5D,
+
+	0x74,0x01,0xF0,0x90,0xF1,0x10,0xE0,0x70,
+
+	0x06,0x90,0xF1,0x14,0xE0,0x60,0x20,0x90,
+
+	0xF4,0xC1,0xE0,0x70,0x1A,0x90,0xF4,0xC4,
+
+	0xE0,0x70,0x14,0x90,0xF6,0x5C,0x04,0xF0,
+
+	0x80,0x0D,0x90,0xF5,0x41,0xE4,0xF0,0x90,
+
+	0xF6,0x5D,0xF0,0x90,0xF6,0x5C,0xF0,0x90,
+
+	0xF1,0x10,0xE0,0x90,0x43,0xD5,0xF0,0x90,
+
+	0xF1,0x14,0xE0,0x90,0x43,0xD6,0xF0,0x22,
+
+	0x90,0x44,0x85,0xEE,0xF0,0xA3,0xEF,0xF0,
+
+	0xA3,0xED,0xF0,0xE4,0xA3,0xF0,0xA3,0xF0,
+
+	0xA3,0xF0,0x90,0xF4,0x1D,0xE0,0x90,0x44,
+
+	0x8B,0xF0,0x90,0x42,0x64,0xE0,0xFC,0xA3,
+
+	0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,
+
+	0x90,0x44,0x88,0xE0,0xF8,0xA3,0xE0,0xF9,
+
+	0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0xC3,0x12,
+
+	0x4B,0x0B,0x40,0x48,0x90,0x44,0x88,0xE0,
+
+	0xFC,0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0x90,0x42,0x64,0x12,0x4B,0x6C,
+
+	0x90,0x44,0x85,0xE0,0xFF,0xA3,0xE0,0x90,
+
+	0x42,0x6C,0xCF,0xF0,0xA3,0xEF,0xF0,0x90,
+
+	0x44,0x87,0xE0,0x70,0x10,0x90,0x42,0x66,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x42,0x68,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x22,0x90,0x42,0x66,
+
+	0xE0,0xFF,0xA3,0xE0,0x90,0x42,0x6A,0xCF,
+
+	0xF0,0xA3,0xEF,0xF0,0x22,0x90,0xF9,0x05,
+
+	0xE0,0x60,0x0A,0x90,0xF4,0xC4,0xE0,0x90,
+
+	0x44,0x74,0xF0,0x80,0x08,0x90,0xF4,0xC5,
+
+	0xE0,0x90,0x44,0x74,0xF0,0x90,0x44,0x74,
+
+	0xE0,0x14,0x60,0x20,0x14,0x60,0x2F,0x14,
+
+	0x60,0x3D,0x14,0x60,0x4B,0x24,0x04,0x70,
+
+	0x57,0x90,0xF7,0x7F,0x74,0xE0,0xF0,0xA3,
+
+	0x74,0x01,0xF0,0xA3,0x74,0xBB,0xF0,0xA3,
+
+	0x74,0x01,0xF0,0x22,0x90,0xF7,0x7F,0x74,
+
+	0x40,0xF0,0xA3,0x74,0x01,0xF0,0xA3,0x74,
+
+	0x55,0xF0,0xA3,0xE4,0xF0,0x22,0x90,0xF7,
+
+	0x7F,0x74,0xFA,0xF0,0xA3,0xE4,0xF0,0xA3,
+
+	0x74,0x30,0xF0,0xA3,0xE4,0xF0,0x22,0x90,
+
+	0xF7,0x7F,0x74,0xF5,0xF0,0xA3,0xE4,0xF0,
+
+	0xA3,0x74,0x15,0xF0,0xA3,0xE4,0xF0,0x22,
+
+	0x90,0xF7,0x7F,0x74,0xA0,0xF0,0xA3,0xE4,
+
+	0xF0,0xA3,0x74,0x15,0xF0,0xA3,0xE4,0xF0,
+
+	0x22,0xE4,0xFD,0x90,0xF5,0xF7,0xE0,0xFE,
+
+	0x90,0xF5,0xF6,0xE0,0x7A,0x00,0x24,0x00,
+
+	0xFF,0xEA,0x3E,0x90,0x43,0x4E,0xF0,0xA3,
+
+	0xEF,0xF0,0x90,0x43,0x4E,0xE0,0xFE,0xA3,
+
+	0xE0,0xFF,0xC3,0x94,0x40,0xEE,0x94,0x08,
+
+	0x40,0x0A,0xD3,0xEF,0x94,0x60,0xEE,0x94,
+
+	0x08,0x50,0x01,0x0D,0x90,0x41,0xEF,0xE0,
+
+	0x64,0x02,0x70,0x45,0xED,0x64,0x01,0x70,
+
+	0x40,0x90,0xF9,0x04,0xE0,0x64,0x01,0x70,
+
+	0x38,0x90,0xF9,0x01,0xE0,0x64,0x03,0x70,
+
+	0x30,0x90,0xF9,0x00,0xE0,0x64,0x01,0x70,
+
+	0x28,0x90,0xF9,0x03,0xE0,0x64,0x02,0x70,
+
+	0x20,0x90,0x43,0x65,0xE0,0xFF,0x70,0x0B,
+
+	0x90,0xF5,0x6C,0x74,0xE5,0xF0,0xA3,0x74,
+
+	0x01,0xF0,0x22,0xEF,0xB4,0x01,0x0A,0x90,
+
+	0xF5,0x6C,0x74,0x1B,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0x22,0x90,0x41,0xD6,0xE0,0xB4,0x01,
+
+	0x0B,0x90,0xF0,0x7F,0x74,0x01,0xF0,0xA3,
+
+	0xE4,0xF0,0x80,0x08,0x90,0xF0,0x7F,0xE4,
+
+	0xF0,0xA3,0x04,0xF0,0x90,0x43,0x4B,0x74,
+
+	0x01,0xF0,0xE4,0x90,0x41,0xD1,0xF0,0x90,
+
+	0xF7,0x3C,0xE0,0x60,0x09,0xE4,0x90,0x41,
+
+	0xCE,0xF0,0x90,0x41,0xCD,0xF0,0xE4,0x90,
+
+	0x43,0x47,0xF0,0xA3,0xF0,0x90,0x43,0x49,
+
+	0xF0,0xA3,0xF0,0x90,0x44,0x3B,0x04,0xF0,
+
+	0x12,0x64,0xA5,0x90,0x41,0xE6,0xE0,0x70,
+
+	0x04,0x7F,0x01,0x80,0x02,0x7F,0x00,0x90,
+
+	0x42,0x5F,0xEF,0xF0,0x12,0xAA,0x3A,0x12,
+
+	0xAF,0x90,0x90,0x43,0xD0,0x74,0x01,0xF0,
+
+	0xE4,0x90,0x43,0xBE,0xF0,0x90,0xF7,0x31,
+
+	0xE0,0xB4,0x01,0x03,0x12,0xAC,0x7D,0xE4,
+
+	0x90,0x43,0xBC,0xF0,0x90,0x43,0xBB,0x04,
+
+	0xF0,0x22,0x7F,0xD4,0x7E,0x27,0x12,0xAF,
+
+	0x5E,0x20,0x8C,0xFD,0x90,0xF1,0x48,0x74,
+
+	0x01,0xF0,0x90,0xF0,0x92,0xE4,0xF0,0x90,
+
+	0xF0,0x91,0x04,0xF0,0x90,0xF0,0x94,0xF0,
+
+	0x90,0xF0,0x81,0xF0,0x90,0xF0,0x91,0xE4,
+
+	0xF0,0xA3,0x04,0xF0,0x90,0xF0,0x94,0xE0,
+
+	0xB4,0x01,0xF9,0x90,0xF1,0xFB,0xE4,0xF0,
+
+	0x90,0xF1,0xFA,0x04,0xF0,0x90,0xF1,0xFD,
+
+	0xF0,0x90,0xF1,0xFC,0xF0,0x90,0xF1,0xFA,
+
+	0xE4,0xF0,0xA3,0x04,0xF0,0x90,0xF1,0xFD,
+
+	0xE0,0xB4,0x01,0xF9,0x90,0xF1,0xF7,0xE4,
+
+	0xF0,0x90,0xF1,0xF6,0x04,0xF0,0x90,0xF1,
+
+	0xF9,0xF0,0x90,0xF1,0xF8,0x04,0xF0,0x90,
+
+	0xF2,0x14,0x14,0xF0,0x90,0xF1,0xF6,0xE4,
+
+	0xF0,0xA3,0x04,0xF0,0x90,0xF1,0xF9,0xE0,
+
+	0xB4,0x01,0xF9,0x90,0x43,0xBB,0x74,0x01,
+
+	0xF0,0x22,0x90,0xF1,0xEA,0xE4,0xF0,0x90,
+
+	0xF1,0xEF,0xF0,0x90,0xF1,0xF2,0xF0,0x90,
+
+	0xF0,0x7C,0xF0,0x90,0xF1,0xFB,0xF0,0x90,
+
+	0xF1,0xF7,0xF0,0x90,0xF1,0xE8,0x04,0xF0,
+
+	0x90,0xF1,0xEB,0xF0,0x90,0xF1,0xF0,0xF0,
+
+	0x90,0xF1,0xF3,0xF0,0x90,0xF0,0x7D,0xF0,
+
+	0x90,0xF1,0xFA,0xF0,0x90,0xF1,0xF6,0xF0,
+
+	0x90,0xF1,0xF8,0xE4,0xF0,0x90,0xF1,0xFC,
+
+	0x74,0x03,0xF0,0x90,0xF1,0xE8,0xE4,0xF0,
+
+	0x90,0xF1,0xEB,0xF0,0x90,0xF1,0xF0,0xF0,
+
+	0x90,0xF1,0xF3,0xF0,0x90,0xF0,0x7D,0xF0,
+
+	0x90,0xF1,0xFA,0xF0,0x90,0xF1,0xF6,0xF0,
+
+	0x90,0xF1,0xEA,0x04,0xF0,0x90,0xF1,0xEF,
+
+	0xF0,0x90,0xF1,0xF2,0xF0,0x90,0xF0,0x7C,
+
+	0xF0,0x90,0xF1,0xF7,0xF0,0x90,0xF1,0xFB,
+
+	0xF0,0x90,0xF5,0xC2,0xF0,0xE4,0xF0,0x22,
+
+	0xEF,0xB4,0x02,0x1B,0x90,0x43,0xD7,0x74,
+
+	0x0B,0xF0,0xA3,0x74,0xB3,0xF0,0xA3,0x74,
+
+	0x0A,0xF0,0xA3,0x74,0x73,0xF0,0xA3,0x74,
+
+	0x33,0xF0,0xA3,0x74,0xE5,0xF0,0x22,0xEF,
+
+	0xB4,0x04,0x1B,0x90,0x43,0xD7,0x74,0x0B,
+
+	0xF0,0xA3,0x74,0xE3,0xF0,0xA3,0x74,0x0A,
+
+	0xF0,0xA3,0x74,0x9D,0xF0,0xA3,0x74,0x33,
+
+	0xF0,0xA3,0x74,0xB3,0xF0,0x22,0xEF,0xB4,
+
+	0x05,0x1B,0x90,0x43,0xD7,0x74,0x0B,0xF0,
+
+	0xA3,0x74,0xA3,0xF0,0xA3,0x74,0x0A,0xF0,
+
+	0xA3,0x74,0x65,0xF0,0xA3,0x74,0x33,0xF0,
+
+	0xA3,0x74,0xF4,0xF0,0x22,0xEF,0xB4,0x0B,
+
+	0x1A,0x90,0x43,0xD7,0x74,0x0B,0xF0,0xA3,
+
+	0x74,0xD5,0xF0,0xA3,0x74,0x0A,0xF0,0xA3,
+
+	0x74,0x91,0xF0,0xA3,0x74,0x33,0xF0,0xA3,
+
+	0x74,0xC1,0xF0,0x22,0x90,0xF1,0x61,0xE0,
+
+	0xFE,0x90,0xF1,0x60,0xE0,0x7C,0x00,0x24,
+
+	0x00,0xFF,0xEC,0x3E,0x90,0x44,0xC6,0xF0,
+
+	0xA3,0xEF,0xF0,0x90,0x42,0x52,0xE0,0x60,
+
+	0x5A,0xE4,0x90,0x43,0x9E,0xF0,0xA3,0xF0,
+
+	0x90,0xF2,0x10,0xE0,0x90,0x43,0xA0,0xF0,
+
+	0x90,0xF2,0x0F,0xE0,0x90,0x43,0xA1,0xF0,
+
+	0x90,0x42,0x40,0xE0,0xFF,0xE4,0xFC,0xFD,
+
+	0xFE,0x90,0x43,0x9E,0xE0,0xF8,0xA3,0xE0,
+
+	0xF9,0xA3,0xE0,0xFA,0xA3,0xE0,0xFB,0x12,
+
+	0x4A,0xAE,0x90,0x43,0x9E,0x12,0x4B,0x6C,
+
+	0x90,0x43,0x9E,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0xF2,
+
+	0x11,0xE0,0xF9,0xF8,0x12,0x4B,0x32,0x90,
+
+	0x43,0xA3,0xE0,0x2F,0xF0,0x90,0x43,0xA2,
+
+	0xE0,0x3E,0xF0,0x22,0x90,0xF5,0x6C,0x74,
+
+	0x40,0xF0,0xA3,0x74,0x07,0xF0,0x90,0xF9,
+
+	0x00,0xE0,0x70,0x16,0x90,0xF5,0x6A,0xF0,
+
+	0xA3,0x74,0x05,0xF0,0x90,0xF5,0x70,0x74,
+
+	0x03,0xF0,0x90,0xF5,0x6F,0x74,0x01,0xF0,
+
+	0x80,0x32,0x90,0xF9,0x00,0xE0,0xB4,0x01,
+
+	0x16,0x90,0xF5,0x6A,0xE4,0xF0,0xA3,0x74,
+
+	0x04,0xF0,0x90,0xF5,0x70,0x04,0xF0,0x90,
+
+	0xF5,0x6F,0x74,0x03,0xF0,0x80,0x15,0x90,
+
+	0xF5,0x6A,0xE4,0xF0,0xA3,0x74,0x0A,0xF0,
+
+	0x90,0xF5,0x70,0x74,0x04,0xF0,0x90,0xF5,
+
+	0x6F,0x74,0x02,0xF0,0x90,0xFD,0x27,0x74,
+
+	0x03,0xF0,0x90,0xFD,0x31,0x74,0x40,0xF0,
+
+	0xA3,0xE4,0xF0,0x22,0x90,0xF5,0x6C,0x74,
+
+	0x80,0xF0,0xA3,0x74,0x06,0xF0,0x90,0xF9,
+
+	0x00,0xE0,0x70,0x16,0x90,0xF5,0x6A,0xF0,
+
+	0xA3,0x74,0x0A,0xF0,0x90,0xF5,0x70,0x74,
+
+	0x04,0xF0,0x90,0xF5,0x6F,0x74,0x02,0xF0,
+
+	0x80,0x32,0x90,0xF9,0x00,0xE0,0xB4,0x01,
+
+	0x17,0x90,0xF5,0x6A,0xE4,0xF0,0xA3,0x74,
+
+	0x08,0xF0,0x90,0xF5,0x70,0x74,0x06,0xF0,
+
+	0x90,0xF5,0x6F,0x74,0x04,0xF0,0x80,0x14,
+
+	0x90,0xF5,0x6A,0xE4,0xF0,0xA3,0x74,0x04,
+
+	0xF0,0x90,0xF5,0x70,0x04,0xF0,0x90,0xF5,
+
+	0x6F,0x74,0x03,0xF0,0x90,0xFD,0x27,0x74,
+
+	0x04,0xF0,0x90,0xFD,0x31,0x74,0x80,0xF0,
+
+	0xA3,0xE4,0xF0,0x22,0x90,0x42,0x36,0xE0,
+
+	0x64,0x01,0x70,0x5D,0x90,0x42,0x3C,0xE0,
+
+	0x70,0x04,0x90,0x42,0xF8,0xF0,0x90,0x42,
+
+	0x3D,0xE0,0x64,0x01,0x70,0x30,0x90,0x42,
+
+	0xF8,0xE0,0x64,0x01,0x70,0x28,0x90,0xFD,
+
+	0xA5,0x04,0xF0,0x90,0xF9,0x00,0xE0,0x60,
+
+	0x05,0x90,0xF9,0x00,0xE0,0xFF,0x12,0x98,
+
+	0x85,0x90,0x42,0x38,0xE0,0xB4,0x01,0x29,
+
+	0xE4,0x90,0x42,0xF8,0xF0,0x12,0xAE,0xFD,
+
+	0xE4,0x90,0x42,0x38,0xF0,0x22,0x90,0xFD,
+
+	0xA5,0xE4,0xF0,0x90,0x42,0xF8,0xE0,0xB4,
+
+	0x01,0x0C,0x12,0xAE,0xFD,0xE4,0x90,0x42,
+
+	0x38,0xF0,0x90,0x42,0xF8,0xF0,0x12,0x57,
+
+	0x52,0x22,0x90,0x42,0x4A,0xE0,0x60,0x06,
+
+	0x90,0xFB,0x2A,0x74,0x71,0xF0,0x90,0xFB,
+
+	0x97,0xE4,0xF0,0x7F,0x11,0x12,0xAD,0x3C,
+
+	0xE4,0x90,0x44,0xD6,0xF0,0x74,0xFF,0xFB,
+
+	0xFA,0xE4,0xFD,0x7F,0x01,0x12,0xAC,0x13,
+
+	0x90,0x44,0xD6,0xE0,0x04,0xF0,0xE0,0xC3,
+
+	0x94,0x02,0x40,0xE9,0x90,0xFB,0x08,0xE0,
+
+	0xFE,0x90,0xFB,0x07,0xE0,0x7C,0x00,0x24,
+
+	0x00,0xFF,0xEC,0x3E,0x90,0x44,0x50,0xF0,
+
+	0xA3,0xEF,0xF0,0xE0,0x90,0x41,0xFC,0xF0,
+
+	0x90,0xFB,0x97,0x74,0x01,0xF0,0x7F,0x11,
+
+	0x12,0xAD,0x3C,0x90,0x42,0x4A,0xE0,0x60,
+
+	0x06,0x90,0xFB,0x2A,0x74,0x75,0xF0,0x22,
+
+	0xE5,0x13,0x14,0xB4,0x08,0x00,0x50,0x5D,
+
+	0x90,0x9F,0xD7,0x75,0xF0,0x03,0xA4,0xC5,
+
+	0x83,0x25,0xF0,0xC5,0x83,0x73,0x02,0x9F,
+
+	0xEF,0x02,0x9F,0xF6,0x02,0x9F,0xFD,0x02,
+
+	0xA0,0x04,0x02,0xA0,0x0B,0x02,0xA0,0x12,
+
+	0x02,0xA0,0x19,0x02,0xA0,0x20,0x90,0xF2,
+
+	0x1B,0x74,0x01,0xF0,0x22,0x90,0xF2,0x1B,
+
+	0x74,0x02,0xF0,0x22,0x90,0xF2,0x1B,0x74,
+
+	0x03,0xF0,0x22,0x90,0xF2,0x1B,0x74,0x04,
+
+	0xF0,0x22,0x90,0xF2,0x1B,0x74,0x05,0xF0,
+
+	0x22,0x90,0xF2,0x1B,0x74,0x06,0xF0,0x22,
+
+	0x90,0xF2,0x1B,0x74,0x07,0xF0,0x22,0x90,
+
+	0xF2,0x1B,0x74,0x08,0xF0,0x22,0x90,0xF5,
+
+	0x6C,0xE4,0xF0,0xA3,0x74,0x05,0xF0,0x90,
+
+	0xF9,0x00,0xE0,0x70,0x15,0x90,0xF5,0x6A,
+
+	0xF0,0xA3,0x74,0x04,0xF0,0x90,0xF5,0x70,
+
+	0x04,0xF0,0x90,0xF5,0x6F,0x74,0x03,0xF0,
+
+	0x80,0x31,0x90,0xF9,0x00,0xE0,0xB4,0x01,
+
+	0x15,0x90,0xF5,0x6A,0xE4,0xF0,0xA3,0xF0,
+
+	0x90,0xF5,0x70,0x74,0x07,0xF0,0x90,0xF5,
+
+	0x6F,0x74,0x05,0xF0,0x80,0x15,0x90,0xF5,
+
+	0x6A,0xE4,0xF0,0xA3,0x74,0x08,0xF0,0x90,
+
+	0xF5,0x70,0x74,0x06,0xF0,0x90,0xF5,0x6F,
+
+	0x74,0x04,0xF0,0x90,0xFD,0x27,0x74,0x07,
+
+	0xF0,0x90,0xFD,0x31,0xE4,0xF0,0xA3,0x04,
+
+	0xF0,0x22,0x90,0xF5,0x6C,0xE4,0xF0,0xA3,
+
+	0x74,0x02,0xF0,0x90,0xF9,0x00,0xE0,0x70,
+
+	0x16,0x90,0xF5,0x6A,0xF0,0xA3,0x74,0x08,
+
+	0xF0,0x90,0xF5,0x70,0x74,0x04,0xF0,0x90,
+
+	0xF5,0x6F,0x74,0x02,0xF0,0x80,0x2F,0x90,
+
+	0xF9,0x00,0xE0,0xB4,0x01,0x15,0x90,0xF5,
+
+	0x6A,0xE4,0xF0,0xA3,0xF0,0x90,0xF5,0x70,
+
+	0x74,0x06,0xF0,0x90,0xF5,0x6F,0x74,0x04,
+
+	0xF0,0x80,0x13,0x90,0xF5,0x6A,0xE4,0xF0,
+
+	0xA3,0xF0,0x90,0xF5,0x70,0x74,0x05,0xF0,
+
+	0x90,0xF5,0x6F,0x74,0x03,0xF0,0x90,0xFD,
+
+	0x27,0x74,0x07,0xF0,0x90,0xFD,0x31,0xE4,
+
+	0xF0,0xA3,0x74,0x02,0xF0,0x22,0x90,0xF4,
+
+	0x1A,0x74,0x0D,0xF0,0x90,0xF4,0x10,0x74,
+
+	0x08,0xF0,0x90,0xF4,0x18,0xF0,0x90,0xF5,
+
+	0x61,0x74,0x06,0xF0,0xE4,0x90,0x44,0xCD,
+
+	0xF0,0x90,0x42,0x59,0xF0,0x90,0x42,0x5B,
+
+	0xF0,0x90,0x42,0x5C,0xF0,0x90,0x42,0x5E,
+
+	0xF0,0x90,0x42,0x5A,0xF0,0x90,0x42,0x5D,
+
+	0xF0,0x90,0x42,0x57,0x04,0xF0,0x90,0xF5,
+
+	0xBD,0xF0,0x90,0xF5,0xBB,0xF0,0x90,0xF5,
+
+	0xBD,0xE4,0xF0,0x90,0xF5,0xBF,0x04,0xF0,
+
+	0x90,0x42,0x58,0xF0,0x90,0xF5,0xB3,0xF0,
+
+	0x90,0xF5,0xB1,0xF0,0x90,0xF5,0xB3,0xE4,
+
+	0xF0,0x90,0xF5,0xB2,0x04,0xF0,0xD2,0xE9,
+
+	0x22,0xD0,0xE0,0xF5,0xF0,0xFC,0xD0,0xE0,
+
+	0xFD,0x12,0x4C,0x61,0x85,0x0F,0xF0,0xE5,
+
+	0x81,0x90,0x00,0x02,0x12,0x4C,0x80,0x85,
+
+	0x0E,0xF0,0xE5,0x0D,0x90,0x00,0x04,0x12,
+
+	0x4C,0x80,0xE5,0x10,0x90,0x00,0x06,0x12,
+
+	0x4B,0xDC,0x8D,0x82,0x8C,0x83,0xE4,0xFE,
+
+	0xFF,0x73,0xED,0xFF,0xEC,0xFE,0x12,0x4B,
+
+	0xFE,0xFC,0xAD,0xF0,0x90,0x00,0x02,0x12,
+
+	0x4C,0x29,0x85,0xF0,0x81,0xF5,0x0F,0x90,
+
+	0x00,0x04,0x12,0x4C,0x29,0xF5,0x0E,0x85,
+
+	0xF0,0x0D,0x90,0x00,0x06,0x12,0x4B,0xAF,
+
+	0xF5,0x10,0x8D,0x82,0x8C,0x83,0xE4,0x73,
+
+	0x12,0xAB,0xC7,0xE4,0x90,0x41,0xD8,0xF0,
+
+	0x90,0x41,0xE7,0xE0,0x90,0xF0,0x76,0xF0,
+
+	0x90,0x43,0xB6,0x74,0x01,0xF0,0x90,0x43,
+
+	0xBB,0xF0,0x90,0x43,0xB7,0xF0,0xE4,0x90,
+
+	0x43,0xBA,0xF0,0xF5,0x13,0x90,0x41,0xDD,
+
+	0xE0,0xB4,0x01,0x14,0x90,0x44,0x71,0x74,
+
+	0x01,0xF0,0x12,0x9B,0xB3,0x12,0xAF,0x51,
+
+	0x90,0xFB,0xA8,0x74,0x01,0xF0,0x80,0x16,
+
+	0x90,0xFB,0xA8,0xE4,0xF0,0x12,0xAF,0x1A,
+
+	0xE4,0x90,0x44,0x71,0xF0,0x90,0x42,0x47,
+
+	0xE0,0x60,0x03,0x12,0x9F,0x5B,0xE4,0x90,
+
+	0x41,0xDD,0xF0,0x22,0x90,0x41,0xD5,0xE0,
+
+	0x60,0x07,0x90,0xF0,0x2B,0xE4,0xF0,0x80,
+
+	0x39,0x90,0x42,0x01,0xE0,0xF9,0x90,0x42,
+
+	0x02,0xE0,0x89,0xF0,0xA4,0xFF,0x90,0x43,
+
+	0xB4,0xE0,0xFC,0xA3,0xE0,0xFD,0xD3,0x9F,
+
+	0xEC,0x95,0xF0,0x40,0x08,0x90,0xF0,0x2B,
+
+	0x74,0x01,0xF0,0x80,0x15,0x90,0x42,0x03,
+
+	0xE0,0x89,0xF0,0xA4,0xFF,0xC3,0xED,0x9F,
+
+	0xEC,0x95,0xF0,0x50,0x05,0x90,0xF0,0x2B,
+
+	0xE4,0xF0,0x90,0xF0,0x2B,0xE0,0x60,0x07,
+
+	0x90,0x43,0xAA,0x74,0x15,0xF0,0x22,0x90,
+
+	0x42,0x29,0xE0,0x90,0x43,0xAA,0xF0,0x22,
+
+	0xC2,0xAF,0x90,0x44,0xCD,0xE0,0x04,0xF0,
+
+	0x12,0x74,0x95,0x90,0xF5,0xBE,0x74,0x01,
+
+	0xF0,0x12,0x77,0x1C,0x90,0x44,0x9B,0x74,
+
+	0x01,0xF0,0x90,0x44,0xCD,0xE0,0x64,0xAF,
+
+	0x70,0x31,0x90,0xF5,0xC1,0xE0,0x70,0x04,
+
+	0x90,0x42,0x57,0xF0,0x90,0xF5,0xBA,0xE0,
+
+	0x70,0x04,0x90,0x42,0x58,0xF0,0x90,0x42,
+
+	0x58,0xE0,0x70,0x17,0x90,0x42,0x57,0xE0,
+
+	0x70,0x11,0x90,0xF5,0xB9,0x04,0xF0,0x90,
+
+	0xF5,0xC0,0xF0,0xD2,0xE9,0x90,0x44,0x9B,
+
+	0xF0,0xD2,0xEA,0x53,0x91,0xDF,0xD2,0xAF,
+
+	0x22,0xAD,0x07,0x75,0x0A,0x01,0x75,0x0B,
+
+	0xFE,0x75,0x0C,0x01,0xE4,0xF5,0x08,0xF5,
+
+	0x09,0xED,0x60,0x3B,0xB4,0x01,0x16,0xAB,
+
+	0x0A,0xAA,0x0B,0xA9,0x0C,0x12,0x49,0xF8,
+
+	0xFE,0xE4,0x25,0x09,0xF5,0x09,0xEE,0x35,
+
+	0x08,0xF5,0x08,0x80,0x22,0x85,0x0C,0x82,
+
+	0x85,0x0B,0x83,0xE0,0xFE,0xA3,0xE0,0x25,
+
+	0x09,0xF5,0x09,0xEE,0x35,0x08,0xF5,0x08,
+
+	0x74,0x02,0x25,0x0C,0xF5,0x0C,0xE4,0x35,
+
+	0x0B,0xF5,0x0B,0x1D,0x1D,0x80,0xC2,0xAE,
+
+	0x08,0xAF,0x09,0x22,0x90,0xFB,0x08,0xE0,
+
+	0xFE,0x90,0xFB,0x07,0xE0,0x7C,0x00,0x24,
+
+	0x00,0xFF,0xEC,0x3E,0xFE,0x90,0x44,0x50,
+
+	0xE0,0xFC,0xA3,0xE0,0xFD,0xC3,0xEF,0x9D,
+
+	0xFF,0xEE,0x9C,0xFE,0x90,0x42,0x45,0xE0,
+
+	0xFD,0xEF,0xA8,0x05,0x08,0x80,0x05,0xCE,
+
+	0xC3,0x13,0xCE,0x13,0xD8,0xF9,0xFF,0x90,
+
+	0xFB,0x28,0xE0,0xB4,0x86,0x13,0x90,0x42,
+
+	0x00,0xE0,0xFE,0xA8,0x05,0x08,0x80,0x02,
+
+	0xC3,0x13,0xD8,0xFC,0xFE,0xC3,0xEF,0x9E,
+
+	0xFF,0x90,0x41,0xFD,0xEF,0xF0,0x22,0x90,
+
+	0x42,0x52,0xE0,0x60,0x43,0x90,0x43,0x8E,
+
+	0xE0,0xFF,0xD3,0x94,0x01,0x50,0x07,0xEF,
+
+	0x60,0x36,0x74,0x02,0xF0,0x22,0x90,0x43,
+
+	0xA2,0xE0,0xFE,0xA3,0xE0,0xFF,0xA3,0xEE,
+
+	0xF0,0xA3,0xEF,0xF0,0xD3,0x94,0x50,0xEE,
+
+	0x94,0x07,0x40,0x08,0x90,0x41,0xD5,0x74,
+
+	0x01,0xF0,0x80,0x0E,0xC3,0xEF,0x94,0x50,
+
+	0xEE,0x94,0x05,0x50,0x05,0xE4,0x90,0x41,
+
+	0xD5,0xF0,0x90,0x43,0x8E,0x74,0x03,0xF0,
+
+	0x22,0x90,0x42,0x3B,0xE0,0x64,0x01,0x70,
+
+	0x40,0x90,0xFD,0x9D,0xE0,0xFE,0x90,0xFD,
+
+	0x9C,0xE0,0x7C,0x00,0x24,0x00,0xFF,0xEC,
+
+	0x3E,0xFE,0xC3,0xEF,0x94,0x46,0xEE,0x94,
+
+	0x00,0x50,0x26,0x90,0xFD,0x37,0xE0,0xB4,
+
+	0x07,0x1F,0xE4,0x90,0x42,0x39,0xF0,0x90,
+
+	0xFD,0x2B,0xF0,0x7D,0xFF,0x7C,0x7F,0xFF,
+
+	0x12,0xAB,0xED,0x90,0x44,0xAA,0xE0,0x64,
+
+	0x01,0x60,0xF8,0x90,0xFD,0x2B,0x74,0x01,
+
+	0xF0,0x22,0x90,0x42,0x2B,0xE0,0x90,0xF7,
+
+	0x5A,0xF0,0x90,0x41,0xE5,0xE0,0x90,0xF7,
+
+	0x5B,0xF0,0x90,0x42,0x33,0xE0,0x90,0xF7,
+
+	0x5C,0xF0,0xA3,0xEF,0xF0,0x90,0xF9,0x00,
+
+	0xE0,0x90,0xF7,0x5E,0xF0,0x90,0x41,0xDB,
+
+	0xE0,0x90,0xF7,0x5F,0xF0,0x90,0xF7,0x61,
+
+	0x74,0x01,0xF0,0x90,0xF7,0x60,0xF0,0x7F,
+
+	0x00,0x7E,0x28,0x12,0xAF,0x5E,0x20,0x8C,
+
+	0xFD,0x90,0xF7,0x61,0xE4,0xF0,0x90,0xF7,
+
+	0x60,0xF0,0x22,0x90,0x44,0x9A,0x74,0x01,
+
+	0xF0,0x90,0xF7,0x42,0xE0,0x90,0x44,0x9C,
+
+	0xF0,0xE0,0x90,0xF9,0x00,0xF0,0x90,0xF7,
+
+	0x44,0xE0,0xFF,0x90,0xF9,0x08,0xF0,0x90,
+
+	0xF7,0x43,0xE0,0xFF,0x90,0xF9,0x03,0xF0,
+
+	0x90,0xF7,0x46,0xE0,0xFF,0x90,0xF9,0x06,
+
+	0xF0,0x90,0xF7,0x47,0xE0,0xFF,0x90,0xF9,
+
+	0x07,0xF0,0x90,0xF7,0x45,0xE0,0x54,0x03,
+
+	0xFF,0x90,0xF9,0x02,0xF0,0x90,0xF9,0x05,
+
+	0x74,0x01,0xF0,0x22,0x75,0xF0,0x02,0xE5,
+
+	0x13,0xA4,0x24,0xC5,0xF5,0x82,0xE5,0xF0,
+
+	0x34,0xAF,0xF5,0x83,0xE4,0x93,0xFC,0x74,
+
+	0x01,0x93,0xFD,0xE4,0xFF,0x12,0xAB,0xED,
+
+	0x90,0xF1,0x48,0xE4,0xF0,0x90,0xF0,0x81,
+
+	0x74,0x03,0xF0,0x90,0xF1,0xFC,0xF0,0x90,
+
+	0xF5,0xAF,0xE4,0xF0,0x04,0xF0,0x90,0xF5,
+
+	0xB4,0xE0,0xB4,0x01,0xF9,0x90,0xF5,0xAF,
+
+	0xE4,0xF0,0x90,0x43,0xBB,0x04,0xF0,0x22,
+
+	0xC2,0xD5,0xE8,0x30,0xE7,0x0F,0xB2,0xD5,
+
+	0xE4,0xC3,0x9B,0xFB,0xE4,0x9A,0xFA,0xE4,
+
+	0x99,0xF9,0xE4,0x98,0xF8,0xEC,0x30,0xE7,
+
+	0x17,0xB2,0xD5,0x12,0xA5,0x07,0x12,0x4C,
+
+	0xE9,0xE4,0xC3,0x9B,0xFB,0xE4,0x9A,0xFA,
+
+	0xE4,0x99,0xF9,0xE4,0x98,0xF8,0x80,0x03,
+
+	0x12,0x4C,0xE9,0x30,0xD5,0x0D,0xE4,0xC3,
+
+	0x9F,0xFF,0xE4,0x9E,0xFE,0xE4,0x9D,0xFD,
+
+	0xE4,0x9C,0xFC,0x22,0xE4,0x90,0x43,0xDD,
+
+	0xF0,0x90,0xF9,0x00,0xE0,0x70,0x09,0x90,
+
+	0x42,0x26,0xE0,0x90,0x43,0xDD,0xF0,0x22,
+
+	0x90,0xF9,0x00,0xE0,0xB4,0x01,0x1F,0x90,
+
+	0x41,0xE5,0xE0,0xB4,0x01,0x09,0x90,0x42,
+
+	0x24,0xE0,0x90,0x43,0xDD,0xF0,0x22,0x90,
+
+	0xF0,0x2B,0xE0,0x70,0x11,0x90,0x42,0x27,
+
+	0xE0,0x90,0x43,0xDD,0xF0,0x22,0x90,0x42,
+
+	0x25,0xE0,0x90,0x43,0xDD,0xF0,0x22,0x90,
+
+	0x41,0xD7,0xE0,0x64,0x27,0x70,0x38,0x90,
+
+	0x43,0xB0,0xE0,0xB4,0x01,0x1B,0x90,0x41,
+
+	0xD5,0xE0,0x64,0x01,0x60,0x08,0x90,0x41,
+
+	0xDC,0xE0,0x64,0x01,0x60,0x0B,0xE4,0x90,
+
+	0x43,0xB0,0xF0,0x7F,0x17,0x12,0xAD,0x3C,
+
+	0x22,0x90,0x43,0xB0,0xE0,0x70,0x10,0x90,
+
+	0x41,0xD5,0xE0,0x70,0x0A,0x90,0x43,0xB0,
+
+	0x04,0xF0,0x7F,0x16,0x12,0xAD,0x3C,0x22,
+
+	0xE5,0x13,0xD3,0x94,0x02,0x40,0x39,0x90,
+
+	0x43,0xB1,0xE0,0xB4,0x01,0x03,0x12,0xAC,
+
+	0x37,0x90,0x43,0xB1,0xE0,0x70,0x29,0x90,
+
+	0x42,0x01,0xE0,0xFF,0x90,0x43,0xB2,0xE0,
+
+	0xC3,0x9F,0x50,0x0D,0x12,0xA6,0x1B,0x12,
+
+	0x9D,0xAD,0x90,0x43,0xB2,0xE0,0x04,0xF0,
+
+	0x22,0x90,0x43,0xB1,0x74,0x01,0xF0,0x12,
+
+	0xA3,0x68,0x12,0xA2,0x0D,0x12,0xAD,0x1D,
+
+	0x22,0x90,0xF9,0x00,0xE0,0x70,0x19,0x90,
+
+	0x43,0x23,0xE0,0xFE,0xA3,0xE0,0xFF,0x7C,
+
+	0x06,0x7D,0xA8,0x12,0x4A,0x23,0x90,0x43,
+
+	0x23,0xEC,0xF0,0xA3,0xED,0xF0,0x80,0x1E,
+
+	0x90,0xF9,0x00,0xE0,0xB4,0x02,0x17,0x90,
+
+	0x43,0x23,0xE0,0xFE,0xA3,0xE0,0xFF,0x7C,
+
+	0x0D,0x7D,0x50,0x12,0x4A,0x23,0x90,0x43,
+
+	0x23,0xEC,0xF0,0xA3,0xED,0xF0,0x12,0xAC,
+
+	0x5B,0x22,0x90,0x43,0xB2,0xE0,0xD3,0x94,
+
+	0x00,0x40,0x2E,0x90,0x42,0x40,0xE0,0xFE,
+
+	0x90,0x43,0xB3,0xE0,0xFD,0xD3,0x9E,0x40,
+
+	0x05,0xED,0x9E,0xFF,0x80,0x0C,0x90,0x43,
+
+	0xB3,0xE0,0xFE,0x90,0x42,0x40,0xE0,0xC3,
+
+	0x9E,0xFF,0xEF,0xFD,0x90,0x43,0xB5,0xE0,
+
+	0x2D,0xF0,0x90,0x43,0xB4,0xE0,0x34,0x00,
+
+	0xF0,0x90,0x42,0x40,0xE0,0x90,0x43,0xB3,
+
+	0xF0,0x22,0x90,0x44,0xC4,0xEE,0xF0,0xA3,
+
+	0xEF,0xF0,0x75,0x11,0xFE,0x75,0x12,0x03,
+
+	0xED,0x60,0x2C,0x90,0x44,0xC4,0xE0,0xFE,
+
+	0xA3,0xE0,0xF5,0x82,0x8E,0x83,0xE0,0x85,
+
+	0x12,0x82,0x85,0x11,0x83,0xF0,0x90,0x44,
+
+	0xC5,0xE0,0x04,0xF0,0x70,0x06,0x90,0x44,
+
+	0xC4,0xE0,0x04,0xF0,0x05,0x12,0xE5,0x12,
+
+	0x70,0x02,0x05,0x11,0x1D,0x80,0xD1,0x22,
+
+	0x90,0xFD,0x47,0xE0,0x90,0x43,0x0A,0xF0,
+
+	0x90,0xFD,0x46,0xE0,0x90,0x43,0x0B,0xF0,
+
+	0x90,0xFD,0x45,0xE0,0x90,0x43,0x0C,0xF0,
+
+	0x90,0xFD,0x44,0xE0,0x90,0x43,0x0D,0xF0,
+
+	0x90,0x43,0x0A,0xE0,0xFC,0xA3,0xE0,0xFD,
+
+	0xA3,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x43,
+
+	0x20,0xE0,0xF9,0xF8,0x12,0x4B,0x32,0x90,
+
+	0x43,0x0A,0x12,0x4B,0x6C,0x22,0x90,0xF7,
+
+	0x3C,0xE0,0x70,0x21,0x90,0xF7,0x31,0xE0,
+
+	0x60,0x07,0xE4,0xFF,0x12,0xA3,0xFB,0x80,
+
+	0x14,0x90,0xFB,0x88,0xE0,0x64,0x01,0x60,
+
+	0xF8,0x90,0xFB,0x96,0x74,0x0D,0xF0,0x90,
+
+	0xFB,0x88,0x74,0x01,0xF0,0x12,0xAB,0xC7,
+
+	0x12,0xAE,0x8F,0x90,0xF7,0x2F,0xE4,0xF0,
+
+	0x90,0x43,0xBA,0x04,0xF0,0x12,0xAD,0x95,
+
+	0x22,0x90,0xFB,0x86,0xE0,0x60,0x32,0x90,
+
+	0x44,0x72,0xE0,0x70,0x24,0x90,0xFE,0x00,
+
+	0xE0,0x24,0x01,0xFF,0xE4,0x33,0xFE,0x90,
+
+	0xFB,0x82,0xE0,0xC3,0x9F,0xEE,0x64,0x80,
+
+	0xF8,0x74,0x80,0x98,0x50,0x0B,0xE0,0xF4,
+
+	0x60,0x07,0x90,0xFB,0x86,0x74,0x01,0xF0,
+
+	0x22,0x90,0xFB,0x82,0xE4,0xF0,0x12,0x5F,
+
+	0x96,0x22,0x90,0xF7,0x14,0xE0,0x60,0x2E,
+
+	0x90,0xF7,0x32,0xE0,0x70,0x06,0x90,0xF7,
+
+	0x3C,0xE0,0x60,0x22,0xC2,0xAF,0x90,0xF7,
+
+	0x14,0xE4,0xF0,0x7B,0xD4,0x7A,0x27,0xFD,
+
+	0x7F,0x01,0x12,0xAC,0x13,0x90,0xF9,0x9D,
+
+	0x74,0x01,0xF0,0x90,0xF7,0x16,0xF0,0x90,
+
+	0xF7,0x11,0xE4,0xF0,0xD2,0xAF,0x22,0x90,
+
+	0x42,0x2B,0xE0,0x60,0x2D,0x90,0xF0,0x2B,
+
+	0xE0,0x70,0x1B,0x90,0x43,0x4C,0xE0,0x70,
+
+	0x06,0x90,0xF9,0x00,0xE0,0x70,0x0F,0x90,
+
+	0x41,0xE4,0xE0,0x70,0x09,0x90,0xF7,0x84,
+
+	0xF0,0x90,0xF7,0x83,0xF0,0x22,0x90,0xF7,
+
+	0x84,0x74,0x01,0xF0,0x90,0xF7,0x83,0x74,
+
+	0xFF,0xF0,0x22,0x90,0xFD,0x15,0x74,0x08,
+
+	0xF0,0xA3,0x74,0x10,0xF0,0xA3,0xE4,0xF0,
+
+	0x90,0xFD,0x05,0x04,0xF0,0x90,0xFD,0x2B,
+
+	0xF0,0x90,0xFD,0x2A,0xF0,0x90,0x44,0xCA,
+
+	0xEF,0xF0,0xE4,0x90,0x42,0x39,0xF0,0x90,
+
+	0xFD,0x2C,0x04,0xF0,0xFF,0x12,0xAE,0x43,
+
+	0x90,0xFD,0x2C,0xE4,0xF0,0x22,0x90,0x42,
+
+	0x06,0xE0,0xFF,0x90,0xF0,0x58,0xF0,0xEF,
+
+	0xF0,0x90,0x42,0x09,0xE0,0x90,0xF0,0x58,
+
+	0xF0,0x90,0x42,0x0C,0xE0,0x90,0x42,0x04,
+
+	0xF0,0xE4,0x90,0x43,0x8F,0xF0,0x90,0x43,
+
+	0x8E,0xF0,0x90,0x43,0xAE,0x74,0x02,0xF0,
+
+	0xE4,0x90,0x41,0xD5,0xF0,0x12,0xAF,0x28,
+
+	0x22,0x90,0x43,0xA8,0xE0,0x04,0xF0,0xE0,
+
+	0x54,0x01,0xF0,0x70,0x10,0x90,0x42,0x49,
+
+	0xE0,0xFF,0x90,0xF0,0x1F,0xF0,0x90,0xF0,
+
+	0x29,0xEF,0xF0,0x80,0x0E,0x90,0x42,0x48,
+
+	0xE0,0xFF,0x90,0xF0,0x1F,0xF0,0x90,0xF0,
+
+	0x29,0xEF,0xF0,0x90,0x43,0xA8,0xE0,0x90,
+
+	0x43,0xAE,0xF0,0x22,0x90,0x43,0x34,0xE0,
+
+	0xB4,0x64,0x22,0x90,0x43,0x33,0xE0,0xD3,
+
+	0x94,0x05,0x40,0x11,0x90,0x43,0x32,0xE0,
+
+	0xD3,0x94,0x05,0x40,0x08,0x90,0x42,0xFD,
+
+	0x74,0x01,0xF0,0x80,0x05,0xE4,0x90,0x42,
+
+	0xFD,0xF0,0x12,0xAF,0x36,0x90,0x43,0x34,
+
+	0xE0,0x04,0xF0,0x12,0x97,0x59,0x22,0x90,
+
+	0x43,0xAF,0xE0,0x60,0x23,0x12,0xA9,0x15,
+
+	0x90,0x43,0xA6,0xE0,0x54,0x0F,0x64,0x0F,
+
+	0x70,0x1E,0x90,0x42,0x04,0xE0,0x54,0x0F,
+
+	0x70,0x16,0x90,0x43,0xA9,0xE0,0x70,0x10,
+
+	0x90,0x43,0xA7,0xE0,0x44,0x01,0xF0,0x22,
+
+	0x90,0x42,0x04,0xE0,0xFF,0x12,0xAE,0xEE,
+
+	0x22,0x90,0x43,0xAF,0xE0,0x60,0x23,0x12,
+
+	0xA9,0x46,0x90,0x43,0xA6,0xE0,0x54,0x0F,
+
+	0x70,0x20,0x90,0x42,0x04,0xE0,0x54,0x0F,
+
+	0xFF,0xBF,0x0F,0x16,0x90,0x43,0xA9,0xE0,
+
+	0x70,0x10,0x90,0x43,0xA7,0xE0,0x44,0x02,
+
+	0xF0,0x22,0x90,0x42,0x04,0xE0,0xFF,0x12,
+
+	0xAE,0xEE,0x22,0x90,0x41,0xD1,0xE0,0x70,
+
+	0x04,0xFF,0x12,0xAD,0x78,0x12,0x67,0x07,
+
+	0x7F,0x01,0x12,0xAD,0x78,0x90,0xF6,0x24,
+
+	0xE0,0xD3,0x94,0x04,0x40,0x0F,0xE4,0x90,
+
+	0x41,0xD8,0xF0,0x90,0xF2,0x1C,0xF0,0x90,
+
+	0x43,0xBB,0x04,0xF0,0x22,0x90,0x43,0xBB,
+
+	0x74,0x01,0xF0,0x22,0x90,0x42,0x4A,0xE0,
+
+	0xFF,0x90,0xF5,0xA9,0xE0,0x5F,0x60,0x0E,
+
+	0x90,0xF0,0x68,0xE0,0x20,0xE0,0xF9,0x90,
+
+	0xF0,0x68,0xE0,0x30,0xE0,0xF9,0x90,0x42,
+
+	0x07,0xE0,0xFF,0x90,0xF0,0x58,0xF0,0xEF,
+
+	0xF0,0x90,0x42,0x09,0xE0,0xFF,0x90,0xF0,
+
+	0x58,0xF0,0xEF,0xF0,0x22,0x90,0x42,0x4A,
+
+	0xE0,0xFF,0x90,0xF5,0xA9,0xE0,0x5F,0x60,
+
+	0x0E,0x90,0xF0,0x68,0xE0,0x20,0xE0,0xF9,
+
+	0x90,0xF0,0x68,0xE0,0x30,0xE0,0xF9,0x90,
+
+	0x42,0x08,0xE0,0xFF,0x90,0xF0,0x58,0xF0,
+
+	0xEF,0xF0,0x90,0x42,0x09,0xE0,0xFF,0x90,
+
+	0xF0,0x58,0xF0,0xEF,0xF0,0x22,0x90,0x42,
+
+	0x53,0xE0,0x60,0x2A,0x7F,0x02,0x12,0xAD,
+
+	0x3C,0xE4,0x90,0x41,0xE3,0xF0,0x90,0x41,
+
+	0xD4,0xF0,0x90,0x42,0x04,0xE0,0xC3,0x94,
+
+	0x1A,0x50,0x04,0xE4,0xF0,0x80,0x07,0x90,
+
+	0x42,0x04,0xE0,0x24,0xE6,0xF0,0x90,0x42,
+
+	0x04,0xE0,0xFF,0x12,0xAB,0x9E,0x22,0x90,
+
+	0x44,0x4F,0xE0,0x90,0xF0,0x1B,0xF0,0x90,
+
+	0x44,0x4E,0xE0,0xFF,0x33,0x95,0xE0,0x90,
+
+	0xF0,0x1C,0xEF,0xF0,0x90,0x44,0x4B,0xE0,
+
+	0x90,0xF0,0x0E,0xF0,0x90,0x44,0x4A,0xE0,
+
+	0xFF,0x33,0x95,0xE0,0x90,0xF0,0x0F,0xEF,
+
+	0xF0,0x90,0xF0,0x2C,0x74,0x01,0xF0,0x22,
+
+	0x90,0x44,0x42,0xE0,0xFE,0xA3,0xE0,0xA8,
+
+	0x07,0x08,0x80,0x05,0xCE,0xC3,0x13,0xCE,
+
+	0x13,0xD8,0xF9,0xF0,0xEE,0x90,0x44,0x42,
+
+	0xF0,0xE0,0xFE,0xA3,0xE0,0xFF,0x90,0x41,
+
+	0xC0,0xE0,0xFD,0x7C,0x00,0x12,0x4A,0x23,
+
+	0x90,0x44,0x42,0xEE,0xF0,0xA3,0xEF,0xF0,
+
+	0x22,0x90,0x41,0xB3,0xE0,0xFE,0x90,0x41,
+
+	0xB2,0xE0,0x7C,0x00,0x24,0x00,0xFF,0xEC,
+
+	0x3E,0xFE,0xE4,0xFD,0x90,0x43,0xE6,0xE0,
+
+	0xF8,0xA3,0xE0,0xF9,0xA3,0xE0,0xFA,0xA3,
+
+	0xE0,0xFB,0x12,0x4A,0xAE,0x78,0x09,0x12,
+
+	0x4B,0x32,0x90,0x43,0xEA,0x12,0x4B,0x6C,
+
+	0x22,0x90,0x42,0x17,0xE0,0x90,0xF0,0x0E,
+
+	0xF0,0x90,0x42,0x18,0xE0,0x90,0xF0,0x0F,
+
+	0xF0,0x90,0x42,0x19,0xE0,0x90,0xF0,0x1B,
+
+	0xF0,0x90,0x42,0x1A,0xE0,0x90,0xF0,0x1C,
+
+	0xF0,0x90,0xF0,0x2C,0x74,0x01,0xF0,0x90,
+
+	0xF1,0xE5,0xF0,0xE4,0x90,0x44,0x46,0xF0,
+
+	0x22,0x12,0x9C,0xB3,0x90,0xF1,0x4E,0x74,
+
+	0x3F,0xF0,0x90,0xF1,0x85,0xE4,0xF0,0x90,
+
+	0xF1,0x47,0xF0,0xA3,0xF0,0x90,0x42,0x0D,
+
+	0xE0,0x64,0x01,0x60,0x08,0xE4,0x90,0x43,
+
+	0xE0,0xF0,0x12,0x7E,0x10,0x90,0x43,0xE0,
+
+	0x74,0x01,0xF0,0x90,0x43,0xBB,0xF0,0x22,
+
+	0xC2,0xAF,0x90,0xF7,0x14,0xE0,0x70,0x24,
+
+	0x90,0xF7,0x32,0xE0,0x70,0x06,0x90,0xF7,
+
+	0x3C,0xE0,0x60,0x18,0x90,0xF9,0x9D,0xE4,
+
+	0xF0,0x90,0xF7,0x14,0x04,0xF0,0x90,0xF7,
+
+	0x0D,0xF0,0x90,0xF7,0x86,0xF0,0xA3,0xF0,
+
+	0x90,0xF7,0x11,0xF0,0xD2,0xAF,0x22,0x90,
+
+	0xFB,0x27,0xE0,0x54,0x1F,0xFF,0xC3,0x13,
+
+	0xFF,0x90,0x41,0xD6,0x74,0x01,0xF0,0x90,
+
+	0x44,0x47,0x74,0x82,0xF0,0x12,0xAF,0x1A,
+
+	0x90,0xFB,0x25,0x74,0x1F,0xF0,0xA3,0x74,
+
+	0x22,0xF0,0x90,0xFB,0x29,0x74,0x42,0xF0,
+
+	0x12,0x9D,0x31,0x22,0xC2,0x8C,0x43,0x8E,
+
+	0x08,0xE4,0x90,0x44,0xA6,0xF0,0xA3,0xF0,
+
+	0x90,0x44,0xA8,0xF0,0xA3,0xF0,0xD2,0xAD,
+
+	0xF5,0xC9,0xC2,0xC9,0xC2,0xCD,0xC2,0xCC,
+
+	0xC2,0xC8,0xC2,0xCE,0xC2,0xCB,0x75,0xCA,
+
+	0xAA,0x75,0xCB,0xF2,0xD2,0xCA,0x22,0x90,
+
+	0x43,0xAF,0xE0,0x90,0x44,0xD1,0xF0,0x90,
+
+	0x42,0x53,0xE0,0x60,0x1C,0x90,0x41,0xE3,
+
+	0x74,0x01,0xF0,0xFF,0x12,0xAD,0x3C,0x90,
+
+	0x41,0xD4,0x74,0x01,0xF0,0x90,0x42,0x04,
+
+	0xE0,0x24,0x1A,0xF0,0xE0,0xFF,0x12,0xAB,
+
+	0x9E,0x22,0x90,0x41,0xE8,0xE0,0x70,0x23,
+
+	0x90,0x43,0x90,0xE0,0xA3,0xF0,0x60,0x05,
+
+	0x12,0xAB,0x20,0x80,0x03,0x12,0xA9,0x77,
+
+	0x90,0x41,0xF9,0xE0,0xFF,0x90,0xF0,0x1F,
+
+	0xF0,0x90,0xF0,0x29,0xEF,0xF0,0xE4,0x90,
+
+	0x43,0x90,0xF0,0x22,0x90,0xF7,0x79,0x74,
+
+	0x01,0xF0,0xA3,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0x90,0xF7,0x6A,0xF0,0x90,0xF7,0x74,0xF0,
+
+	0x90,0xF0,0x09,0xF0,0x90,0xF7,0x7D,0xF0,
+
+	0x90,0xF5,0xB9,0xF0,0x90,0xF5,0xBE,0xF0,
+
+	0x90,0xF5,0xC0,0xF0,0x22,0x90,0x44,0xD0,
+
+	0xEF,0xF0,0x90,0x41,0xD7,0xE0,0xB4,0x22,
+
+	0x1C,0xC2,0xAF,0x7F,0x15,0x12,0xAD,0x3C,
+
+	0x90,0x44,0xD0,0xE0,0xFF,0x12,0xAE,0xEE,
+
+	0x90,0x43,0xAF,0xE0,0x60,0x05,0x7F,0x14,
+
+	0x12,0xAD,0x3C,0xD2,0xAF,0x22,0x90,0xF7,
+
+	0x3C,0xE0,0x70,0x03,0x12,0xAE,0x16,0xE4,
+
+	0x90,0x44,0x9A,0xF0,0x90,0x42,0x42,0xF0,
+
+	0x90,0x42,0x43,0xF0,0x12,0xAD,0xCE,0xE4,
+
+	0x90,0x41,0xCE,0xF0,0x90,0x41,0xCD,0xF0,
+
+	0x12,0xAE,0xDF,0x22,0xAB,0x07,0x90,0xF1,
+
+	0x1D,0x74,0x01,0xF0,0xE4,0xF0,0xED,0x90,
+
+	0xF1,0x18,0xF0,0xEC,0xA3,0xF0,0x90,0xF1,
+
+	0x1B,0xEB,0xF0,0xD2,0xAF,0xD2,0xE8,0x90,
+
+	0x44,0xAA,0x74,0x01,0xF0,0x90,0xF1,0x1A,
+
+	0xF0,0x22,0xC2,0xA9,0xEF,0x42,0x89,0xEA,
+
+	0xF4,0xF5,0x8C,0xEB,0xF4,0xF5,0x8A,0x53,
+
+	0x8E,0xF7,0xAF,0x05,0xEF,0x33,0x33,0x33,
+
+	0x54,0xF8,0x42,0x8E,0xD2,0x8C,0x30,0x8D,
+
+	0xFD,0xC2,0x8D,0xD2,0xA9,0x22,0x90,0x41,
+
+	0xF1,0xE0,0x70,0x10,0x90,0x43,0xB1,0xF0,
+
+	0xA3,0xF0,0x90,0x43,0xB4,0xF0,0xA3,0xF0,
+
+	0x90,0x43,0xB3,0xF0,0x90,0x42,0x52,0xE0,
+
+	0x60,0x07,0xE4,0x90,0x43,0xA2,0xF0,0xA3,
+
+	0xF0,0x22,0x90,0x43,0x24,0xE0,0x90,0xF5,
+
+	0xCC,0xF0,0x90,0x43,0x23,0xE0,0x54,0x1F,
+
+	0x90,0xF5,0xCD,0xF0,0x90,0xF5,0xD4,0xE0,
+
+	0x90,0x43,0x09,0xF0,0x90,0xF5,0xCB,0xE0,
+
+	0xB4,0x01,0xF9,0x22,0xE4,0xFF,0xFE,0xC3,
+
+	0xEF,0x94,0xFF,0xEE,0x64,0x80,0x94,0x7F,
+
+	0x50,0x13,0x74,0x58,0x2F,0xF5,0x82,0x74,
+
+	0xF7,0x3E,0xF5,0x83,0xE4,0xF0,0x0F,0xBF,
+
+	0x00,0x01,0x0E,0x80,0xE2,0x22,0x90,0xFB,
+
+	0x87,0xE0,0x60,0xFA,0x90,0xFB,0x9E,0xE0,
+
+	0xB4,0x04,0x05,0xA3,0xE0,0xFF,0x80,0x02,
+
+	0x7F,0x00,0x90,0x44,0x72,0xEF,0xF0,0x90,
+
+	0xFB,0x87,0xE4,0xF0,0xC2,0xDB,0x22,0xEF,
+
+	0x24,0x04,0x90,0xFE,0x00,0xF0,0x90,0xFE,
+
+	0x03,0xE0,0x90,0xFE,0x01,0xF0,0xA3,0xED,
+
+	0xF0,0xEF,0x24,0x05,0x90,0xFB,0x90,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0xF0,0x22,0xD2,0xAF,
+
+	0xD2,0xA9,0xEF,0x42,0x89,0xEA,0xF4,0xF5,
+
+	0x8C,0xEB,0xF4,0xF5,0x8A,0x53,0x8E,0xF7,
+
+	0xAF,0x05,0xEF,0x33,0x33,0x33,0x54,0xF8,
+
+	0x42,0x8E,0xD2,0x8C,0x22,0x90,0x42,0x0B,
+
+	0xE0,0xFF,0x90,0x42,0x04,0xE0,0xC3,0x9F,
+
+	0x50,0x11,0xE0,0x04,0xF0,0x90,0x41,0xD7,
+
+	0xE0,0xB4,0x22,0x04,0x12,0xA8,0x80,0x22,
+
+	0x12,0xA9,0x15,0x22,0x90,0xF0,0x2B,0xE0,
+
+	0x70,0x0E,0x90,0x43,0xBC,0xF0,0x90,0xFD,
+
+	0x74,0xF0,0x90,0xF1,0xE9,0x04,0xF0,0x22,
+
+	0x90,0xF1,0xE9,0xE4,0xF0,0x90,0xFD,0x74,
+
+	0x04,0xF0,0x22,0x90,0xFB,0x88,0xE0,0x64,
+
+	0x01,0x60,0xF8,0x90,0xFB,0x96,0xEF,0xF0,
+
+	0x90,0xFB,0x88,0x74,0x01,0xF0,0x90,0xFB,
+
+	0x88,0xE0,0x64,0x01,0x60,0xF8,0x7F,0x01,
+
+	0x22,0xE4,0x90,0x43,0x06,0xF0,0x90,0xF5,
+
+	0xD6,0xE0,0x90,0x43,0x07,0xF0,0x90,0xF5,
+
+	0xD5,0xE0,0x90,0x43,0x08,0xF0,0x90,0xF5,
+
+	0xD4,0xE0,0x90,0x43,0x09,0xF0,0x22,0x90,
+
+	0xF4,0x71,0xE4,0xF0,0x04,0xF0,0x90,0xF5,
+
+	0xAC,0xE4,0xF0,0xEF,0x70,0x05,0x12,0x5D,
+
+	0x01,0x80,0x03,0x12,0x6B,0x1B,0x90,0xF4,
+
+	0x71,0xE4,0xF0,0x22,0xE4,0xF5,0x13,0xC2,
+
+	0xAF,0x53,0x91,0x7F,0x7A,0xAF,0x79,0xA0,
+
+	0x12,0x4B,0xA9,0x7B,0x01,0x7A,0x44,0x79,
+
+	0x6A,0x7D,0x01,0x7C,0x00,0x12,0xA1,0x83,
+
+	0x22,0x90,0xF7,0x11,0xE4,0xF0,0x7F,0xFF,
+
+	0x7E,0x66,0x12,0xAF,0x5E,0x20,0x8C,0xFD,
+
+	0x90,0x44,0x9B,0x74,0x01,0xF0,0xD2,0xEA,
+
+	0x90,0xF7,0x11,0xF0,0x22,0x90,0x42,0x42,
+
+	0xE0,0x70,0x0C,0x90,0x42,0x43,0xE0,0x60,
+
+	0x0A,0x90,0x44,0x9A,0xE0,0x60,0x04,0x12,
+
+	0xAA,0x99,0x22,0x12,0xA7,0x4B,0x22,0x90,
+
+	0x42,0x04,0xE0,0x60,0x10,0x14,0xF0,0x90,
+
+	0x41,0xD7,0xE0,0xB4,0x22,0x04,0x12,0xA8,
+
+	0xB2,0x22,0x12,0xA9,0x46,0x22,0x90,0x43,
+
+	0x8F,0xE0,0x60,0x03,0x14,0xF0,0x22,0x90,
+
+	0xF0,0x01,0xE0,0xB4,0x01,0x06,0x12,0x83,
+
+	0x14,0x12,0x93,0x50,0x22,0xC2,0xAF,0x90,
+
+	0xF5,0xA8,0xE4,0xF0,0x90,0xF7,0x3D,0xF0,
+
+	0xFF,0x7E,0x28,0x12,0xAF,0x5E,0x20,0x8C,
+
+	0xFD,0xD2,0xAF,0x22,0xC2,0xAF,0xC2,0xDB,
+
+	0x90,0xFB,0x7F,0xE0,0x70,0x09,0x90,0xFB,
+
+	0x87,0xF0,0x90,0xFB,0xAF,0x04,0xF0,0xD2,
+
+	0xAF,0x22,0x90,0xF5,0x38,0xE0,0xFD,0xEF,
+
+	0x60,0x0D,0x90,0xF5,0x38,0xE0,0xFE,0x6D,
+
+	0x60,0xF5,0xAD,0x06,0x1F,0x80,0xF0,0x22,
+
+	0x90,0x41,0xD7,0xE0,0xB4,0x27,0x0B,0x7F,
+
+	0x16,0x12,0xAD,0x3C,0x90,0x43,0xB0,0x74,
+
+	0x01,0xF0,0x22,0x90,0x43,0xB6,0xE0,0x70,
+
+	0x05,0x90,0x43,0xBB,0xF0,0x22,0x90,0x43,
+
+	0xBB,0x74,0x01,0xF0,0x22,0x90,0xF5,0x5B,
+
+	0x74,0xFC,0xF0,0xA3,0xE4,0xF0,0xA3,0x74,
+
+	0x02,0xF0,0xA3,0xE4,0xF0,0x22,0x90,0xF5,
+
+	0x52,0x74,0x3F,0xF0,0x90,0xF5,0x54,0x74,
+
+	0x01,0xF0,0x90,0xF7,0x0E,0xF0,0x22,0x90,
+
+	0xF4,0x08,0x74,0x99,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xF0,0x22,0x90,
+
+	0xF4,0x08,0x74,0x99,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xF0,0x22,0x90,
+
+	0xF4,0x08,0x74,0x99,0xF0,0xA3,0x74,0x02,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xF0,0x22,0x90,
+
+	0xF5,0x5B,0xE4,0xF0,0xA3,0x74,0x03,0xF0,
+
+	0xA3,0xE4,0xF0,0xA3,0xF0,0x22,0xE4,0x90,
+
+	0x42,0x2B,0xF0,0x90,0xF7,0x83,0x74,0xAA,
+
+	0xF0,0xA3,0xE4,0xF0,0x22,0xC2,0xAF,0x90,
+
+	0xFB,0x97,0xEF,0xF0,0x7F,0x13,0x12,0xAD,
+
+	0x3C,0xD2,0xAF,0x22,0xE4,0x90,0x43,0x27,
+
+	0xF0,0x90,0x43,0x25,0xF0,0xA3,0xF0,0x12,
+
+	0x8E,0x1F,0x22,0x90,0xF5,0x5B,0x74,0x60,
+
+	0xF0,0xA3,0xE4,0xF0,0xA3,0xF0,0xA3,0xF0,
+
+	0x22,0x90,0xFB,0x24,0xE4,0xF0,0x90,0x44,
+
+	0x47,0xE0,0x90,0xFB,0x28,0xF0,0x22,0xE4,
+
+	0x90,0x43,0xA7,0xF0,0x90,0x43,0xA9,0xF0,
+
+	0x90,0x43,0xA8,0xF0,0x22,0xE4,0x90,0x43,
+
+	0x34,0xF0,0x90,0x43,0x33,0xF0,0x90,0x43,
+
+	0x32,0xF0,0x22,0xE4,0x90,0x44,0xAA,0xF0,
+
+	0x90,0xF1,0x1C,0xF0,0x53,0x91,0xEF,0x22,
+
+	0x90,0xFB,0x24,0x74,0x08,0xF0,0x90,0xFB,
+
+	0x28,0x74,0x74,0xF0,0x22,0xAB,0x07,0xAA,
+
+	0x06,0xE4,0xFD,0x7F,0x01,0x12,0xAC,0xDF,
+
+	0x22,0x90,0xF1,0x75,0x74,0x01,0xF0,0x90,
+
+	0xF1,0x0A,0xF0,0x22,0x90,0xF4,0x60,0xEF,
+
+	0xF0,0xA3,0xED,0xF0,0x22,0x90,0xF4,0x13,
+
+	0xE4,0xF0,0x12,0x50,0xDE,0x22,0x90,0x43,
+
+	0xBB,0x74,0x01,0xF0,0xF5,0x13,0x22,0x90,
+
+	0xF2,0x17,0x74,0xFE,0xF0,0x22,0xC2,0xAF,
+
+	0x12,0xA6,0xD7,0x22,0xC2,0x8C,0x22,0x22,
+
+	0x22,0x22,0x22,0x22,0x22,0x22,0x01,0x02,
+
+	0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x09,
+
+	0x00,0x01,0x02,0x03,0x04,0x05,0x05,0x03,
+
+	0x08,0x01,0x00,0x01,0x01,0x02,0x03,0x03,
+
+	0x01,0x01,0x01,0x01,0x3E,0x80,0x06,0x40,
+
+	0x7D,0x00,0x12,0xC0,0x12,0xC0,0xFA,0x00,
+
+	0x12,0xC0,0xBB,0x80,0x9C,0x40,0x00,0xA0,
+
+	0x00,0x00,0x01,0x02,0x02,0x02,0x02,0x02,
+
+	0x01,0x01,0xA7,0x12,0xAF,0x9D,0xAF,0xA1,
+
+	0xAF,0xA2,0xAF,0xA3,0x71,0xC9,0xAF,0xA4,
+
+	0xAF,0xA5,0xAF,0x44,0xA2,0x69,0x84,0xEF,
+
+	0x8C,0x89,0xAE,0x2D
+
+};
+
+
+
+static Segment Firmware_segments[] = {
+
+	{	0x00,		0x0000000A		},
+
+	{	0x00,		0x00003A0E		},
+
+	{	0x00,		0x0000000A		},
+
+	{	0x00,		0x00006AB4		}
+
+};
+
+
+
+static Byte Firmware_partitions[] = {
+
+	0x04
+
+};
+
+
+
+
+
+#define Firmware_SCRIPTSETLENGTH	0x00000001
+
+
+
+
+
+static Word Firmware_scriptSets[] = {
+
+	0x6B
+
+};
+
+
+
+
+
+static ValueSet Firmware_scripts[] = {
+
+ {0xF905, 0x01},
+
+ {0xF40E, 0x0A},
+
+ {0xF40F, 0x40},
+
+ {0xF410, 0x08},
+
+ {0xF55F, 0x0A},
+
+ {0xF562, 0x20},
+
+ {0xF561, 0x15},
+
+ {0xF610, 0x32},
+
+ {0xF611, 0x10},
+
+ {0xF60F, 0x04},
+
+ {0xF60E, 0x00},
+
+ {0xF600, 0x05},
+
+ {0xF601, 0x08},
+
+ {0xF602, 0x0B},
+
+ {0xF603, 0x0E},
+
+ {0xF604, 0x11},
+
+ {0xF605, 0x14},
+
+ {0xF606, 0x17},
+
+ {0xF607, 0x1F},
+
+ {0xF5F8, 0x01},
+
+ {0xF5DF, 0xFB},
+
+ {0xF5E0, 0x00},
+
+ {0xF5E3, 0x09},
+
+ {0xF5E4, 0x01},
+
+ {0xF5E5, 0x01},
+
+ {0xF5FD, 0x01},
+
+ {0xF80F, 0x40},
+
+ {0xF810, 0x54},
+
+ {0xF811, 0x5a},
+
+ {0xF78B, 0x01},
+
+ {0xFB06, 0x3},
+
+ {0x00a0, 0xCF},
+
+ {0x009f, 0xE1},
+
+ {0x00a6, 0x01},
+
+ {0xFD8B, 0x00},
+
+ {0x00ad, 0x01},
+
+ {0x00a3, 0x01},
+
+ {0x00a4, 0x3C},
+
+ {0x00ab, 0x01},
+
+ {0x008e, 0x01},
+
+ {0x008a, 0x01},
+
+ {0x0099, 0x01},
+
+ {0x00a9, 0x00},
+
+ {0x00a5, 0x01},
+
+ {0x00aa, 0x01},
+
+ {0x0092, 0x06},
+
+ {0xF078, 0x00},
+
+ {0xF016, 0x10},
+
+ {0xF017, 0x04},
+
+ {0xF018, 0x05},
+
+ {0xF019, 0x04},
+
+ {0xF01A, 0x05},
+
+ {0xF021, 0x03},
+
+ {0xF022, 0x0A},
+
+ {0xF023, 0x0A},
+
+ {0xF02B, 0x00},
+
+ {0x0070, 0x0A},
+
+ {0xF1CB, 0xA0},
+
+ {0xF1CC, 0x01},
+
+ {0xF02C, 0x01},
+
+ {0x00b0, 0x01},
+
+ {0xF000, 0xF},
+
+ {0xF707, 0xFC},
+
+ {0xF708, 0x00},
+
+ {0xF709, 0x7E},
+
+ {0xF70A, 0x00},
+
+ {0xF70B, 0x2F},
+
+ {0xF1BC, 0x36},
+
+ {0xF1BD, 0x00},
+
+ {0xF214, 0x0},
+
+ {0xF204, 0x10},
+
+ {0xF087, 0x0},
+
+ {0xF064, 0x03},
+
+ {0xF067, 0x1},
+
+ {0xF065, 0xF9},
+
+ {0xF066, 0x03},
+
+ {0xF06F, 0xe0},
+
+ {0xF070, 0x3},
+
+ {0xF072, 0x0f},
+
+ {0xF073, 0x03},
+
+ {0xF144, 0x1a},
+
+ {0xF146, 0x00},
+
+ {0xF14A, 0x01},
+
+ {0xF14C, 0x00},
+
+ {0xF14D, 0x00},
+
+ {0xF14F, 0x04},
+
+ {0xF09F, 0x0c},
+
+ {0xF0A0, 0x00},
+
+ {0xF15A, 0x00},
+
+ {0xF15B, 0x08},
+
+ {0xF163, 0x05},
+
+ {0xF09B, 0x3f},
+
+ {0xF09C, 0x00},
+
+ {0xF168, 0x0f},
+
+ {0xF09D, 0x20},
+
+ {0xF09E, 0x00},
+
+ {0xF167, 0x40},
+
+ {0xF158, 0x7f},
+
+ {0xF166, 0x01},
+
+ {0xF15D, 0x03},
+
+ {0xF130, 0x04},
+
+ {0xF132, 0x04},
+
+ {0xF183, 0x01},
+
+ {0xF19D, 0x40},
+
+ {0xF15E, 0x05},
+
+ {0xF17A, 0x00},
+
+ {0xF17B, 0x00},
+
+};
+
+#endif
+
+// Warning: version numbers are manually altered.
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_inttype.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_inttype.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_inttype.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_inttype.h	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,41 @@
+#ifndef __INTTYPE_H__
+#define __INTTYPE_H__
+
+
+/**
+ * The type defination of SnrTable.
+ */
+typedef struct {
+    Dword errorCount;
+    Dword snr;
+    double errorRate;
+} SnrTable;
+
+
+/**
+ * The type defination of Statistic.
+ */
+typedef struct {
+    Word abortCount;
+    Dword postVitBitCount;
+    Dword postVitErrorCount;
+    /** float point */
+    Dword softBitCount;
+    Dword softErrorCount;
+    Dword preVitBitCount;
+    Dword preVitErrorCount;
+    double snr;
+} ChannelStatistic;
+
+
+/**
+ * The type defination of AgcVoltage.
+ */
+typedef struct {
+    double doSetVolt;
+    double doPuUpVolt;
+} AgcVoltage;
+
+
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_iocontrol.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_iocontrol.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_iocontrol.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_iocontrol.h	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,738 @@
+/**
+ *
+ * Copyright (c) 2006 Afa Corporation. All rights reserved.
+ *
+ * Module Name:
+ *   iocontrol.h
+ *
+ * Abstract:
+ *   The structure and IO code for IO control call.
+ *
+ */
+
+#ifndef __IOCONTROL_H__
+#define __IOCONTROL_H__
+
+#ifdef UNDER_CE
+#include <winioctl.h>
+#else
+#endif
+
+#include "a867_type.h"
+
+#define MEDIA_DEVICE_AFADEMOD       0x00000AFA
+
+typedef struct {
+    Byte                chipNumber;
+    Word                sawBandwidth;
+    StreamType          streamType;
+    Architecture        architecture;
+    Dword               error;
+    Byte                reserved[16];
+} InitializeRequest, *PInitializeRequest;
+
+typedef struct {
+    Dword               error;
+    Byte                reserved[16];
+} FinalizeRequest, *PFinalizeRequest;
+
+typedef struct {
+    StreamType          streamType;
+    Dword               error;
+    Byte                reserved[16];
+} SetStreamTypeRequest, *PSetStreamTypeRequest;
+
+typedef struct {
+    Architecture        architecture;
+    Dword               error;
+    Byte                reserved[16];
+} SetArchitectureRequest, *PSetArchitectureRequest;
+
+typedef struct {
+    Byte                chip;
+    ChannelModulation*  channelModulation;
+    Dword               error;
+    Byte                reserved[16];
+} GetChannelModulationRequest, *PGetChannelModulationRequest;
+
+typedef struct {
+    Processor           processor;
+    Dword*              version;
+    Dword               error;
+    Byte                reserved[16];
+} GetFirmwareVersionRequest, *PGetFirmwareVersionRequest;
+
+typedef struct {
+    Byte                chip;
+    Word                bandwidth;
+    Dword               frequency;
+    Dword               error;
+    Byte                reserved[16];
+} AcquireChannelRequest, *PAcquireChannelRequest;
+
+typedef struct {
+    Byte                chip;
+    Bool*               locked;
+    Dword               error;
+    Byte                reserved[16];
+} IsLockedRequest, *PIsLockedRequest;
+
+typedef struct {
+    Byte                chip;
+    Pid                 pid;
+    Dword               error;
+    Byte                reserved[16];
+} AddPidRequest, *PAddPidRequest;
+
+typedef struct {
+    Byte                chip;
+    Pid                 pid;
+    Dword               error;
+    Byte                reserved[16];
+} RemovePidRequest, *PRemovePidRequest;
+
+typedef struct {
+    Byte            chip;
+    Dword           error;
+    Byte            reserved[16];
+} ResetPidRequest, *PResetPidRequest;
+
+typedef struct {
+    Byte                chip;
+    Byte                superFrameCount;
+    Word                packetUnit;
+    Dword               error;
+    Byte                reserved[16];
+} SetStatisticRangeRequest, *PSetStatisticRangeRequest;
+
+typedef struct {
+    Byte                chip;
+    Byte*               superFrameCount;
+    Word*               packetUnit;
+    Dword               error;
+    Byte                reserved[16];
+} GetStatisticRangeRequest, *PGetStatisticRangeRequest;
+
+typedef struct {
+    Byte                chip;
+    ChannelStatistic*   channelStatistic;
+    Dword               error;
+    Byte                reserved[16];
+} GetChannelStatisticRequest, *PGetChannelStatisticRequest;
+
+typedef struct {
+    Byte                chip;
+    Statistic*          statistic;
+    Dword               error;
+    Byte                reserved[16];
+} GetStatisticRequest, *PGetStatisticRequest;
+
+typedef struct {
+    Dword*              bufferLength;
+    Byte*               buffer;
+    Dword               error;
+    Byte                reserved[16];
+} GetDatagramRequest, *PGetDatagramRequest;
+
+typedef struct {
+    Byte            chip;
+    Byte            control;
+    Dword           error;
+    Byte            reserved[16];
+} ControlPidFilterRequest, *PControlPidFilterRequest;
+
+typedef struct {
+    Byte                chip;
+    Byte                control;
+    Dword               error;
+    Byte                reserved[16];
+} ControlPowerSavingRequest, *PControlPowerSavingRequest;
+
+typedef struct {
+    Byte                DriverVerion[16];   /** XX.XX.XX.XX Ex., 1.2.3.4            */
+    Byte                APIVerion[32];      /** XX.XX.XXXXXXXX.XX Ex., 1.2.3.4  */
+    Byte                FWVerionLink[16];   /** XX.XX.XX.XX Ex., 1.2.3.4            */
+    Byte                FWVerionOFDM[16];   /** XX.XX.XX.XX Ex., 1.2.3.4            */
+    Byte                DateTime[24];       /** Ex.,"2004-12-20 18:30:00" or "DEC 20 2004 10:22:10" with compiler __DATE__ and __TIME__  definitions */
+    Byte                Company[8];         /** Ex.,"Afatech"                   */
+    Byte                SupportHWInfo[32];  /** Ex.,"Jupiter DVBT/DVBH"         */
+    Dword               error;
+    Byte                reserved[128];
+} DemodDriverInfo, *PDemodDriverInfo;
+
+typedef struct {
+    Ensemble*           ensemble;
+    Dword               error;
+    Byte                reserved[16];
+} AcquireEnsembleRequest, *PAcquireEnsembleRequest;
+
+typedef struct {
+    Byte*               serviceLength;
+    Service*            services;
+    Dword               error;
+    Byte                reserved[16];
+} AcquireServiceRequest, *PAcquireServiceRequest;
+
+typedef struct {
+    Service             service;
+    Byte*               componentLength;
+    Component*          components;
+    Dword               error;
+    Byte                reserved[16];
+} AcquireComponentRequest, *PAcquireComponentRequest;
+
+typedef struct {
+    Component           component;
+    Dword               error;
+    Byte                reserved[16];
+} AddComponentRequest, *PAddComponentRequest;
+
+typedef struct {
+    Component           component;
+    Dword               error;
+    Byte                reserved[16];
+} RemoveComponentRequest, *PRemoveComponentRequest;
+
+typedef struct {
+    Byte                figType;
+    Byte                figExtension;
+    Dword               error;
+    Byte                reserved[16];
+} AddFigRequest, *PAddFigRequest;
+
+typedef struct {
+    Byte                figType;
+    Byte                figExtension;
+    Dword               error;
+    Byte                reserved[16];
+} RemoveFigRequest, *PRemoveFigRequest;
+
+
+/**
+ * Demodulator API commands
+ */
+
+/**
+ * First, download firmware from host to demodulator. Actually, firmware is
+ * put in firmware.h as a part of source code. Therefore, in order to
+ * update firmware the host have to re-compile the source code.
+ * Second, setting all parameters which will be need at the beginning.
+ * Paramters: None
+ */
+#define IOCTL_AFA_DEMOD_INITIALIZE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x003, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ * Paramters:   DemodStreamType struct
+ */
+#define IOCTL_AFA_DEMOD_SETSTREAMTYPE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x004, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ * Paramters:   DemodStreamType struct
+ */
+#define IOCTL_AFA_DEMOD_SETARCHITECTURE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x006, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ * Paramters:   DemodStreamType struct
+ */
+#define IOCTL_AFA_DEMOD_GETCHANNELMODULATION \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x008, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ * Paramters:   DemodStreamType struct
+ */
+#define IOCTL_AFA_DEMOD_GETFIRMWAREVERSION \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x009, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Specify the bandwidth of channel and tune the channel to the specific
+ * frequency. Afterwards, host could use output parameter dvbH to determine
+ * if there is a DVB-H signal.
+ * In DVB-T mode, after calling this function output parameter dvbH should
+ * be False and host could use output parameter "locked" to indicate if the
+ * TS is correct.
+ * In DVB-H mode, after calling this function output parameter dvbH should
+ * be True and host could use Jupiter_acquirePlatorm to get platform.
+ * Paramters:   DemodAcqCh struct
+ */
+#define IOCTL_AFA_DEMOD_ACQUIRECHANNEL \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00A, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get all the platforms found in current frequency.
+ * Paramters:   DemodAcqPlatform struct
+ */
+#define IOCTL_AFA_DEMOD_ISLOCKED \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00B, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get all the platforms found in current frequency.
+ * Paramters:   DemodAcqPlatform struct
+ */
+#define IOCTL_AFA_DEMOD_ACQUIREPLATFORM \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00C, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Change the current platform as the specified platform. If the target
+ * platform is locate in different frequency, this function will tune to
+ * that frequency before setting platform.
+ * Paramters:   DemodSetPlatform struct
+ */
+#define IOCTL_AFA_DEMOD_SETPLATFORM \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00D, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Add IP to IP filter.
+ * Paramters:   DemodIp struct
+ */
+#define IOCTL_AFA_DEMOD_ADDIP \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00E, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Remove IP from IP filter.
+ * Paramters:   DemodIp struct
+ */
+#define IOCTL_AFA_DEMOD_REMOVEIP \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x00F, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Add PID to PID filter.
+ * Paramters:   DemodPid struct
+ */
+#define IOCTL_AFA_DEMOD_ADDPID \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x010, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Remove PID from PID filter.
+ * Paramters:   DemodPid struct
+ */
+#define IOCTL_AFA_DEMOD_REMOVEPID \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x011, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Reset PID from PID filter.
+ * Paramters:   ResetPidRequest struct
+ */
+#define IOCTL_AFA_DEMOD_RESETPID \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x012, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get data of one single section
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETSECTION \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x013, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_SETSTATISTICRANGE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x014, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETSTATISTICRANGE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x015, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETCHANNELSTATISTIC \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x016, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETSTATISTIC \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x017, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETINTERRUPTS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x018, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_CLEARINTERRUPT \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x019, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ * Paramters:   DemodGetStat struct
+ */
+#define IOCTL_AFA_DEMOD_GETDATAGRAM \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01A, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ *
+ * Paramters:   DemodControl struct
+ */
+#define IOCTL_AFA_DEMOD_GETDELTAT \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01B, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Enable PID filter.
+ * Paramters:   EnablePidRequest struct
+ */
+#define IOCTL_AFA_DEMOD_CONTROLPIDFILTER \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01C, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ *
+ * Paramters:   DemodControl struct
+ */
+#define IOCTL_AFA_DEMOD_CONTROLTIMESLICING \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01D, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ *
+ * Paramters:   DemodControl struct
+ */
+#define IOCTL_AFA_DEMOD_CONTROLPOWERSAVING \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01E, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Power off the demodulators.
+ * Paramters:   None
+ */
+#define IOCTL_AFA_DEMOD_FINALIZE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x01F, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get driver information.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_GETDRIVERINFO \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x020, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get ensemble.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_ACQUIREENSEMBLE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x021, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get service.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_ACQUIRESERVICE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x022, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Get component.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_ACQUIRECOMPONENT \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x023, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Add component.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_ADDCOMPONENT \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x024, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Remove component.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_REMOVECOMPONENT \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x025, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Add FIG.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_ADDFIG \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x026, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Remove FIG.
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_REMOVEFIG \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x027, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+
+/**
+ * Demodulator Misc API commands
+ */
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Dword           registerAddress;
+    Byte            bufferLength;
+    Byte            buffer[256];
+    Dword           error;
+    Byte            reserved[16];
+} WriteRegistersRequest, *PWriteRegistersRequest;
+
+typedef struct {
+    Byte            chip;
+    Word            registerAddress;
+    Byte            bufferLength;
+    Byte            buffer[256];
+    Dword           error;
+    Byte            reserved[16];
+} WriteTunerRegistersRequest, *PWriteTunerRegistersRequest;
+
+typedef struct {
+    Byte            chip;
+    Word            registerAddress;
+    Byte            bufferLength;
+    Byte            buffer[256];
+    Dword           error;
+    Byte            reserved[16];
+} WriteEepromValuesRequest, *PWriteEepromValuesRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Dword           registerAddress;
+    Byte            position;
+    Byte            length;
+    Byte            value;
+    Dword           error;
+    Byte            reserved[16];
+} WriteRegisterBitsRequest, *PWriteRegisterBitsRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Word            variableIndex;
+    Byte            bufferLength;
+    Byte            buffer[256];
+    Dword           error;
+    Byte            reserved[16];
+} SetVariablesRequest, *PSetVariablesRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Word            variableIndex;
+    Byte            position;
+    Byte            length;
+    Byte            value;
+    Dword           error;
+    Byte            reserved[16];
+} SetVariableBitsRequest, *PSetVariableBitsRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Dword           registerAddress;
+    Byte            bufferLength;
+    Byte*           buffer;
+    Dword           error;
+    Byte            reserved[16];
+} ReadRegistersRequest, *PReadRegistersRequest;
+
+typedef struct {
+    Byte            chip;
+    Word            registerAddress;
+    Byte            bufferLength;
+    Byte*           buffer;
+    Dword           error;
+    Byte            reserved[16];
+} ReadTunerRegistersRequest, *PReadTunerRegistersRequest;
+
+typedef struct {
+    Byte            chip;
+    Word            registerAddress;
+    Byte            bufferLength;
+    Byte*           buffer;
+    Dword           error;
+    Byte            reserved[16];
+} ReadEepromValuesRequest, *PReadEepromValuesRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Dword           registerAddress;
+    Byte            position;
+    Byte            length;
+    Byte*           value;
+    Dword           error;
+    Byte            reserved[16];
+} ReadRegisterBitsRequest, *PReadRegisterBitsRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Word            variableIndex;
+    Byte            bufferLength;
+    Byte*           buffer;
+    Dword           error;
+    Byte            reserved[16];
+} GetVariablesRequest, *PGetVariablesRequest;
+
+typedef struct {
+    Byte            chip;
+    Processor       processor;
+    Word            variableIndex;
+    Byte            position;
+    Byte            length;
+    Byte*           value;
+    Dword           error;
+    Byte            reserved[16];
+} GetVariableBitsRequest, *PGetVariableBitsRequest;
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in demodulator.
+ * Paramters:   DemodRegs struct
+ */
+#define IOCTL_AFA_DEMOD_WRITEREGISTERS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x101, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Write a sequence of bytes to the contiguous registers in tuner.
+ * Paramters:   DemodTunerRegs struct
+ */
+#define IOCTL_AFA_DEMOD_WRITETUNERREGISTERS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x102, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Write a sequence of bytes to the contiguous cells in the EEPROM.
+ * Paramters:   DemodEEPROMVaules struct
+ */
+#define IOCTL_AFA_DEMOD_WRITEEEPROMVALUES \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x103, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Write one byte to the contiguous registers in demodulator.
+ * Paramters:   DemodRegs struct
+ */
+#define IOCTL_AFA_DEMOD_WRITEREGISTERBITS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x104, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Write a sequence of bytes to the contiguous variables in demodulator.
+ * Paramters:   DemodVariables struct
+ */
+#define IOCTL_AFA_DEMOD_SETVARIABLES \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x105, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Write a sequence of bytes to the contiguous variables in demodulator.
+ * Paramters:   DemodVariables struct
+ */
+#define IOCTL_AFA_DEMOD_SETVARIABLEBITS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x106, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous registers in demodulator.
+ * Paramters:   DemodRegs struct
+ */
+#define IOCTL_AFA_DEMOD_READREGISTERS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x108, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous registers in tuner.
+ * Paramters:   DemodTunerRegs
+ */
+#define IOCTL_AFA_DEMOD_READTUNERREGISTERS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x109, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous cells in the EEPROM.
+ * Paramters:   DemodEEPROMVaules struct
+ */
+#define IOCTL_AFA_DEMOD_READEEPROMVALUES \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x10A, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous registers in demodulator.
+ * Paramters:   DemodRegs struct
+ */
+#define IOCTL_AFA_DEMOD_READREGISTERBITS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x10B, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous variables in demodulator.
+ * Paramters:   DemodVariables struct
+ */
+#define IOCTL_AFA_DEMOD_GETVARIABLES \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x10C, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+/**
+ * Read a sequence of bytes from the contiguous variables in demodulator.
+ * Paramters:   DemodVariables struct
+ */
+#define IOCTL_AFA_DEMOD_GETVARIABLEBITS \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x10D, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+
+
+/**
+ * Demodulator Stream control API commands
+ */
+
+typedef struct {
+    Byte            chip;
+    Dword           error;
+    Byte            reserved[16];
+} StartCaptureRequest, *PStartCaptureRequest;
+
+typedef struct {
+    Byte            chip;
+    Dword           error;
+    Byte            reserved[16];
+} StopCaptureRequest, *PStopCaptureRequest;
+
+/**
+ * Start capture data stream
+ * Paramters: DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_STARTCAPTURE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x200, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+
+/**
+ * Stop capture data stream
+ * Paramters:   DemodDriverInfo struct
+ */
+#define IOCTL_AFA_DEMOD_STOPCAPTURE \
+    CTL_CODE( MEDIA_DEVICE_AFADEMOD, 0x201, METHOD_BUFFERED, FILE_ANY_ACCESS )
+
+
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.c	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,203 @@
+/**
+ * Maxlinear_MXL5007.cpp
+ *
+ * Interface btw Afa9035 and Mxl5007T
+ */
+
+#include "a867_Maxlinear_MXL5007.h"
+#include "a867_Maxlinear_MXL5007_Script.h"
+#include "a867_mxl5007t.h"
+#include "a867_af903x.h"
+
+//m100 todo MxL5007_TunerConfigS MxL5007_TunerConfig = 0;
+struct mxl5007t_config MxL5007_TunerConfig;
+
+Dword MXL5007_WriteI2C(
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Byte*			pAddress,
+	IN  Byte*			pData,
+	IN  Dword			count
+) {
+    Dword error = Error_NO_ERROR;                /* Status to be returned        */
+    Byte buffer[25];
+    //Byte numberOfRegisters = 9;
+    Byte i;
+
+/** single write */
+    for (i = 0; i < count; i++) {
+        buffer[0] = *(pAddress + i);
+        buffer[1] = *(pData + i);
+        //buffer[2] = 0xFE;  /** Latch CMD request by MXL5005 Confidential Datasheet */
+		error = Standard_writeTunerRegisters (demodulator, chip, buffer[0], 1, &buffer[1]);
+		if (error){
+			deb_data("MXL5007_WriteI2C failed");
+			goto exit;
+		}
+    }
+exit:
+    return (error);
+}
+
+
+UINT32 MxL_I2C_Write(UINT8 DeviceAddr, void* pArray, UINT32 ByteCount, struct mxl5007t_config* myTuner)
+{
+    Dword error = Error_NO_ERROR;                /* Status to be returned */
+    // Byte buffer[25];
+    // Byte i;
+	Byte* pData;
+	pData = (Byte*)pArray;
+    
+/** single write */
+    //buffer[2] = 0xFE;  /** Latch CMD request by MXL5005 Confidential Datasheet */
+	if (ByteCount == 1) 
+		error = Standard_writeTunerRegisters ((myTuner->demodulator), (myTuner->chip), pData[0], 0, NULL);
+	else if (ByteCount > 1)
+		error = Standard_writeTunerRegisters ((myTuner->demodulator), (myTuner->chip), pData[0], ByteCount - 1, &pData[1]);
+	else
+	{	
+		error = Error_INVALID_DATA_LENGTH;
+		deb_data("MxL_I2C_Write:: ByteCount = 0"); 
+	}
+
+	if (error){
+		deb_data("MxL_I2C_Write failed");
+		goto exit;
+	}
+
+exit:
+    return (error);
+}
+
+
+UINT32 MxL_I2C_Read(UINT8 DeviceAddr, UINT8 Addr, UINT8* mData, struct mxl5007t_config* myTuner)
+{
+	Dword error = Error_NO_ERROR;
+
+	error = Standard_writeTunerRegisters(myTuner->demodulator, myTuner->chip, 0xFB, 1, &Addr);
+	error = Standard_readTunerRegisters (myTuner->demodulator, myTuner->chip, 0xffff, 1, mData);
+
+	return (error);
+}
+
+void MxL_Delay(UINT32 mSec)
+{
+	User_delay(NULL, mSec);
+}
+
+
+Dword MXL5007_open (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+) {
+	Ganymede* ganymede;
+	ganymede = (Ganymede*) demodulator;
+	MxL5007_TunerConfig.demodulator = demodulator;
+	MxL5007_TunerConfig.chip = chip;
+
+	//MxL5007_TunerConfig.I2C_Addr = MxL_I2C_ADDR_096;	// 7-bit address
+	MxL5007_TunerConfig.I2C_Addr = ganymede->tunerDescription->tunerAddress; //Get from tunerDescription
+
+	//MxL5007_TunerConfig.IF_Freq = MxL_IF_4_57_MHZ;
+	switch( ganymede->tunerDescription->ifFrequency ) {
+	case 4000000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_4_MHZ; break;
+	case 4500000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_4_5_MHZ; break;
+	case 4570000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_4_57_MHZ; break;
+	case 5000000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_5_MHZ; break;
+	case 5380000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_5_38_MHZ; break;
+	case 6000000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_6_MHZ; break;
+	case 6280000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_6_28_MHZ; break;
+	case 9191500:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_9_1915_MHZ; break;
+	case 35250000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_35_25_MHZ; break;
+	case 36150000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_36_15_MHZ; break;
+	case 44000000:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_44_MHZ; break;
+	default:
+		MxL5007_TunerConfig.if_freq_hz = MxL_IF_4_57_MHZ;
+		printk("IF unsupported\n");
+		break;
+	}
+
+	//MxL5007_TunerConfig.IF_Spectrum = MxL_NORMAL_IF;
+	if (ganymede->tunerDescription->inversion == True)
+		MxL5007_TunerConfig.invert_if = 1; //Get from tunerDescription
+	else
+		MxL5007_TunerConfig.invert_if = 0;
+
+	MxL5007_TunerConfig.Mode = MxL_MODE_DVBT;
+	MxL5007_TunerConfig.if_diff_out_level = -8; //Setting for Cable mode only
+	MxL5007_TunerConfig.xtal_freq_hz = MxL_XTAL_24_MHZ;	//24Mhz
+	MxL5007_TunerConfig.clk_out_enable = 0;
+	MxL5007_TunerConfig.clk_out_amp = MxL_CLKOUT_AMP_0_94V;
+	
+	if( ganymede->booted )
+	a867_mxl5007t_attach(&MxL5007_TunerConfig);
+	deb_data("MxL5007 Open");
+
+    return (Error_NO_ERROR);
+}
+
+
+Dword MXL5007_close (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+) {
+	a867_mxl5007t_release(MxL5007_TunerConfig.state);
+    return (Error_NO_ERROR);
+}
+
+
+Dword MXL5007_set (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Word			bandwidth,
+	IN  Dword			frequency
+) {
+	// Dword status = 0;       
+
+	deb_data("MxL5007 Set");
+	if(	a867_mxl5007t_set_params(MxL5007_TunerConfig.state, (enum mxl5007t_bw_mhz) (bandwidth / 1000), frequency * 1000) ) {
+		deb_data("MxL5007 Set fail");
+		return (Error_WRITE_TUNER_FAIL);
+	}
+
+	return (Error_NO_ERROR);
+}
+
+
+Dword SwPowerCtrlMXL5007(
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+	IN  Byte			control			/** 0 for power down mode, 1 for normal operation mode */
+)
+{
+    return (Error_NO_ERROR);
+}
+
+
+
+TunerDescription tuner_MXL5007 = {
+    MXL5007_open,
+    MXL5007_close,
+    MXL5007_set,
+    MXL5007_scripts,
+    MXL5007_scriptSets,
+    0xC0,                           /** tuner i2c address */
+    1,                              /** length of tuner register address */
+    4570000,				                /* ref. mxl5007t.h/mxl5007t_if_freq */
+    False                           /** spectrum inverse */
+};
+
+
+
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007.h	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,60 @@
+/**
+ * Maxlinear_MXL5007.h
+ *
+ * Interface btw Afa9035 and Mxl5007T
+ */
+
+#ifndef __Maxlinear_MXL5007_H__
+#define __Maxlinear_MXL5007_H__
+
+#include "a867_type.h"
+#include "a867_error.h"
+#include "a867_user.h"
+#include "a867_register.h"
+#include "a867_standard.h"
+#include "a867_mxl5007t.h"
+#include "a867_Common.h"	//for Tuner_struct
+typedef unsigned int	UINT32;
+typedef unsigned char	UINT8;
+
+extern TunerDescription tuner_MXL5007;
+
+/**
+ *
+ */
+
+UINT32 MxL_I2C_Write(UINT8 DeviceAddr, void* pArray, UINT32 ByteCount, struct mxl5007t_config* myTuner);
+UINT32 MxL_I2C_Read(UINT8 DeviceAddr, UINT8 Addr, UINT8* mData, struct mxl5007t_config* myTuner);
+void MxL_Delay(UINT32 mSec);
+
+
+/**
+ *
+ */
+Dword MXL5007_open (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+
+/**
+ *
+ */
+Dword MXL5007_close (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip
+);
+
+
+/**
+ *
+ */
+Dword MXL5007_set (
+	IN  Demodulator*	demodulator,
+	IN  Byte			chip,
+    IN  Word			bandwidth,
+    IN  Dword			frequency
+);
+
+#endif //__Maxlinear_MXL5007_H__
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007_Script.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007_Script.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007_Script.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_Maxlinear_MXL5007_Script.h	2012-06-18 11:00:36.144010953 +0200
@@ -0,0 +1,64 @@
+/** script version */
+
+#define MXL5007_ADDRESS 0xC0
+#define MXL5007_SCRIPTSETLENGTH	0x00000001
+
+
+Word MXL5007_scriptSets[] = {
+	0x34
+};
+
+ValueSet MXL5007_scripts[] = {
+ {0x0046, 0x04},
+ {0x0057, 0x00},
+ {0x0058, 0x01},
+ {0x005f, 0x00},
+ {0x0060, 0x00},
+ {0x006e, 0x01},
+ {0x0071, 0x0A},
+ {0x0072, 0x02},
+ {0x0074, 0x01},
+ {0x0079, 0x01},
+ {0x0093, 0x00},
+ {0x0094, 0x00},
+ {0x0095, 0x00},
+ {0x0096, 0x00},
+ {0x009b, 0x20},
+ {0x009c, 0x66},
+ {0x00b3, 0x01},
+ {0x00c3, 0x0},
+ {0x00c4, 0x0},
+ {0x00c7, 0x59},
+ {0xF007, 0x00},
+ {0xF00A, 0x1B},
+ {0xF00B, 0x1B},
+ {0xF00C, 0x1B},
+ {0xF00D, 0x1B},
+ {0xF00E, 0xFF},
+ {0xF00F, 0x01},
+ {0xF010, 0x00},
+ {0xF011, 0x02},
+ {0xF012, 0xFF},
+ {0xF013, 0x01},
+ {0xF014, 0x00},
+ {0xF015, 0x02},
+ {0xF01B, 0xEF},
+ {0xF01C, 0x01},
+ {0xF01D, 0x0f},
+ {0xF01E, 0x02},
+ {0xF01F, 0x6e},
+ {0xF020, 0x00},
+ {0xF025, 0xDE},
+ {0xF026, 0x00},
+ {0xF027, 0x0A},
+ {0xF028, 0x03},
+ {0xF029, 0x6e},
+ {0xF02A, 0x00},
+ {0xF047, 0x00},
+ {0xF054, 0x0},
+ {0xF055, 0x0},
+ {0xF077, 0x02},
+ {0xF14F, 0x02},
+ {0xF1E6, 0x00},
+ {0xF163, 0x02},
+};
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_mxl5007t.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_mxl5007t.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_mxl5007t.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_mxl5007t.c	2012-06-18 11:00:36.154010953 +0200
@@ -0,0 +1,698 @@
+/*
+ *  mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
+ *
+ *  Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * The code is modified to accommodate the AF903x source code on 2010/6/7
+ */
+
+#include <linux/i2c.h>
+#include <linux/types.h>
+#include <linux/videodev2.h>
+#include <linux/slab.h>
+#include "a867_mxl5007t.h"
+
+/* ------------------------------------------------------------------------- */
+
+#define mxl_printk(kern, fmt, arg...) \
+	printk(kern "%s: " fmt "\n", __func__, ##arg)
+
+#define mxl_err(fmt, arg...) \
+	mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
+
+#define mxl_warn(fmt, arg...) \
+	mxl_printk(KERN_WARNING, fmt, ##arg)
+
+#define mxl_info(fmt, arg...) \
+	mxl_printk(KERN_INFO, fmt, ##arg)
+
+#define mxl_debug(fmt, arg...)				\
+({							\
+	if (1)				\
+		mxl_printk(KERN_DEBUG, fmt, ##arg);	\
+})
+
+#define mxl_fail(ret)							\
+({									\
+	int __ret;							\
+	__ret = (ret < 0);						\
+	if (__ret)							\
+		mxl_printk(KERN_ERR, "error %d on line %d",		\
+			   ret, __LINE__);				\
+	__ret;								\
+})
+
+/* ------------------------------------------------------------------------- */
+
+#define MHz 1000000
+
+
+#include "a867_Maxlinear_MXL5007.h"
+
+
+struct reg_pair_t {
+	u8 reg;
+	u8 val;
+};
+
+/* ------------------------------------------------------------------------- */
+
+static struct reg_pair_t init_tab[] = {
+	{ 0x02, 0x06 },
+	{ 0x03, 0x48 },
+	{ 0x05, 0x04 },
+	{ 0x06, 0x10 },
+	{ 0x2e, 0x15 }, /* OVERRIDE */
+	{ 0x30, 0x10 }, /* OVERRIDE */
+	{ 0x45, 0x58 }, /* OVERRIDE */
+	{ 0x48, 0x19 }, /* OVERRIDE */
+	{ 0x52, 0x03 }, /* OVERRIDE */
+	{ 0x53, 0x44 }, /* OVERRIDE */
+	{ 0x6a, 0x4b }, /* OVERRIDE */
+	{ 0x76, 0x00 }, /* OVERRIDE */
+	{ 0x78, 0x18 }, /* OVERRIDE */
+	{ 0x7a, 0x17 }, /* OVERRIDE */
+	{ 0x85, 0x06 }, /* OVERRIDE */
+	{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
+	{ 0, 0 }
+};
+
+static struct reg_pair_t init_tab_cable[] = {
+	{ 0x02, 0x06 },
+	{ 0x03, 0x48 },
+	{ 0x05, 0x04 },
+	{ 0x06, 0x10 },
+	{ 0x09, 0x3f },
+	{ 0x0a, 0x3f },
+	{ 0x0b, 0x3f },
+	{ 0x2e, 0x15 }, /* OVERRIDE */
+	{ 0x30, 0x10 }, /* OVERRIDE */
+	{ 0x45, 0x58 }, /* OVERRIDE */
+	{ 0x48, 0x19 }, /* OVERRIDE */
+	{ 0x52, 0x03 }, /* OVERRIDE */
+	{ 0x53, 0x44 }, /* OVERRIDE */
+	{ 0x6a, 0x4b }, /* OVERRIDE */
+	{ 0x76, 0x00 }, /* OVERRIDE */
+	{ 0x78, 0x18 }, /* OVERRIDE */
+	{ 0x7a, 0x17 }, /* OVERRIDE */
+	{ 0x85, 0x06 }, /* OVERRIDE */
+	{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
+	{ 0, 0 }
+};
+
+/* ------------------------------------------------------------------------- */
+
+static struct reg_pair_t reg_pair_rftune[] = {
+	{ 0x0f, 0x00 }, /* abort tune */
+	{ 0x0c, 0x15 },
+	{ 0x0d, 0x40 },
+	{ 0x0e, 0x0e },
+	{ 0x1f, 0x87 }, /* OVERRIDE */
+	{ 0x20, 0x1f }, /* OVERRIDE */
+	{ 0x21, 0x87 }, /* OVERRIDE */
+	{ 0x22, 0x1f }, /* OVERRIDE */
+	{ 0x80, 0x01 }, /* freq dependent */
+	{ 0x0f, 0x01 }, /* start tune */
+	{ 0, 0 }
+};
+
+/* ------------------------------------------------------------------------- */
+
+
+
+/* ------------------------------------------------------------------------- */
+
+/* called by _init and _rftun to manipulate the register arrays */
+
+static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
+{
+	unsigned int i = 0;
+
+	while (reg_pair[i].reg || reg_pair[i].val) {
+		if (reg_pair[i].reg == reg) {
+			reg_pair[i].val &= ~mask;
+			reg_pair[i].val |= val;
+		}
+		i++;
+
+	}
+	return;
+}
+
+static void copy_reg_bits(struct reg_pair_t *reg_pair1,
+			  struct reg_pair_t *reg_pair2)
+{
+	unsigned int i, j;
+
+	i = j = 0;
+
+	while (reg_pair1[i].reg || reg_pair1[i].val) {
+		while (reg_pair2[j].reg || reg_pair2[j].val) {
+			if (reg_pair1[i].reg != reg_pair2[j].reg) {
+				j++;
+				continue;
+			}
+			reg_pair2[j].val = reg_pair1[i].val;
+			break;
+		}
+		i++;
+	}
+	return;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
+				   enum mxl5007t_mode mode,
+				   s32 if_diff_out_level)
+{
+	switch (mode) {
+	case MxL_MODE_ATSC:
+		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
+		break;
+	case MxL_MODE_DVBT:
+		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
+		break;
+	case MxL_MODE_ISDBT:
+		set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
+		break;
+	case MxL_MODE_CABLE:
+		set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
+		set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
+			     8 - if_diff_out_level);
+		set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
+		break;
+	default:
+		mxl_fail(-EINVAL);
+	}
+	return;
+}
+
+static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
+				      enum mxl5007t_if_freq if_freq,
+				      int invert_if)
+{
+	u8 val;
+
+	switch (if_freq) {
+	case MxL_IF_4_MHZ:
+		val = 0x00;
+		break;
+	case MxL_IF_4_5_MHZ:
+		val = 0x02;
+		break;
+	case MxL_IF_4_57_MHZ:
+		val = 0x03;
+		break;
+	case MxL_IF_5_MHZ:
+		val = 0x04;
+		break;
+	case MxL_IF_5_38_MHZ:
+		val = 0x05;
+		break;
+	case MxL_IF_6_MHZ:
+		val = 0x06;
+		break;
+	case MxL_IF_6_28_MHZ:
+		val = 0x07;
+		break;
+	case MxL_IF_9_1915_MHZ:
+		val = 0x08;
+		break;
+	case MxL_IF_35_25_MHZ:
+		val = 0x09;
+		break;
+	case MxL_IF_36_15_MHZ:
+		val = 0x0a;
+		break;
+	case MxL_IF_44_MHZ:
+		val = 0x0b;
+		break;
+	default:
+		mxl_fail(-EINVAL);
+		return;
+	}
+	set_reg_bits(state->tab_init, 0x02, 0x0f, val);
+
+	/* set inverted IF or normal IF */
+	set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
+
+	return;
+}
+
+static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
+					enum mxl5007t_xtal_freq xtal_freq)
+{
+	switch (xtal_freq) {
+	case MxL_XTAL_16_MHZ:
+		/* select xtal freq & ref freq */
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
+		break;
+	case MxL_XTAL_20_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
+		break;
+	case MxL_XTAL_20_25_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
+		break;
+	case MxL_XTAL_20_48_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
+		break;
+	case MxL_XTAL_24_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
+		break;
+	case MxL_XTAL_25_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
+		break;
+	case MxL_XTAL_25_14_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
+		break;
+	case MxL_XTAL_27_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
+		break;
+	case MxL_XTAL_28_8_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
+		break;
+	case MxL_XTAL_32_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
+		break;
+	case MxL_XTAL_40_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
+		break;
+	case MxL_XTAL_44_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
+		break;
+	case MxL_XTAL_48_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
+		break;
+	case MxL_XTAL_49_3811_MHZ:
+		set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
+		set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
+		break;
+	default:
+		mxl_fail(-EINVAL);
+		return;
+	}
+
+	return;
+}
+
+static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
+						  enum mxl5007t_mode mode)
+{
+	struct mxl5007t_config *cfg = state->config;
+
+	memcpy(state->tab_init, init_tab, sizeof(init_tab));
+	memcpy(state->tab_init_cable, init_tab_cable, sizeof(init_tab_cable));
+
+	mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
+	mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
+	mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
+
+	set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);
+	set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
+	set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
+
+	if (mode >= MxL_MODE_CABLE) {
+		copy_reg_bits(state->tab_init, state->tab_init_cable);
+		return state->tab_init_cable;
+	} else
+		return state->tab_init;
+}
+
+static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
+				 enum mxl5007t_bw_mhz bw)
+{
+	u8 val;
+
+	switch (bw) {
+	case MxL_BW_6MHz:
+		val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
+			     * and DIG_MODEINDEX_CSF */
+		break;
+	case MxL_BW_7MHz:
+		val = 0x2a;
+		break;
+	case MxL_BW_8MHz:
+		val = 0x3f;
+		break;
+	default:
+		mxl_fail(-EINVAL);
+		return;
+	}
+	set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
+
+	return;
+}
+
+static struct
+reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
+				       u32 rf_freq, enum mxl5007t_bw_mhz bw)
+{
+	u32 dig_rf_freq = 0;
+	u32 temp;
+	u32 frac_divider = 1000000;
+	unsigned int i;
+
+	memcpy(state->tab_rftune, reg_pair_rftune, sizeof(reg_pair_rftune));
+
+	mxl5007t_set_bw_bits(state, bw);
+
+	/* Convert RF frequency into 16 bits =>
+	 * 10 bit integer (MHz) + 6 bit fraction */
+	dig_rf_freq = rf_freq / MHz;
+
+	temp = rf_freq % MHz;
+
+	for (i = 0; i < 6; i++) {
+		dig_rf_freq <<= 1;
+		frac_divider /= 2;
+		if (temp > frac_divider) {
+			temp -= frac_divider;
+			dig_rf_freq++;
+		}
+	}
+
+	/* add to have shift center point by 7.8124 kHz */
+	if (temp > 7812)
+		dig_rf_freq++;
+
+	set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
+	set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
+
+	if (rf_freq >= 333000000)
+		set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
+
+	return state->tab_rftune;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
+{
+	u8 buf[] = { reg, val };
+	int ret = MxL_I2C_Write(state->config->I2C_Addr, buf, 2, state->config);
+	if (ret) {
+		mxl_err("failed!");
+		return -EREMOTEIO;
+	}
+	
+	return ret;
+}
+
+static int mxl5007t_write_regs(struct mxl5007t_state *state,
+			       struct reg_pair_t *reg_pair)
+{
+	unsigned int i = 0;
+	int ret = 0;
+
+	while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
+		ret = mxl5007t_write_reg(state,
+		reg_pair[i].reg, reg_pair[i].val);
+		i++;
+	}
+
+	return ret;
+}
+
+/* unused
+static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
+{
+	int ret = MxL_I2C_Read(state->config->I2C_Addr, reg, val, state->config);
+
+	if (ret) {
+		mxl_err("failed!");
+		return -EREMOTEIO;
+	}
+	return ret;
+}
+
+*/
+
+static int mxl5007t_soft_reset(struct mxl5007t_state *state)
+{
+	u8 d = 0xff;
+	
+	int ret = MxL_I2C_Write(state->config->I2C_Addr, &d, 1, state->config);
+	if (ret) {
+		mxl_err("failed!");
+		return -EREMOTEIO;
+	}
+	return ret;
+}
+
+static int mxl5007t_tuner_init(struct mxl5007t_state *state,
+			       enum mxl5007t_mode mode)
+{
+	struct reg_pair_t *init_regs;
+	int ret;
+
+	ret = mxl5007t_soft_reset(state);
+	if (mxl_fail(ret))
+		goto fail;
+
+	/* calculate initialization reg array */
+	init_regs = mxl5007t_calc_init_regs(state, mode);
+
+	ret = mxl5007t_write_regs(state, init_regs);
+	if (mxl_fail(ret))
+		goto fail;
+	mdelay(1);
+fail:
+	return ret;
+}
+
+static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
+				  enum mxl5007t_bw_mhz bw)
+{
+	struct reg_pair_t *rf_tune_regs;
+	int ret;
+
+	/* calculate channel change reg array */
+	rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
+
+	ret = mxl5007t_write_regs(state, rf_tune_regs);
+	if (mxl_fail(ret))
+		goto fail;
+	msleep(3);
+fail:
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* unused
+static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
+				      int *rf_locked, int *ref_locked)
+{
+	u8 d;
+	int ret;
+
+	*rf_locked = 0;
+	*ref_locked = 0;
+
+	ret = mxl5007t_read_reg(state, 0xd8, &d);
+	if (mxl_fail(ret))
+		goto fail;
+
+	if ((d & 0x0c) == 0x0c)
+		*rf_locked = 1;
+
+	if ((d & 0x03) == 0x03)
+		*ref_locked = 1;
+fail:
+	return ret;
+}
+*/
+
+/* ------------------------------------------------------------------------- */
+
+int a867_mxl5007t_set_params(struct mxl5007t_state *state, enum mxl5007t_bw_mhz bw, u32 freq)
+{
+	int ret;
+
+	mutex_lock(&state->lock);
+
+	ret = mxl5007t_tuner_init(state, state->config->Mode);
+	if (mxl_fail(ret))
+		goto fail;
+
+	ret = mxl5007t_tuner_rf_tune(state, freq, bw);
+	if (mxl_fail(ret))
+		goto fail;
+
+	state->frequency = freq;	//hz
+	state->bandwidth = bw;		//6, 7 ,8
+fail:
+	mutex_unlock(&state->lock);
+
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* unused
+static int mxl5007t_init(struct mxl5007t_state *state)
+{
+	int ret;
+
+	// wake from standby 
+	ret = mxl5007t_write_reg(state, 0x01, 0x01);
+	mxl_fail(ret);
+
+	return ret;
+}
+
+*/
+
+/* unused
+static int mxl5007t_sleep(struct mxl5007t_state *state)
+{
+	int ret;
+
+	// enter standby mode 
+	ret = mxl5007t_write_reg(state, 0x01, 0x00);
+	mxl_fail(ret);
+	ret = mxl5007t_write_reg(state, 0x0f, 0x00);
+	mxl_fail(ret);
+
+	return ret;
+}
+*/
+
+/* ------------------------------------------------------------------------- */
+
+/* unused
+static int mxl5007t_get_frequency(struct mxl5007t_state *state, u32 *frequency)
+{
+	*frequency = state->frequency;
+	return 0;
+}
+
+*/
+
+/* unused
+static int mxl5007t_get_bandwidth(struct mxl5007t_state *state, u32 *bandwidth)
+{
+	*bandwidth = state->bandwidth;
+	return 0;
+}
+*/
+
+void a867_mxl5007t_release(struct mxl5007t_state *state)
+{
+	if( state ) {
+		if( state->tab_init ) kfree(state->tab_init);
+		if( state->tab_init_cable ) kfree(state->tab_init_cable);
+		if( state->tab_rftune ) kfree(state->tab_rftune);
+		state->config->state = NULL;
+		kfree(state);
+	}
+}
+
+/* unused
+static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
+{
+	char *name;
+	int ret;
+	u8 id;
+
+	ret = mxl5007t_read_reg(state, 0xd9, &id);
+	if (mxl_fail(ret))
+		goto fail;
+
+	switch (id) {
+	case MxL_5007_V1_F1:
+		name = "MxL5007.v1.f1";
+		break;
+	case MxL_5007_V1_F2:
+		name = "MxL5007.v1.f2";
+		break;
+	case MxL_5007_V2_100_F1:
+		name = "MxL5007.v2.100.f1";
+		break;
+	case MxL_5007_V2_100_F2:
+		name = "MxL5007.v2.100.f2";
+		break;
+	case MxL_5007_V2_200_F1:
+		name = "MxL5007.v2.200.f1";
+		break;
+	case MxL_5007_V2_200_F2:
+		name = "MxL5007.v2.200.f2";
+		break;
+	case MxL_5007_V4:
+		name = "MxL5007T.v4";
+		break;
+	default:
+		name = "MxL5007T";
+		printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
+		id = MxL_UNKNOWN_ID;
+	}
+	state->chip_id = id;
+	return 0;
+
+fail:
+	state->chip_id = MxL_UNKNOWN_ID;
+	return ret;
+}
+*/
+
+void a867_mxl5007t_attach(struct mxl5007t_config *cfg)
+{
+	struct mxl5007t_state *state;
+
+	state = kzalloc(sizeof(struct mxl5007t_state), GFP_KERNEL);
+	if( state == NULL ) return;
+
+	mutex_init(&state->lock);
+
+	state->config = cfg;
+	cfg->state = state;
+	state->tab_init = kzalloc(sizeof(init_tab), GFP_KERNEL);
+	if( !state->tab_init ) goto error;
+
+	state->tab_init_cable = kzalloc(sizeof(init_tab_cable), GFP_KERNEL);
+	if( !state->tab_init_cable ) goto error;
+
+	state->tab_rftune = kzalloc(sizeof(reg_pair_rftune), GFP_KERNEL);
+	if( !state->tab_rftune ) goto error;
+	return;
+error:
+	printk("fail to allocate memory\n");
+	return;
+}
+
+
+/*
+ * Overrides for Emacs so that we follow Linus's tabbing style.
+ * ---------------------------------------------------------------------------
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_mxl5007t.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_mxl5007t.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_mxl5007t.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_mxl5007t.h	2012-06-18 11:00:36.154010953 +0200
@@ -0,0 +1,135 @@
+/*
+ *  mxl5007t.h - driver for the MaxLinear MxL5007T silicon tuner
+ *
+ *  Copyright (C) 2008 Michael Krufky <mkrufky@linuxtv.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * =============> modified from that in linux-2.6.34
+ */
+
+#ifndef __MXL5007T_H__
+#define __MXL5007T_H__
+
+#include "a867_type.h"
+/* ------------------------------------------------------------------------- */
+
+enum mxl5007t_if_freq {
+	MxL_IF_4_MHZ,      /*  4000000 */
+	MxL_IF_4_5_MHZ,    /*  4500000 */
+	MxL_IF_4_57_MHZ,   /*  4570000 */
+	MxL_IF_5_MHZ,      /*  5000000 */
+	MxL_IF_5_38_MHZ,   /*  5380000 */
+	MxL_IF_6_MHZ,      /*  6000000 */
+	MxL_IF_6_28_MHZ,   /*  6280000 */
+	MxL_IF_9_1915_MHZ, /*  9191500 */
+	MxL_IF_35_25_MHZ,  /* 35250000 */
+	MxL_IF_36_15_MHZ,  /* 36150000 */
+	MxL_IF_44_MHZ,     /* 44000000 */
+};
+
+enum mxl5007t_xtal_freq {
+	MxL_XTAL_16_MHZ,      /* 16000000 */
+	MxL_XTAL_20_MHZ,      /* 20000000 */
+	MxL_XTAL_20_25_MHZ,   /* 20250000 */
+	MxL_XTAL_20_48_MHZ,   /* 20480000 */
+	MxL_XTAL_24_MHZ,      /* 24000000 */
+	MxL_XTAL_25_MHZ,      /* 25000000 */
+	MxL_XTAL_25_14_MHZ,   /* 25140000 */
+	MxL_XTAL_27_MHZ,      /* 27000000 */
+	MxL_XTAL_28_8_MHZ,    /* 28800000 */
+	MxL_XTAL_32_MHZ,      /* 32000000 */
+	MxL_XTAL_40_MHZ,      /* 40000000 */
+	MxL_XTAL_44_MHZ,      /* 44000000 */
+	MxL_XTAL_48_MHZ,      /* 48000000 */
+	MxL_XTAL_49_3811_MHZ, /* 49381100 */
+};
+
+enum mxl5007t_clkout_amp {
+	MxL_CLKOUT_AMP_0_94V = 0,
+	MxL_CLKOUT_AMP_0_53V = 1,
+	MxL_CLKOUT_AMP_0_37V = 2,
+	MxL_CLKOUT_AMP_0_28V = 3,
+	MxL_CLKOUT_AMP_0_23V = 4,
+	MxL_CLKOUT_AMP_0_20V = 5,
+	MxL_CLKOUT_AMP_0_17V = 6,
+	MxL_CLKOUT_AMP_0_15V = 7,
+};
+
+enum mxl5007t_mode {
+	MxL_MODE_ISDBT     =    0,
+	MxL_MODE_DVBT      =    1,
+	MxL_MODE_ATSC      =    2,
+	MxL_MODE_CABLE     = 0x10,
+};
+
+enum mxl5007t_bw_mhz {
+	MxL_BW_6MHz = 6,
+	MxL_BW_7MHz = 7,
+	MxL_BW_8MHz = 8,
+};
+
+struct mxl5007t_config;
+enum mxl5007t_chip_version {
+	MxL_UNKNOWN_ID     = 0x00,
+	MxL_5007_V1_F1     = 0x11,
+	MxL_5007_V1_F2     = 0x12,
+	MxL_5007_V4        = 0x14,
+	MxL_5007_V2_100_F1 = 0x21,
+	MxL_5007_V2_100_F2 = 0x22,
+	MxL_5007_V2_200_F1 = 0x23,
+	MxL_5007_V2_200_F2 = 0x24,
+};
+
+struct mxl5007t_state {
+	struct mutex lock;
+	struct mxl5007t_config *config;
+	enum mxl5007t_chip_version chip_id;
+	struct reg_pair_t *tab_init;
+	struct reg_pair_t *tab_init_cable;
+	struct reg_pair_t *tab_rftune;
+	u32 frequency;
+	u32 bandwidth;
+};
+
+struct mxl5007t_config {
+	Demodulator*	demodulator;	//AF9035 instance //todo include
+	unsigned char			chip;			//AF9035 instance
+	unsigned char			I2C_Addr;
+	enum mxl5007t_mode	Mode;
+	struct mxl5007t_state *state;
+	s32 if_diff_out_level;
+	enum mxl5007t_clkout_amp clk_out_amp;
+	enum mxl5007t_xtal_freq xtal_freq_hz;
+	enum mxl5007t_if_freq if_freq_hz;
+	unsigned int invert_if:1;
+	unsigned int loop_thru_enable:1;
+	unsigned int clk_out_enable:1;
+};
+
+extern void a867_mxl5007t_attach(struct mxl5007t_config *cfg);
+extern void a867_mxl5007t_release(struct mxl5007t_state *state);
+extern int a867_mxl5007t_set_params(struct mxl5007t_state *state, enum mxl5007t_bw_mhz bw, u32 freq);
+
+#endif /* __MXL5007T_H__ */
+
+/*
+ * Overrides for Emacs so that we follow Linus's tabbing style.
+ * ---------------------------------------------------------------------------
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_ofdm.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_ofdm.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_ofdm.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_ofdm.h	2012-06-18 11:00:36.154010953 +0200
@@ -0,0 +1,18 @@
+
+#define DVB_LL_VERSION1 10
+
+#define DVB_LL_VERSION2 10
+
+#define DVB_LL_VERSION3 3
+
+#define DVB_LL_VERSION4 0
+
+
+#define DVB_OFDM_VERSION1 4
+
+#define DVB_OFDM_VERSION2 21
+
+#define DVB_OFDM_VERSION3 6
+
+#define DVB_OFDM_VERSION4 251
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_register.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_register.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_register.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_register.h	2012-06-18 11:00:36.184010953 +0200
@@ -0,0 +1,13519 @@
+#ifndef _TD_BIU_REG_H_
+#define _TD_BIU_REG_H_
+// biu_reg.h 6-27-2007
+// gen_biu Ver 1.0 generated by
+#define xd_p_reg_p_aagc_log_2_acc   (*(volatile byte xdata *) 0xF000)
+#define    p_reg_p_aagc_log_2_acc   0xF000
+#define reg_p_aagc_log_2_acc_pos 0
+#define reg_p_aagc_log_2_acc_len 4
+#define reg_p_aagc_log_2_acc_lsb 0
+#define xd_p_reg_p_aagc_signal_level_rdy    (*(volatile byte xdata *) 0xF001)
+#define    p_reg_p_aagc_signal_level_rdy    0xF001
+#define reg_p_aagc_signal_level_rdy_pos 0
+#define reg_p_aagc_signal_level_rdy_len 1
+#define reg_p_aagc_signal_level_rdy_lsb 0
+#define xd_r_reg_r_aagc_signal_level_7_0    (*(volatile byte xdata *) 0xF002)
+#define    r_reg_r_aagc_signal_level_7_0    0xF002
+#define reg_r_aagc_signal_level_7_0_pos 0
+#define reg_r_aagc_signal_level_7_0_len 8
+#define reg_r_aagc_signal_level_7_0_lsb 0
+#define xd_r_reg_r_aagc_signal_level_9_8    (*(volatile byte xdata *) 0xF003)
+#define    r_reg_r_aagc_signal_level_9_8    0xF003
+#define reg_r_aagc_signal_level_9_8_pos 0
+#define reg_r_aagc_signal_level_9_8_len 2
+#define reg_r_aagc_signal_level_9_8_lsb 8
+#define xd_p_reg_p_aagc_rf_if_swap  (*(volatile byte xdata *) 0xF004)
+#define    p_reg_p_aagc_rf_if_swap  0xF004
+#define reg_p_aagc_rf_if_swap_pos 0
+#define reg_p_aagc_rf_if_swap_len 1
+#define reg_p_aagc_rf_if_swap_lsb 0
+#define xd_p_reg_p_pwm_rf_if_from_hw    (*(volatile byte xdata *) 0xF006)
+#define    p_reg_p_pwm_rf_if_from_hw    0xF006
+#define reg_p_pwm_rf_if_from_hw_pos 0
+#define reg_p_pwm_rf_if_from_hw_len 1
+#define reg_p_pwm_rf_if_from_hw_lsb 0
+#define xd_p_reg_aagc_out_if_inv    (*(volatile byte xdata *) 0xF007)
+#define    p_reg_aagc_out_if_inv    0xF007
+#define reg_aagc_out_if_inv_pos 0
+#define reg_aagc_out_if_inv_len 1
+#define reg_aagc_out_if_inv_lsb 0
+#define xd_p_reg_aagc_int_en    (*(volatile byte xdata *) 0xF008)
+#define    p_reg_aagc_int_en    0xF008
+#define reg_aagc_int_en_pos 0
+#define reg_aagc_int_en_len 1
+#define reg_aagc_int_en_lsb 0
+#define xd_p_reg_aagc_lock_change_flag  (*(volatile byte xdata *) 0xF009)
+#define    p_reg_aagc_lock_change_flag  0xF009
+#define reg_aagc_lock_change_flag_pos 0
+#define reg_aagc_lock_change_flag_len 1
+#define reg_aagc_lock_change_flag_lsb 0
+#define xd_p_reg_aagc_rf_loop_bw_scale_acquire  (*(volatile byte xdata *) 0xF00A)
+#define    p_reg_aagc_rf_loop_bw_scale_acquire  0xF00A
+#define reg_aagc_rf_loop_bw_scale_acquire_pos 0
+#define reg_aagc_rf_loop_bw_scale_acquire_len 5
+#define reg_aagc_rf_loop_bw_scale_acquire_lsb 0
+#define xd_p_reg_aagc_rf_loop_bw_scale_track    (*(volatile byte xdata *) 0xF00B)
+#define    p_reg_aagc_rf_loop_bw_scale_track    0xF00B
+#define reg_aagc_rf_loop_bw_scale_track_pos 0
+#define reg_aagc_rf_loop_bw_scale_track_len 5
+#define reg_aagc_rf_loop_bw_scale_track_lsb 0
+#define xd_p_reg_aagc_if_loop_bw_scale_acquire  (*(volatile byte xdata *) 0xF00C)
+#define    p_reg_aagc_if_loop_bw_scale_acquire  0xF00C
+#define reg_aagc_if_loop_bw_scale_acquire_pos 0
+#define reg_aagc_if_loop_bw_scale_acquire_len 5
+#define reg_aagc_if_loop_bw_scale_acquire_lsb 0
+#define xd_p_reg_aagc_if_loop_bw_scale_track    (*(volatile byte xdata *) 0xF00D)
+#define    p_reg_aagc_if_loop_bw_scale_track    0xF00D
+#define reg_aagc_if_loop_bw_scale_track_pos 0
+#define reg_aagc_if_loop_bw_scale_track_len 5
+#define reg_aagc_if_loop_bw_scale_track_lsb 0
+#define xd_p_reg_aagc_max_rf_agc_7_0    (*(volatile byte xdata *) 0xF00E)
+#define    p_reg_aagc_max_rf_agc_7_0    0xF00E
+#define reg_aagc_max_rf_agc_7_0_pos 0
+#define reg_aagc_max_rf_agc_7_0_len 8
+#define reg_aagc_max_rf_agc_7_0_lsb 0
+#define xd_p_reg_aagc_max_rf_agc_9_8    (*(volatile byte xdata *) 0xF00F)
+#define    p_reg_aagc_max_rf_agc_9_8    0xF00F
+#define reg_aagc_max_rf_agc_9_8_pos 0
+#define reg_aagc_max_rf_agc_9_8_len 2
+#define reg_aagc_max_rf_agc_9_8_lsb 8
+#define xd_p_reg_aagc_min_rf_agc_7_0    (*(volatile byte xdata *) 0xF010)
+#define    p_reg_aagc_min_rf_agc_7_0    0xF010
+#define reg_aagc_min_rf_agc_7_0_pos 0
+#define reg_aagc_min_rf_agc_7_0_len 8
+#define reg_aagc_min_rf_agc_7_0_lsb 0
+#define xd_p_reg_aagc_min_rf_agc_9_8    (*(volatile byte xdata *) 0xF011)
+#define    p_reg_aagc_min_rf_agc_9_8    0xF011
+#define reg_aagc_min_rf_agc_9_8_pos 0
+#define reg_aagc_min_rf_agc_9_8_len 2
+#define reg_aagc_min_rf_agc_9_8_lsb 8
+#define xd_p_reg_aagc_max_if_agc_7_0    (*(volatile byte xdata *) 0xF012)
+#define    p_reg_aagc_max_if_agc_7_0    0xF012
+#define reg_aagc_max_if_agc_7_0_pos 0
+#define reg_aagc_max_if_agc_7_0_len 8
+#define reg_aagc_max_if_agc_7_0_lsb 0
+#define xd_p_reg_aagc_max_if_agc_9_8    (*(volatile byte xdata *) 0xF013)
+#define    p_reg_aagc_max_if_agc_9_8    0xF013
+#define reg_aagc_max_if_agc_9_8_pos 0
+#define reg_aagc_max_if_agc_9_8_len 2
+#define reg_aagc_max_if_agc_9_8_lsb 8
+#define xd_p_reg_aagc_min_if_agc_7_0    (*(volatile byte xdata *) 0xF014)
+#define    p_reg_aagc_min_if_agc_7_0    0xF014
+#define reg_aagc_min_if_agc_7_0_pos 0
+#define reg_aagc_min_if_agc_7_0_len 8
+#define reg_aagc_min_if_agc_7_0_lsb 0
+#define xd_p_reg_aagc_min_if_agc_9_8    (*(volatile byte xdata *) 0xF015)
+#define    p_reg_aagc_min_if_agc_9_8    0xF015
+#define reg_aagc_min_if_agc_9_8_pos 0
+#define reg_aagc_min_if_agc_9_8_len 2
+#define reg_aagc_min_if_agc_9_8_lsb 8
+#define xd_p_reg_aagc_lock_sample_scale (*(volatile byte xdata *) 0xF016)
+#define    p_reg_aagc_lock_sample_scale 0xF016
+#define reg_aagc_lock_sample_scale_pos 0
+#define reg_aagc_lock_sample_scale_len 5
+#define reg_aagc_lock_sample_scale_lsb 0
+#define xd_p_reg_aagc_rf_agc_lock_scale_acquire (*(volatile byte xdata *) 0xF017)
+#define    p_reg_aagc_rf_agc_lock_scale_acquire 0xF017
+#define reg_aagc_rf_agc_lock_scale_acquire_pos 0
+#define reg_aagc_rf_agc_lock_scale_acquire_len 3
+#define reg_aagc_rf_agc_lock_scale_acquire_lsb 0
+#define xd_p_reg_aagc_rf_agc_lock_scale_track   (*(volatile byte xdata *) 0xF018)
+#define    p_reg_aagc_rf_agc_lock_scale_track   0xF018
+#define reg_aagc_rf_agc_lock_scale_track_pos 0
+#define reg_aagc_rf_agc_lock_scale_track_len 3
+#define reg_aagc_rf_agc_lock_scale_track_lsb 0
+#define xd_p_reg_aagc_if_agc_lock_scale_acquire (*(volatile byte xdata *) 0xF019)
+#define    p_reg_aagc_if_agc_lock_scale_acquire 0xF019
+#define reg_aagc_if_agc_lock_scale_acquire_pos 0
+#define reg_aagc_if_agc_lock_scale_acquire_len 3
+#define reg_aagc_if_agc_lock_scale_acquire_lsb 0
+#define xd_p_reg_aagc_if_agc_lock_scale_track   (*(volatile byte xdata *) 0xF01A)
+#define    p_reg_aagc_if_agc_lock_scale_track   0xF01A
+#define reg_aagc_if_agc_lock_scale_track_pos 0
+#define reg_aagc_if_agc_lock_scale_track_len 3
+#define reg_aagc_if_agc_lock_scale_track_lsb 0
+#define xd_p_reg_aagc_rf_top_numerator_s_7_0    (*(volatile byte xdata *) 0xF01B)
+#define    p_reg_aagc_rf_top_numerator_s_7_0    0xF01B
+#define reg_aagc_rf_top_numerator_s_7_0_pos 0
+#define reg_aagc_rf_top_numerator_s_7_0_len 8
+#define reg_aagc_rf_top_numerator_s_7_0_lsb 0
+#define xd_p_reg_aagc_rf_top_numerator_s_9_8    (*(volatile byte xdata *) 0xF01C)
+#define    p_reg_aagc_rf_top_numerator_s_9_8    0xF01C
+#define reg_aagc_rf_top_numerator_s_9_8_pos 0
+#define reg_aagc_rf_top_numerator_s_9_8_len 2
+#define reg_aagc_rf_top_numerator_s_9_8_lsb 8
+#define xd_p_reg_aagc_if_top_numerator_s_7_0    (*(volatile byte xdata *) 0xF01D)
+#define    p_reg_aagc_if_top_numerator_s_7_0    0xF01D
+#define reg_aagc_if_top_numerator_s_7_0_pos 0
+#define reg_aagc_if_top_numerator_s_7_0_len 8
+#define reg_aagc_if_top_numerator_s_7_0_lsb 0
+#define xd_p_reg_aagc_if_top_numerator_s_9_8    (*(volatile byte xdata *) 0xF01E)
+#define    p_reg_aagc_if_top_numerator_s_9_8    0xF01E
+#define reg_aagc_if_top_numerator_s_9_8_pos 0
+#define reg_aagc_if_top_numerator_s_9_8_len 2
+#define reg_aagc_if_top_numerator_s_9_8_lsb 8
+#define xd_p_reg_aagc_adc_out_desired_s_7_0 (*(volatile byte xdata *) 0xF01F)
+#define    p_reg_aagc_adc_out_desired_s_7_0 0xF01F
+#define reg_aagc_adc_out_desired_s_7_0_pos 0
+#define reg_aagc_adc_out_desired_s_7_0_len 8
+#define reg_aagc_adc_out_desired_s_7_0_lsb 0
+#define xd_p_reg_aagc_adc_out_desired_s_8   (*(volatile byte xdata *) 0xF020)
+#define    p_reg_aagc_adc_out_desired_s_8   0xF020
+#define reg_aagc_adc_out_desired_s_8_pos 0
+#define reg_aagc_adc_out_desired_s_8_len 1
+#define reg_aagc_adc_out_desired_s_8_lsb 8
+#define xd_p_reg_aagc_lock_count_th (*(volatile byte xdata *) 0xF021)
+#define    p_reg_aagc_lock_count_th 0xF021
+#define reg_aagc_lock_count_th_pos 0
+#define reg_aagc_lock_count_th_len 4
+#define reg_aagc_lock_count_th_lsb 0
+#define xd_p_reg_aagc_rf_agc_unlock_numerator   (*(volatile byte xdata *) 0xF022)
+#define    p_reg_aagc_rf_agc_unlock_numerator   0xF022
+#define reg_aagc_rf_agc_unlock_numerator_pos 0
+#define reg_aagc_rf_agc_unlock_numerator_len 6
+#define reg_aagc_rf_agc_unlock_numerator_lsb 0
+#define xd_p_reg_aagc_if_agc_unlock_numerator   (*(volatile byte xdata *) 0xF023)
+#define    p_reg_aagc_if_agc_unlock_numerator   0xF023
+#define reg_aagc_if_agc_unlock_numerator_pos 0
+#define reg_aagc_if_agc_unlock_numerator_len 6
+#define reg_aagc_if_agc_unlock_numerator_lsb 0
+#define xd_p_reg_aagc_rf_top_numerator_m_7_0    (*(volatile byte xdata *) 0xF025)
+#define    p_reg_aagc_rf_top_numerator_m_7_0    0xF025
+#define reg_aagc_rf_top_numerator_m_7_0_pos 0
+#define reg_aagc_rf_top_numerator_m_7_0_len 8
+#define reg_aagc_rf_top_numerator_m_7_0_lsb 0
+#define xd_p_reg_aagc_rf_top_numerator_m_9_8    (*(volatile byte xdata *) 0xF026)
+#define    p_reg_aagc_rf_top_numerator_m_9_8    0xF026
+#define reg_aagc_rf_top_numerator_m_9_8_pos 0
+#define reg_aagc_rf_top_numerator_m_9_8_len 2
+#define reg_aagc_rf_top_numerator_m_9_8_lsb 8
+#define xd_p_reg_aagc_if_top_numerator_m_7_0    (*(volatile byte xdata *) 0xF027)
+#define    p_reg_aagc_if_top_numerator_m_7_0    0xF027
+#define reg_aagc_if_top_numerator_m_7_0_pos 0
+#define reg_aagc_if_top_numerator_m_7_0_len 8
+#define reg_aagc_if_top_numerator_m_7_0_lsb 0
+#define xd_p_reg_aagc_if_top_numerator_m_9_8    (*(volatile byte xdata *) 0xF028)
+#define    p_reg_aagc_if_top_numerator_m_9_8    0xF028
+#define reg_aagc_if_top_numerator_m_9_8_pos 0
+#define reg_aagc_if_top_numerator_m_9_8_len 2
+#define reg_aagc_if_top_numerator_m_9_8_lsb 8
+#define xd_p_reg_aagc_adc_out_desired_m_7_0 (*(volatile byte xdata *) 0xF029)
+#define    p_reg_aagc_adc_out_desired_m_7_0 0xF029
+#define reg_aagc_adc_out_desired_m_7_0_pos 0
+#define reg_aagc_adc_out_desired_m_7_0_len 8
+#define reg_aagc_adc_out_desired_m_7_0_lsb 0
+#define xd_p_reg_aagc_adc_out_desired_m_8   (*(volatile byte xdata *) 0xF02A)
+#define    p_reg_aagc_adc_out_desired_m_8   0xF02A
+#define reg_aagc_adc_out_desired_m_8_pos 0
+#define reg_aagc_adc_out_desired_m_8_len 1
+#define reg_aagc_adc_out_desired_m_8_lsb 8
+#define xd_p_reg_aagc_mobile_sel    (*(volatile byte xdata *) 0xF02B)
+#define    p_reg_aagc_mobile_sel    0xF02B
+#define reg_aagc_mobile_sel_pos 0
+#define reg_aagc_mobile_sel_len 1
+#define reg_aagc_mobile_sel_lsb 0
+#define xd_p_reg_aagc_top_reload    (*(volatile byte xdata *) 0xF02C)
+#define    p_reg_aagc_top_reload    0xF02C
+#define reg_aagc_top_reload_pos 0
+#define reg_aagc_top_reload_len 1
+#define reg_aagc_top_reload_lsb 0
+#define xd_p_reg_aagc_rf_delta_voltage_en   (*(volatile byte xdata *) 0xF02D)
+#define    p_reg_aagc_rf_delta_voltage_en   0xF02D
+#define reg_aagc_rf_delta_voltage_en_pos 0
+#define reg_aagc_rf_delta_voltage_en_len 1
+#define reg_aagc_rf_delta_voltage_en_lsb 0
+#define xd_p_reg_aagc_rf_voltage_inc    (*(volatile byte xdata *) 0xF02E)
+#define    p_reg_aagc_rf_voltage_inc    0xF02E
+#define reg_aagc_rf_voltage_inc_pos 0
+#define reg_aagc_rf_voltage_inc_len 1
+#define reg_aagc_rf_voltage_inc_lsb 0
+#define xd_p_reg_aagc_if_delta_voltage_en   (*(volatile byte xdata *) 0xF02F)
+#define    p_reg_aagc_if_delta_voltage_en   0xF02F
+#define reg_aagc_if_delta_voltage_en_pos 0
+#define reg_aagc_if_delta_voltage_en_len 1
+#define reg_aagc_if_delta_voltage_en_lsb 0
+#define xd_p_reg_aagc_if_voltage_inc    (*(volatile byte xdata *) 0xF030)
+#define    p_reg_aagc_if_voltage_inc    0xF030
+#define reg_aagc_if_voltage_inc_pos 0
+#define reg_aagc_if_voltage_inc_len 1
+#define reg_aagc_if_voltage_inc_lsb 0
+#define xd_p_reg_aagc_rf_delta_voltage_7_0  (*(volatile byte xdata *) 0xF032)
+#define    p_reg_aagc_rf_delta_voltage_7_0  0xF032
+#define reg_aagc_rf_delta_voltage_7_0_pos 0
+#define reg_aagc_rf_delta_voltage_7_0_len 8
+#define reg_aagc_rf_delta_voltage_7_0_lsb 0
+#define xd_p_reg_aagc_rf_delta_voltage_15_8 (*(volatile byte xdata *) 0xF033)
+#define    p_reg_aagc_rf_delta_voltage_15_8 0xF033
+#define reg_aagc_rf_delta_voltage_15_8_pos 0
+#define reg_aagc_rf_delta_voltage_15_8_len 8
+#define reg_aagc_rf_delta_voltage_15_8_lsb 8
+#define xd_p_reg_aagc_rf_delta_voltage_23_16    (*(volatile byte xdata *) 0xF034)
+#define    p_reg_aagc_rf_delta_voltage_23_16    0xF034
+#define reg_aagc_rf_delta_voltage_23_16_pos 0
+#define reg_aagc_rf_delta_voltage_23_16_len 8
+#define reg_aagc_rf_delta_voltage_23_16_lsb 16
+#define xd_p_reg_aagc_rf_delta_voltage_29_24    (*(volatile byte xdata *) 0xF035)
+#define    p_reg_aagc_rf_delta_voltage_29_24    0xF035
+#define reg_aagc_rf_delta_voltage_29_24_pos 0
+#define reg_aagc_rf_delta_voltage_29_24_len 6
+#define reg_aagc_rf_delta_voltage_29_24_lsb 24
+#define xd_p_reg_aagc_if_delta_voltage_7_0  (*(volatile byte xdata *) 0xF036)
+#define    p_reg_aagc_if_delta_voltage_7_0  0xF036
+#define reg_aagc_if_delta_voltage_7_0_pos 0
+#define reg_aagc_if_delta_voltage_7_0_len 8
+#define reg_aagc_if_delta_voltage_7_0_lsb 0
+#define xd_p_reg_aagc_if_delta_voltage_15_8 (*(volatile byte xdata *) 0xF037)
+#define    p_reg_aagc_if_delta_voltage_15_8 0xF037
+#define reg_aagc_if_delta_voltage_15_8_pos 0
+#define reg_aagc_if_delta_voltage_15_8_len 8
+#define reg_aagc_if_delta_voltage_15_8_lsb 8
+#define xd_p_reg_aagc_if_delta_voltage_23_16    (*(volatile byte xdata *) 0xF038)
+#define    p_reg_aagc_if_delta_voltage_23_16    0xF038
+#define reg_aagc_if_delta_voltage_23_16_pos 0
+#define reg_aagc_if_delta_voltage_23_16_len 8
+#define reg_aagc_if_delta_voltage_23_16_lsb 16
+#define xd_p_reg_aagc_if_delta_voltage_29_24    (*(volatile byte xdata *) 0xF039)
+#define    p_reg_aagc_if_delta_voltage_29_24    0xF039
+#define reg_aagc_if_delta_voltage_29_24_pos 0
+#define reg_aagc_if_delta_voltage_29_24_len 6
+#define reg_aagc_if_delta_voltage_29_24_lsb 24
+#define xd_p_reg_aagc_delta_voltage_hold_time   (*(volatile byte xdata *) 0xF03A)
+#define    p_reg_aagc_delta_voltage_hold_time   0xF03A
+#define reg_aagc_delta_voltage_hold_time_pos 0
+#define reg_aagc_delta_voltage_hold_time_len 8
+#define reg_aagc_delta_voltage_hold_time_lsb 0
+#define xd_p_reg_aagc_top_th_dis    (*(volatile byte xdata *) 0xF041)
+#define    p_reg_aagc_top_th_dis    0xF041
+#define reg_aagc_top_th_dis_pos 0
+#define reg_aagc_top_th_dis_len 1
+#define reg_aagc_top_th_dis_lsb 0
+#define xd_p_reg_p_aagc_rf_floor_dca    (*(volatile byte xdata *) 0xF042)
+#define    p_reg_p_aagc_rf_floor_dca    0xF042
+#define reg_p_aagc_rf_floor_dca_pos 0
+#define reg_p_aagc_rf_floor_dca_len 8
+#define reg_p_aagc_rf_floor_dca_lsb 0
+#define xd_p_reg_p_aagc_if_floor_dca    (*(volatile byte xdata *) 0xF043)
+#define    p_reg_p_aagc_if_floor_dca    0xF043
+#define reg_p_aagc_if_floor_dca_pos 0
+#define reg_p_aagc_if_floor_dca_len 8
+#define reg_p_aagc_if_floor_dca_lsb 0
+#define xd_p_reg_p_aagc_rf_gain_scale_dca   (*(volatile byte xdata *) 0xF044)
+#define    p_reg_p_aagc_rf_gain_scale_dca   0xF044
+#define reg_p_aagc_rf_gain_scale_dca_pos 0
+#define reg_p_aagc_rf_gain_scale_dca_len 3
+#define reg_p_aagc_rf_gain_scale_dca_lsb 0
+#define xd_p_reg_p_aagc_if_gain_scale_dca   (*(volatile byte xdata *) 0xF045)
+#define    p_reg_p_aagc_if_gain_scale_dca   0xF045
+#define reg_p_aagc_if_gain_scale_dca_pos 0
+#define reg_p_aagc_if_gain_scale_dca_len 3
+#define reg_p_aagc_if_gain_scale_dca_lsb 0
+#define xd_r_reg_r_aagc_ufl_gain    (*(volatile byte xdata *) 0xF046)
+#define    r_reg_r_aagc_ufl_gain    0xF046
+#define reg_r_aagc_ufl_gain_pos 0
+#define reg_r_aagc_ufl_gain_len 8
+#define reg_r_aagc_ufl_gain_lsb 0
+#define xd_p_reg_aagc_out_rf_inv    (*(volatile byte xdata *) 0xF047)
+#define    p_reg_aagc_out_rf_inv    0xF047
+#define reg_aagc_out_rf_inv_pos 0
+#define reg_aagc_out_rf_inv_len 1
+#define reg_aagc_out_rf_inv_lsb 0
+#define xd_p_reg_p_aagc_save_agc_control    (*(volatile byte xdata *) 0xF048)
+#define    p_reg_p_aagc_save_agc_control    0xF048
+#define reg_p_aagc_save_agc_control_pos 0
+#define reg_p_aagc_save_agc_control_len 1
+#define reg_p_aagc_save_agc_control_lsb 0
+#define xd_p_reg_aagc_fw_sel    (*(volatile byte xdata *) 0xF049)
+#define    p_reg_aagc_fw_sel    0xF049
+#define reg_aagc_fw_sel_pos 0
+#define reg_aagc_fw_sel_len 1
+#define reg_aagc_fw_sel_lsb 0
+#define xd_r_reg_r_aagc_rf_control_7_0  (*(volatile byte xdata *) 0xF04A)
+#define    r_reg_r_aagc_rf_control_7_0  0xF04A
+#define reg_r_aagc_rf_control_7_0_pos 0
+#define reg_r_aagc_rf_control_7_0_len 8
+#define reg_r_aagc_rf_control_7_0_lsb 0
+#define xd_r_reg_r_aagc_rf_control_9_8  (*(volatile byte xdata *) 0xF04B)
+#define    r_reg_r_aagc_rf_control_9_8  0xF04B
+#define reg_r_aagc_rf_control_9_8_pos 0
+#define reg_r_aagc_rf_control_9_8_len 2
+#define reg_r_aagc_rf_control_9_8_lsb 8
+#define xd_r_reg_r_aagc_if_control_7_0  (*(volatile byte xdata *) 0xF04C)
+#define    r_reg_r_aagc_if_control_7_0  0xF04C
+#define reg_r_aagc_if_control_7_0_pos 0
+#define reg_r_aagc_if_control_7_0_len 8
+#define reg_r_aagc_if_control_7_0_lsb 0
+#define xd_r_reg_r_aagc_if_control_9_8  (*(volatile byte xdata *) 0xF04D)
+#define    r_reg_r_aagc_if_control_9_8  0xF04D
+#define reg_r_aagc_if_control_9_8_pos 0
+#define reg_r_aagc_if_control_9_8_len 2
+#define reg_r_aagc_if_control_9_8_lsb 8
+#define xd_p_reg_aagc_adc_out_desired_from_fw_7_0   (*(volatile byte xdata *) 0xF04E)
+#define    p_reg_aagc_adc_out_desired_from_fw_7_0   0xF04E
+#define reg_aagc_adc_out_desired_from_fw_7_0_pos 0
+#define reg_aagc_adc_out_desired_from_fw_7_0_len 8
+#define reg_aagc_adc_out_desired_from_fw_7_0_lsb 0
+#define xd_p_reg_aagc_adc_out_desired_from_fw_8 (*(volatile byte xdata *) 0xF04F)
+#define    p_reg_aagc_adc_out_desired_from_fw_8 0xF04F
+#define reg_aagc_adc_out_desired_from_fw_8_pos 0
+#define reg_aagc_adc_out_desired_from_fw_8_len 1
+#define reg_aagc_adc_out_desired_from_fw_8_lsb 8
+#define xd_p_reg_aagc_init_rf_agc_7_0   (*(volatile byte xdata *) 0xF050)
+#define    p_reg_aagc_init_rf_agc_7_0   0xF050
+#define reg_aagc_init_rf_agc_7_0_pos 0
+#define reg_aagc_init_rf_agc_7_0_len 8
+#define reg_aagc_init_rf_agc_7_0_lsb 0
+#define xd_p_reg_aagc_init_rf_agc_9_8   (*(volatile byte xdata *) 0xF051)
+#define    p_reg_aagc_init_rf_agc_9_8   0xF051
+#define reg_aagc_init_rf_agc_9_8_pos 0
+#define reg_aagc_init_rf_agc_9_8_len 2
+#define reg_aagc_init_rf_agc_9_8_lsb 8
+#define xd_p_reg_aagc_init_if_agc_7_0   (*(volatile byte xdata *) 0xF052)
+#define    p_reg_aagc_init_if_agc_7_0   0xF052
+#define reg_aagc_init_if_agc_7_0_pos 0
+#define reg_aagc_init_if_agc_7_0_len 8
+#define reg_aagc_init_if_agc_7_0_lsb 0
+#define xd_p_reg_aagc_init_if_agc_9_8   (*(volatile byte xdata *) 0xF053)
+#define    p_reg_aagc_init_if_agc_9_8   0xF053
+#define reg_aagc_init_if_agc_9_8_pos 0
+#define reg_aagc_init_if_agc_9_8_len 2
+#define reg_aagc_init_if_agc_9_8_lsb 8
+#define xd_p_reg_p_pwm_if_high_unit_num (*(volatile byte xdata *) 0xF054)
+#define    p_reg_p_pwm_if_high_unit_num 0xF054
+#define reg_p_pwm_if_high_unit_num_pos 0
+#define reg_p_pwm_if_high_unit_num_len 8
+#define reg_p_pwm_if_high_unit_num_lsb 0
+#define xd_p_reg_p_pwm_rf_high_unit_num (*(volatile byte xdata *) 0xF055)
+#define    p_reg_p_pwm_rf_high_unit_num 0xF055
+#define reg_p_pwm_rf_high_unit_num_pos 0
+#define reg_p_pwm_rf_high_unit_num_len 8
+#define reg_p_pwm_rf_high_unit_num_lsb 0
+#define xd_p_reg_p_pwm_rf_gpio  (*(volatile byte xdata *) 0xF058)
+#define    p_reg_p_pwm_rf_gpio  0xF058
+#define reg_p_pwm_rf_gpio_pos 0
+#define reg_p_pwm_rf_gpio_len 1
+#define reg_p_pwm_rf_gpio_lsb 0
+#define xd_p_reg_p_pwm_if_gpio  (*(volatile byte xdata *) 0xF058)
+#define    p_reg_p_pwm_if_gpio  0xF058
+#define reg_p_pwm_if_gpio_pos 1
+#define reg_p_pwm_if_gpio_len 1
+#define reg_p_pwm_if_gpio_lsb 0
+#define xd_p_reg_aagc_in_sat_cnt_7_0    (*(volatile byte xdata *) 0xF05A)
+#define    p_reg_aagc_in_sat_cnt_7_0    0xF05A
+#define reg_aagc_in_sat_cnt_7_0_pos 0
+#define reg_aagc_in_sat_cnt_7_0_len 8
+#define reg_aagc_in_sat_cnt_7_0_lsb 0
+#define xd_p_reg_aagc_in_sat_cnt_15_8   (*(volatile byte xdata *) 0xF05B)
+#define    p_reg_aagc_in_sat_cnt_15_8   0xF05B
+#define reg_aagc_in_sat_cnt_15_8_pos 0
+#define reg_aagc_in_sat_cnt_15_8_len 8
+#define reg_aagc_in_sat_cnt_15_8_lsb 8
+#define xd_p_reg_aagc_in_sat_cnt_23_16  (*(volatile byte xdata *) 0xF05C)
+#define    p_reg_aagc_in_sat_cnt_23_16  0xF05C
+#define reg_aagc_in_sat_cnt_23_16_pos 0
+#define reg_aagc_in_sat_cnt_23_16_len 8
+#define reg_aagc_in_sat_cnt_23_16_lsb 16
+#define xd_p_reg_aagc_in_sat_cnt_31_24  (*(volatile byte xdata *) 0xF05D)
+#define    p_reg_aagc_in_sat_cnt_31_24  0xF05D
+#define reg_aagc_in_sat_cnt_31_24_pos 0
+#define reg_aagc_in_sat_cnt_31_24_len 8
+#define reg_aagc_in_sat_cnt_31_24_lsb 24
+#define xd_p_reg_p_pwm_cycle_unit   (*(volatile byte xdata *) 0xF05E)
+#define    p_reg_p_pwm_cycle_unit   0xF05E
+#define reg_p_pwm_cycle_unit_pos 0
+#define reg_p_pwm_cycle_unit_len 4
+#define reg_p_pwm_cycle_unit_lsb 0
+#define xd_p_reg_p_pwm_en   (*(volatile byte xdata *) 0xF05F)
+#define    p_reg_p_pwm_en   0xF05F
+#define reg_p_pwm_en_pos 0
+#define reg_p_pwm_en_len 1
+#define reg_p_pwm_en_lsb 0
+#define xd_r_reg_aagc_rf_gain   (*(volatile byte xdata *) 0xF060)
+#define    r_reg_aagc_rf_gain   0xF060
+#define reg_aagc_rf_gain_pos 0
+#define reg_aagc_rf_gain_len 8
+#define reg_aagc_rf_gain_lsb 0
+#define xd_r_reg_aagc_if_gain   (*(volatile byte xdata *) 0xF061)
+#define    r_reg_aagc_if_gain   0xF061
+#define reg_aagc_if_gain_pos 0
+#define reg_aagc_if_gain_len 8
+#define reg_aagc_if_gain_lsb 0
+#define xd_r_reg_aagc_current_desired_level_7_0 (*(volatile byte xdata *) 0xF062)
+#define    r_reg_aagc_current_desired_level_7_0 0xF062
+#define reg_aagc_current_desired_level_7_0_pos 0
+#define reg_aagc_current_desired_level_7_0_len 8
+#define reg_aagc_current_desired_level_7_0_lsb 0
+#define xd_r_reg_aagc_current_desired_level_8   (*(volatile byte xdata *) 0xF063)
+#define    r_reg_aagc_current_desired_level_8   0xF063
+#define reg_aagc_current_desired_level_8_pos 0
+#define reg_aagc_current_desired_level_8_len 1
+#define reg_aagc_current_desired_level_8_lsb 8
+#define xd_p_reg_tinr_fifo_size (*(volatile byte xdata *) 0xF064)
+#define    p_reg_tinr_fifo_size 0xF064
+#define reg_tinr_fifo_size_pos 0
+#define reg_tinr_fifo_size_len 5
+#define reg_tinr_fifo_size_lsb 0
+#define xd_p_reg_tinr_saturation_th_7_0 (*(volatile byte xdata *) 0xF065)
+#define    p_reg_tinr_saturation_th_7_0 0xF065
+#define reg_tinr_saturation_th_7_0_pos 0
+#define reg_tinr_saturation_th_7_0_len 8
+#define reg_tinr_saturation_th_7_0_lsb 0
+#define xd_p_reg_tinr_saturation_th_9_8 (*(volatile byte xdata *) 0xF066)
+#define    p_reg_tinr_saturation_th_9_8 0xF066
+#define reg_tinr_saturation_th_9_8_pos 0
+#define reg_tinr_saturation_th_9_8_len 2
+#define reg_tinr_saturation_th_9_8_lsb 8
+#define xd_p_reg_tinr_saturation_cnt_th (*(volatile byte xdata *) 0xF067)
+#define    p_reg_tinr_saturation_cnt_th 0xF067
+#define reg_tinr_saturation_cnt_th_pos 0
+#define reg_tinr_saturation_cnt_th_len 4
+#define reg_tinr_saturation_cnt_th_lsb 0
+#define xd_r_reg_tinr_counter_7_0   (*(volatile byte xdata *) 0xF068)
+#define    r_reg_tinr_counter_7_0   0xF068
+#define reg_tinr_counter_7_0_pos 0
+#define reg_tinr_counter_7_0_len 8
+#define reg_tinr_counter_7_0_lsb 0
+#define xd_r_reg_tinr_counter_15_8  (*(volatile byte xdata *) 0xF069)
+#define    r_reg_tinr_counter_15_8  0xF069
+#define reg_tinr_counter_15_8_pos 0
+#define reg_tinr_counter_15_8_len 8
+#define reg_tinr_counter_15_8_lsb 8
+#define xd_p_reg_tinr_counter_rst   (*(volatile byte xdata *) 0xF06C)
+#define    p_reg_tinr_counter_rst   0xF06C
+#define reg_tinr_counter_rst_pos 0
+#define reg_tinr_counter_rst_len 1
+#define reg_tinr_counter_rst_lsb 0
+#define xd_p_reg_tinr_ins_th_7_0    (*(volatile byte xdata *) 0xF06F)
+#define    p_reg_tinr_ins_th_7_0    0xF06F
+#define reg_tinr_ins_th_7_0_pos 0
+#define reg_tinr_ins_th_7_0_len 8
+#define reg_tinr_ins_th_7_0_lsb 0
+#define xd_p_reg_tinr_ins_th_9_8    (*(volatile byte xdata *) 0xF070)
+#define    p_reg_tinr_ins_th_9_8    0xF070
+#define reg_tinr_ins_th_9_8_pos 0
+#define reg_tinr_ins_th_9_8_len 2
+#define reg_tinr_ins_th_9_8_lsb 8
+#define xd_p_reg_tinr_ins_en    (*(volatile byte xdata *) 0xF071)
+#define    p_reg_tinr_ins_en    0xF071
+#define reg_tinr_ins_en_pos 0
+#define reg_tinr_ins_en_len 1
+#define reg_tinr_ins_en_lsb 0
+#define xd_p_reg_tinr_ins_size  (*(volatile byte xdata *) 0xF072)
+#define    p_reg_tinr_ins_size  0xF072
+#define reg_tinr_ins_size_pos 0
+#define reg_tinr_ins_size_len 4
+#define reg_tinr_ins_size_lsb 0
+#define xd_p_reg_tinr_ins_hnum  (*(volatile byte xdata *) 0xF073)
+#define    p_reg_tinr_ins_hnum  0xF073
+#define reg_tinr_ins_hnum_pos 0
+#define reg_tinr_ins_hnum_len 4
+#define reg_tinr_ins_hnum_lsb 0
+#define xd_r_reg_tinr_ins_hcnt_7_0  (*(volatile byte xdata *) 0xF074)
+#define    r_reg_tinr_ins_hcnt_7_0  0xF074
+#define reg_tinr_ins_hcnt_7_0_pos 0
+#define reg_tinr_ins_hcnt_7_0_len 8
+#define reg_tinr_ins_hcnt_7_0_lsb 0
+#define xd_r_reg_tinr_ins_hcnt_15_8 (*(volatile byte xdata *) 0xF075)
+#define    r_reg_tinr_ins_hcnt_15_8 0xF075
+#define reg_tinr_ins_hcnt_15_8_pos 0
+#define reg_tinr_ins_hcnt_15_8_len 8
+#define reg_tinr_ins_hcnt_15_8_lsb 8
+#define xd_p_reg_tinr_in_conj   (*(volatile byte xdata *) 0xF076)
+#define    p_reg_tinr_in_conj   0xF076
+#define reg_tinr_in_conj_pos 0
+#define reg_tinr_in_conj_len 1
+#define reg_tinr_in_conj_lsb 0
+#define xd_p_reg_tinr_in_zero_if    (*(volatile byte xdata *) 0xF077)
+#define    p_reg_tinr_in_zero_if    0xF077
+#define reg_tinr_in_zero_if_pos 0
+#define reg_tinr_in_zero_if_len 2
+#define reg_tinr_in_zero_if_lsb 0
+#define xd_p_reg_tinr_in_shift  (*(volatile byte xdata *) 0xF078)
+#define    p_reg_tinr_in_shift  0xF078
+#define reg_tinr_in_shift_pos 0
+#define reg_tinr_in_shift_len 1
+#define reg_tinr_in_shift_lsb 0
+#define xd_p_reg_tinr_in_conj_sat_counter_rst   (*(volatile byte xdata *) 0xF079)
+#define    p_reg_tinr_in_conj_sat_counter_rst   0xF079
+#define reg_tinr_in_conj_sat_counter_rst_pos 0
+#define reg_tinr_in_conj_sat_counter_rst_len 1
+#define reg_tinr_in_conj_sat_counter_rst_lsb 0
+#define xd_r_reg_tinr_in_conj_sat_counter_7_0   (*(volatile byte xdata *) 0xF07A)
+#define    r_reg_tinr_in_conj_sat_counter_7_0   0xF07A
+#define reg_tinr_in_conj_sat_counter_7_0_pos 0
+#define reg_tinr_in_conj_sat_counter_7_0_len 8
+#define reg_tinr_in_conj_sat_counter_7_0_lsb 0
+#define xd_r_reg_tinr_in_conj_sat_counter_14_8  (*(volatile byte xdata *) 0xF07B)
+#define    r_reg_tinr_in_conj_sat_counter_14_8  0xF07B
+#define reg_tinr_in_conj_sat_counter_14_8_pos 0
+#define reg_tinr_in_conj_sat_counter_14_8_len 7
+#define reg_tinr_in_conj_sat_counter_14_8_lsb 8
+#define xd_p_reg_p_antif_en (*(volatile byte xdata *) 0xF07C)
+#define    p_reg_p_antif_en 0xF07C
+#define reg_p_antif_en_pos 0
+#define reg_p_antif_en_len 1
+#define reg_p_antif_en_lsb 0
+#define xd_p_reg_p_antif_rst    (*(volatile byte xdata *) 0xF07D)
+#define    p_reg_p_antif_rst    0xF07D
+#define reg_p_antif_rst_pos 0
+#define reg_p_antif_rst_len 1
+#define reg_p_antif_rst_lsb 0
+#define xd_p_reg_p_antif_byp    (*(volatile byte xdata *) 0xF07E)
+#define    p_reg_p_antif_byp    0xF07E
+#define reg_p_antif_byp_pos 0
+#define reg_p_antif_byp_len 1
+#define reg_p_antif_byp_lsb 0
+#define xd_p_reg_p_antif_mode   (*(volatile byte xdata *) 0xF07F)
+#define    p_reg_p_antif_mode   0xF07F
+#define reg_p_antif_mode_pos 0
+#define reg_p_antif_mode_len 1
+#define reg_p_antif_mode_lsb 0
+#define xd_p_reg_p_ds_byp   (*(volatile byte xdata *) 0xF080)
+#define    p_reg_p_ds_byp   0xF080
+#define reg_p_ds_byp_pos 0
+#define reg_p_ds_byp_len 1
+#define reg_p_ds_byp_lsb 0
+#define xd_p_reg_p_antif_dagc5_mode (*(volatile byte xdata *) 0xF081)
+#define    p_reg_p_antif_dagc5_mode 0xF081
+#define reg_p_antif_dagc5_mode_pos 0
+#define reg_p_antif_dagc5_mode_len 2
+#define reg_p_antif_dagc5_mode_lsb 0
+#define xd_p_reg_p_antif_dagc5_desired_level_7_0    (*(volatile byte xdata *) 0xF082)
+#define    p_reg_p_antif_dagc5_desired_level_7_0    0xF082
+#define reg_p_antif_dagc5_desired_level_7_0_pos 0
+#define reg_p_antif_dagc5_desired_level_7_0_len 8
+#define reg_p_antif_dagc5_desired_level_7_0_lsb 0
+#define xd_p_reg_p_antif_dagc5_desired_level_8  (*(volatile byte xdata *) 0xF083)
+#define    p_reg_p_antif_dagc5_desired_level_8  0xF083
+#define reg_p_antif_dagc5_desired_level_8_pos 0
+#define reg_p_antif_dagc5_desired_level_8_len 1
+#define reg_p_antif_dagc5_desired_level_8_lsb 8
+#define xd_p_reg_p_antif_dagc5_apply_delay  (*(volatile byte xdata *) 0xF084)
+#define    p_reg_p_antif_dagc5_apply_delay  0xF084
+#define reg_p_antif_dagc5_apply_delay_pos 0
+#define reg_p_antif_dagc5_apply_delay_len 7
+#define reg_p_antif_dagc5_apply_delay_lsb 0
+#define xd_p_reg_p_antif_dagc5_fixed_gain_7_0   (*(volatile byte xdata *) 0xF085)
+#define    p_reg_p_antif_dagc5_fixed_gain_7_0   0xF085
+#define reg_p_antif_dagc5_fixed_gain_7_0_pos 0
+#define reg_p_antif_dagc5_fixed_gain_7_0_len 8
+#define reg_p_antif_dagc5_fixed_gain_7_0_lsb 0
+#define xd_p_reg_p_antif_dagc5_fixed_gain_11_8  (*(volatile byte xdata *) 0xF086)
+#define    p_reg_p_antif_dagc5_fixed_gain_11_8  0xF086
+#define reg_p_antif_dagc5_fixed_gain_11_8_pos 0
+#define reg_p_antif_dagc5_fixed_gain_11_8_len 4
+#define reg_p_antif_dagc5_fixed_gain_11_8_lsb 8
+#define xd_p_reg_p_antif_dagc5_use_despow   (*(volatile byte xdata *) 0xF087)
+#define    p_reg_p_antif_dagc5_use_despow   0xF087
+#define reg_p_antif_dagc5_use_despow_pos 0
+#define reg_p_antif_dagc5_use_despow_len 1
+#define reg_p_antif_dagc5_use_despow_lsb 0
+#define xd_p_reg_p_antif_dagc5_log_2_accumulate_num (*(volatile byte xdata *) 0xF088)
+#define    p_reg_p_antif_dagc5_log_2_accumulate_num 0xF088
+#define reg_p_antif_dagc5_log_2_accumulate_num_pos 0
+#define reg_p_antif_dagc5_log_2_accumulate_num_len 5
+#define reg_p_antif_dagc5_log_2_accumulate_num_lsb 0
+#define xd_p_reg_p_antif_dagc5_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF089)
+#define    p_reg_p_antif_dagc5_in_sat_cnt_7_0   0xF089
+#define reg_p_antif_dagc5_in_sat_cnt_7_0_pos 0
+#define reg_p_antif_dagc5_in_sat_cnt_7_0_len 8
+#define reg_p_antif_dagc5_in_sat_cnt_7_0_lsb 0
+#define xd_p_reg_p_antif_dagc5_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF08A)
+#define    p_reg_p_antif_dagc5_in_sat_cnt_15_8  0xF08A
+#define reg_p_antif_dagc5_in_sat_cnt_15_8_pos 0
+#define reg_p_antif_dagc5_in_sat_cnt_15_8_len 8
+#define reg_p_antif_dagc5_in_sat_cnt_15_8_lsb 8
+#define xd_p_reg_p_antif_dagc5_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF08B)
+#define    p_reg_p_antif_dagc5_in_sat_cnt_23_16 0xF08B
+#define reg_p_antif_dagc5_in_sat_cnt_23_16_pos 0
+#define reg_p_antif_dagc5_in_sat_cnt_23_16_len 8
+#define reg_p_antif_dagc5_in_sat_cnt_23_16_lsb 16
+#define xd_p_reg_p_antif_dagc5_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF08C)
+#define    p_reg_p_antif_dagc5_in_sat_cnt_31_24 0xF08C
+#define reg_p_antif_dagc5_in_sat_cnt_31_24_pos 0
+#define reg_p_antif_dagc5_in_sat_cnt_31_24_len 8
+#define reg_p_antif_dagc5_in_sat_cnt_31_24_lsb 24
+#define xd_p_reg_p_antif_dagc5_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF08D)
+#define    p_reg_p_antif_dagc5_out_sat_cnt_7_0  0xF08D
+#define reg_p_antif_dagc5_out_sat_cnt_7_0_pos 0
+#define reg_p_antif_dagc5_out_sat_cnt_7_0_len 8
+#define reg_p_antif_dagc5_out_sat_cnt_7_0_lsb 0
+#define xd_p_reg_p_antif_dagc5_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF08E)
+#define    p_reg_p_antif_dagc5_out_sat_cnt_15_8 0xF08E
+#define reg_p_antif_dagc5_out_sat_cnt_15_8_pos 0
+#define reg_p_antif_dagc5_out_sat_cnt_15_8_len 8
+#define reg_p_antif_dagc5_out_sat_cnt_15_8_lsb 8
+#define xd_p_reg_p_antif_dagc5_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF08F)
+#define    p_reg_p_antif_dagc5_out_sat_cnt_23_16    0xF08F
+#define reg_p_antif_dagc5_out_sat_cnt_23_16_pos 0
+#define reg_p_antif_dagc5_out_sat_cnt_23_16_len 8
+#define reg_p_antif_dagc5_out_sat_cnt_23_16_lsb 16
+#define xd_p_reg_p_antif_dagc5_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF090)
+#define    p_reg_p_antif_dagc5_out_sat_cnt_31_24    0xF090
+#define reg_p_antif_dagc5_out_sat_cnt_31_24_pos 0
+#define reg_p_antif_dagc5_out_sat_cnt_31_24_len 8
+#define reg_p_antif_dagc5_out_sat_cnt_31_24_lsb 24
+#define xd_p_reg_p_antif_dagc5_rst  (*(volatile byte xdata *) 0xF091)
+#define    p_reg_p_antif_dagc5_rst  0xF091
+#define reg_p_antif_dagc5_rst_pos 0
+#define reg_p_antif_dagc5_rst_len 1
+#define reg_p_antif_dagc5_rst_lsb 0
+#define xd_p_reg_p_antif_dagc5_en   (*(volatile byte xdata *) 0xF092)
+#define    p_reg_p_antif_dagc5_en   0xF092
+#define reg_p_antif_dagc5_en_pos 0
+#define reg_p_antif_dagc5_en_len 1
+#define reg_p_antif_dagc5_en_lsb 0
+#define xd_p_reg_p_antif_sc_mode    (*(volatile byte xdata *) 0xF093)
+#define    p_reg_p_antif_sc_mode    0xF093
+#define reg_p_antif_sc_mode_pos 0
+#define reg_p_antif_sc_mode_len 4
+#define reg_p_antif_sc_mode_lsb 0
+#define xd_p_reg_p_antif_dagc5_done (*(volatile byte xdata *) 0xF094)
+#define    p_reg_p_antif_dagc5_done 0xF094
+#define reg_p_antif_dagc5_done_pos 0
+#define reg_p_antif_dagc5_done_len 1
+#define reg_p_antif_dagc5_done_lsb 0
+#define xd_r_reg_r_antif_sc_7_0 (*(volatile byte xdata *) 0xF095)
+#define    r_reg_r_antif_sc_7_0 0xF095
+#define reg_r_antif_sc_7_0_pos 0
+#define reg_r_antif_sc_7_0_len 8
+#define reg_r_antif_sc_7_0_lsb 0
+#define xd_r_reg_r_antif_sc_15_8    (*(volatile byte xdata *) 0xF096)
+#define    r_reg_r_antif_sc_15_8    0xF096
+#define reg_r_antif_sc_15_8_pos 0
+#define reg_r_antif_sc_15_8_len 8
+#define reg_r_antif_sc_15_8_lsb 8
+#define xd_r_reg_r_antif_dagc5_multiplier_7_0   (*(volatile byte xdata *) 0xF097)
+#define    r_reg_r_antif_dagc5_multiplier_7_0   0xF097
+#define reg_r_antif_dagc5_multiplier_7_0_pos 0
+#define reg_r_antif_dagc5_multiplier_7_0_len 8
+#define reg_r_antif_dagc5_multiplier_7_0_lsb 0
+#define xd_r_reg_r_antif_dagc5_multiplier_15_8  (*(volatile byte xdata *) 0xF098)
+#define    r_reg_r_antif_dagc5_multiplier_15_8  0xF098
+#define reg_r_antif_dagc5_multiplier_15_8_pos 0
+#define reg_r_antif_dagc5_multiplier_15_8_len 8
+#define reg_r_antif_dagc5_multiplier_15_8_lsb 8
+#define xd_r_reg_r_antif_dagc5_right_shift_bits (*(volatile byte xdata *) 0xF099)
+#define    r_reg_r_antif_dagc5_right_shift_bits 0xF099
+#define reg_r_antif_dagc5_right_shift_bits_pos 0
+#define reg_r_antif_dagc5_right_shift_bits_len 4
+#define reg_r_antif_dagc5_right_shift_bits_lsb 0
+#define xd_p_reg_p_antif_dagc5_bypass_scale_ctl (*(volatile byte xdata *) 0xF09A)
+#define    p_reg_p_antif_dagc5_bypass_scale_ctl 0xF09A
+#define reg_p_antif_dagc5_bypass_scale_ctl_pos 0
+#define reg_p_antif_dagc5_bypass_scale_ctl_len 3
+#define reg_p_antif_dagc5_bypass_scale_ctl_lsb 0
+#define xd_p_reg_mccid_ccirunno_7_0 (*(volatile byte xdata *) 0xF09B)
+#define    p_reg_mccid_ccirunno_7_0 0xF09B
+#define reg_mccid_ccirunno_7_0_pos 0
+#define reg_mccid_ccirunno_7_0_len 8
+#define reg_mccid_ccirunno_7_0_lsb 0
+#define xd_p_reg_mccid_ccirunno_8   (*(volatile byte xdata *) 0xF09C)
+#define    p_reg_mccid_ccirunno_8   0xF09C
+#define reg_mccid_ccirunno_8_pos 0
+#define reg_mccid_ccirunno_8_len 1
+#define reg_mccid_ccirunno_8_lsb 8
+#define xd_p_reg_mccid_acirunno_7_0 (*(volatile byte xdata *) 0xF09D)
+#define    p_reg_mccid_acirunno_7_0 0xF09D
+#define reg_mccid_acirunno_7_0_pos 0
+#define reg_mccid_acirunno_7_0_len 8
+#define reg_mccid_acirunno_7_0_lsb 0
+#define xd_p_reg_mccid_acirunno_8   (*(volatile byte xdata *) 0xF09E)
+#define    p_reg_mccid_acirunno_8   0xF09E
+#define reg_mccid_acirunno_8_pos 0
+#define reg_mccid_acirunno_8_len 1
+#define reg_mccid_acirunno_8_lsb 8
+#define xd_p_reg_mccid_maxtonenearrange_7_0 (*(volatile byte xdata *) 0xF09F)
+#define    p_reg_mccid_maxtonenearrange_7_0 0xF09F
+#define reg_mccid_maxtonenearrange_7_0_pos 0
+#define reg_mccid_maxtonenearrange_7_0_len 8
+#define reg_mccid_maxtonenearrange_7_0_lsb 0
+#define xd_p_reg_mccid_maxtonenearrange_8   (*(volatile byte xdata *) 0xF0A0)
+#define    p_reg_mccid_maxtonenearrange_8   0xF0A0
+#define reg_mccid_maxtonenearrange_8_pos 0
+#define reg_mccid_maxtonenearrange_8_len 1
+#define reg_mccid_maxtonenearrange_8_lsb 8
+#define xd_r_reg_mccid_maxacipower_7_0  (*(volatile byte xdata *) 0xF0A1)
+#define    r_reg_mccid_maxacipower_7_0  0xF0A1
+#define reg_mccid_maxacipower_7_0_pos 0
+#define reg_mccid_maxacipower_7_0_len 8
+#define reg_mccid_maxacipower_7_0_lsb 0
+#define xd_r_reg_mccid_maxacipower_15_8 (*(volatile byte xdata *) 0xF0A2)
+#define    r_reg_mccid_maxacipower_15_8 0xF0A2
+#define reg_mccid_maxacipower_15_8_pos 0
+#define reg_mccid_maxacipower_15_8_len 8
+#define reg_mccid_maxacipower_15_8_lsb 8
+#define xd_r_reg_mccid_maxacipower_19_16    (*(volatile byte xdata *) 0xF0A3)
+#define    r_reg_mccid_maxacipower_19_16    0xF0A3
+#define reg_mccid_maxacipower_19_16_pos 0
+#define reg_mccid_maxacipower_19_16_len 4
+#define reg_mccid_maxacipower_19_16_lsb 16
+#define xd_p_reg_p_dcoe_en  (*(volatile byte xdata *) 0xF0D5)
+#define    p_reg_p_dcoe_en  0xF0D5
+#define reg_p_dcoe_en_pos 0
+#define reg_p_dcoe_en_len 1
+#define reg_p_dcoe_en_lsb 0
+#define xd_p_reg_p_dcoe_rst (*(volatile byte xdata *) 0xF0D6)
+#define    p_reg_p_dcoe_rst 0xF0D6
+#define reg_p_dcoe_rst_pos 0
+#define reg_p_dcoe_rst_len 1
+#define reg_p_dcoe_rst_lsb 0
+#define xd_p_reg_p_dcoe_clear   (*(volatile byte xdata *) 0xF0D7)
+#define    p_reg_p_dcoe_clear   0xF0D7
+#define reg_p_dcoe_clear_pos 0
+#define reg_p_dcoe_clear_len 1
+#define reg_p_dcoe_clear_lsb 0
+#define xd_p_reg_p_dcoe_applyloc_7_0    (*(volatile byte xdata *) 0xF0D8)
+#define    p_reg_p_dcoe_applyloc_7_0    0xF0D8
+#define reg_p_dcoe_applyloc_7_0_pos 0
+#define reg_p_dcoe_applyloc_7_0_len 8
+#define reg_p_dcoe_applyloc_7_0_lsb 0
+#define xd_p_reg_p_dcoe_applyloc_12_8   (*(volatile byte xdata *) 0xF0D9)
+#define    p_reg_p_dcoe_applyloc_12_8   0xF0D9
+#define reg_p_dcoe_applyloc_12_8_pos 0
+#define reg_p_dcoe_applyloc_12_8_len 5
+#define reg_p_dcoe_applyloc_12_8_lsb 8
+#define xd_p_reg_p_dcoe_accnums (*(volatile byte xdata *) 0xF0DA)
+#define    p_reg_p_dcoe_accnums 0xF0DA
+#define reg_p_dcoe_accnums_pos 0
+#define reg_p_dcoe_accnums_len 3
+#define reg_p_dcoe_accnums_lsb 0
+#define xd_p_reg_p_dcoe_accweightsum_sh (*(volatile byte xdata *) 0xF0DB)
+#define    p_reg_p_dcoe_accweightsum_sh 0xF0DB
+#define reg_p_dcoe_accweightsum_sh_pos 0
+#define reg_p_dcoe_accweightsum_sh_len 3
+#define reg_p_dcoe_accweightsum_sh_lsb 0
+#define xd_p_reg_p_dcoe_accweightcurr   (*(volatile byte xdata *) 0xF0DC)
+#define    p_reg_p_dcoe_accweightcurr   0xF0DC
+#define reg_p_dcoe_accweightcurr_pos 0
+#define reg_p_dcoe_accweightcurr_len 8
+#define reg_p_dcoe_accweightcurr_lsb 0
+#define xd_p_reg_dcoe_apply_rd  (*(volatile byte xdata *) 0xF0DF)
+#define    p_reg_dcoe_apply_rd  0xF0DF
+#define reg_dcoe_apply_rd_pos 0
+#define reg_dcoe_apply_rd_len 1
+#define reg_dcoe_apply_rd_lsb 0
+#define xd_r_reg_dcoe_apply_i   (*(volatile byte xdata *) 0xF0E0)
+#define    r_reg_dcoe_apply_i   0xF0E0
+#define reg_dcoe_apply_i_pos 0
+#define reg_dcoe_apply_i_len 8
+#define reg_dcoe_apply_i_lsb 0
+#define xd_r_reg_dcoe_apply_q   (*(volatile byte xdata *) 0xF0E1)
+#define    r_reg_dcoe_apply_q   0xF0E1
+#define reg_dcoe_apply_q_pos 0
+#define reg_dcoe_apply_q_len 8
+#define reg_dcoe_apply_q_lsb 0
+#define xd_p_reg_p_dcrm_en  (*(volatile byte xdata *) 0xF0E2)
+#define    p_reg_p_dcrm_en  0xF0E2
+#define reg_p_dcrm_en_pos 0
+#define reg_p_dcrm_en_len 1
+#define reg_p_dcrm_en_lsb 0
+#define xd_p_reg_p_dcrm_fir (*(volatile byte xdata *) 0xF0E3)
+#define    p_reg_p_dcrm_fir 0xF0E3
+#define reg_p_dcrm_fir_pos 0
+#define reg_p_dcrm_fir_len 1
+#define reg_p_dcrm_fir_lsb 0
+#define xd_p_reg_p_dcrm_log2_firlen (*(volatile byte xdata *) 0xF0E4)
+#define    p_reg_p_dcrm_log2_firlen 0xF0E4
+#define reg_p_dcrm_log2_firlen_pos 0
+#define reg_p_dcrm_log2_firlen_len 3
+#define reg_p_dcrm_log2_firlen_lsb 0
+#define xd_r_reg_dcoe_apply_fir_i   (*(volatile byte xdata *) 0xF0E5)
+#define    r_reg_dcoe_apply_fir_i   0xF0E5
+#define reg_dcoe_apply_fir_i_pos 0
+#define reg_dcoe_apply_fir_i_len 8
+#define reg_dcoe_apply_fir_i_lsb 0
+#define xd_r_reg_dcoe_apply_fir_q   (*(volatile byte xdata *) 0xF0E6)
+#define    r_reg_dcoe_apply_fir_q   0xF0E6
+#define reg_dcoe_apply_fir_q_pos 0
+#define reg_dcoe_apply_fir_q_len 8
+#define reg_dcoe_apply_fir_q_lsb 0
+#define xd_p_reg_p_dcrm_force_en    (*(volatile byte xdata *) 0xF0E7)
+#define    p_reg_p_dcrm_force_en    0xF0E7
+#define reg_p_dcrm_force_en_pos 0
+#define reg_p_dcrm_force_en_len 1
+#define reg_p_dcrm_force_en_lsb 0
+#define xd_p_reg_p_dcrm_force_value_i   (*(volatile byte xdata *) 0xF0E8)
+#define    p_reg_p_dcrm_force_value_i   0xF0E8
+#define reg_p_dcrm_force_value_i_pos 0
+#define reg_p_dcrm_force_value_i_len 8
+#define reg_p_dcrm_force_value_i_lsb 0
+#define xd_p_reg_p_dcrm_force_value_q   (*(volatile byte xdata *) 0xF0E9)
+#define    p_reg_p_dcrm_force_value_q   0xF0E9
+#define reg_p_dcrm_force_value_q_pos 0
+#define reg_p_dcrm_force_value_q_len 8
+#define reg_p_dcrm_force_value_q_lsb 0
+#define xd_p_reg_p_iqip_en  (*(volatile byte xdata *) 0xF0EA)
+#define    p_reg_p_iqip_en  0xF0EA
+#define reg_p_iqip_en_pos 0
+#define reg_p_iqip_en_len 1
+#define reg_p_iqip_en_lsb 0
+#define xd_p_reg_p_iqip_rst (*(volatile byte xdata *) 0xF0EB)
+#define    p_reg_p_iqip_rst 0xF0EB
+#define reg_p_iqip_rst_pos 0
+#define reg_p_iqip_rst_len 1
+#define reg_p_iqip_rst_lsb 0
+#define xd_p_reg_iqip_mu_ld (*(volatile byte xdata *) 0xF0EC)
+#define    p_reg_iqip_mu_ld 0xF0EC
+#define reg_iqip_mu_ld_pos 0
+#define reg_iqip_mu_ld_len 1
+#define reg_iqip_mu_ld_lsb 0
+#define xd_p_reg_p_iqip_mu_7_0  (*(volatile byte xdata *) 0xF0ED)
+#define    p_reg_p_iqip_mu_7_0  0xF0ED
+#define reg_p_iqip_mu_7_0_pos 0
+#define reg_p_iqip_mu_7_0_len 8
+#define reg_p_iqip_mu_7_0_lsb 0
+#define xd_p_reg_p_iqip_mu_11_8 (*(volatile byte xdata *) 0xF0EE)
+#define    p_reg_p_iqip_mu_11_8 0xF0EE
+#define reg_p_iqip_mu_11_8_pos 0
+#define reg_p_iqip_mu_11_8_len 4
+#define reg_p_iqip_mu_11_8_lsb 8
+#define xd_p_reg_iqip_gs_ld (*(volatile byte xdata *) 0xF0EF)
+#define    p_reg_iqip_gs_ld 0xF0EF
+#define reg_iqip_gs_ld_pos 0
+#define reg_iqip_gs_ld_len 1
+#define reg_iqip_gs_ld_lsb 0
+#define xd_p_reg_p_iqip_gsnums  (*(volatile byte xdata *) 0xF0F0)
+#define    p_reg_p_iqip_gsnums  0xF0F0
+#define reg_p_iqip_gsnums_pos 0
+#define reg_p_iqip_gsnums_len 4
+#define reg_p_iqip_gsnums_lsb 0
+#define xd_p_reg_p_iqip_gsites_7_0  (*(volatile byte xdata *) 0xF0F1)
+#define    p_reg_p_iqip_gsites_7_0  0xF0F1
+#define reg_p_iqip_gsites_7_0_pos 0
+#define reg_p_iqip_gsites_7_0_len 8
+#define reg_p_iqip_gsites_7_0_lsb 0
+#define xd_p_reg_p_iqip_gsites_15_8 (*(volatile byte xdata *) 0xF0F2)
+#define    p_reg_p_iqip_gsites_15_8 0xF0F2
+#define reg_p_iqip_gsites_15_8_pos 0
+#define reg_p_iqip_gsites_15_8_len 8
+#define reg_p_iqip_gsites_15_8_lsb 8
+#define xd_p_reg_iqip_w_ld  (*(volatile byte xdata *) 0xF0F3)
+#define    p_reg_iqip_w_ld  0xF0F3
+#define reg_iqip_w_ld_pos 0
+#define reg_iqip_w_ld_len 1
+#define reg_iqip_w_ld_lsb 0
+#define xd_p_reg_p_iqip_w_re_7_0    (*(volatile byte xdata *) 0xF0F4)
+#define    p_reg_p_iqip_w_re_7_0    0xF0F4
+#define reg_p_iqip_w_re_7_0_pos 0
+#define reg_p_iqip_w_re_7_0_len 8
+#define reg_p_iqip_w_re_7_0_lsb 0
+#define xd_p_reg_p_iqip_w_re_15_8   (*(volatile byte xdata *) 0xF0F5)
+#define    p_reg_p_iqip_w_re_15_8   0xF0F5
+#define reg_p_iqip_w_re_15_8_pos 0
+#define reg_p_iqip_w_re_15_8_len 8
+#define reg_p_iqip_w_re_15_8_lsb 8
+#define xd_p_reg_p_iqip_w_re_16 (*(volatile byte xdata *) 0xF0F6)
+#define    p_reg_p_iqip_w_re_16 0xF0F6
+#define reg_p_iqip_w_re_16_pos 0
+#define reg_p_iqip_w_re_16_len 1
+#define reg_p_iqip_w_re_16_lsb 16
+#define xd_p_reg_p_iqip_w_im_7_0    (*(volatile byte xdata *) 0xF0F7)
+#define    p_reg_p_iqip_w_im_7_0    0xF0F7
+#define reg_p_iqip_w_im_7_0_pos 0
+#define reg_p_iqip_w_im_7_0_len 8
+#define reg_p_iqip_w_im_7_0_lsb 0
+#define xd_p_reg_p_iqip_w_im_15_8   (*(volatile byte xdata *) 0xF0F8)
+#define    p_reg_p_iqip_w_im_15_8   0xF0F8
+#define reg_p_iqip_w_im_15_8_pos 0
+#define reg_p_iqip_w_im_15_8_len 8
+#define reg_p_iqip_w_im_15_8_lsb 8
+#define xd_p_reg_p_iqip_w_im_16 (*(volatile byte xdata *) 0xF0F9)
+#define    p_reg_p_iqip_w_im_16 0xF0F9
+#define reg_p_iqip_w_im_16_pos 0
+#define reg_p_iqip_w_im_16_len 1
+#define reg_p_iqip_w_im_16_lsb 16
+#define xd_p_reg_iqip_accnums_rd    (*(volatile byte xdata *) 0xF0FA)
+#define    p_reg_iqip_accnums_rd    0xF0FA
+#define reg_iqip_accnums_rd_pos 0
+#define reg_iqip_accnums_rd_len 1
+#define reg_iqip_accnums_rd_lsb 0
+#define xd_p_reg_p_iqip_accnums (*(volatile byte xdata *) 0xF0FB)
+#define    p_reg_p_iqip_accnums 0xF0FB
+#define reg_p_iqip_accnums_pos 0
+#define reg_p_iqip_accnums_len 2
+#define reg_p_iqip_accnums_lsb 0
+#define xd_p_reg_iqip_accnums_rdy   (*(volatile byte xdata *) 0xF0FC)
+#define    p_reg_iqip_accnums_rdy   0xF0FC
+#define reg_iqip_accnums_rdy_pos 0
+#define reg_iqip_accnums_rdy_len 1
+#define reg_iqip_accnums_rdy_lsb 0
+#define xd_r_reg_r_iqip_wacc_re_7_0 (*(volatile byte xdata *) 0xF0FD)
+#define    r_reg_r_iqip_wacc_re_7_0 0xF0FD
+#define reg_r_iqip_wacc_re_7_0_pos 0
+#define reg_r_iqip_wacc_re_7_0_len 8
+#define reg_r_iqip_wacc_re_7_0_lsb 0
+#define xd_r_reg_r_iqip_wacc_re_15_8    (*(volatile byte xdata *) 0xF0FE)
+#define    r_reg_r_iqip_wacc_re_15_8    0xF0FE
+#define reg_r_iqip_wacc_re_15_8_pos 0
+#define reg_r_iqip_wacc_re_15_8_len 8
+#define reg_r_iqip_wacc_re_15_8_lsb 8
+#define xd_r_reg_r_iqip_wacc_re_16  (*(volatile byte xdata *) 0xF0FF)
+#define    r_reg_r_iqip_wacc_re_16  0xF0FF
+#define reg_r_iqip_wacc_re_16_pos 0
+#define reg_r_iqip_wacc_re_16_len 1
+#define reg_r_iqip_wacc_re_16_lsb 16
+#define xd_r_reg_r_iqip_wacc_im_7_0 (*(volatile byte xdata *) 0xF100)
+#define    r_reg_r_iqip_wacc_im_7_0 0xF100
+#define reg_r_iqip_wacc_im_7_0_pos 0
+#define reg_r_iqip_wacc_im_7_0_len 8
+#define reg_r_iqip_wacc_im_7_0_lsb 0
+#define xd_r_reg_r_iqip_wacc_im_15_8    (*(volatile byte xdata *) 0xF101)
+#define    r_reg_r_iqip_wacc_im_15_8    0xF101
+#define reg_r_iqip_wacc_im_15_8_pos 0
+#define reg_r_iqip_wacc_im_15_8_len 8
+#define reg_r_iqip_wacc_im_15_8_lsb 8
+#define xd_r_reg_r_iqip_wacc_im_16  (*(volatile byte xdata *) 0xF102)
+#define    r_reg_r_iqip_wacc_im_16  0xF102
+#define reg_r_iqip_wacc_im_16_pos 0
+#define reg_r_iqip_wacc_im_16_len 1
+#define reg_r_iqip_wacc_im_16_lsb 16
+#define xd_r_reg_r_iqip_out2cacc_re_7_0 (*(volatile byte xdata *) 0xF103)
+#define    r_reg_r_iqip_out2cacc_re_7_0 0xF103
+#define reg_r_iqip_out2cacc_re_7_0_pos 0
+#define reg_r_iqip_out2cacc_re_7_0_len 8
+#define reg_r_iqip_out2cacc_re_7_0_lsb 0
+#define xd_r_reg_r_iqip_out2cacc_re_15_8    (*(volatile byte xdata *) 0xF104)
+#define    r_reg_r_iqip_out2cacc_re_15_8    0xF104
+#define reg_r_iqip_out2cacc_re_15_8_pos 0
+#define reg_r_iqip_out2cacc_re_15_8_len 8
+#define reg_r_iqip_out2cacc_re_15_8_lsb 8
+#define xd_r_reg_r_iqip_out2cacc_re_21_16   (*(volatile byte xdata *) 0xF105)
+#define    r_reg_r_iqip_out2cacc_re_21_16   0xF105
+#define reg_r_iqip_out2cacc_re_21_16_pos 0
+#define reg_r_iqip_out2cacc_re_21_16_len 6
+#define reg_r_iqip_out2cacc_re_21_16_lsb 16
+#define xd_r_reg_r_iqip_out2cacc_im_7_0 (*(volatile byte xdata *) 0xF106)
+#define    r_reg_r_iqip_out2cacc_im_7_0 0xF106
+#define reg_r_iqip_out2cacc_im_7_0_pos 0
+#define reg_r_iqip_out2cacc_im_7_0_len 8
+#define reg_r_iqip_out2cacc_im_7_0_lsb 0
+#define xd_r_reg_r_iqip_out2cacc_im_15_8    (*(volatile byte xdata *) 0xF107)
+#define    r_reg_r_iqip_out2cacc_im_15_8    0xF107
+#define reg_r_iqip_out2cacc_im_15_8_pos 0
+#define reg_r_iqip_out2cacc_im_15_8_len 8
+#define reg_r_iqip_out2cacc_im_15_8_lsb 8
+#define xd_r_reg_r_iqip_out2cacc_im_21_16   (*(volatile byte xdata *) 0xF108)
+#define    r_reg_r_iqip_out2cacc_im_21_16   0xF108
+#define reg_r_iqip_out2cacc_im_21_16_pos 0
+#define reg_r_iqip_out2cacc_im_21_16_len 6
+#define reg_r_iqip_out2cacc_im_21_16_lsb 16
+#define xd_p_reg_mccid_ccif0_scstrobe   (*(volatile byte xdata *) 0xF109)
+#define    p_reg_mccid_ccif0_scstrobe   0xF109
+#define reg_mccid_ccif0_scstrobe_pos 0
+#define reg_mccid_ccif0_scstrobe_len 7
+#define reg_mccid_ccif0_scstrobe_lsb 0
+#define xd_p_reg_mccid_cciftrigger  (*(volatile byte xdata *) 0xF10A)
+#define    p_reg_mccid_cciftrigger  0xF10A
+#define reg_mccid_cciftrigger_pos 0
+#define reg_mccid_cciftrigger_len 1
+#define reg_mccid_cciftrigger_lsb 0
+#define xd_p_reg_mccid_ccif1_scstrobe   (*(volatile byte xdata *) 0xF10B)
+#define    p_reg_mccid_ccif1_scstrobe   0xF10B
+#define reg_mccid_ccif1_scstrobe_pos 0
+#define reg_mccid_ccif1_scstrobe_len 7
+#define reg_mccid_ccif1_scstrobe_lsb 0
+#define xd_p_reg_mccid_ccif0_fcwccif_7_0    (*(volatile byte xdata *) 0xF10E)
+#define    p_reg_mccid_ccif0_fcwccif_7_0    0xF10E
+#define reg_mccid_ccif0_fcwccif_7_0_pos 0
+#define reg_mccid_ccif0_fcwccif_7_0_len 8
+#define reg_mccid_ccif0_fcwccif_7_0_lsb 0
+#define xd_p_reg_mccid_ccif0_fcwccif_13_8   (*(volatile byte xdata *) 0xF10F)
+#define    p_reg_mccid_ccif0_fcwccif_13_8   0xF10F
+#define reg_mccid_ccif0_fcwccif_13_8_pos 0
+#define reg_mccid_ccif0_fcwccif_13_8_len 6
+#define reg_mccid_ccif0_fcwccif_13_8_lsb 8
+#define xd_p_reg_mccid_ccif0_state  (*(volatile byte xdata *) 0xF110)
+#define    p_reg_mccid_ccif0_state  0xF110
+#define reg_mccid_ccif0_state_pos 0
+#define reg_mccid_ccif0_state_len 1
+#define reg_mccid_ccif0_state_lsb 0
+#define xd_p_reg_mccid_ccif0_acistate   (*(volatile byte xdata *) 0xF111)
+#define    p_reg_mccid_ccif0_acistate   0xF111
+#define reg_mccid_ccif0_acistate_pos 0
+#define reg_mccid_ccif0_acistate_len 1
+#define reg_mccid_ccif0_acistate_lsb 0
+#define xd_p_reg_mccid_ccif1_fcwccif_7_0    (*(volatile byte xdata *) 0xF112)
+#define    p_reg_mccid_ccif1_fcwccif_7_0    0xF112
+#define reg_mccid_ccif1_fcwccif_7_0_pos 0
+#define reg_mccid_ccif1_fcwccif_7_0_len 8
+#define reg_mccid_ccif1_fcwccif_7_0_lsb 0
+#define xd_p_reg_mccid_ccif1_fcwccif_13_8   (*(volatile byte xdata *) 0xF113)
+#define    p_reg_mccid_ccif1_fcwccif_13_8   0xF113
+#define reg_mccid_ccif1_fcwccif_13_8_pos 0
+#define reg_mccid_ccif1_fcwccif_13_8_len 6
+#define reg_mccid_ccif1_fcwccif_13_8_lsb 8
+#define xd_p_reg_mccid_ccif1_state  (*(volatile byte xdata *) 0xF114)
+#define    p_reg_mccid_ccif1_state  0xF114
+#define reg_mccid_ccif1_state_pos 0
+#define reg_mccid_ccif1_state_len 1
+#define reg_mccid_ccif1_state_lsb 0
+#define xd_p_reg_mccid_ccif1_acistate   (*(volatile byte xdata *) 0xF115)
+#define    p_reg_mccid_ccif1_acistate   0xF115
+#define reg_mccid_ccif1_acistate_pos 0
+#define reg_mccid_ccif1_acistate_len 1
+#define reg_mccid_ccif1_acistate_lsb 0
+#define xd_r_reg_r_acif_saturate    (*(volatile byte xdata *) 0xF117)
+#define    r_reg_r_acif_saturate    0xF117
+#define reg_r_acif_saturate_pos 0
+#define reg_r_acif_saturate_len 8
+#define reg_r_acif_saturate_lsb 0
+#define xd_p_reg_tmr_timer0_threshold_7_0   (*(volatile byte xdata *) 0xF118)
+#define    p_reg_tmr_timer0_threshold_7_0   0xF118
+#define reg_tmr_timer0_threshold_7_0_pos 0
+#define reg_tmr_timer0_threshold_7_0_len 8
+#define reg_tmr_timer0_threshold_7_0_lsb 0
+#define xd_p_reg_tmr_timer0_threshold_15_8  (*(volatile byte xdata *) 0xF119)
+#define    p_reg_tmr_timer0_threshold_15_8  0xF119
+#define reg_tmr_timer0_threshold_15_8_pos 0
+#define reg_tmr_timer0_threshold_15_8_len 8
+#define reg_tmr_timer0_threshold_15_8_lsb 8
+#define xd_p_reg_tmr_timer0_enable  (*(volatile byte xdata *) 0xF11A)
+#define    p_reg_tmr_timer0_enable  0xF11A
+#define reg_tmr_timer0_enable_pos 0
+#define reg_tmr_timer0_enable_len 1
+#define reg_tmr_timer0_enable_lsb 0
+#define xd_p_reg_tmr_timer0_clk_sel (*(volatile byte xdata *) 0xF11B)
+#define    p_reg_tmr_timer0_clk_sel 0xF11B
+#define reg_tmr_timer0_clk_sel_pos 0
+#define reg_tmr_timer0_clk_sel_len 1
+#define reg_tmr_timer0_clk_sel_lsb 0
+#define xd_p_reg_tmr_timer0_int (*(volatile byte xdata *) 0xF11C)
+#define    p_reg_tmr_timer0_int 0xF11C
+#define reg_tmr_timer0_int_pos 0
+#define reg_tmr_timer0_int_len 1
+#define reg_tmr_timer0_int_lsb 0
+#define xd_p_reg_tmr_timer0_rst (*(volatile byte xdata *) 0xF11D)
+#define    p_reg_tmr_timer0_rst 0xF11D
+#define reg_tmr_timer0_rst_pos 0
+#define reg_tmr_timer0_rst_len 1
+#define reg_tmr_timer0_rst_lsb 0
+#define xd_r_reg_tmr_timer0_count_7_0   (*(volatile byte xdata *) 0xF11E)
+#define    r_reg_tmr_timer0_count_7_0   0xF11E
+#define reg_tmr_timer0_count_7_0_pos 0
+#define reg_tmr_timer0_count_7_0_len 8
+#define reg_tmr_timer0_count_7_0_lsb 0
+#define xd_r_reg_tmr_timer0_count_15_8  (*(volatile byte xdata *) 0xF11F)
+#define    r_reg_tmr_timer0_count_15_8  0xF11F
+#define reg_tmr_timer0_count_15_8_pos 0
+#define reg_tmr_timer0_count_15_8_len 8
+#define reg_tmr_timer0_count_15_8_lsb 8
+#define xd_p_reg_suspend    (*(volatile byte xdata *) 0xF120)
+#define    p_reg_suspend    0xF120
+#define reg_suspend_pos 0
+#define reg_suspend_len 1
+#define reg_suspend_lsb 0
+#define xd_p_reg_suspend_rdy    (*(volatile byte xdata *) 0xF121)
+#define    p_reg_suspend_rdy    0xF121
+#define reg_suspend_rdy_pos 0
+#define reg_suspend_rdy_len 1
+#define reg_suspend_rdy_lsb 0
+#define xd_p_reg_resume (*(volatile byte xdata *) 0xF122)
+#define    p_reg_resume 0xF122
+#define reg_resume_pos 0
+#define reg_resume_len 1
+#define reg_resume_lsb 0
+#define xd_p_reg_resume_rdy (*(volatile byte xdata *) 0xF123)
+#define    p_reg_resume_rdy 0xF123
+#define reg_resume_rdy_pos 0
+#define reg_resume_rdy_len 1
+#define reg_resume_rdy_lsb 0
+#define xd_p_reg_gp_trigger (*(volatile byte xdata *) 0xF124)
+#define    p_reg_gp_trigger 0xF124
+#define reg_gp_trigger_pos 0
+#define reg_gp_trigger_len 1
+#define reg_gp_trigger_lsb 0
+#define xd_p_reg_trigger_sel    (*(volatile byte xdata *) 0xF125)
+#define    p_reg_trigger_sel    0xF125
+#define reg_trigger_sel_pos 0
+#define reg_trigger_sel_len 2
+#define reg_trigger_sel_lsb 0
+#define xd_p_reg_debug_ofdm (*(volatile byte xdata *) 0xF126)
+#define    p_reg_debug_ofdm 0xF126
+#define reg_debug_ofdm_pos 0
+#define reg_debug_ofdm_len 2
+#define reg_debug_ofdm_lsb 0
+#define xd_p_reg_trigger_module_sel (*(volatile byte xdata *) 0xF127)
+#define    p_reg_trigger_module_sel 0xF127
+#define reg_trigger_module_sel_pos 0
+#define reg_trigger_module_sel_len 6
+#define reg_trigger_module_sel_lsb 0
+#define xd_p_reg_trigger_set_sel    (*(volatile byte xdata *) 0xF128)
+#define    p_reg_trigger_set_sel    0xF128
+#define reg_trigger_set_sel_pos 0
+#define reg_trigger_set_sel_len 6
+#define reg_trigger_set_sel_lsb 0
+#define xd_p_reg_fw_int_mask_n  (*(volatile byte xdata *) 0xF129)
+#define    p_reg_fw_int_mask_n  0xF129
+#define reg_fw_int_mask_n_pos 0
+#define reg_fw_int_mask_n_len 1
+#define reg_fw_int_mask_n_lsb 0
+#define xd_p_reg_dioif_rst  (*(volatile byte xdata *) 0xF12A)
+#define    p_reg_dioif_rst  0xF12A
+#define reg_dioif_rst_pos 0
+#define reg_dioif_rst_len 1
+#define reg_dioif_rst_lsb 0
+#define xd_p_reg_debug_group    (*(volatile byte xdata *) 0xF12B)
+#define    p_reg_debug_group    0xF12B
+#define reg_debug_group_pos 0
+#define reg_debug_group_len 4
+#define reg_debug_group_lsb 0
+#define xd_p_reg_odbg_clk_sel   (*(volatile byte xdata *) 0xF12C)
+#define    p_reg_odbg_clk_sel   0xF12C
+#define reg_odbg_clk_sel_pos 0
+#define reg_odbg_clk_sel_len 3
+#define reg_odbg_clk_sel_lsb 0
+#define xd_p_reg_p_ccif_shift_fre   (*(volatile byte xdata *) 0xF12F)
+#define    p_reg_p_ccif_shift_fre   0xF12F
+#define reg_p_ccif_shift_fre_pos 0
+#define reg_p_ccif_shift_fre_len 1
+#define reg_p_ccif_shift_fre_lsb 0
+#define xd_p_reg_p_ccif_bandwidth_factor    (*(volatile byte xdata *) 0xF130)
+#define    p_reg_p_ccif_bandwidth_factor    0xF130
+#define reg_p_ccif_bandwidth_factor_pos 0
+#define reg_p_ccif_bandwidth_factor_len 3
+#define reg_p_ccif_bandwidth_factor_lsb 0
+#define xd_p_reg_ccif_rst   (*(volatile byte xdata *) 0xF131)
+#define    p_reg_ccif_rst   0xF131
+#define reg_ccif_rst_pos 0
+#define reg_ccif_rst_len 1
+#define reg_ccif_rst_lsb 0
+#define xd_p_reg_p_ccif_min_bandwidth   (*(volatile byte xdata *) 0xF132)
+#define    p_reg_p_ccif_min_bandwidth   0xF132
+#define reg_p_ccif_min_bandwidth_pos 0
+#define reg_p_ccif_min_bandwidth_len 7
+#define reg_p_ccif_min_bandwidth_lsb 0
+#define xd_p_reg_ccif_bq0_state (*(volatile byte xdata *) 0xF133)
+#define    p_reg_ccif_bq0_state 0xF133
+#define reg_ccif_bq0_state_pos 0
+#define reg_ccif_bq0_state_len 1
+#define reg_ccif_bq0_state_lsb 0
+#define xd_p_reg_ccif_bq0_outputscaling (*(volatile byte xdata *) 0xF134)
+#define    p_reg_ccif_bq0_outputscaling 0xF134
+#define reg_ccif_bq0_outputscaling_pos 0
+#define reg_ccif_bq0_outputscaling_len 5
+#define reg_ccif_bq0_outputscaling_lsb 0
+#define xd_p_reg_ccif_bq1_state (*(volatile byte xdata *) 0xF135)
+#define    p_reg_ccif_bq1_state 0xF135
+#define reg_ccif_bq1_state_pos 0
+#define reg_ccif_bq1_state_len 1
+#define reg_ccif_bq1_state_lsb 0
+#define xd_p_reg_ccif_bq1_outputscaling (*(volatile byte xdata *) 0xF136)
+#define    p_reg_ccif_bq1_outputscaling 0xF136
+#define reg_ccif_bq1_outputscaling_pos 0
+#define reg_ccif_bq1_outputscaling_len 5
+#define reg_ccif_bq1_outputscaling_lsb 0
+#define xd_p_reg_ccif_bq0_a1_7_0    (*(volatile byte xdata *) 0xF137)
+#define    p_reg_ccif_bq0_a1_7_0    0xF137
+#define reg_ccif_bq0_a1_7_0_pos 0
+#define reg_ccif_bq0_a1_7_0_len 8
+#define reg_ccif_bq0_a1_7_0_lsb 0
+#define xd_p_reg_ccif_bq0_a1_13_8   (*(volatile byte xdata *) 0xF138)
+#define    p_reg_ccif_bq0_a1_13_8   0xF138
+#define reg_ccif_bq0_a1_13_8_pos 0
+#define reg_ccif_bq0_a1_13_8_len 6
+#define reg_ccif_bq0_a1_13_8_lsb 8
+#define xd_p_reg_ccif_bq1_a1_7_0    (*(volatile byte xdata *) 0xF139)
+#define    p_reg_ccif_bq1_a1_7_0    0xF139
+#define reg_ccif_bq1_a1_7_0_pos 0
+#define reg_ccif_bq1_a1_7_0_len 8
+#define reg_ccif_bq1_a1_7_0_lsb 0
+#define xd_p_reg_ccif_bq1_a1_13_8   (*(volatile byte xdata *) 0xF13A)
+#define    p_reg_ccif_bq1_a1_13_8   0xF13A
+#define reg_ccif_bq1_a1_13_8_pos 0
+#define reg_ccif_bq1_a1_13_8_len 6
+#define reg_ccif_bq1_a1_13_8_lsb 8
+#define xd_p_reg_ccif_bq0_b1_7_0    (*(volatile byte xdata *) 0xF13B)
+#define    p_reg_ccif_bq0_b1_7_0    0xF13B
+#define reg_ccif_bq0_b1_7_0_pos 0
+#define reg_ccif_bq0_b1_7_0_len 8
+#define reg_ccif_bq0_b1_7_0_lsb 0
+#define xd_p_reg_ccif_bq0_b1_13_8   (*(volatile byte xdata *) 0xF13C)
+#define    p_reg_ccif_bq0_b1_13_8   0xF13C
+#define reg_ccif_bq0_b1_13_8_pos 0
+#define reg_ccif_bq0_b1_13_8_len 6
+#define reg_ccif_bq0_b1_13_8_lsb 8
+#define xd_p_reg_ccif_bq1_b1_7_0    (*(volatile byte xdata *) 0xF13D)
+#define    p_reg_ccif_bq1_b1_7_0    0xF13D
+#define reg_ccif_bq1_b1_7_0_pos 0
+#define reg_ccif_bq1_b1_7_0_len 8
+#define reg_ccif_bq1_b1_7_0_lsb 0
+#define xd_p_reg_ccif_bq1_b1_13_8   (*(volatile byte xdata *) 0xF13E)
+#define    p_reg_ccif_bq1_b1_13_8   0xF13E
+#define reg_ccif_bq1_b1_13_8_pos 0
+#define reg_ccif_bq1_b1_13_8_len 6
+#define reg_ccif_bq1_b1_13_8_lsb 8
+#define xd_p_reg_ccif_bq0_b2_7_0    (*(volatile byte xdata *) 0xF13F)
+#define    p_reg_ccif_bq0_b2_7_0    0xF13F
+#define reg_ccif_bq0_b2_7_0_pos 0
+#define reg_ccif_bq0_b2_7_0_len 8
+#define reg_ccif_bq0_b2_7_0_lsb 0
+#define xd_p_reg_ccif_bq0_b2_13_8   (*(volatile byte xdata *) 0xF140)
+#define    p_reg_ccif_bq0_b2_13_8   0xF140
+#define reg_ccif_bq0_b2_13_8_pos 0
+#define reg_ccif_bq0_b2_13_8_len 6
+#define reg_ccif_bq0_b2_13_8_lsb 8
+#define xd_p_reg_ccif_bq1_b2_7_0    (*(volatile byte xdata *) 0xF141)
+#define    p_reg_ccif_bq1_b2_7_0    0xF141
+#define reg_ccif_bq1_b2_7_0_pos 0
+#define reg_ccif_bq1_b2_7_0_len 8
+#define reg_ccif_bq1_b2_7_0_lsb 0
+#define xd_p_reg_ccif_bq1_b2_13_8   (*(volatile byte xdata *) 0xF142)
+#define    p_reg_ccif_bq1_b2_13_8   0xF142
+#define reg_ccif_bq1_b2_13_8_pos 0
+#define reg_ccif_bq1_b2_13_8_len 6
+#define reg_ccif_bq1_b2_13_8_lsb 8
+#define xd_p_reg_ccif_debug_rst (*(volatile byte xdata *) 0xF143)
+#define    p_reg_ccif_debug_rst 0xF143
+#define reg_ccif_debug_rst_pos 0
+#define reg_ccif_debug_rst_len 1
+#define reg_ccif_debug_rst_lsb 0
+#define xd_p_reg_mccid_defaultccifscstrobe  (*(volatile byte xdata *) 0xF144)
+#define    p_reg_mccid_defaultccifscstrobe  0xF144
+#define reg_mccid_defaultccifscstrobe_pos 0
+#define reg_mccid_defaultccifscstrobe_len 7
+#define reg_mccid_defaultccifscstrobe_lsb 0
+#define xd_p_reg_mccid_monitoringaci    (*(volatile byte xdata *) 0xF145)
+#define    p_reg_mccid_monitoringaci    0xF145
+#define reg_mccid_monitoringaci_pos 0
+#define reg_mccid_monitoringaci_len 1
+#define reg_mccid_monitoringaci_lsb 0
+#define xd_p_reg_mccid_ispassmode   (*(volatile byte xdata *) 0xF146)
+#define    p_reg_mccid_ispassmode   0xF146
+#define reg_mccid_ispassmode_pos 0
+#define reg_mccid_ispassmode_len 1
+#define reg_mccid_ispassmode_lsb 0
+#define xd_p_reg_mccid_issteadystatemode    (*(volatile byte xdata *) 0xF147)
+#define    p_reg_mccid_issteadystatemode    0xF147
+#define reg_mccid_issteadystatemode_pos 0
+#define reg_mccid_issteadystatemode_len 1
+#define reg_mccid_issteadystatemode_lsb 0
+#define xd_p_reg_mccid_fixedgaincmp (*(volatile byte xdata *) 0xF148)
+#define    p_reg_mccid_fixedgaincmp 0xF148
+#define reg_mccid_fixedgaincmp_pos 0
+#define reg_mccid_fixedgaincmp_len 1
+#define reg_mccid_fixedgaincmp_lsb 0
+#define xd_p_reg_mccid_misscounter_reset    (*(volatile byte xdata *) 0xF149)
+#define    p_reg_mccid_misscounter_reset    0xF149
+#define reg_mccid_misscounter_reset_pos 0
+#define reg_mccid_misscounter_reset_len 1
+#define reg_mccid_misscounter_reset_lsb 0
+#define xd_p_reg_mccid_acwgcheckcciexist    (*(volatile byte xdata *) 0xF14A)
+#define    p_reg_mccid_acwgcheckcciexist    0xF14A
+#define reg_mccid_acwgcheckcciexist_pos 0
+#define reg_mccid_acwgcheckcciexist_len 1
+#define reg_mccid_acwgcheckcciexist_lsb 0
+#define xd_p_reg_mccid_acidone  (*(volatile byte xdata *) 0xF14B)
+#define    p_reg_mccid_acidone  0xF14B
+#define reg_mccid_acidone_pos 0
+#define reg_mccid_acidone_len 1
+#define reg_mccid_acidone_lsb 0
+#define xd_p_reg_mccid_sxdesiredpower_7_0   (*(volatile byte xdata *) 0xF14C)
+#define    p_reg_mccid_sxdesiredpower_7_0   0xF14C
+#define reg_mccid_sxdesiredpower_7_0_pos 0
+#define reg_mccid_sxdesiredpower_7_0_len 8
+#define reg_mccid_sxdesiredpower_7_0_lsb 0
+#define xd_p_reg_mccid_sxdesiredpower_9_8   (*(volatile byte xdata *) 0xF14D)
+#define    p_reg_mccid_sxdesiredpower_9_8   0xF14D
+#define reg_mccid_sxdesiredpower_9_8_pos 0
+#define reg_mccid_sxdesiredpower_9_8_len 2
+#define reg_mccid_sxdesiredpower_9_8_lsb 8
+#define xd_p_reg_mccid_defaultccitimertriggerno (*(volatile byte xdata *) 0xF14E)
+#define    p_reg_mccid_defaultccitimertriggerno 0xF14E
+#define reg_mccid_defaultccitimertriggerno_pos 0
+#define reg_mccid_defaultccitimertriggerno_len 8
+#define reg_mccid_defaultccitimertriggerno_lsb 0
+#define xd_p_reg_mccid_detectedmaxtonecountshift    (*(volatile byte xdata *) 0xF14F)
+#define    p_reg_mccid_detectedmaxtonecountshift    0xF14F
+#define reg_mccid_detectedmaxtonecountshift_pos 0
+#define reg_mccid_detectedmaxtonecountshift_len 3
+#define reg_mccid_detectedmaxtonecountshift_lsb 0
+#define xd_p_reg_mccid_moveffttoccif_en (*(volatile byte xdata *) 0xF151)
+#define    p_reg_mccid_moveffttoccif_en 0xF151
+#define reg_mccid_moveffttoccif_en_pos 0
+#define reg_mccid_moveffttoccif_en_len 1
+#define reg_mccid_moveffttoccif_en_lsb 0
+#define xd_p_reg_mccid_fftindextobfsfcwfactor_7_0   (*(volatile byte xdata *) 0xF152)
+#define    p_reg_mccid_fftindextobfsfcwfactor_7_0   0xF152
+#define reg_mccid_fftindextobfsfcwfactor_7_0_pos 0
+#define reg_mccid_fftindextobfsfcwfactor_7_0_len 8
+#define reg_mccid_fftindextobfsfcwfactor_7_0_lsb 0
+#define xd_p_reg_mccid_fftindextobfsfcwfactor_9_8   (*(volatile byte xdata *) 0xF153)
+#define    p_reg_mccid_fftindextobfsfcwfactor_9_8   0xF153
+#define reg_mccid_fftindextobfsfcwfactor_9_8_pos 0
+#define reg_mccid_fftindextobfsfcwfactor_9_8_len 2
+#define reg_mccid_fftindextobfsfcwfactor_9_8_lsb 8
+#define xd_p_reg_mccid_bfsfcwffttoindexfactor_7_0   (*(volatile byte xdata *) 0xF154)
+#define    p_reg_mccid_bfsfcwffttoindexfactor_7_0   0xF154
+#define reg_mccid_bfsfcwffttoindexfactor_7_0_pos 0
+#define reg_mccid_bfsfcwffttoindexfactor_7_0_len 8
+#define reg_mccid_bfsfcwffttoindexfactor_7_0_lsb 0
+#define xd_p_reg_mccid_bfsfcwffttoindexfactor_10_8  (*(volatile byte xdata *) 0xF155)
+#define    p_reg_mccid_bfsfcwffttoindexfactor_10_8  0xF155
+#define reg_mccid_bfsfcwffttoindexfactor_10_8_pos 0
+#define reg_mccid_bfsfcwffttoindexfactor_10_8_len 3
+#define reg_mccid_bfsfcwffttoindexfactor_10_8_lsb 8
+#define xd_p_reg_mccid_detectedaci  (*(volatile byte xdata *) 0xF156)
+#define    p_reg_mccid_detectedaci  0xF156
+#define reg_mccid_detectedaci_pos 0
+#define reg_mccid_detectedaci_len 1
+#define reg_mccid_detectedaci_lsb 0
+#define xd_r_reg_mccid_filter_enable    (*(volatile byte xdata *) 0xF157)
+#define    r_reg_mccid_filter_enable    0xF157
+#define reg_mccid_filter_enable_pos 0
+#define reg_mccid_filter_enable_len 1
+#define reg_mccid_filter_enable_lsb 0
+#define xd_p_reg_mccid_aciscstrobe  (*(volatile byte xdata *) 0xF158)
+#define    p_reg_mccid_aciscstrobe  0xF158
+#define reg_mccid_aciscstrobe_pos 0
+#define reg_mccid_aciscstrobe_len 7
+#define reg_mccid_aciscstrobe_lsb 0
+#define xd_p_reg_mccid_scanningaci  (*(volatile byte xdata *) 0xF159)
+#define    p_reg_mccid_scanningaci  0xF159
+#define reg_mccid_scanningaci_pos 0
+#define reg_mccid_scanningaci_len 1
+#define reg_mccid_scanningaci_lsb 0
+#define xd_p_reg_mccid_windowsizeacciwdcount_7_0    (*(volatile byte xdata *) 0xF15A)
+#define    p_reg_mccid_windowsizeacciwdcount_7_0    0xF15A
+#define reg_mccid_windowsizeacciwdcount_7_0_pos 0
+#define reg_mccid_windowsizeacciwdcount_7_0_len 8
+#define reg_mccid_windowsizeacciwdcount_7_0_lsb 0
+#define xd_p_reg_mccid_windowsizeacciwdcount_12_8   (*(volatile byte xdata *) 0xF15B)
+#define    p_reg_mccid_windowsizeacciwdcount_12_8   0xF15B
+#define reg_mccid_windowsizeacciwdcount_12_8_pos 0
+#define reg_mccid_windowsizeacciwdcount_12_8_len 5
+#define reg_mccid_windowsizeacciwdcount_12_8_lsb 8
+#define xd_p_reg_mccid_scannedacionly   (*(volatile byte xdata *) 0xF15C)
+#define    p_reg_mccid_scannedacionly   0xF15C
+#define reg_mccid_scannedacionly_pos 0
+#define reg_mccid_scannedacionly_len 1
+#define reg_mccid_scannedacionly_lsb 0
+#define xd_p_reg_mccid_scfactor (*(volatile byte xdata *) 0xF15D)
+#define    p_reg_mccid_scfactor 0xF15D
+#define reg_mccid_scfactor_pos 0
+#define reg_mccid_scfactor_len 5
+#define reg_mccid_scfactor_lsb 0
+#define xd_p_reg_mccid_defaultevaluatingbandwidthfactor (*(volatile byte xdata *) 0xF15E)
+#define    p_reg_mccid_defaultevaluatingbandwidthfactor 0xF15E
+#define reg_mccid_defaultevaluatingbandwidthfactor_pos 0
+#define reg_mccid_defaultevaluatingbandwidthfactor_len 3
+#define reg_mccid_defaultevaluatingbandwidthfactor_lsb 0
+#define xd_p_reg_mccid_defaultacipowerlevel (*(volatile byte xdata *) 0xF15F)
+#define    p_reg_mccid_defaultacipowerlevel 0xF15F
+#define reg_mccid_defaultacipowerlevel_pos 0
+#define reg_mccid_defaultacipowerlevel_len 3
+#define reg_mccid_defaultacipowerlevel_lsb 0
+#define xd_r_reg_mccid_outputdagc1gain_7_0  (*(volatile byte xdata *) 0xF160)
+#define    r_reg_mccid_outputdagc1gain_7_0  0xF160
+#define reg_mccid_outputdagc1gain_7_0_pos 0
+#define reg_mccid_outputdagc1gain_7_0_len 8
+#define reg_mccid_outputdagc1gain_7_0_lsb 0
+#define xd_r_reg_mccid_outputdagc1gain_9_8  (*(volatile byte xdata *) 0xF161)
+#define    r_reg_mccid_outputdagc1gain_9_8  0xF161
+#define reg_mccid_outputdagc1gain_9_8_pos 0
+#define reg_mccid_outputdagc1gain_9_8_len 2
+#define reg_mccid_outputdagc1gain_9_8_lsb 8
+#define xd_r_reg_mccid_outputdagc1gainshift (*(volatile byte xdata *) 0xF162)
+#define    r_reg_mccid_outputdagc1gainshift 0xF162
+#define reg_mccid_outputdagc1gainshift_pos 0
+#define reg_mccid_outputdagc1gainshift_len 4
+#define reg_mccid_outputdagc1gainshift_lsb 0
+#define xd_p_reg_mccid_defaultacwgcheckccipowerlevel    (*(volatile byte xdata *) 0xF163)
+#define    p_reg_mccid_defaultacwgcheckccipowerlevel    0xF163
+#define reg_mccid_defaultacwgcheckccipowerlevel_pos 0
+#define reg_mccid_defaultacwgcheckccipowerlevel_len 3
+#define reg_mccid_defaultacwgcheckccipowerlevel_lsb 0
+#define xd_p_reg_mccid_ccipowerlevelfactor  (*(volatile byte xdata *) 0xF166)
+#define    p_reg_mccid_ccipowerlevelfactor  0xF166
+#define reg_mccid_ccipowerlevelfactor_pos 0
+#define reg_mccid_ccipowerlevelfactor_len 3
+#define reg_mccid_ccipowerlevelfactor_lsb 0
+#define xd_p_reg_mccid_scstrobesearchingrange   (*(volatile byte xdata *) 0xF167)
+#define    p_reg_mccid_scstrobesearchingrange   0xF167
+#define reg_mccid_scstrobesearchingrange_pos 0
+#define reg_mccid_scstrobesearchingrange_len 8
+#define reg_mccid_scstrobesearchingrange_lsb 0
+#define xd_p_reg_mccid_searchingno  (*(volatile byte xdata *) 0xF168)
+#define    p_reg_mccid_searchingno  0xF168
+#define reg_mccid_searchingno_pos 0
+#define reg_mccid_searchingno_len 6
+#define reg_mccid_searchingno_lsb 0
+#define xd_p_reg_mccid_scannedacifrequencyresolution    (*(volatile byte xdata *) 0xF169)
+#define    p_reg_mccid_scannedacifrequencyresolution    0xF169
+#define reg_mccid_scannedacifrequencyresolution_pos 0
+#define reg_mccid_scannedacifrequencyresolution_len 4
+#define reg_mccid_scannedacifrequencyresolution_lsb 0
+#define xd_p_reg_mccid_fft0_maskmaxtoneindex_7_0    (*(volatile byte xdata *) 0xF16A)
+#define    p_reg_mccid_fft0_maskmaxtoneindex_7_0    0xF16A
+#define reg_mccid_fft0_maskmaxtoneindex_7_0_pos 0
+#define reg_mccid_fft0_maskmaxtoneindex_7_0_len 8
+#define reg_mccid_fft0_maskmaxtoneindex_7_0_lsb 0
+#define xd_p_reg_mccid_fft0_maskmaxtoneindex_12_8   (*(volatile byte xdata *) 0xF16B)
+#define    p_reg_mccid_fft0_maskmaxtoneindex_12_8   0xF16B
+#define reg_mccid_fft0_maskmaxtoneindex_12_8_pos 0
+#define reg_mccid_fft0_maskmaxtoneindex_12_8_len 5
+#define reg_mccid_fft0_maskmaxtoneindex_12_8_lsb 8
+#define xd_p_reg_mccid_fft0_state   (*(volatile byte xdata *) 0xF16C)
+#define    p_reg_mccid_fft0_state   0xF16C
+#define reg_mccid_fft0_state_pos 0
+#define reg_mccid_fft0_state_len 1
+#define reg_mccid_fft0_state_lsb 0
+#define xd_p_reg_mccid_fft1_state   (*(volatile byte xdata *) 0xF16D)
+#define    p_reg_mccid_fft1_state   0xF16D
+#define reg_mccid_fft1_state_pos 0
+#define reg_mccid_fft1_state_len 1
+#define reg_mccid_fft1_state_lsb 0
+#define xd_p_reg_mccid_fft0_maskmintoneindex_7_0    (*(volatile byte xdata *) 0xF16E)
+#define    p_reg_mccid_fft0_maskmintoneindex_7_0    0xF16E
+#define reg_mccid_fft0_maskmintoneindex_7_0_pos 0
+#define reg_mccid_fft0_maskmintoneindex_7_0_len 8
+#define reg_mccid_fft0_maskmintoneindex_7_0_lsb 0
+#define xd_p_reg_mccid_fft0_maskmintoneindex_12_8   (*(volatile byte xdata *) 0xF16F)
+#define    p_reg_mccid_fft0_maskmintoneindex_12_8   0xF16F
+#define reg_mccid_fft0_maskmintoneindex_12_8_pos 0
+#define reg_mccid_fft0_maskmintoneindex_12_8_len 5
+#define reg_mccid_fft0_maskmintoneindex_12_8_lsb 8
+#define xd_p_reg_mccid_acipowerlevelfactor  (*(volatile byte xdata *) 0xF170)
+#define    p_reg_mccid_acipowerlevelfactor  0xF170
+#define reg_mccid_acipowerlevelfactor_pos 0
+#define reg_mccid_acipowerlevelfactor_len 3
+#define reg_mccid_acipowerlevelfactor_lsb 0
+#define xd_p_reg_mccid_fft1_maskmaxtoneindex_7_0    (*(volatile byte xdata *) 0xF171)
+#define    p_reg_mccid_fft1_maskmaxtoneindex_7_0    0xF171
+#define reg_mccid_fft1_maskmaxtoneindex_7_0_pos 0
+#define reg_mccid_fft1_maskmaxtoneindex_7_0_len 8
+#define reg_mccid_fft1_maskmaxtoneindex_7_0_lsb 0
+#define xd_p_reg_mccid_fft1_maskmaxtoneindex_12_8   (*(volatile byte xdata *) 0xF172)
+#define    p_reg_mccid_fft1_maskmaxtoneindex_12_8   0xF172
+#define reg_mccid_fft1_maskmaxtoneindex_12_8_pos 0
+#define reg_mccid_fft1_maskmaxtoneindex_12_8_len 5
+#define reg_mccid_fft1_maskmaxtoneindex_12_8_lsb 8
+#define xd_p_reg_mccid_fft1_maskmintoneindex_7_0    (*(volatile byte xdata *) 0xF173)
+#define    p_reg_mccid_fft1_maskmintoneindex_7_0    0xF173
+#define reg_mccid_fft1_maskmintoneindex_7_0_pos 0
+#define reg_mccid_fft1_maskmintoneindex_7_0_len 8
+#define reg_mccid_fft1_maskmintoneindex_7_0_lsb 0
+#define xd_p_reg_mccid_fft1_maskmintoneindex_12_8   (*(volatile byte xdata *) 0xF174)
+#define    p_reg_mccid_fft1_maskmintoneindex_12_8   0xF174
+#define reg_mccid_fft1_maskmintoneindex_12_8_pos 0
+#define reg_mccid_fft1_maskmintoneindex_12_8_len 5
+#define reg_mccid_fft1_maskmintoneindex_12_8_lsb 8
+#define xd_p_reg_mccid_reset    (*(volatile byte xdata *) 0xF175)
+#define    p_reg_mccid_reset    0xF175
+#define reg_mccid_reset_pos 0
+#define reg_mccid_reset_len 1
+#define reg_mccid_reset_lsb 0
+#define xd_p_reg_mccid_gaincmpreset (*(volatile byte xdata *) 0xF176)
+#define    p_reg_mccid_gaincmpreset 0xF176
+#define reg_mccid_gaincmpreset_pos 0
+#define reg_mccid_gaincmpreset_len 1
+#define reg_mccid_gaincmpreset_lsb 0
+#define xd_p_reg_mccid_acwgreset    (*(volatile byte xdata *) 0xF177)
+#define    p_reg_mccid_acwgreset    0xF177
+#define reg_mccid_acwgreset_pos 0
+#define reg_mccid_acwgreset_len 1
+#define reg_mccid_acwgreset_lsb 0
+#define xd_p_reg_mccid_ccif0_ofsmstateenable    (*(volatile byte xdata *) 0xF178)
+#define    p_reg_mccid_ccif0_ofsmstateenable    0xF178
+#define reg_mccid_ccif0_ofsmstateenable_pos 0
+#define reg_mccid_ccif0_ofsmstateenable_len 1
+#define reg_mccid_ccif0_ofsmstateenable_lsb 0
+#define xd_p_reg_mccid_ccif1_ofsmstateenable    (*(volatile byte xdata *) 0xF179)
+#define    p_reg_mccid_ccif1_ofsmstateenable    0xF179
+#define reg_mccid_ccif1_ofsmstateenable_pos 0
+#define reg_mccid_ccif1_ofsmstateenable_len 1
+#define reg_mccid_ccif1_ofsmstateenable_lsb 0
+#define xd_p_reg_mccid_fft0_ofsmstateenable (*(volatile byte xdata *) 0xF17A)
+#define    p_reg_mccid_fft0_ofsmstateenable 0xF17A
+#define reg_mccid_fft0_ofsmstateenable_pos 0
+#define reg_mccid_fft0_ofsmstateenable_len 1
+#define reg_mccid_fft0_ofsmstateenable_lsb 0
+#define xd_p_reg_mccid_fft1_ofsmstateenable (*(volatile byte xdata *) 0xF17B)
+#define    p_reg_mccid_fft1_ofsmstateenable 0xF17B
+#define reg_mccid_fft1_ofsmstateenable_pos 0
+#define reg_mccid_fft1_ofsmstateenable_len 1
+#define reg_mccid_fft1_ofsmstateenable_lsb 0
+#define xd_p_reg_mccid_fftfiltermaskchange  (*(volatile byte xdata *) 0xF17C)
+#define    p_reg_mccid_fftfiltermaskchange  0xF17C
+#define reg_mccid_fftfiltermaskchange_pos 0
+#define reg_mccid_fftfiltermaskchange_len 1
+#define reg_mccid_fftfiltermaskchange_lsb 0
+#define xd_r_reg_mccid_maxacipowertone_7_0  (*(volatile byte xdata *) 0xF17D)
+#define    r_reg_mccid_maxacipowertone_7_0  0xF17D
+#define reg_mccid_maxacipowertone_7_0_pos 0
+#define reg_mccid_maxacipowertone_7_0_len 8
+#define reg_mccid_maxacipowertone_7_0_lsb 0
+#define xd_r_reg_mccid_maxacipowertone_12_8 (*(volatile byte xdata *) 0xF17E)
+#define    r_reg_mccid_maxacipowertone_12_8 0xF17E
+#define reg_mccid_maxacipowertone_12_8_pos 0
+#define reg_mccid_maxacipowertone_12_8_len 5
+#define reg_mccid_maxacipowertone_12_8_lsb 8
+#define xd_r_reg_mccid_ccidisappear (*(volatile byte xdata *) 0xF17F)
+#define    r_reg_mccid_ccidisappear 0xF17F
+#define reg_mccid_ccidisappear_pos 0
+#define reg_mccid_ccidisappear_len 1
+#define reg_mccid_ccidisappear_lsb 0
+#define xd_r_reg_mccid_ccilocatordone   (*(volatile byte xdata *) 0xF182)
+#define    r_reg_mccid_ccilocatordone   0xF182
+#define reg_mccid_ccilocatordone_pos 0
+#define reg_mccid_ccilocatordone_len 1
+#define reg_mccid_ccilocatordone_lsb 0
+#define xd_p_reg_mccid_enablecciftrigger    (*(volatile byte xdata *) 0xF183)
+#define    p_reg_mccid_enablecciftrigger    0xF183
+#define reg_mccid_enablecciftrigger_pos 0
+#define reg_mccid_enablecciftrigger_len 1
+#define reg_mccid_enablecciftrigger_lsb 0
+#define xd_p_reg_mccid_disableacwglaunchevaluationbandwidthtrigger  (*(volatile byte xdata *) 0xF184)
+#define    p_reg_mccid_disableacwglaunchevaluationbandwidthtrigger  0xF184
+#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_pos 0
+#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_len 1
+#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_lsb 0
+#define xd_p_reg_mccid_control_by_ofsm  (*(volatile byte xdata *) 0xF185)
+#define    p_reg_mccid_control_by_ofsm  0xF185
+#define reg_mccid_control_by_ofsm_pos 0
+#define reg_mccid_control_by_ofsm_len 1
+#define reg_mccid_control_by_ofsm_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolccilocator    (*(volatile byte xdata *) 0xF186)
+#define    p_reg_mccid_ofsmcontrolccilocator    0xF186
+#define reg_mccid_ofsmcontrolccilocator_pos 0
+#define reg_mccid_ofsmcontrolccilocator_len 1
+#define reg_mccid_ofsmcontrolccilocator_lsb 0
+#define xd_p_reg_mccid_disablepotentialccitriggerccilocator (*(volatile byte xdata *) 0xF187)
+#define    p_reg_mccid_disablepotentialccitriggerccilocator 0xF187
+#define reg_mccid_disablepotentialccitriggerccilocator_pos 0
+#define reg_mccid_disablepotentialccitriggerccilocator_len 1
+#define reg_mccid_disablepotentialccitriggerccilocator_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolccitesting    (*(volatile byte xdata *) 0xF188)
+#define    p_reg_mccid_ofsmcontrolccitesting    0xF188
+#define reg_mccid_ofsmcontrolccitesting_pos 0
+#define reg_mccid_ofsmcontrolccitesting_len 1
+#define reg_mccid_ofsmcontrolccitesting_lsb 0
+#define xd_p_reg_mccid_disableccitestingtriggercheckcci (*(volatile byte xdata *) 0xF189)
+#define    p_reg_mccid_disableccitestingtriggercheckcci 0xF189
+#define reg_mccid_disableccitestingtriggercheckcci_pos 0
+#define reg_mccid_disableccitestingtriggercheckcci_len 1
+#define reg_mccid_disableccitestingtriggercheckcci_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolacwgsetccifscstrobe   (*(volatile byte xdata *) 0xF18A)
+#define    p_reg_mccid_ofsmcontrolacwgsetccifscstrobe   0xF18A
+#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_pos 0
+#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_len 1
+#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_lsb 0
+#define xd_p_reg_mccid_disableacwgevaluatingbandwidthtrigger    (*(volatile byte xdata *) 0xF18B)
+#define    p_reg_mccid_disableacwgevaluatingbandwidthtrigger    0xF18B
+#define reg_mccid_disableacwgevaluatingbandwidthtrigger_pos 0
+#define reg_mccid_disableacwgevaluatingbandwidthtrigger_len 1
+#define reg_mccid_disableacwgevaluatingbandwidthtrigger_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolevaluatingbandwidth   (*(volatile byte xdata *) 0xF18C)
+#define    p_reg_mccid_ofsmcontrolevaluatingbandwidth   0xF18C
+#define reg_mccid_ofsmcontrolevaluatingbandwidth_pos 0
+#define reg_mccid_ofsmcontrolevaluatingbandwidth_len 1
+#define reg_mccid_ofsmcontrolevaluatingbandwidth_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolscanningaci   (*(volatile byte xdata *) 0xF18D)
+#define    p_reg_mccid_ofsmcontrolscanningaci   0xF18D
+#define reg_mccid_ofsmcontrolscanningaci_pos 0
+#define reg_mccid_ofsmcontrolscanningaci_len 1
+#define reg_mccid_ofsmcontrolscanningaci_lsb 0
+#define xd_p_reg_mccid_disablescanningaci   (*(volatile byte xdata *) 0xF18E)
+#define    p_reg_mccid_disablescanningaci   0xF18E
+#define reg_mccid_disablescanningaci_pos 0
+#define reg_mccid_disablescanningaci_len 1
+#define reg_mccid_disablescanningaci_lsb 0
+#define xd_p_reg_mccid_disableacwgccidetecting  (*(volatile byte xdata *) 0xF18F)
+#define    p_reg_mccid_disableacwgccidetecting  0xF18F
+#define reg_mccid_disableacwgccidetecting_pos 0
+#define reg_mccid_disableacwgccidetecting_len 1
+#define reg_mccid_disableacwgccidetecting_lsb 0
+#define xd_p_reg_mccid_ofsmcontrolccitimertrigger   (*(volatile byte xdata *) 0xF190)
+#define    p_reg_mccid_ofsmcontrolccitimertrigger   0xF190
+#define reg_mccid_ofsmcontrolccitimertrigger_pos 0
+#define reg_mccid_ofsmcontrolccitimertrigger_len 1
+#define reg_mccid_ofsmcontrolccitimertrigger_lsb 0
+#define xd_p_reg_mccid_disableccitimertrigger   (*(volatile byte xdata *) 0xF191)
+#define    p_reg_mccid_disableccitimertrigger   0xF191
+#define reg_mccid_disableccitimertrigger_pos 0
+#define reg_mccid_disableccitimertrigger_len 1
+#define reg_mccid_disableccitimertrigger_lsb 0
+#define xd_p_reg_mccid_ofsmdisableccitriggercounting    (*(volatile byte xdata *) 0xF192)
+#define    p_reg_mccid_ofsmdisableccitriggercounting    0xF192
+#define reg_mccid_ofsmdisableccitriggercounting_pos 0
+#define reg_mccid_ofsmdisableccitriggercounting_len 1
+#define reg_mccid_ofsmdisableccitriggercounting_lsb 0
+#define xd_p_reg_mccid_enableccifilteraci   (*(volatile byte xdata *) 0xF193)
+#define    p_reg_mccid_enableccifilteraci   0xF193
+#define reg_mccid_enableccifilteraci_pos 0
+#define reg_mccid_enableccifilteraci_len 1
+#define reg_mccid_enableccifilteraci_lsb 0
+#define xd_p_reg_mccid_scannedfcwbfs_7_0    (*(volatile byte xdata *) 0xF194)
+#define    p_reg_mccid_scannedfcwbfs_7_0    0xF194
+#define reg_mccid_scannedfcwbfs_7_0_pos 0
+#define reg_mccid_scannedfcwbfs_7_0_len 8
+#define reg_mccid_scannedfcwbfs_7_0_lsb 0
+#define xd_p_reg_mccid_scannedfcwbfs_13_8   (*(volatile byte xdata *) 0xF195)
+#define    p_reg_mccid_scannedfcwbfs_13_8   0xF195
+#define reg_mccid_scannedfcwbfs_13_8_pos 0
+#define reg_mccid_scannedfcwbfs_13_8_len 6
+#define reg_mccid_scannedfcwbfs_13_8_lsb 8
+#define xd_p_reg_mccid_acwgevaluatingbandwidth  (*(volatile byte xdata *) 0xF196)
+#define    p_reg_mccid_acwgevaluatingbandwidth  0xF196
+#define reg_mccid_acwgevaluatingbandwidth_pos 0
+#define reg_mccid_acwgevaluatingbandwidth_len 1
+#define reg_mccid_acwgevaluatingbandwidth_lsb 0
+#define xd_p_reg_mccid_acwglaunchevaluationbandwidth    (*(volatile byte xdata *) 0xF197)
+#define    p_reg_mccid_acwglaunchevaluationbandwidth    0xF197
+#define reg_mccid_acwglaunchevaluationbandwidth_pos 0
+#define reg_mccid_acwglaunchevaluationbandwidth_len 1
+#define reg_mccid_acwglaunchevaluationbandwidth_lsb 0
+#define xd_p_reg_mccid_scannedcandidate (*(volatile byte xdata *) 0xF198)
+#define    p_reg_mccid_scannedcandidate 0xF198
+#define reg_mccid_scannedcandidate_pos 0
+#define reg_mccid_scannedcandidate_len 3
+#define reg_mccid_scannedcandidate_lsb 0
+#define xd_p_reg_mccid_scstrobesearchingcandidate   (*(volatile byte xdata *) 0xF199)
+#define    p_reg_mccid_scstrobesearchingcandidate   0xF199
+#define reg_mccid_scstrobesearchingcandidate_pos 0
+#define reg_mccid_scstrobesearchingcandidate_len 2
+#define reg_mccid_scstrobesearchingcandidate_lsb 0
+#define xd_p_reg_mccid_potentialcci (*(volatile byte xdata *) 0xF19A)
+#define    p_reg_mccid_potentialcci 0xF19A
+#define reg_mccid_potentialcci_pos 0
+#define reg_mccid_potentialcci_len 1
+#define reg_mccid_potentialcci_lsb 0
+#define xd_p_reg_mccid_cciftimertrigger (*(volatile byte xdata *) 0xF19B)
+#define    p_reg_mccid_cciftimertrigger 0xF19B
+#define reg_mccid_cciftimertrigger_pos 0
+#define reg_mccid_cciftimertrigger_len 1
+#define reg_mccid_cciftimertrigger_lsb 0
+#define xd_p_reg_mccid_ccitesting   (*(volatile byte xdata *) 0xF19C)
+#define    p_reg_mccid_ccitesting   0xF19C
+#define reg_mccid_ccitesting_pos 0
+#define reg_mccid_ccitesting_len 1
+#define reg_mccid_ccitesting_lsb 0
+#define xd_p_reg_mccid_defaultccilocatormissno  (*(volatile byte xdata *) 0xF19D)
+#define    p_reg_mccid_defaultccilocatormissno  0xF19D
+#define reg_mccid_defaultccilocatormissno_pos 0
+#define reg_mccid_defaultccilocatormissno_len 8
+#define reg_mccid_defaultccilocatormissno_lsb 0
+#define xd_p_reg_mccid_dagc1_use_despow (*(volatile byte xdata *) 0xF19E)
+#define    p_reg_mccid_dagc1_use_despow 0xF19E
+#define reg_mccid_dagc1_use_despow_pos 0
+#define reg_mccid_dagc1_use_despow_len 1
+#define reg_mccid_dagc1_use_despow_lsb 0
+#define xd_p_reg_mccid_scannedacifrequencybegin_7_0 (*(volatile byte xdata *) 0xF19F)
+#define    p_reg_mccid_scannedacifrequencybegin_7_0 0xF19F
+#define reg_mccid_scannedacifrequencybegin_7_0_pos 0
+#define reg_mccid_scannedacifrequencybegin_7_0_len 8
+#define reg_mccid_scannedacifrequencybegin_7_0_lsb 0
+#define xd_p_reg_mccid_scannedacifrequencybegin_13_8    (*(volatile byte xdata *) 0xF1A0)
+#define    p_reg_mccid_scannedacifrequencybegin_13_8    0xF1A0
+#define reg_mccid_scannedacifrequencybegin_13_8_pos 0
+#define reg_mccid_scannedacifrequencybegin_13_8_len 6
+#define reg_mccid_scannedacifrequencybegin_13_8_lsb 8
+#define xd_p_reg_mccid_scannedacifrequencyend_7_0   (*(volatile byte xdata *) 0xF1A1)
+#define    p_reg_mccid_scannedacifrequencyend_7_0   0xF1A1
+#define reg_mccid_scannedacifrequencyend_7_0_pos 0
+#define reg_mccid_scannedacifrequencyend_7_0_len 8
+#define reg_mccid_scannedacifrequencyend_7_0_lsb 0
+#define xd_p_reg_mccid_scannedacifrequencyend_13_8  (*(volatile byte xdata *) 0xF1A2)
+#define    p_reg_mccid_scannedacifrequencyend_13_8  0xF1A2
+#define reg_mccid_scannedacifrequencyend_13_8_pos 0
+#define reg_mccid_scannedacifrequencyend_13_8_len 6
+#define reg_mccid_scannedacifrequencyend_13_8_lsb 8
+#define xd_p_reg_bfs_fcw_7_0    (*(volatile byte xdata *) 0xF1A3)
+#define    p_reg_bfs_fcw_7_0    0xF1A3
+#define reg_bfs_fcw_7_0_pos 0
+#define reg_bfs_fcw_7_0_len 8
+#define reg_bfs_fcw_7_0_lsb 0
+#define xd_p_reg_bfs_fcw_15_8   (*(volatile byte xdata *) 0xF1A4)
+#define    p_reg_bfs_fcw_15_8   0xF1A4
+#define reg_bfs_fcw_15_8_pos 0
+#define reg_bfs_fcw_15_8_len 8
+#define reg_bfs_fcw_15_8_lsb 8
+#define xd_p_reg_bfs_fcw_22_16  (*(volatile byte xdata *) 0xF1A5)
+#define    p_reg_bfs_fcw_22_16  0xF1A5
+#define reg_bfs_fcw_22_16_pos 0
+#define reg_bfs_fcw_22_16_len 7
+#define reg_bfs_fcw_22_16_lsb 16
+#define xd_p_reg_cfoe_fcw_inv   (*(volatile byte xdata *) 0xF1A6)
+#define    p_reg_cfoe_fcw_inv   0xF1A6
+#define reg_cfoe_fcw_inv_pos 0
+#define reg_cfoe_fcw_inv_len 1
+#define reg_cfoe_fcw_inv_lsb 0
+#define xd_p_reg_bfs_0if    (*(volatile byte xdata *) 0xF1A7)
+#define    p_reg_bfs_0if    0xF1A7
+#define reg_bfs_0if_pos 0
+#define reg_bfs_0if_len 1
+#define reg_bfs_0if_lsb 0
+#define xd_p_reg_sadc_clk   (*(volatile byte xdata *) 0xF1A9)
+#define    p_reg_sadc_clk   0xF1A9
+#define reg_sadc_clk_pos 0
+#define reg_sadc_clk_len 1
+#define reg_sadc_clk_lsb 0
+#define xd_p_reg_sadc_tx    (*(volatile byte xdata *) 0xF1AA)
+#define    p_reg_sadc_tx    0xF1AA
+#define reg_sadc_tx_pos 0
+#define reg_sadc_tx_len 1
+#define reg_sadc_tx_lsb 0
+#define xd_p_reg_sadc_rx    (*(volatile byte xdata *) 0xF1AB)
+#define    p_reg_sadc_rx    0xF1AB
+#define reg_sadc_rx_pos 0
+#define reg_sadc_rx_len 1
+#define reg_sadc_rx_lsb 0
+#define xd_p_reg_sadc_cs    (*(volatile byte xdata *) 0xF1AC)
+#define    p_reg_sadc_cs    0xF1AC
+#define reg_sadc_cs_pos 0
+#define reg_sadc_cs_len 1
+#define reg_sadc_cs_lsb 0
+#define xd_p_reg_fix_fcw_7_0    (*(volatile byte xdata *) 0xF1AD)
+#define    p_reg_fix_fcw_7_0    0xF1AD
+#define reg_fix_fcw_7_0_pos 0
+#define reg_fix_fcw_7_0_len 8
+#define reg_fix_fcw_7_0_lsb 0
+#define xd_p_reg_fix_fcw_15_8   (*(volatile byte xdata *) 0xF1AE)
+#define    p_reg_fix_fcw_15_8   0xF1AE
+#define reg_fix_fcw_15_8_pos 0
+#define reg_fix_fcw_15_8_len 8
+#define reg_fix_fcw_15_8_lsb 8
+#define xd_p_reg_fix_fcw_22_16  (*(volatile byte xdata *) 0xF1AF)
+#define    p_reg_fix_fcw_22_16  0xF1AF
+#define reg_fix_fcw_22_16_pos 0
+#define reg_fix_fcw_22_16_len 7
+#define reg_fix_fcw_22_16_lsb 16
+#define xd_r_reg_bfs_fcw_offset_7_0 (*(volatile byte xdata *) 0xF1B0)
+#define    r_reg_bfs_fcw_offset_7_0 0xF1B0
+#define reg_bfs_fcw_offset_7_0_pos 0
+#define reg_bfs_fcw_offset_7_0_len 8
+#define reg_bfs_fcw_offset_7_0_lsb 0
+#define xd_r_reg_bfs_fcw_offset_15_8    (*(volatile byte xdata *) 0xF1B1)
+#define    r_reg_bfs_fcw_offset_15_8    0xF1B1
+#define reg_bfs_fcw_offset_15_8_pos 0
+#define reg_bfs_fcw_offset_15_8_len 8
+#define reg_bfs_fcw_offset_15_8_lsb 8
+#define xd_r_reg_bfs_fcw_offset_22_16   (*(volatile byte xdata *) 0xF1B2)
+#define    r_reg_bfs_fcw_offset_22_16   0xF1B2
+#define reg_bfs_fcw_offset_22_16_pos 0
+#define reg_bfs_fcw_offset_22_16_len 7
+#define reg_bfs_fcw_offset_22_16_lsb 16
+#define xd_r_bfs_fcw_q_7_0  (*(volatile byte xdata *) 0xF1B3)
+#define    r_bfs_fcw_q_7_0  0xF1B3
+#define bfs_fcw_q_7_0_pos 0
+#define bfs_fcw_q_7_0_len 8
+#define bfs_fcw_q_7_0_lsb 0
+#define xd_r_bfs_fcw_q_15_8 (*(volatile byte xdata *) 0xF1B4)
+#define    r_bfs_fcw_q_15_8 0xF1B4
+#define bfs_fcw_q_15_8_pos 0
+#define bfs_fcw_q_15_8_len 8
+#define bfs_fcw_q_15_8_lsb 8
+#define xd_r_bfs_fcw_q_22_16    (*(volatile byte xdata *) 0xF1B5)
+#define    r_bfs_fcw_q_22_16    0xF1B5
+#define bfs_fcw_q_22_16_pos 0
+#define bfs_fcw_q_22_16_len 7
+#define bfs_fcw_q_22_16_lsb 16
+#define xd_p_reg_dagc3_use_despow   (*(volatile byte xdata *) 0xF1B6)
+#define    p_reg_dagc3_use_despow   0xF1B6
+#define reg_dagc3_use_despow_pos 0
+#define reg_dagc3_use_despow_len 1
+#define reg_dagc3_use_despow_lsb 0
+#define xd_p_reg_dagc3_log_2_accumulate (*(volatile byte xdata *) 0xF1B7)
+#define    p_reg_dagc3_log_2_accumulate 0xF1B7
+#define reg_dagc3_log_2_accumulate_pos 0
+#define reg_dagc3_log_2_accumulate_len 5
+#define reg_dagc3_log_2_accumulate_lsb 0
+#define xd_p_reg_dagc3_desired_level_7_0    (*(volatile byte xdata *) 0xF1BC)
+#define    p_reg_dagc3_desired_level_7_0    0xF1BC
+#define reg_dagc3_desired_level_7_0_pos 0
+#define reg_dagc3_desired_level_7_0_len 8
+#define reg_dagc3_desired_level_7_0_lsb 0
+#define xd_p_reg_dagc3_desired_level_8  (*(volatile byte xdata *) 0xF1BD)
+#define    p_reg_dagc3_desired_level_8  0xF1BD
+#define reg_dagc3_desired_level_8_pos 0
+#define reg_dagc3_desired_level_8_len 1
+#define reg_dagc3_desired_level_8_lsb 8
+#define xd_p_reg_dagc3_apply_delay  (*(volatile byte xdata *) 0xF1BE)
+#define    p_reg_dagc3_apply_delay  0xF1BE
+#define reg_dagc3_apply_delay_pos 0
+#define reg_dagc3_apply_delay_len 7
+#define reg_dagc3_apply_delay_lsb 0
+#define xd_p_reg_dagc3_bp_scale (*(volatile byte xdata *) 0xF1BF)
+#define    p_reg_dagc3_bp_scale 0xF1BF
+#define reg_dagc3_bp_scale_pos 0
+#define reg_dagc3_bp_scale_len 3
+#define reg_dagc3_bp_scale_lsb 0
+#define xd_p_reg_dagc3_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF1C0)
+#define    p_reg_dagc3_in_sat_cnt_7_0   0xF1C0
+#define reg_dagc3_in_sat_cnt_7_0_pos 0
+#define reg_dagc3_in_sat_cnt_7_0_len 8
+#define reg_dagc3_in_sat_cnt_7_0_lsb 0
+#define xd_p_reg_dagc3_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF1C1)
+#define    p_reg_dagc3_in_sat_cnt_15_8  0xF1C1
+#define reg_dagc3_in_sat_cnt_15_8_pos 0
+#define reg_dagc3_in_sat_cnt_15_8_len 8
+#define reg_dagc3_in_sat_cnt_15_8_lsb 8
+#define xd_p_reg_dagc3_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF1C2)
+#define    p_reg_dagc3_in_sat_cnt_23_16 0xF1C2
+#define reg_dagc3_in_sat_cnt_23_16_pos 0
+#define reg_dagc3_in_sat_cnt_23_16_len 8
+#define reg_dagc3_in_sat_cnt_23_16_lsb 16
+#define xd_p_reg_dagc3_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF1C3)
+#define    p_reg_dagc3_in_sat_cnt_31_24 0xF1C3
+#define reg_dagc3_in_sat_cnt_31_24_pos 0
+#define reg_dagc3_in_sat_cnt_31_24_len 8
+#define reg_dagc3_in_sat_cnt_31_24_lsb 24
+#define xd_p_reg_dagc3_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF1C4)
+#define    p_reg_dagc3_out_sat_cnt_7_0  0xF1C4
+#define reg_dagc3_out_sat_cnt_7_0_pos 0
+#define reg_dagc3_out_sat_cnt_7_0_len 8
+#define reg_dagc3_out_sat_cnt_7_0_lsb 0
+#define xd_p_reg_dagc3_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF1C5)
+#define    p_reg_dagc3_out_sat_cnt_15_8 0xF1C5
+#define reg_dagc3_out_sat_cnt_15_8_pos 0
+#define reg_dagc3_out_sat_cnt_15_8_len 8
+#define reg_dagc3_out_sat_cnt_15_8_lsb 8
+#define xd_p_reg_dagc3_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF1C6)
+#define    p_reg_dagc3_out_sat_cnt_23_16    0xF1C6
+#define reg_dagc3_out_sat_cnt_23_16_pos 0
+#define reg_dagc3_out_sat_cnt_23_16_len 8
+#define reg_dagc3_out_sat_cnt_23_16_lsb 16
+#define xd_p_reg_dagc3_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF1C7)
+#define    p_reg_dagc3_out_sat_cnt_31_24    0xF1C7
+#define reg_dagc3_out_sat_cnt_31_24_pos 0
+#define reg_dagc3_out_sat_cnt_31_24_len 8
+#define reg_dagc3_out_sat_cnt_31_24_lsb 24
+#define xd_r_bfs_dagc3_multiplier_7_0   (*(volatile byte xdata *) 0xF1C8)
+#define    r_bfs_dagc3_multiplier_7_0   0xF1C8
+#define bfs_dagc3_multiplier_7_0_pos 0
+#define bfs_dagc3_multiplier_7_0_len 8
+#define bfs_dagc3_multiplier_7_0_lsb 0
+#define xd_r_bfs_dagc3_multiplier_15_8  (*(volatile byte xdata *) 0xF1C9)
+#define    r_bfs_dagc3_multiplier_15_8  0xF1C9
+#define bfs_dagc3_multiplier_15_8_pos 0
+#define bfs_dagc3_multiplier_15_8_len 8
+#define bfs_dagc3_multiplier_15_8_lsb 8
+#define xd_r_bfs_dagc3_right_shift_bits (*(volatile byte xdata *) 0xF1CA)
+#define    r_bfs_dagc3_right_shift_bits 0xF1CA
+#define bfs_dagc3_right_shift_bits_pos 0
+#define bfs_dagc3_right_shift_bits_len 4
+#define bfs_dagc3_right_shift_bits_lsb 0
+#define xd_p_reg_dagc3_fixed_gain_7_0   (*(volatile byte xdata *) 0xF1CB)
+#define    p_reg_dagc3_fixed_gain_7_0   0xF1CB
+#define reg_dagc3_fixed_gain_7_0_pos 0
+#define reg_dagc3_fixed_gain_7_0_len 8
+#define reg_dagc3_fixed_gain_7_0_lsb 0
+#define xd_p_reg_dagc3_fixed_gain_11_8  (*(volatile byte xdata *) 0xF1CC)
+#define    p_reg_dagc3_fixed_gain_11_8  0xF1CC
+#define reg_dagc3_fixed_gain_11_8_pos 0
+#define reg_dagc3_fixed_gain_11_8_len 4
+#define reg_dagc3_fixed_gain_11_8_lsb 8
+#define xd_p_reg_f_adc_7_0  (*(volatile byte xdata *) 0xF1CD)
+#define    p_reg_f_adc_7_0  0xF1CD
+#define reg_f_adc_7_0_pos 0
+#define reg_f_adc_7_0_len 8
+#define reg_f_adc_7_0_lsb 0
+#define xd_p_reg_f_adc_15_8 (*(volatile byte xdata *) 0xF1CE)
+#define    p_reg_f_adc_15_8 0xF1CE
+#define reg_f_adc_15_8_pos 0
+#define reg_f_adc_15_8_len 8
+#define reg_f_adc_15_8_lsb 8
+#define xd_p_reg_f_adc_23_16    (*(volatile byte xdata *) 0xF1CF)
+#define    p_reg_f_adc_23_16    0xF1CF
+#define reg_f_adc_23_16_pos 0
+#define reg_f_adc_23_16_len 8
+#define reg_f_adc_23_16_lsb 16
+#define xd_p_reg_fste_frac_step_size_7_0    (*(volatile byte xdata *) 0xF1D0)
+#define    p_reg_fste_frac_step_size_7_0    0xF1D0
+#define reg_fste_frac_step_size_7_0_pos 0
+#define reg_fste_frac_step_size_7_0_len 8
+#define reg_fste_frac_step_size_7_0_lsb 0
+#define xd_p_reg_fste_frac_step_size_15_8   (*(volatile byte xdata *) 0xF1D1)
+#define    p_reg_fste_frac_step_size_15_8   0xF1D1
+#define reg_fste_frac_step_size_15_8_pos 0
+#define reg_fste_frac_step_size_15_8_len 8
+#define reg_fste_frac_step_size_15_8_lsb 8
+#define xd_p_reg_fste_frac_step_size_19_16  (*(volatile byte xdata *) 0xF1D2)
+#define    p_reg_fste_frac_step_size_19_16  0xF1D2
+#define reg_fste_frac_step_size_19_16_pos 0
+#define reg_fste_frac_step_size_19_16_len 4
+#define reg_fste_frac_step_size_19_16_lsb 16
+#define xd_r_intp_mu_7_0    (*(volatile byte xdata *) 0xF1D3)
+#define    r_intp_mu_7_0    0xF1D3
+#define intp_mu_7_0_pos 0
+#define intp_mu_7_0_len 8
+#define intp_mu_7_0_lsb 0
+#define xd_r_intp_mu_15_8   (*(volatile byte xdata *) 0xF1D4)
+#define    r_intp_mu_15_8   0xF1D4
+#define intp_mu_15_8_pos 0
+#define intp_mu_15_8_len 8
+#define intp_mu_15_8_lsb 8
+#define xd_r_intp_mu_23_16  (*(volatile byte xdata *) 0xF1D5)
+#define    r_intp_mu_23_16  0xF1D5
+#define intp_mu_23_16_pos 0
+#define intp_mu_23_16_len 8
+#define intp_mu_23_16_lsb 16
+#define xd_r_intp_mu_25_24  (*(volatile byte xdata *) 0xF1D6)
+#define    r_intp_mu_25_24  0xF1D6
+#define intp_mu_25_24_pos 0
+#define intp_mu_25_24_len 2
+#define intp_mu_25_24_lsb 24
+#define xd_p_intp_muq_7_0   (*(volatile byte xdata *) 0xF1D7)
+#define    p_intp_muq_7_0   0xF1D7
+#define intp_muq_7_0_pos 0
+#define intp_muq_7_0_len 8
+#define intp_muq_7_0_lsb 0
+#define xd_p_intp_muq_15_8  (*(volatile byte xdata *) 0xF1D8)
+#define    p_intp_muq_15_8  0xF1D8
+#define intp_muq_15_8_pos 0
+#define intp_muq_15_8_len 8
+#define intp_muq_15_8_lsb 8
+#define xd_p_intp_muq_23_16 (*(volatile byte xdata *) 0xF1D9)
+#define    p_intp_muq_23_16 0xF1D9
+#define intp_muq_23_16_pos 0
+#define intp_muq_23_16_len 8
+#define intp_muq_23_16_lsb 16
+#define xd_p_reg_sfoe_inv   (*(volatile byte xdata *) 0xF1DA)
+#define    p_reg_sfoe_inv   0xF1DA
+#define reg_sfoe_inv_pos 0
+#define reg_sfoe_inv_len 1
+#define reg_sfoe_inv_lsb 0
+#define xd_p_intp_ext_en    (*(volatile byte xdata *) 0xF1DB)
+#define    p_intp_ext_en    0xF1DB
+#define intp_ext_en_pos 0
+#define intp_ext_en_len 1
+#define intp_ext_en_lsb 0
+#define xd_r_intp_ext_done  (*(volatile byte xdata *) 0xF1DC)
+#define    r_intp_ext_done  0xF1DC
+#define intp_ext_done_pos 0
+#define intp_ext_done_len 1
+#define intp_ext_done_lsb 0
+#define xd_p_intp_ext_in_7_0    (*(volatile byte xdata *) 0xF1DD)
+#define    p_intp_ext_in_7_0    0xF1DD
+#define intp_ext_in_7_0_pos 0
+#define intp_ext_in_7_0_len 8
+#define intp_ext_in_7_0_lsb 0
+#define xd_p_intp_ext_in_15_8   (*(volatile byte xdata *) 0xF1DE)
+#define    p_intp_ext_in_15_8   0xF1DE
+#define intp_ext_in_15_8_pos 0
+#define intp_ext_in_15_8_len 8
+#define intp_ext_in_15_8_lsb 8
+#define xd_p_intp_ext_in_23_16  (*(volatile byte xdata *) 0xF1DF)
+#define    p_intp_ext_in_23_16  0xF1DF
+#define intp_ext_in_23_16_pos 0
+#define intp_ext_in_23_16_len 8
+#define intp_ext_in_23_16_lsb 16
+#define xd_p_intp_ext_in_25_24  (*(volatile byte xdata *) 0xF1E0)
+#define    p_intp_ext_in_25_24  0xF1E0
+#define intp_ext_in_25_24_pos 0
+#define intp_ext_in_25_24_len 2
+#define intp_ext_in_25_24_lsb 24
+#define xd_r_intp_ext_out_7_0   (*(volatile byte xdata *) 0xF1E1)
+#define    r_intp_ext_out_7_0   0xF1E1
+#define intp_ext_out_7_0_pos 0
+#define intp_ext_out_7_0_len 8
+#define intp_ext_out_7_0_lsb 0
+#define xd_r_intp_ext_out_15_8  (*(volatile byte xdata *) 0xF1E2)
+#define    r_intp_ext_out_15_8  0xF1E2
+#define intp_ext_out_15_8_pos 0
+#define intp_ext_out_15_8_len 8
+#define intp_ext_out_15_8_lsb 8
+#define xd_r_intp_ext_out_23_16 (*(volatile byte xdata *) 0xF1E3)
+#define    r_intp_ext_out_23_16 0xF1E3
+#define intp_ext_out_23_16_pos 0
+#define intp_ext_out_23_16_len 8
+#define intp_ext_out_23_16_lsb 16
+#define xd_r_intp_ext_out_28_24 (*(volatile byte xdata *) 0xF1E4)
+#define    r_intp_ext_out_28_24 0xF1E4
+#define intp_ext_out_28_24_pos 0
+#define intp_ext_out_28_24_len 5
+#define intp_ext_out_28_24_lsb 24
+#define xd_p_reg_agc_rst    (*(volatile byte xdata *) 0xF1E5)
+#define    p_reg_agc_rst    0xF1E5
+#define reg_agc_rst_pos 0
+#define reg_agc_rst_len 1
+#define reg_agc_rst_lsb 0
+#define xd_p_rf_agc_en  (*(volatile byte xdata *) 0xF1E6)
+#define    p_rf_agc_en  0xF1E6
+#define rf_agc_en_pos 0
+#define rf_agc_en_len 1
+#define rf_agc_en_lsb 0
+#define xd_p_agc_lock   (*(volatile byte xdata *) 0xF1E7)
+#define    p_agc_lock   0xF1E7
+#define agc_lock_pos 0
+#define agc_lock_len 1
+#define agc_lock_lsb 0
+#define xd_p_reg_tinr_rst   (*(volatile byte xdata *) 0xF1E8)
+#define    p_reg_tinr_rst   0xF1E8
+#define reg_tinr_rst_pos 0
+#define reg_tinr_rst_len 1
+#define reg_tinr_rst_lsb 0
+#define xd_p_reg_tinr_en    (*(volatile byte xdata *) 0xF1E9)
+#define    p_reg_tinr_en    0xF1E9
+#define reg_tinr_en_pos 0
+#define reg_tinr_en_len 1
+#define reg_tinr_en_lsb 0
+#define xd_p_reg_bfs_en (*(volatile byte xdata *) 0xF1EA)
+#define    p_reg_bfs_en 0xF1EA
+#define reg_bfs_en_pos 0
+#define reg_bfs_en_len 1
+#define reg_bfs_en_lsb 0
+#define xd_p_reg_bfs_rst    (*(volatile byte xdata *) 0xF1EB)
+#define    p_reg_bfs_rst    0xF1EB
+#define reg_bfs_rst_pos 0
+#define reg_bfs_rst_len 1
+#define reg_bfs_rst_lsb 0
+#define xd_p_reg_bfs_byp    (*(volatile byte xdata *) 0xF1EC)
+#define    p_reg_bfs_byp    0xF1EC
+#define reg_bfs_byp_pos 0
+#define reg_bfs_byp_len 1
+#define reg_bfs_byp_lsb 0
+#define xd_p_intp_en    (*(volatile byte xdata *) 0xF1EF)
+#define    p_intp_en    0xF1EF
+#define intp_en_pos 0
+#define intp_en_len 1
+#define intp_en_lsb 0
+#define xd_p_intp_rst   (*(volatile byte xdata *) 0xF1F0)
+#define    p_intp_rst   0xF1F0
+#define intp_rst_pos 0
+#define intp_rst_len 1
+#define intp_rst_lsb 0
+#define xd_p_reg_p_acif_en  (*(volatile byte xdata *) 0xF1F2)
+#define    p_reg_p_acif_en  0xF1F2
+#define reg_p_acif_en_pos 0
+#define reg_p_acif_en_len 1
+#define reg_p_acif_en_lsb 0
+#define xd_p_reg_p_acif_rst (*(volatile byte xdata *) 0xF1F3)
+#define    p_reg_p_acif_rst 0xF1F3
+#define reg_p_acif_rst_pos 0
+#define reg_p_acif_rst_len 1
+#define reg_p_acif_rst_lsb 0
+#define xd_p_reg_p_acif_byp (*(volatile byte xdata *) 0xF1F4)
+#define    p_reg_p_acif_byp 0xF1F4
+#define reg_p_acif_byp_pos 0
+#define reg_p_acif_byp_len 1
+#define reg_p_acif_byp_lsb 0
+#define xd_p_dagc2_rst  (*(volatile byte xdata *) 0xF1F6)
+#define    p_dagc2_rst  0xF1F6
+#define dagc2_rst_pos 0
+#define dagc2_rst_len 1
+#define dagc2_rst_lsb 0
+#define xd_p_dagc2_en   (*(volatile byte xdata *) 0xF1F7)
+#define    p_dagc2_en   0xF1F7
+#define dagc2_en_pos 0
+#define dagc2_en_len 1
+#define dagc2_en_lsb 0
+#define xd_p_dagc2_mode (*(volatile byte xdata *) 0xF1F8)
+#define    p_dagc2_mode 0xF1F8
+#define dagc2_mode_pos 0
+#define dagc2_mode_len 2
+#define dagc2_mode_lsb 0
+#define xd_p_dagc2_done (*(volatile byte xdata *) 0xF1F9)
+#define    p_dagc2_done 0xF1F9
+#define dagc2_done_pos 0
+#define dagc2_done_len 1
+#define dagc2_done_lsb 0
+#define xd_p_dagc3_rst  (*(volatile byte xdata *) 0xF1FA)
+#define    p_dagc3_rst  0xF1FA
+#define dagc3_rst_pos 0
+#define dagc3_rst_len 1
+#define dagc3_rst_lsb 0
+#define xd_p_dagc3_en   (*(volatile byte xdata *) 0xF1FB)
+#define    p_dagc3_en   0xF1FB
+#define dagc3_en_pos 0
+#define dagc3_en_len 1
+#define dagc3_en_lsb 0
+#define xd_p_dagc3_mode (*(volatile byte xdata *) 0xF1FC)
+#define    p_dagc3_mode 0xF1FC
+#define dagc3_mode_pos 0
+#define dagc3_mode_len 2
+#define dagc3_mode_lsb 0
+#define xd_p_dagc3_done (*(volatile byte xdata *) 0xF1FD)
+#define    p_dagc3_done 0xF1FD
+#define dagc3_done_pos 0
+#define dagc3_done_len 1
+#define dagc3_done_lsb 0
+#define xd_p_reg_dagc2_desired_level_7_0    (*(volatile byte xdata *) 0xF202)
+#define    p_reg_dagc2_desired_level_7_0    0xF202
+#define reg_dagc2_desired_level_7_0_pos 0
+#define reg_dagc2_desired_level_7_0_len 8
+#define reg_dagc2_desired_level_7_0_lsb 0
+#define xd_p_reg_dagc2_desired_level_8  (*(volatile byte xdata *) 0xF203)
+#define    p_reg_dagc2_desired_level_8  0xF203
+#define reg_dagc2_desired_level_8_pos 0
+#define reg_dagc2_desired_level_8_len 1
+#define reg_dagc2_desired_level_8_lsb 8
+#define xd_p_reg_dagc2_apply_delay  (*(volatile byte xdata *) 0xF204)
+#define    p_reg_dagc2_apply_delay  0xF204
+#define reg_dagc2_apply_delay_pos 0
+#define reg_dagc2_apply_delay_len 7
+#define reg_dagc2_apply_delay_lsb 0
+#define xd_p_reg_dagc2_bypass_scale_ctl (*(volatile byte xdata *) 0xF205)
+#define    p_reg_dagc2_bypass_scale_ctl 0xF205
+#define reg_dagc2_bypass_scale_ctl_pos 0
+#define reg_dagc2_bypass_scale_ctl_len 3
+#define reg_dagc2_bypass_scale_ctl_lsb 0
+#define xd_p_reg_dagc2_programmable_shift2  (*(volatile byte xdata *) 0xF206)
+#define    p_reg_dagc2_programmable_shift2  0xF206
+#define reg_dagc2_programmable_shift2_pos 0
+#define reg_dagc2_programmable_shift2_len 8
+#define reg_dagc2_programmable_shift2_lsb 0
+#define xd_p_reg_dagc2_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF207)
+#define    p_reg_dagc2_in_sat_cnt_7_0   0xF207
+#define reg_dagc2_in_sat_cnt_7_0_pos 0
+#define reg_dagc2_in_sat_cnt_7_0_len 8
+#define reg_dagc2_in_sat_cnt_7_0_lsb 0
+#define xd_p_reg_dagc2_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF208)
+#define    p_reg_dagc2_in_sat_cnt_15_8  0xF208
+#define reg_dagc2_in_sat_cnt_15_8_pos 0
+#define reg_dagc2_in_sat_cnt_15_8_len 8
+#define reg_dagc2_in_sat_cnt_15_8_lsb 8
+#define xd_p_reg_dagc2_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF209)
+#define    p_reg_dagc2_in_sat_cnt_23_16 0xF209
+#define reg_dagc2_in_sat_cnt_23_16_pos 0
+#define reg_dagc2_in_sat_cnt_23_16_len 8
+#define reg_dagc2_in_sat_cnt_23_16_lsb 16
+#define xd_p_reg_dagc2_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF20A)
+#define    p_reg_dagc2_in_sat_cnt_31_24 0xF20A
+#define reg_dagc2_in_sat_cnt_31_24_pos 0
+#define reg_dagc2_in_sat_cnt_31_24_len 8
+#define reg_dagc2_in_sat_cnt_31_24_lsb 24
+#define xd_p_reg_dagc2_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF20B)
+#define    p_reg_dagc2_out_sat_cnt_7_0  0xF20B
+#define reg_dagc2_out_sat_cnt_7_0_pos 0
+#define reg_dagc2_out_sat_cnt_7_0_len 8
+#define reg_dagc2_out_sat_cnt_7_0_lsb 0
+#define xd_p_reg_dagc2_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF20C)
+#define    p_reg_dagc2_out_sat_cnt_15_8 0xF20C
+#define reg_dagc2_out_sat_cnt_15_8_pos 0
+#define reg_dagc2_out_sat_cnt_15_8_len 8
+#define reg_dagc2_out_sat_cnt_15_8_lsb 8
+#define xd_p_reg_dagc2_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF20D)
+#define    p_reg_dagc2_out_sat_cnt_23_16    0xF20D
+#define reg_dagc2_out_sat_cnt_23_16_pos 0
+#define reg_dagc2_out_sat_cnt_23_16_len 8
+#define reg_dagc2_out_sat_cnt_23_16_lsb 16
+#define xd_p_reg_dagc2_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF20E)
+#define    p_reg_dagc2_out_sat_cnt_31_24    0xF20E
+#define reg_dagc2_out_sat_cnt_31_24_pos 0
+#define reg_dagc2_out_sat_cnt_31_24_len 8
+#define reg_dagc2_out_sat_cnt_31_24_lsb 24
+#define xd_r_reg_dagc2_multiplier_7_0   (*(volatile byte xdata *) 0xF20F)
+#define    r_reg_dagc2_multiplier_7_0   0xF20F
+#define reg_dagc2_multiplier_7_0_pos 0
+#define reg_dagc2_multiplier_7_0_len 8
+#define reg_dagc2_multiplier_7_0_lsb 0
+#define xd_r_reg_dagc2_multiplier_15_8  (*(volatile byte xdata *) 0xF210)
+#define    r_reg_dagc2_multiplier_15_8  0xF210
+#define reg_dagc2_multiplier_15_8_pos 0
+#define reg_dagc2_multiplier_15_8_len 8
+#define reg_dagc2_multiplier_15_8_lsb 8
+#define xd_r_reg_dagc2_right_shift_bits (*(volatile byte xdata *) 0xF211)
+#define    r_reg_dagc2_right_shift_bits 0xF211
+#define reg_dagc2_right_shift_bits_pos 0
+#define reg_dagc2_right_shift_bits_len 4
+#define reg_dagc2_right_shift_bits_lsb 0
+#define xd_p_reg_dagc2_smbuf_err    (*(volatile byte xdata *) 0xF212)
+#define    p_reg_dagc2_smbuf_err    0xF212
+#define reg_dagc2_smbuf_err_pos 0
+#define reg_dagc2_smbuf_err_len 1
+#define reg_dagc2_smbuf_err_lsb 0
+#define xd_p_reg_dagc2_cplxconj (*(volatile byte xdata *) 0xF213)
+#define    p_reg_dagc2_cplxconj 0xF213
+#define reg_dagc2_cplxconj_pos 0
+#define reg_dagc2_cplxconj_len 1
+#define reg_dagc2_cplxconj_lsb 0
+#define xd_p_reg_dagc2_use_despow   (*(volatile byte xdata *) 0xF214)
+#define    p_reg_dagc2_use_despow   0xF214
+#define reg_dagc2_use_despow_pos 0
+#define reg_dagc2_use_despow_len 1
+#define reg_dagc2_use_despow_lsb 0
+#define xd_p_reg_dagc2_log_2_accumulate (*(volatile byte xdata *) 0xF215)
+#define    p_reg_dagc2_log_2_accumulate 0xF215
+#define reg_dagc2_log_2_accumulate_pos 0
+#define reg_dagc2_log_2_accumulate_len 5
+#define reg_dagc2_log_2_accumulate_lsb 0
+#define xd_r_dagc2_dca_gain (*(volatile byte xdata *) 0xF216)
+#define    r_dagc2_dca_gain 0xF216
+#define dagc2_dca_gain_pos 0
+#define dagc2_dca_gain_len 8
+#define dagc2_dca_gain_lsb 0
+#define xd_p_reg_dca_gain_offset    (*(volatile byte xdata *) 0xF217)
+#define    p_reg_dca_gain_offset    0xF217
+#define reg_dca_gain_offset_pos 0
+#define reg_dca_gain_offset_len 8
+#define reg_dca_gain_offset_lsb 0
+#define xd_p_reg_dagc2_FG_mode  (*(volatile byte xdata *) 0xF218)
+#define    p_reg_dagc2_FG_mode  0xF218
+#define reg_dagc2_FG_mode_pos 0
+#define reg_dagc2_FG_mode_len 1
+#define reg_dagc2_FG_mode_lsb 0
+#define xd_p_reg_dagc2_fixed_gain_7_0   (*(volatile byte xdata *) 0xF219)
+#define    p_reg_dagc2_fixed_gain_7_0   0xF219
+#define reg_dagc2_fixed_gain_7_0_pos 0
+#define reg_dagc2_fixed_gain_7_0_len 8
+#define reg_dagc2_fixed_gain_7_0_lsb 0
+#define xd_p_reg_dagc2_fixed_gain_11_8  (*(volatile byte xdata *) 0xF21A)
+#define    p_reg_dagc2_fixed_gain_11_8  0xF21A
+#define reg_dagc2_fixed_gain_11_8_pos 0
+#define reg_dagc2_fixed_gain_11_8_len 4
+#define reg_dagc2_fixed_gain_11_8_lsb 8
+#define xd_p_reg_td_debug_7_0   (*(volatile byte xdata *) 0xF21B)
+#define    p_reg_td_debug_7_0   0xF21B
+#define reg_td_debug_7_0_pos 0
+#define reg_td_debug_7_0_len 8
+#define reg_td_debug_7_0_lsb 0
+#define xd_p_reg_td_debug_15_8  (*(volatile byte xdata *) 0xF21C)
+#define    p_reg_td_debug_15_8  0xF21C
+#define reg_td_debug_15_8_pos 0
+#define reg_td_debug_15_8_len 8
+#define reg_td_debug_15_8_lsb 8
+#define xd_p_reg_td_debug_23_16 (*(volatile byte xdata *) 0xF21D)
+#define    p_reg_td_debug_23_16 0xF21D
+#define reg_td_debug_23_16_pos 0
+#define reg_td_debug_23_16_len 8
+#define reg_td_debug_23_16_lsb 16
+#define xd_p_reg_td_debug_30_24 (*(volatile byte xdata *) 0xF21E)
+#define    p_reg_td_debug_30_24 0xF21E
+#define reg_td_debug_30_24_pos 0
+#define reg_td_debug_30_24_len 7
+#define reg_td_debug_30_24_lsb 24
+#define xd_g_reg_tpsd_txmod (*(volatile byte xdata *) 0xF900)
+#define    g_reg_tpsd_txmod 0xF900
+#define reg_tpsd_txmod_pos 0
+#define reg_tpsd_txmod_len 2
+#define reg_tpsd_txmod_lsb 0
+#define xd_g_reg_tpsd_gi    (*(volatile byte xdata *) 0xF901)
+#define    g_reg_tpsd_gi    0xF901
+#define reg_tpsd_gi_pos 0
+#define reg_tpsd_gi_len 2
+#define reg_tpsd_gi_lsb 0
+#define xd_g_reg_tpsd_hier  (*(volatile byte xdata *) 0xF902)
+#define    g_reg_tpsd_hier  0xF902
+#define reg_tpsd_hier_pos 0
+#define reg_tpsd_hier_len 3
+#define reg_tpsd_hier_lsb 0
+#define xd_g_reg_tpsd_const (*(volatile byte xdata *) 0xF903)
+#define    g_reg_tpsd_const 0xF903
+#define reg_tpsd_const_pos 0
+#define reg_tpsd_const_len 2
+#define reg_tpsd_const_lsb 0
+#define xd_g_reg_bw (*(volatile byte xdata *) 0xF904)
+#define    g_reg_bw 0xF904
+#define reg_bw_pos 0
+#define reg_bw_len 2
+#define reg_bw_lsb 0
+#define xd_g_reg_dec_pri    (*(volatile byte xdata *) 0xF905)
+#define    g_reg_dec_pri    0xF905
+#define reg_dec_pri_pos 0
+#define reg_dec_pri_len 1
+#define reg_dec_pri_lsb 0
+#define xd_g_reg_tpsd_hpcr  (*(volatile byte xdata *) 0xF906)
+#define    g_reg_tpsd_hpcr  0xF906
+#define reg_tpsd_hpcr_pos 0
+#define reg_tpsd_hpcr_len 3
+#define reg_tpsd_hpcr_lsb 0
+#define xd_g_reg_tpsd_lpcr  (*(volatile byte xdata *) 0xF907)
+#define    g_reg_tpsd_lpcr  0xF907
+#define reg_tpsd_lpcr_pos 0
+#define reg_tpsd_lpcr_len 3
+#define reg_tpsd_lpcr_lsb 0
+#define xd_g_reg_tpsd_indep (*(volatile byte xdata *) 0xF908)
+#define    g_reg_tpsd_indep 0xF908
+#define reg_tpsd_indep_pos 0
+#define reg_tpsd_indep_len 1
+#define reg_tpsd_indep_lsb 0
+#define xd_g_reg_tpsd_tslice    (*(volatile byte xdata *) 0xF909)
+#define    g_reg_tpsd_tslice    0xF909
+#define reg_tpsd_tslice_pos 0
+#define reg_tpsd_tslice_len 1
+#define reg_tpsd_tslice_lsb 0
+#define xd_g_reg_tpsd_mpefec    (*(volatile byte xdata *) 0xF90A)
+#define    g_reg_tpsd_mpefec    0xF90A
+#define reg_tpsd_mpefec_pos 0
+#define reg_tpsd_mpefec_len 1
+#define reg_tpsd_mpefec_lsb 0
+#define xd_g_reg_sntc_en    (*(volatile byte xdata *) 0xF90B)
+#define    g_reg_sntc_en    0xF90B
+#define reg_sntc_en_pos 0
+#define reg_sntc_en_len 1
+#define reg_sntc_en_lsb 0
+#define xd_g_reg_intp_sys_div   (*(volatile byte xdata *) 0xF90C)
+#define    g_reg_intp_sys_div   0xF90C
+#define reg_intp_sys_div_pos 0
+#define reg_intp_sys_div_len 1
+#define reg_intp_sys_div_lsb 0
+#define xd_g_reg_clk_sntc_sel   (*(volatile byte xdata *) 0xF90D)
+#define    g_reg_clk_sntc_sel   0xF90D
+#define reg_clk_sntc_sel_pos 0
+#define reg_clk_sntc_sel_len 3
+#define reg_clk_sntc_sel_lsb 0
+#define xd_g_reg_clk_sys40  (*(volatile byte xdata *) 0xF90E)
+#define    g_reg_clk_sys40  0xF90E
+#define reg_clk_sys40_pos 0
+#define reg_clk_sys40_len 1
+#define reg_clk_sys40_lsb 0
+#define xd_g_reg_intp_sys_polarity  (*(volatile byte xdata *) 0xF90F)
+#define    g_reg_intp_sys_polarity  0xF90F
+#define reg_intp_sys_polarity_pos 0
+#define reg_intp_sys_polarity_len 1
+#define reg_intp_sys_polarity_lsb 0
+#define xd_g_reg_intp_sys_sc_7_0    (*(volatile byte xdata *) 0xF910)
+#define    g_reg_intp_sys_sc_7_0    0xF910
+#define reg_intp_sys_sc_7_0_pos 0
+#define reg_intp_sys_sc_7_0_len 8
+#define reg_intp_sys_sc_7_0_lsb 0
+#define xd_g_reg_intp_sys_sc_15_8   (*(volatile byte xdata *) 0xF911)
+#define    g_reg_intp_sys_sc_15_8   0xF911
+#define reg_intp_sys_sc_15_8_pos 0
+#define reg_intp_sys_sc_15_8_len 8
+#define reg_intp_sys_sc_15_8_lsb 8
+#define xd_g_reg_intp_sys_sc_23_16  (*(volatile byte xdata *) 0xF912)
+#define    g_reg_intp_sys_sc_23_16  0xF912
+#define reg_intp_sys_sc_23_16_pos 0
+#define reg_intp_sys_sc_23_16_len 8
+#define reg_intp_sys_sc_23_16_lsb 16
+#define xd_g_reg_intp_sys_sc_26_24  (*(volatile byte xdata *) 0xF913)
+#define    g_reg_intp_sys_sc_26_24  0xF913
+#define reg_intp_sys_sc_26_24_pos 0
+#define reg_intp_sys_sc_26_24_len 3
+#define reg_intp_sys_sc_26_24_lsb 24
+#define xd_g_reg_ofsm_clk   (*(volatile byte xdata *) 0xF914)
+#define    g_reg_ofsm_clk   0xF914
+#define reg_ofsm_clk_pos 0
+#define reg_ofsm_clk_len 3
+#define reg_ofsm_clk_lsb 0
+#define xd_g_reg_fclk_cfg   (*(volatile byte xdata *) 0xF915)
+#define    g_reg_fclk_cfg   0xF915
+#define reg_fclk_cfg_pos 0
+#define reg_fclk_cfg_len 1
+#define reg_fclk_cfg_lsb 0
+#define xd_g_reg_fclk_idi   (*(volatile byte xdata *) 0xF916)
+#define    g_reg_fclk_idi   0xF916
+#define reg_fclk_idi_pos 0
+#define reg_fclk_idi_len 1
+#define reg_fclk_idi_lsb 0
+#define xd_g_reg_fclk_odi   (*(volatile byte xdata *) 0xF917)
+#define    g_reg_fclk_odi   0xF917
+#define reg_fclk_odi_pos 0
+#define reg_fclk_odi_len 1
+#define reg_fclk_odi_lsb 0
+#define xd_g_reg_fclk_rsd   (*(volatile byte xdata *) 0xF918)
+#define    g_reg_fclk_rsd   0xF918
+#define reg_fclk_rsd_pos 0
+#define reg_fclk_rsd_len 1
+#define reg_fclk_rsd_lsb 0
+#define xd_g_reg_fclk_vtb   (*(volatile byte xdata *) 0xF919)
+#define    g_reg_fclk_vtb   0xF919
+#define reg_fclk_vtb_pos 0
+#define reg_fclk_vtb_len 1
+#define reg_fclk_vtb_lsb 0
+#define xd_g_reg_fclk_cste  (*(volatile byte xdata *) 0xF91A)
+#define    g_reg_fclk_cste  0xF91A
+#define reg_fclk_cste_pos 0
+#define reg_fclk_cste_len 1
+#define reg_fclk_cste_lsb 0
+#define xd_g_reg_fclk_mp2if (*(volatile byte xdata *) 0xF91B)
+#define    g_reg_fclk_mp2if 0xF91B
+#define reg_fclk_mp2if_pos 0
+#define reg_fclk_mp2if_len 1
+#define reg_fclk_mp2if_lsb 0
+#define xd_p_reg_adcout_sync    (*(volatile byte xdata *) 0xFA00)
+#define    p_reg_adcout_sync    0xFA00
+#define reg_adcout_sync_pos 0
+#define reg_adcout_sync_len 1
+#define reg_adcout_sync_lsb 0
+#define xd_p_reg_dagc2o_edge1   (*(volatile byte xdata *) 0xFA01)
+#define    p_reg_dagc2o_edge1   0xFA01
+#define reg_dagc2o_edge1_pos 0
+#define reg_dagc2o_edge1_len 1
+#define reg_dagc2o_edge1_lsb 0
+#define xd_p_reg_dagc2o_edge0   (*(volatile byte xdata *) 0xFA02)
+#define    p_reg_dagc2o_edge0   0xFA02
+#define reg_dagc2o_edge0_pos 0
+#define reg_dagc2o_edge0_len 1
+#define reg_dagc2o_edge0_lsb 0
+#define xd_p_reg_second_rom_on  (*(volatile byte xdata *) 0xFA03)
+#define    p_reg_second_rom_on  0xFA03
+#define reg_second_rom_on_pos 0
+#define reg_second_rom_on_len 1
+#define reg_second_rom_on_lsb 0
+#define xd_p_reg_bypass_host2tuner  (*(volatile byte xdata *) 0xFA04)
+#define    p_reg_bypass_host2tuner  0xFA04
+#define reg_bypass_host2tuner_pos 0
+#define reg_bypass_host2tuner_len 1
+#define reg_bypass_host2tuner_lsb 0
+#endif
+// biu_reg.h 6-27-2007
+// gen_biu Ver 1.0 generated by tienchi
+#define xd_p_cfoe_NS_coeff1_7_0 (*(volatile byte xdata *) 0xF400)
+#define    p_cfoe_NS_coeff1_7_0 0xF400
+#define cfoe_NS_coeff1_7_0_pos 0
+#define cfoe_NS_coeff1_7_0_len 8
+#define cfoe_NS_coeff1_7_0_lsb 0
+#define xd_p_cfoe_NS_coeff1_15_8    (*(volatile byte xdata *) 0xF401)
+#define    p_cfoe_NS_coeff1_15_8    0xF401
+#define cfoe_NS_coeff1_15_8_pos 0
+#define cfoe_NS_coeff1_15_8_len 8
+#define cfoe_NS_coeff1_15_8_lsb 8
+#define xd_p_cfoe_NS_coeff1_23_16   (*(volatile byte xdata *) 0xF402)
+#define    p_cfoe_NS_coeff1_23_16   0xF402
+#define cfoe_NS_coeff1_23_16_pos 0
+#define cfoe_NS_coeff1_23_16_len 8
+#define cfoe_NS_coeff1_23_16_lsb 16
+#define xd_p_cfoe_NS_coeff1_25_24   (*(volatile byte xdata *) 0xF403)
+#define    p_cfoe_NS_coeff1_25_24   0xF403
+#define cfoe_NS_coeff1_25_24_pos 0
+#define cfoe_NS_coeff1_25_24_len 2
+#define cfoe_NS_coeff1_25_24_lsb 24
+#define xd_p_cfoe_NS_coeff2_7_0 (*(volatile byte xdata *) 0xF404)
+#define    p_cfoe_NS_coeff2_7_0 0xF404
+#define cfoe_NS_coeff2_7_0_pos 0
+#define cfoe_NS_coeff2_7_0_len 8
+#define cfoe_NS_coeff2_7_0_lsb 0
+#define xd_p_cfoe_NS_coeff2_15_8    (*(volatile byte xdata *) 0xF405)
+#define    p_cfoe_NS_coeff2_15_8    0xF405
+#define cfoe_NS_coeff2_15_8_pos 0
+#define cfoe_NS_coeff2_15_8_len 8
+#define cfoe_NS_coeff2_15_8_lsb 8
+#define xd_p_cfoe_NS_coeff2_23_16   (*(volatile byte xdata *) 0xF406)
+#define    p_cfoe_NS_coeff2_23_16   0xF406
+#define cfoe_NS_coeff2_23_16_pos 0
+#define cfoe_NS_coeff2_23_16_len 8
+#define cfoe_NS_coeff2_23_16_lsb 16
+#define xd_p_cfoe_NS_coeff2_24  (*(volatile byte xdata *) 0xF407)
+#define    p_cfoe_NS_coeff2_24  0xF407
+#define cfoe_NS_coeff2_24_pos 0
+#define cfoe_NS_coeff2_24_len 1
+#define cfoe_NS_coeff2_24_lsb 24
+#define xd_p_cfoe_lf_c1_7_0 (*(volatile byte xdata *) 0xF408)
+#define    p_cfoe_lf_c1_7_0 0xF408
+#define cfoe_lf_c1_7_0_pos 0
+#define cfoe_lf_c1_7_0_len 8
+#define cfoe_lf_c1_7_0_lsb 0
+#define xd_p_cfoe_lf_c1_9_8 (*(volatile byte xdata *) 0xF409)
+#define    p_cfoe_lf_c1_9_8 0xF409
+#define cfoe_lf_c1_9_8_pos 0
+#define cfoe_lf_c1_9_8_len 2
+#define cfoe_lf_c1_9_8_lsb 8
+#define xd_p_cfoe_lf_c2_7_0 (*(volatile byte xdata *) 0xF40A)
+#define    p_cfoe_lf_c2_7_0 0xF40A
+#define cfoe_lf_c2_7_0_pos 0
+#define cfoe_lf_c2_7_0_len 8
+#define cfoe_lf_c2_7_0_lsb 0
+#define xd_p_cfoe_lf_c2_9_8 (*(volatile byte xdata *) 0xF40B)
+#define    p_cfoe_lf_c2_9_8 0xF40B
+#define cfoe_lf_c2_9_8_pos 0
+#define cfoe_lf_c2_9_8_len 2
+#define cfoe_lf_c2_9_8_lsb 8
+#define xd_p_cfoe_ifod_7_0  (*(volatile byte xdata *) 0xF40C)
+#define    p_cfoe_ifod_7_0  0xF40C
+#define cfoe_ifod_7_0_pos 0
+#define cfoe_ifod_7_0_len 8
+#define cfoe_ifod_7_0_lsb 0
+#define xd_p_cfoe_ifod_10_8 (*(volatile byte xdata *) 0xF40D)
+#define    p_cfoe_ifod_10_8 0xF40D
+#define cfoe_ifod_10_8_pos 0
+#define cfoe_ifod_10_8_len 3
+#define cfoe_ifod_10_8_lsb 8
+#define xd_p_cfoe_Divg_ctr_th   (*(volatile byte xdata *) 0xF40E)
+#define    p_cfoe_Divg_ctr_th   0xF40E
+#define cfoe_Divg_ctr_th_pos 0
+#define cfoe_Divg_ctr_th_len 4
+#define cfoe_Divg_ctr_th_lsb 0
+#define xd_p_cfoe_FOT_divg_th   (*(volatile byte xdata *) 0xF40F)
+#define    p_cfoe_FOT_divg_th   0xF40F
+#define cfoe_FOT_divg_th_pos 0
+#define cfoe_FOT_divg_th_len 8
+#define cfoe_FOT_divg_th_lsb 0
+#define xd_p_cfoe_FOT_cnvg_th   (*(volatile byte xdata *) 0xF410)
+#define    p_cfoe_FOT_cnvg_th   0xF410
+#define cfoe_FOT_cnvg_th_pos 0
+#define cfoe_FOT_cnvg_th_len 8
+#define cfoe_FOT_cnvg_th_lsb 0
+#define xd_p_reg_cfoe_offset_7_0    (*(volatile byte xdata *) 0xF411)
+#define    p_reg_cfoe_offset_7_0    0xF411
+#define reg_cfoe_offset_7_0_pos 0
+#define reg_cfoe_offset_7_0_len 8
+#define reg_cfoe_offset_7_0_lsb 0
+#define xd_p_reg_cfoe_offset_10_8   (*(volatile byte xdata *) 0xF412)
+#define    p_reg_cfoe_offset_10_8   0xF412
+#define reg_cfoe_offset_10_8_pos 0
+#define reg_cfoe_offset_10_8_len 3
+#define reg_cfoe_offset_10_8_lsb 8
+#define xd_p_reg_cfoe_ifoe_sign_corr    (*(volatile byte xdata *) 0xF413)
+#define    p_reg_cfoe_ifoe_sign_corr    0xF413
+#define reg_cfoe_ifoe_sign_corr_pos 0
+#define reg_cfoe_ifoe_sign_corr_len 1
+#define reg_cfoe_ifoe_sign_corr_lsb 0
+#define xd_p_cfoe_FOT_pullin_cnt_clr    (*(volatile byte xdata *) 0xF414)
+#define    p_cfoe_FOT_pullin_cnt_clr    0xF414
+#define cfoe_FOT_pullin_cnt_clr_pos 0
+#define cfoe_FOT_pullin_cnt_clr_len 1
+#define cfoe_FOT_pullin_cnt_clr_lsb 0
+#define xd_p_cfoe_FOT_spec_inv  (*(volatile byte xdata *) 0xF415)
+#define    p_cfoe_FOT_spec_inv  0xF415
+#define cfoe_FOT_spec_inv_pos 0
+#define cfoe_FOT_spec_inv_len 1
+#define cfoe_FOT_spec_inv_lsb 0
+#define xd_p_cfoe_FOT_pullin_ctr_th (*(volatile byte xdata *) 0xF416)
+#define    p_cfoe_FOT_pullin_ctr_th 0xF416
+#define cfoe_FOT_pullin_ctr_th_pos 0
+#define cfoe_FOT_pullin_ctr_th_len 4
+#define cfoe_FOT_pullin_ctr_th_lsb 0
+#define xd_p_cfoe_FOT_sf_ctr_th (*(volatile byte xdata *) 0xF417)
+#define    p_cfoe_FOT_sf_ctr_th 0xF417
+#define cfoe_FOT_sf_ctr_th_pos 0
+#define cfoe_FOT_sf_ctr_th_len 4
+#define cfoe_FOT_sf_ctr_th_lsb 0
+#define xd_p_cfoe_FOT_pullin_th (*(volatile byte xdata *) 0xF418)
+#define    p_cfoe_FOT_pullin_th 0xF418
+#define cfoe_FOT_pullin_th_pos 0
+#define cfoe_FOT_pullin_th_len 8
+#define cfoe_FOT_pullin_th_lsb 0
+#define xd_p_cfoe_FOT_kalman_cnt    (*(volatile byte xdata *) 0xF419)
+#define    p_cfoe_FOT_kalman_cnt    0xF419
+#define cfoe_FOT_kalman_cnt_pos 0
+#define cfoe_FOT_kalman_cnt_len 4
+#define cfoe_FOT_kalman_cnt_lsb 0
+#define xd_p_cfoe_FOT_fsm_info  (*(volatile byte xdata *) 0xF41A)
+#define    p_cfoe_FOT_fsm_info  0xF41A
+#define cfoe_FOT_fsm_info_pos 0
+#define cfoe_FOT_fsm_info_len 4
+#define cfoe_FOT_fsm_info_lsb 0
+#define xd_r_cfoe_FOT_pullin_cnt    (*(volatile byte xdata *) 0xF41B)
+#define    r_cfoe_FOT_pullin_cnt    0xF41B
+#define cfoe_FOT_pullin_cnt_pos 0
+#define cfoe_FOT_pullin_cnt_len 4
+#define cfoe_FOT_pullin_cnt_lsb 0
+#define xd_r_cfoe_FOT_sf_cnt    (*(volatile byte xdata *) 0xF41C)
+#define    r_cfoe_FOT_sf_cnt    0xF41C
+#define cfoe_FOT_sf_cnt_pos 0
+#define cfoe_FOT_sf_cnt_len 4
+#define cfoe_FOT_sf_cnt_lsb 0
+#define xd_r_reg_r_cfoe_ifoe_ifo_metric (*(volatile byte xdata *) 0xF41D)
+#define    r_reg_r_cfoe_ifoe_ifo_metric 0xF41D
+#define reg_r_cfoe_ifoe_ifo_metric_pos 0
+#define reg_r_cfoe_ifoe_ifo_metric_len 8
+#define reg_r_cfoe_ifoe_ifo_metric_lsb 0
+#define xd_r_reg_r_cfoe_ifoe_cos2num_7_0    (*(volatile byte xdata *) 0xF41E)
+#define    r_reg_r_cfoe_ifoe_cos2num_7_0    0xF41E
+#define reg_r_cfoe_ifoe_cos2num_7_0_pos 0
+#define reg_r_cfoe_ifoe_cos2num_7_0_len 8
+#define reg_r_cfoe_ifoe_cos2num_7_0_lsb 0
+#define xd_r_reg_r_cfoe_ifoe_cos2num_15_8   (*(volatile byte xdata *) 0xF41F)
+#define    r_reg_r_cfoe_ifoe_cos2num_15_8   0xF41F
+#define reg_r_cfoe_ifoe_cos2num_15_8_pos 0
+#define reg_r_cfoe_ifoe_cos2num_15_8_len 8
+#define reg_r_cfoe_ifoe_cos2num_15_8_lsb 8
+#define xd_r_reg_r_cfoe_ifoe_cos2num_19_16  (*(volatile byte xdata *) 0xF420)
+#define    r_reg_r_cfoe_ifoe_cos2num_19_16  0xF420
+#define reg_r_cfoe_ifoe_cos2num_19_16_pos 0
+#define reg_r_cfoe_ifoe_cos2num_19_16_len 4
+#define reg_r_cfoe_ifoe_cos2num_19_16_lsb 16
+#define xd_p_ste_Nu (*(volatile byte xdata *) 0xF460)
+#define    p_ste_Nu 0xF460
+#define ste_Nu_pos 0
+#define ste_Nu_len 3
+#define ste_Nu_lsb 0
+#define xd_p_ste_GI (*(volatile byte xdata *) 0xF461)
+#define    p_ste_GI 0xF461
+#define ste_GI_pos 0
+#define ste_GI_len 3
+#define ste_GI_lsb 0
+#define xd_p_ste_symbol_num (*(volatile byte xdata *) 0xF463)
+#define    p_ste_symbol_num 0xF463
+#define ste_symbol_num_pos 0
+#define ste_symbol_num_len 3
+#define ste_symbol_num_lsb 0
+#define xd_p_ste_sample_num (*(volatile byte xdata *) 0xF464)
+#define    p_ste_sample_num 0xF464
+#define ste_sample_num_pos 0
+#define ste_sample_num_len 2
+#define ste_sample_num_lsb 0
+#define xd_p_ste_symbol_num_4K  (*(volatile byte xdata *) 0xF465)
+#define    p_ste_symbol_num_4K  0xF465
+#define ste_symbol_num_4K_pos 0
+#define ste_symbol_num_4K_len 3
+#define ste_symbol_num_4K_lsb 0
+#define xd_p_ste_FFT_offset_7_0 (*(volatile byte xdata *) 0xF466)
+#define    p_ste_FFT_offset_7_0 0xF466
+#define ste_FFT_offset_7_0_pos 0
+#define ste_FFT_offset_7_0_len 8
+#define ste_FFT_offset_7_0_lsb 0
+#define xd_p_ste_FFT_offset_13_8    (*(volatile byte xdata *) 0xF467)
+#define    p_ste_FFT_offset_13_8    0xF467
+#define ste_FFT_offset_13_8_pos 0
+#define ste_FFT_offset_13_8_len 6
+#define ste_FFT_offset_13_8_lsb 8
+#define xd_p_ste_sample_num_4K  (*(volatile byte xdata *) 0xF468)
+#define    p_ste_sample_num_4K  0xF468
+#define ste_sample_num_4K_pos 0
+#define ste_sample_num_4K_len 2
+#define ste_sample_num_4K_lsb 0
+#define xd_p_ste_adv_start_7_0  (*(volatile byte xdata *) 0xF469)
+#define    p_ste_adv_start_7_0  0xF469
+#define ste_adv_start_7_0_pos 0
+#define ste_adv_start_7_0_len 8
+#define ste_adv_start_7_0_lsb 0
+#define xd_p_ste_adv_start_10_8 (*(volatile byte xdata *) 0xF46A)
+#define    p_ste_adv_start_10_8 0xF46A
+#define ste_adv_start_10_8_pos 0
+#define ste_adv_start_10_8_len 3
+#define ste_adv_start_10_8_lsb 8
+#define xd_p_ste_symbol_num_8K  (*(volatile byte xdata *) 0xF46B)
+#define    p_ste_symbol_num_8K  0xF46B
+#define ste_symbol_num_8K_pos 0
+#define ste_symbol_num_8K_len 3
+#define ste_symbol_num_8K_lsb 0
+#define xd_p_ste_sample_num_8K  (*(volatile byte xdata *) 0xF46C)
+#define    p_ste_sample_num_8K  0xF46C
+#define ste_sample_num_8K_pos 0
+#define ste_sample_num_8K_len 2
+#define ste_sample_num_8K_lsb 0
+#define xd_p_ste_adv_stop   (*(volatile byte xdata *) 0xF46D)
+#define    p_ste_adv_stop   0xF46D
+#define ste_adv_stop_pos 0
+#define ste_adv_stop_len 8
+#define ste_adv_stop_lsb 0
+#define xd_r_ste_P_value_7_0    (*(volatile byte xdata *) 0xF46E)
+#define    r_ste_P_value_7_0    0xF46E
+#define ste_P_value_7_0_pos 0
+#define ste_P_value_7_0_len 8
+#define ste_P_value_7_0_lsb 0
+#define xd_r_ste_P_value_10_8   (*(volatile byte xdata *) 0xF46F)
+#define    r_ste_P_value_10_8   0xF46F
+#define ste_P_value_10_8_pos 0
+#define ste_P_value_10_8_len 3
+#define ste_P_value_10_8_lsb 8
+#define xd_p_reg_ste_tstmod (*(volatile byte xdata *) 0xF470)
+#define    p_reg_ste_tstmod 0xF470
+#define reg_ste_tstmod_pos 0
+#define reg_ste_tstmod_len 1
+#define reg_ste_tstmod_lsb 0
+#define xd_p_reg_ste_buf_en (*(volatile byte xdata *) 0xF471)
+#define    p_reg_ste_buf_en 0xF471
+#define reg_ste_buf_en_pos 0
+#define reg_ste_buf_en_len 1
+#define reg_ste_buf_en_lsb 0
+#define xd_r_ste_M_value_7_0    (*(volatile byte xdata *) 0xF472)
+#define    r_ste_M_value_7_0    0xF472
+#define ste_M_value_7_0_pos 0
+#define ste_M_value_7_0_len 8
+#define ste_M_value_7_0_lsb 0
+#define xd_r_ste_M_value_10_8   (*(volatile byte xdata *) 0xF473)
+#define    r_ste_M_value_10_8   0xF473
+#define ste_M_value_10_8_pos 0
+#define ste_M_value_10_8_len 3
+#define ste_M_value_10_8_lsb 8
+#define xd_r_ste_H1 (*(volatile byte xdata *) 0xF474)
+#define    r_ste_H1 0xF474
+#define ste_H1_pos 0
+#define ste_H1_len 7
+#define ste_H1_lsb 0
+#define xd_r_ste_H2 (*(volatile byte xdata *) 0xF475)
+#define    r_ste_H2 0xF475
+#define ste_H2_pos 0
+#define ste_H2_len 7
+#define ste_H2_lsb 0
+#define xd_r_ste_H3 (*(volatile byte xdata *) 0xF476)
+#define    r_ste_H3 0xF476
+#define ste_H3_pos 0
+#define ste_H3_len 7
+#define ste_H3_lsb 0
+#define xd_r_ste_H4 (*(volatile byte xdata *) 0xF477)
+#define    r_ste_H4 0xF477
+#define ste_H4_pos 0
+#define ste_H4_len 7
+#define ste_H4_lsb 0
+#define xd_r_ste_Corr_value_I_7_0   (*(volatile byte xdata *) 0xF478)
+#define    r_ste_Corr_value_I_7_0   0xF478
+#define ste_Corr_value_I_7_0_pos 0
+#define ste_Corr_value_I_7_0_len 8
+#define ste_Corr_value_I_7_0_lsb 0
+#define xd_r_ste_Corr_value_I_15_8  (*(volatile byte xdata *) 0xF479)
+#define    r_ste_Corr_value_I_15_8  0xF479
+#define ste_Corr_value_I_15_8_pos 0
+#define ste_Corr_value_I_15_8_len 8
+#define ste_Corr_value_I_15_8_lsb 8
+#define xd_r_ste_Corr_value_I_23_16 (*(volatile byte xdata *) 0xF47A)
+#define    r_ste_Corr_value_I_23_16 0xF47A
+#define ste_Corr_value_I_23_16_pos 0
+#define ste_Corr_value_I_23_16_len 8
+#define ste_Corr_value_I_23_16_lsb 16
+#define xd_r_ste_Corr_value_I_27_24 (*(volatile byte xdata *) 0xF47B)
+#define    r_ste_Corr_value_I_27_24 0xF47B
+#define ste_Corr_value_I_27_24_pos 0
+#define ste_Corr_value_I_27_24_len 4
+#define ste_Corr_value_I_27_24_lsb 24
+#define xd_r_ste_Corr_value_Q_7_0   (*(volatile byte xdata *) 0xF47C)
+#define    r_ste_Corr_value_Q_7_0   0xF47C
+#define ste_Corr_value_Q_7_0_pos 0
+#define ste_Corr_value_Q_7_0_len 8
+#define ste_Corr_value_Q_7_0_lsb 0
+#define xd_r_ste_Corr_value_Q_15_8  (*(volatile byte xdata *) 0xF47D)
+#define    r_ste_Corr_value_Q_15_8  0xF47D
+#define ste_Corr_value_Q_15_8_pos 0
+#define ste_Corr_value_Q_15_8_len 8
+#define ste_Corr_value_Q_15_8_lsb 8
+#define xd_r_ste_Corr_value_Q_23_16 (*(volatile byte xdata *) 0xF47E)
+#define    r_ste_Corr_value_Q_23_16 0xF47E
+#define ste_Corr_value_Q_23_16_pos 0
+#define ste_Corr_value_Q_23_16_len 8
+#define ste_Corr_value_Q_23_16_lsb 16
+#define xd_r_ste_Corr_value_Q_27_24 (*(volatile byte xdata *) 0xF47F)
+#define    r_ste_Corr_value_Q_27_24 0xF47F
+#define ste_Corr_value_Q_27_24_pos 0
+#define ste_Corr_value_Q_27_24_len 4
+#define ste_Corr_value_Q_27_24_lsb 24
+#define xd_r_ste_J_num_7_0  (*(volatile byte xdata *) 0xF480)
+#define    r_ste_J_num_7_0  0xF480
+#define ste_J_num_7_0_pos 0
+#define ste_J_num_7_0_len 8
+#define ste_J_num_7_0_lsb 0
+#define xd_r_ste_J_num_15_8 (*(volatile byte xdata *) 0xF481)
+#define    r_ste_J_num_15_8 0xF481
+#define ste_J_num_15_8_pos 0
+#define ste_J_num_15_8_len 8
+#define ste_J_num_15_8_lsb 8
+#define xd_r_ste_J_num_23_16    (*(volatile byte xdata *) 0xF482)
+#define    r_ste_J_num_23_16    0xF482
+#define ste_J_num_23_16_pos 0
+#define ste_J_num_23_16_len 8
+#define ste_J_num_23_16_lsb 16
+#define xd_r_ste_J_num_31_24    (*(volatile byte xdata *) 0xF483)
+#define    r_ste_J_num_31_24    0xF483
+#define ste_J_num_31_24_pos 0
+#define ste_J_num_31_24_len 8
+#define ste_J_num_31_24_lsb 24
+#define xd_r_ste_J_den_7_0  (*(volatile byte xdata *) 0xF484)
+#define    r_ste_J_den_7_0  0xF484
+#define ste_J_den_7_0_pos 0
+#define ste_J_den_7_0_len 8
+#define ste_J_den_7_0_lsb 0
+#define xd_r_ste_J_den_15_8 (*(volatile byte xdata *) 0xF485)
+#define    r_ste_J_den_15_8 0xF485
+#define ste_J_den_15_8_pos 0
+#define ste_J_den_15_8_len 8
+#define ste_J_den_15_8_lsb 8
+#define xd_r_ste_J_den_18_16    (*(volatile byte xdata *) 0xF486)
+#define    r_ste_J_den_18_16    0xF486
+#define ste_J_den_18_16_pos 0
+#define ste_J_den_18_16_len 3
+#define ste_J_den_18_16_lsb 16
+#define xd_r_ste_Beacon_Indicator   (*(volatile byte xdata *) 0xF488)
+#define    r_ste_Beacon_Indicator   0xF488
+#define ste_Beacon_Indicator_pos 0
+#define ste_Beacon_Indicator_len 1
+#define ste_Beacon_Indicator_lsb 0
+#define xd_p_ste_got_sntc_bcn   (*(volatile byte xdata *) 0xF48B)
+#define    p_ste_got_sntc_bcn   0xF48B
+#define ste_got_sntc_bcn_pos 0
+#define ste_got_sntc_bcn_len 1
+#define ste_got_sntc_bcn_lsb 0
+#define xd_r_tpsd_Frame_Num (*(volatile byte xdata *) 0xF4C0)
+#define    r_tpsd_Frame_Num 0xF4C0
+#define tpsd_Frame_Num_pos 0
+#define tpsd_Frame_Num_len 2
+#define tpsd_Frame_Num_lsb 0
+#define xd_r_tpsd_Constel   (*(volatile byte xdata *) 0xF4C1)
+#define    r_tpsd_Constel   0xF4C1
+#define tpsd_Constel_pos 0
+#define tpsd_Constel_len 2
+#define tpsd_Constel_lsb 0
+#define xd_r_tpsd_GI    (*(volatile byte xdata *) 0xF4C2)
+#define    r_tpsd_GI    0xF4C2
+#define tpsd_GI_pos 0
+#define tpsd_GI_len 2
+#define tpsd_GI_lsb 0
+#define xd_r_tpsd_Mode  (*(volatile byte xdata *) 0xF4C3)
+#define    r_tpsd_Mode  0xF4C3
+#define tpsd_Mode_pos 0
+#define tpsd_Mode_len 2
+#define tpsd_Mode_lsb 0
+#define xd_r_tpsd_CR_HP (*(volatile byte xdata *) 0xF4C4)
+#define    r_tpsd_CR_HP 0xF4C4
+#define tpsd_CR_HP_pos 0
+#define tpsd_CR_HP_len 3
+#define tpsd_CR_HP_lsb 0
+#define xd_r_tpsd_CR_LP (*(volatile byte xdata *) 0xF4C5)
+#define    r_tpsd_CR_LP 0xF4C5
+#define tpsd_CR_LP_pos 0
+#define tpsd_CR_LP_len 3
+#define tpsd_CR_LP_lsb 0
+#define xd_r_tpsd_Hie   (*(volatile byte xdata *) 0xF4C6)
+#define    r_tpsd_Hie   0xF4C6
+#define tpsd_Hie_pos 0
+#define tpsd_Hie_len 3
+#define tpsd_Hie_lsb 0
+#define xd_r_tpsd_Res_Bits  (*(volatile byte xdata *) 0xF4C7)
+#define    r_tpsd_Res_Bits  0xF4C7
+#define tpsd_Res_Bits_pos 0
+#define tpsd_Res_Bits_len 5
+#define tpsd_Res_Bits_lsb 0
+#define xd_r_tpsd_Res_Bits_0    (*(volatile byte xdata *) 0xF4C8)
+#define    r_tpsd_Res_Bits_0    0xF4C8
+#define tpsd_Res_Bits_0_pos 0
+#define tpsd_Res_Bits_0_len 1
+#define tpsd_Res_Bits_0_lsb 0
+#define xd_r_tpsd_LengthInd (*(volatile byte xdata *) 0xF4C9)
+#define    r_tpsd_LengthInd 0xF4C9
+#define tpsd_LengthInd_pos 0
+#define tpsd_LengthInd_len 6
+#define tpsd_LengthInd_lsb 0
+#define xd_r_tpsd_Cell_Id_7_0   (*(volatile byte xdata *) 0xF4CA)
+#define    r_tpsd_Cell_Id_7_0   0xF4CA
+#define tpsd_Cell_Id_7_0_pos 0
+#define tpsd_Cell_Id_7_0_len 8
+#define tpsd_Cell_Id_7_0_lsb 0
+#define xd_r_tpsd_Cell_Id_15_8  (*(volatile byte xdata *) 0xF4CB)
+#define    r_tpsd_Cell_Id_15_8  0xF4CB
+#define tpsd_Cell_Id_15_8_pos 0
+#define tpsd_Cell_Id_15_8_len 8
+#define tpsd_Cell_Id_15_8_lsb 0
+#define xd_r_tpsd_use_InDepthInt    (*(volatile byte xdata *) 0xF4CC)
+#define    r_tpsd_use_InDepthInt    0xF4CC
+#define tpsd_use_InDepthInt_pos 0
+#define tpsd_use_InDepthInt_len 1
+#define tpsd_use_InDepthInt_lsb 0
+#define xd_r_tpsd_use_TimeSlicing_HP    (*(volatile byte xdata *) 0xF4CD)
+#define    r_tpsd_use_TimeSlicing_HP    0xF4CD
+#define tpsd_use_TimeSlicing_HP_pos 0
+#define tpsd_use_TimeSlicing_HP_len 1
+#define tpsd_use_TimeSlicing_HP_lsb 0
+#define xd_r_tpsd_use_mpe_fec_HP    (*(volatile byte xdata *) 0xF4CE)
+#define    r_tpsd_use_mpe_fec_HP    0xF4CE
+#define tpsd_use_mpe_fec_HP_pos 0
+#define tpsd_use_mpe_fec_HP_len 1
+#define tpsd_use_mpe_fec_HP_lsb 0
+#define xd_r_tpsd_use_TimeSlicing_LP    (*(volatile byte xdata *) 0xF4CF)
+#define    r_tpsd_use_TimeSlicing_LP    0xF4CF
+#define tpsd_use_TimeSlicing_LP_pos 0
+#define tpsd_use_TimeSlicing_LP_len 1
+#define tpsd_use_TimeSlicing_LP_lsb 0
+#define xd_r_tpsd_use_mpe_fec_LP    (*(volatile byte xdata *) 0xF4D0)
+#define    r_tpsd_use_mpe_fec_LP    0xF4D0
+#define tpsd_use_mpe_fec_LP_pos 0
+#define tpsd_use_mpe_fec_LP_len 1
+#define tpsd_use_mpe_fec_LP_lsb 0
+#define xd_r_tpsd_leng23_ind_return (*(volatile byte xdata *) 0xF4D1)
+#define    r_tpsd_leng23_ind_return 0xF4D1
+#define tpsd_leng23_ind_return_pos 0
+#define tpsd_leng23_ind_return_len 1
+#define tpsd_leng23_ind_return_lsb 0
+#define xd_p_reg_fft_re_exp (*(volatile byte xdata *) 0xF500)
+#define    p_reg_fft_re_exp 0xF500
+#define reg_fft_re_exp_pos 0
+#define reg_fft_re_exp_len 4
+#define reg_fft_re_exp_lsb 0
+#define xd_p_reg_fft_re_mts (*(volatile byte xdata *) 0xF501)
+#define    p_reg_fft_re_mts 0xF501
+#define reg_fft_re_mts_pos 0
+#define reg_fft_re_mts_len 8
+#define reg_fft_re_mts_lsb 0
+#define xd_p_reg_fft_im_exp (*(volatile byte xdata *) 0xF502)
+#define    p_reg_fft_im_exp 0xF502
+#define reg_fft_im_exp_pos 0
+#define reg_fft_im_exp_len 4
+#define reg_fft_im_exp_lsb 0
+#define xd_p_reg_fft_im_mts (*(volatile byte xdata *) 0xF503)
+#define    p_reg_fft_im_mts 0xF503
+#define reg_fft_im_mts_pos 0
+#define reg_fft_im_mts_len 8
+#define reg_fft_im_mts_lsb 0
+#define xd_p_reg_fft_conjugate  (*(volatile byte xdata *) 0xF504)
+#define    p_reg_fft_conjugate  0xF504
+#define reg_fft_conjugate_pos 0
+#define reg_fft_conjugate_len 1
+#define reg_fft_conjugate_lsb 0
+#define xd_p_reg_fft_power_en   (*(volatile byte xdata *) 0xF505)
+#define    p_reg_fft_power_en   0xF505
+#define reg_fft_power_en_pos 0
+#define reg_fft_power_en_len 1
+#define reg_fft_power_en_lsb 0
+#define xd_p_reg_fft_power_factor   (*(volatile byte xdata *) 0xF506)
+#define    p_reg_fft_power_factor   0xF506
+#define reg_fft_power_factor_pos 0
+#define reg_fft_power_factor_len 6
+#define reg_fft_power_factor_lsb 0
+#define xd_p_reg_fft_power_in   (*(volatile byte xdata *) 0xF507)
+#define    p_reg_fft_power_in   0xF507
+#define reg_fft_power_in_pos 0
+#define reg_fft_power_in_len 8
+#define reg_fft_power_in_lsb 0
+#define xd_p_reg_fft_mask_from0_7_0 (*(volatile byte xdata *) 0xF508)
+#define    p_reg_fft_mask_from0_7_0 0xF508
+#define reg_fft_mask_from0_7_0_pos 0
+#define reg_fft_mask_from0_7_0_len 8
+#define reg_fft_mask_from0_7_0_lsb 0
+#define xd_p_reg_fft_mask_from0_12_8    (*(volatile byte xdata *) 0xF509)
+#define    p_reg_fft_mask_from0_12_8    0xF509
+#define reg_fft_mask_from0_12_8_pos 0
+#define reg_fft_mask_from0_12_8_len 5
+#define reg_fft_mask_from0_12_8_lsb 8
+#define xd_p_reg_fft_mask_to0_7_0   (*(volatile byte xdata *) 0xF50A)
+#define    p_reg_fft_mask_to0_7_0   0xF50A
+#define reg_fft_mask_to0_7_0_pos 0
+#define reg_fft_mask_to0_7_0_len 8
+#define reg_fft_mask_to0_7_0_lsb 0
+#define xd_p_reg_fft_mask_to0_12_8  (*(volatile byte xdata *) 0xF50B)
+#define    p_reg_fft_mask_to0_12_8  0xF50B
+#define reg_fft_mask_to0_12_8_pos 0
+#define reg_fft_mask_to0_12_8_len 5
+#define reg_fft_mask_to0_12_8_lsb 8
+#define xd_p_reg_fft_mask_from1_7_0 (*(volatile byte xdata *) 0xF50C)
+#define    p_reg_fft_mask_from1_7_0 0xF50C
+#define reg_fft_mask_from1_7_0_pos 0
+#define reg_fft_mask_from1_7_0_len 8
+#define reg_fft_mask_from1_7_0_lsb 0
+#define xd_p_reg_fft_mask_from1_12_8    (*(volatile byte xdata *) 0xF50D)
+#define    p_reg_fft_mask_from1_12_8    0xF50D
+#define reg_fft_mask_from1_12_8_pos 0
+#define reg_fft_mask_from1_12_8_len 5
+#define reg_fft_mask_from1_12_8_lsb 8
+#define xd_p_reg_fft_mask_to1_7_0   (*(volatile byte xdata *) 0xF50E)
+#define    p_reg_fft_mask_to1_7_0   0xF50E
+#define reg_fft_mask_to1_7_0_pos 0
+#define reg_fft_mask_to1_7_0_len 8
+#define reg_fft_mask_to1_7_0_lsb 0
+#define xd_p_reg_fft_mask_to1_12_8  (*(volatile byte xdata *) 0xF50F)
+#define    p_reg_fft_mask_to1_12_8  0xF50F
+#define reg_fft_mask_to1_12_8_pos 0
+#define reg_fft_mask_to1_12_8_len 5
+#define reg_fft_mask_to1_12_8_lsb 8
+#define xd_p_reg_fft_mask_from2_7_0 (*(volatile byte xdata *) 0xF510)
+#define    p_reg_fft_mask_from2_7_0 0xF510
+#define reg_fft_mask_from2_7_0_pos 0
+#define reg_fft_mask_from2_7_0_len 8
+#define reg_fft_mask_from2_7_0_lsb 0
+#define xd_p_reg_fft_mask_from2_12_8    (*(volatile byte xdata *) 0xF511)
+#define    p_reg_fft_mask_from2_12_8    0xF511
+#define reg_fft_mask_from2_12_8_pos 0
+#define reg_fft_mask_from2_12_8_len 5
+#define reg_fft_mask_from2_12_8_lsb 8
+#define xd_p_reg_fft_mask_to2_7_0   (*(volatile byte xdata *) 0xF512)
+#define    p_reg_fft_mask_to2_7_0   0xF512
+#define reg_fft_mask_to2_7_0_pos 0
+#define reg_fft_mask_to2_7_0_len 8
+#define reg_fft_mask_to2_7_0_lsb 0
+#define xd_p_reg_fft_mask_to2_12_8  (*(volatile byte xdata *) 0xF513)
+#define    p_reg_fft_mask_to2_12_8  0xF513
+#define reg_fft_mask_to2_12_8_pos 0
+#define reg_fft_mask_to2_12_8_len 5
+#define reg_fft_mask_to2_12_8_lsb 8
+#define xd_p_reg_fft_mask_from3_7_0 (*(volatile byte xdata *) 0xF514)
+#define    p_reg_fft_mask_from3_7_0 0xF514
+#define reg_fft_mask_from3_7_0_pos 0
+#define reg_fft_mask_from3_7_0_len 8
+#define reg_fft_mask_from3_7_0_lsb 0
+#define xd_p_reg_fft_mask_from3_12_8    (*(volatile byte xdata *) 0xF515)
+#define    p_reg_fft_mask_from3_12_8    0xF515
+#define reg_fft_mask_from3_12_8_pos 0
+#define reg_fft_mask_from3_12_8_len 5
+#define reg_fft_mask_from3_12_8_lsb 8
+#define xd_p_reg_fft_mask_to3_7_0   (*(volatile byte xdata *) 0xF516)
+#define    p_reg_fft_mask_to3_7_0   0xF516
+#define reg_fft_mask_to3_7_0_pos 0
+#define reg_fft_mask_to3_7_0_len 8
+#define reg_fft_mask_to3_7_0_lsb 0
+#define xd_p_reg_fft_mask_to3_12_8  (*(volatile byte xdata *) 0xF517)
+#define    p_reg_fft_mask_to3_12_8  0xF517
+#define reg_fft_mask_to3_12_8_pos 0
+#define reg_fft_mask_to3_12_8_len 5
+#define reg_fft_mask_to3_12_8_lsb 8
+#define xd_r_fd_sntc_frame_num  (*(volatile byte xdata *) 0xF518)
+#define    r_fd_sntc_frame_num  0xF518
+#define fd_sntc_frame_num_pos 0
+#define fd_sntc_frame_num_len 2
+#define fd_sntc_frame_num_lsb 0
+#define xd_r_fd_sntc_symbol_count   (*(volatile byte xdata *) 0xF519)
+#define    r_fd_sntc_symbol_count   0xF519
+#define fd_sntc_symbol_count_pos 0
+#define fd_sntc_symbol_count_len 7
+#define fd_sntc_symbol_count_lsb 0
+#define xd_p_reg_sntc_cnt_lo    (*(volatile byte xdata *) 0xF51A)
+#define    p_reg_sntc_cnt_lo    0xF51A
+#define reg_sntc_cnt_lo_pos 0
+#define reg_sntc_cnt_lo_len 8
+#define reg_sntc_cnt_lo_lsb 0
+#define xd_p_reg_sntc_cnt_hi    (*(volatile byte xdata *) 0xF51B)
+#define    p_reg_sntc_cnt_hi    0xF51B
+#define reg_sntc_cnt_hi_pos 0
+#define reg_sntc_cnt_hi_len 7
+#define reg_sntc_cnt_hi_lsb 0
+#define xd_p_reg_sntc_fft_in    (*(volatile byte xdata *) 0xF51C)
+#define    p_reg_sntc_fft_in    0xF51C
+#define reg_sntc_fft_in_pos 0
+#define reg_sntc_fft_in_len 1
+#define reg_sntc_fft_in_lsb 0
+#define xd_r_fd_sntc_en (*(volatile byte xdata *) 0xF51D)
+#define    r_fd_sntc_en 0xF51D
+#define fd_sntc_en_pos 0
+#define fd_sntc_en_len 1
+#define fd_sntc_en_lsb 0
+#define xd_p_reg_sntc_x2    (*(volatile byte xdata *) 0xF51E)
+#define    p_reg_sntc_x2    0xF51E
+#define reg_sntc_x2_pos 0
+#define reg_sntc_x2_len 1
+#define reg_sntc_x2_lsb 0
+#define xd_p_reg_cge_en_7_0 (*(volatile byte xdata *) 0xF51F)
+#define    p_reg_cge_en_7_0 0xF51F
+#define reg_cge_en_7_0_pos 0
+#define reg_cge_en_7_0_len 8
+#define reg_cge_en_7_0_lsb 0
+#define xd_p_reg_cge_en_15_8    (*(volatile byte xdata *) 0xF520)
+#define    p_reg_cge_en_15_8    0xF520
+#define reg_cge_en_15_8_pos 0
+#define reg_cge_en_15_8_len 8
+#define reg_cge_en_15_8_lsb 8
+#define xd_p_reg_cge_en_23_16   (*(volatile byte xdata *) 0xF521)
+#define    p_reg_cge_en_23_16   0xF521
+#define reg_cge_en_23_16_pos 0
+#define reg_cge_en_23_16_len 8
+#define reg_cge_en_23_16_lsb 16
+#define xd_p_reg_cge_en_31_24   (*(volatile byte xdata *) 0xF522)
+#define    p_reg_cge_en_31_24   0xF522
+#define reg_cge_en_31_24_pos 0
+#define reg_cge_en_31_24_len 8
+#define reg_cge_en_31_24_lsb 24
+#define xd_p_reg_cge_en_39_32   (*(volatile byte xdata *) 0xF523)
+#define    p_reg_cge_en_39_32   0xF523
+#define reg_cge_en_39_32_pos 0
+#define reg_cge_en_39_32_len 8
+#define reg_cge_en_39_32_lsb 32
+#define xd_p_reg_cge_en_43_40   (*(volatile byte xdata *) 0xF524)
+#define    p_reg_cge_en_43_40   0xF524
+#define reg_cge_en_43_40_pos 0
+#define reg_cge_en_43_40_len 4
+#define reg_cge_en_43_40_lsb 40
+#define xd_p_reg_fft_sat_en (*(volatile byte xdata *) 0xF525)
+#define    p_reg_fft_sat_en 0xF525
+#define reg_fft_sat_en_pos 0
+#define reg_fft_sat_en_len 1
+#define reg_fft_sat_en_lsb 0
+#define xd_p_reg_fft_sat_count_clr  (*(volatile byte xdata *) 0xF526)
+#define    p_reg_fft_sat_count_clr  0xF526
+#define reg_fft_sat_count_clr_pos 0
+#define reg_fft_sat_count_clr_len 1
+#define reg_fft_sat_count_clr_lsb 0
+#define xd_p_reg_fft_rescale_round  (*(volatile byte xdata *) 0xF527)
+#define    p_reg_fft_rescale_round  0xF527
+#define reg_fft_rescale_round_pos 0
+#define reg_fft_rescale_round_len 1
+#define reg_fft_rescale_round_lsb 0
+#define xd_r_reg_fft_sat_count_12_7_0   (*(volatile byte xdata *) 0xF528)
+#define    r_reg_fft_sat_count_12_7_0   0xF528
+#define reg_fft_sat_count_12_7_0_pos 0
+#define reg_fft_sat_count_12_7_0_len 8
+#define reg_fft_sat_count_12_7_0_lsb 0
+#define xd_r_reg_fft_sat_count_12_15_8  (*(volatile byte xdata *) 0xF529)
+#define    r_reg_fft_sat_count_12_15_8  0xF529
+#define reg_fft_sat_count_12_15_8_pos 0
+#define reg_fft_sat_count_12_15_8_len 8
+#define reg_fft_sat_count_12_15_8_lsb 8
+#define xd_r_reg_fft_sat_count_10_7_0   (*(volatile byte xdata *) 0xF52A)
+#define    r_reg_fft_sat_count_10_7_0   0xF52A
+#define reg_fft_sat_count_10_7_0_pos 0
+#define reg_fft_sat_count_10_7_0_len 8
+#define reg_fft_sat_count_10_7_0_lsb 0
+#define xd_r_reg_fft_sat_count_10_15_8  (*(volatile byte xdata *) 0xF52B)
+#define    r_reg_fft_sat_count_10_15_8  0xF52B
+#define reg_fft_sat_count_10_15_8_pos 0
+#define reg_fft_sat_count_10_15_8_len 8
+#define reg_fft_sat_count_10_15_8_lsb 8
+#define xd_p_reg_fft_capture_idx_7_0    (*(volatile byte xdata *) 0xF52C)
+#define    p_reg_fft_capture_idx_7_0    0xF52C
+#define reg_fft_capture_idx_7_0_pos 0
+#define reg_fft_capture_idx_7_0_len 8
+#define reg_fft_capture_idx_7_0_lsb 0
+#define xd_p_reg_fft_capture_idx_12_8   (*(volatile byte xdata *) 0xF52D)
+#define    p_reg_fft_capture_idx_12_8   0xF52D
+#define reg_fft_capture_idx_12_8_pos 0
+#define reg_fft_capture_idx_12_8_len 5
+#define reg_fft_capture_idx_12_8_lsb 8
+#define xd_p_reg_fft_capture    (*(volatile byte xdata *) 0xF52E)
+#define    p_reg_fft_capture    0xF52E
+#define reg_fft_capture_pos 0
+#define reg_fft_capture_len 1
+#define reg_fft_capture_lsb 0
+#define xd_p_reg_gp_trigger_fd  (*(volatile byte xdata *) 0xF52F)
+#define    p_reg_gp_trigger_fd  0xF52F
+#define reg_gp_trigger_fd_pos 0
+#define reg_gp_trigger_fd_len 1
+#define reg_gp_trigger_fd_lsb 0
+#define xd_p_reg_trigger_sel_fd (*(volatile byte xdata *) 0xF530)
+#define    p_reg_trigger_sel_fd 0xF530
+#define reg_trigger_sel_fd_pos 0
+#define reg_trigger_sel_fd_len 2
+#define reg_trigger_sel_fd_lsb 0
+#define xd_p_reg_trigger_module_sel_fd  (*(volatile byte xdata *) 0xF531)
+#define    p_reg_trigger_module_sel_fd  0xF531
+#define reg_trigger_module_sel_fd_pos 0
+#define reg_trigger_module_sel_fd_len 6
+#define reg_trigger_module_sel_fd_lsb 0
+#define xd_p_reg_trigger_set_sel_fd (*(volatile byte xdata *) 0xF532)
+#define    p_reg_trigger_set_sel_fd 0xF532
+#define reg_trigger_set_sel_fd_pos 0
+#define reg_trigger_set_sel_fd_len 6
+#define reg_trigger_set_sel_fd_lsb 0
+#define xd_r_reg_fft_idx_pre_max_7_0    (*(volatile byte xdata *) 0xF533)
+#define    r_reg_fft_idx_pre_max_7_0    0xF533
+#define reg_fft_idx_pre_max_7_0_pos 0
+#define reg_fft_idx_pre_max_7_0_len 8
+#define reg_fft_idx_pre_max_7_0_lsb 0
+#define xd_r_reg_fft_idx_pre_max_12_8   (*(volatile byte xdata *) 0xF534)
+#define    r_reg_fft_idx_pre_max_12_8   0xF534
+#define reg_fft_idx_pre_max_12_8_pos 0
+#define reg_fft_idx_pre_max_12_8_len 5
+#define reg_fft_idx_pre_max_12_8_lsb 8
+#define xd_r_reg_fft_crc    (*(volatile byte xdata *) 0xF535)
+#define    r_reg_fft_crc    0xF535
+#define reg_fft_crc_pos 0
+#define reg_fft_crc_len 8
+#define reg_fft_crc_lsb 0
+#define xd_p_fd_fft_shift_max   (*(volatile byte xdata *) 0xF536)
+#define    p_fd_fft_shift_max   0xF536
+#define fd_fft_shift_max_pos 0
+#define fd_fft_shift_max_len 4
+#define fd_fft_shift_max_lsb 0
+#define xd_p_fd_fft_frame_num   (*(volatile byte xdata *) 0xF537)
+#define    p_fd_fft_frame_num   0xF537
+#define fd_fft_frame_num_pos 0
+#define fd_fft_frame_num_len 2
+#define fd_fft_frame_num_lsb 0
+#define xd_p_fd_fft_symbol_count    (*(volatile byte xdata *) 0xF538)
+#define    p_fd_fft_symbol_count    0xF538
+#define fd_fft_symbol_count_pos 0
+#define fd_fft_symbol_count_len 7
+#define fd_fft_symbol_count_lsb 0
+#define xd_r_reg_fft_idx_max_7_0    (*(volatile byte xdata *) 0xF539)
+#define    r_reg_fft_idx_max_7_0    0xF539
+#define reg_fft_idx_max_7_0_pos 0
+#define reg_fft_idx_max_7_0_len 8
+#define reg_fft_idx_max_7_0_lsb 0
+#define xd_r_reg_fft_idx_max_12_8   (*(volatile byte xdata *) 0xF53A)
+#define    r_reg_fft_idx_max_12_8   0xF53A
+#define reg_fft_idx_max_12_8_pos 0
+#define reg_fft_idx_max_12_8_len 5
+#define reg_fft_idx_max_12_8_lsb 8
+#define xd_p_reg_fft_rotate_en  (*(volatile byte xdata *) 0xF53B)
+#define    p_reg_fft_rotate_en  0xF53B
+#define reg_fft_rotate_en_pos 0
+#define reg_fft_rotate_en_len 1
+#define reg_fft_rotate_en_lsb 0
+#define xd_p_reg_fft_rotate_base_7_0    (*(volatile byte xdata *) 0xF53C)
+#define    p_reg_fft_rotate_base_7_0    0xF53C
+#define reg_fft_rotate_base_7_0_pos 0
+#define reg_fft_rotate_base_7_0_len 8
+#define reg_fft_rotate_base_7_0_lsb 0
+#define xd_p_reg_fft_rotate_base_12_8   (*(volatile byte xdata *) 0xF53D)
+#define    p_reg_fft_rotate_base_12_8   0xF53D
+#define reg_fft_rotate_base_12_8_pos 0
+#define reg_fft_rotate_base_12_8_len 5
+#define reg_fft_rotate_base_12_8_lsb 8
+#define xd_r_fd_fpcc_cp_corr_signn  (*(volatile byte xdata *) 0xF53E)
+#define    r_fd_fpcc_cp_corr_signn  0xF53E
+#define fd_fpcc_cp_corr_signn_pos 0
+#define fd_fpcc_cp_corr_signn_len 8
+#define fd_fpcc_cp_corr_signn_lsb 0
+#define xd_p_reg_feq_s1 (*(volatile byte xdata *) 0xF53F)
+#define    p_reg_feq_s1 0xF53F
+#define reg_feq_s1_pos 0
+#define reg_feq_s1_len 5
+#define reg_feq_s1_lsb 0
+#define xd_p_reg_feq_sat_ind    (*(volatile byte xdata *) 0xF540)
+#define    p_reg_feq_sat_ind    0xF540
+#define reg_feq_sat_ind_pos 0
+#define reg_feq_sat_ind_len 3
+#define reg_feq_sat_ind_lsb 0
+#define xd_p_reg_p_csi_cal_en   (*(volatile byte xdata *) 0xF541)
+#define    p_reg_p_csi_cal_en   0xF541
+#define reg_p_csi_cal_en_pos 0
+#define reg_p_csi_cal_en_len 1
+#define reg_p_csi_cal_en_lsb 0
+#define xd_p_reg_p_csi_ar_mode  (*(volatile byte xdata *) 0xF542)
+#define    p_reg_p_csi_ar_mode  0xF542
+#define reg_p_csi_ar_mode_pos 0
+#define reg_p_csi_ar_mode_len 2
+#define reg_p_csi_ar_mode_lsb 0
+#define xd_p_reg_p_csi_accu_sym_num (*(volatile byte xdata *) 0xF543)
+#define    p_reg_p_csi_accu_sym_num 0xF543
+#define reg_p_csi_accu_sym_num_pos 0
+#define reg_p_csi_accu_sym_num_len 8
+#define reg_p_csi_accu_sym_num_lsb 0
+#define xd_p_reg_p_csi_eh2_shift_thr    (*(volatile byte xdata *) 0xF544)
+#define    p_reg_p_csi_eh2_shift_thr    0xF544
+#define reg_p_csi_eh2_shift_thr_pos 0
+#define reg_p_csi_eh2_shift_thr_len 4
+#define reg_p_csi_eh2_shift_thr_lsb 0
+#define xd_p_reg_p_feq_protect_eh2_shift_thr    (*(volatile byte xdata *) 0xF545)
+#define    p_reg_p_feq_protect_eh2_shift_thr    0xF545
+#define reg_p_feq_protect_eh2_shift_thr_pos 0
+#define reg_p_feq_protect_eh2_shift_thr_len 4
+#define reg_p_feq_protect_eh2_shift_thr_lsb 0
+#define xd_p_reg_p_csi_error_accu_s1    (*(volatile byte xdata *) 0xF546)
+#define    p_reg_p_csi_error_accu_s1    0xF546
+#define reg_p_csi_error_accu_s1_pos 0
+#define reg_p_csi_error_accu_s1_len 6
+#define reg_p_csi_error_accu_s1_lsb 0
+#define xd_p_reg_p_csi_shift2   (*(volatile byte xdata *) 0xF547)
+#define    p_reg_p_csi_shift2   0xF547
+#define reg_p_csi_shift2_pos 0
+#define reg_p_csi_shift2_len 4
+#define reg_p_csi_shift2_lsb 0
+#define xd_p_reg_p_csi_mul2 (*(volatile byte xdata *) 0xF548)
+#define    p_reg_p_csi_mul2 0xF548
+#define reg_p_csi_mul2_pos 0
+#define reg_p_csi_mul2_len 8
+#define reg_p_csi_mul2_lsb 0
+#define xd_p_reg_p_csi_level2_7_0   (*(volatile byte xdata *) 0xF549)
+#define    p_reg_p_csi_level2_7_0   0xF549
+#define reg_p_csi_level2_7_0_pos 0
+#define reg_p_csi_level2_7_0_len 8
+#define reg_p_csi_level2_7_0_lsb 0
+#define xd_p_reg_p_csi_level2_8 (*(volatile byte xdata *) 0xF54A)
+#define    p_reg_p_csi_level2_8 0xF54A
+#define reg_p_csi_level2_8_pos 0
+#define reg_p_csi_level2_8_len 1
+#define reg_p_csi_level2_8_lsb 8
+#define xd_p_reg_p_feq_protect_ratio    (*(volatile byte xdata *) 0xF54B)
+#define    p_reg_p_feq_protect_ratio    0xF54B
+#define reg_p_feq_protect_ratio_pos 0
+#define reg_p_feq_protect_ratio_len 8
+#define reg_p_feq_protect_ratio_lsb 0
+#define xd_r_reg_csi_rdy    (*(volatile byte xdata *) 0xF54C)
+#define    r_reg_csi_rdy    0xF54C
+#define reg_csi_rdy_pos 0
+#define reg_csi_rdy_len 1
+#define reg_csi_rdy_lsb 0
+#define xd_p_reg_p_feq_h2protect_en (*(volatile byte xdata *) 0xF54D)
+#define    p_reg_p_feq_h2protect_en 0xF54D
+#define reg_p_feq_h2protect_en_pos 0
+#define reg_p_feq_h2protect_en_len 1
+#define reg_p_feq_h2protect_en_lsb 0
+#define xd_r_reg_tpsd_lock_f0   (*(volatile byte xdata *) 0xF54E)
+#define    r_reg_tpsd_lock_f0   0xF54E
+#define reg_tpsd_lock_f0_pos 0
+#define reg_tpsd_lock_f0_len 1
+#define reg_tpsd_lock_f0_lsb 0
+#define xd_r_reg_tpsd_lock_f1   (*(volatile byte xdata *) 0xF54F)
+#define    r_reg_tpsd_lock_f1   0xF54F
+#define reg_tpsd_lock_f1_pos 0
+#define reg_tpsd_lock_f1_len 1
+#define reg_tpsd_lock_f1_lsb 0
+#define xd_p_reg_p_csi_sp_idx_7_0   (*(volatile byte xdata *) 0xF550)
+#define    p_reg_p_csi_sp_idx_7_0   0xF550
+#define reg_p_csi_sp_idx_7_0_pos 0
+#define reg_p_csi_sp_idx_7_0_len 8
+#define reg_p_csi_sp_idx_7_0_lsb 0
+#define xd_p_reg_p_csi_sp_idx_11_8  (*(volatile byte xdata *) 0xF551)
+#define    p_reg_p_csi_sp_idx_11_8  0xF551
+#define reg_p_csi_sp_idx_11_8_pos 0
+#define reg_p_csi_sp_idx_11_8_len 4
+#define reg_p_csi_sp_idx_11_8_lsb 8
+#define xd_p_fd_fpcc_cp_corr_tone_th    (*(volatile byte xdata *) 0xF552)
+#define    p_fd_fpcc_cp_corr_tone_th    0xF552
+#define fd_fpcc_cp_corr_tone_th_pos 0
+#define fd_fpcc_cp_corr_tone_th_len 6
+#define fd_fpcc_cp_corr_tone_th_lsb 0
+#define xd_p_fd_fpcc_cp_corr_symbol_log_th  (*(volatile byte xdata *) 0xF553)
+#define    p_fd_fpcc_cp_corr_symbol_log_th  0xF553
+#define fd_fpcc_cp_corr_symbol_log_th_pos 0
+#define fd_fpcc_cp_corr_symbol_log_th_len 4
+#define fd_fpcc_cp_corr_symbol_log_th_lsb 0
+#define xd_p_fd_fpcc_cp_corr_int    (*(volatile byte xdata *) 0xF554)
+#define    p_fd_fpcc_cp_corr_int    0xF554
+#define fd_fpcc_cp_corr_int_pos 0
+#define fd_fpcc_cp_corr_int_len 1
+#define fd_fpcc_cp_corr_int_lsb 0
+#define xd_p_reg_fpcc_cp_memidx (*(volatile byte xdata *) 0xF555)
+#define    p_reg_fpcc_cp_memidx 0xF555
+#define reg_fpcc_cp_memidx_pos 0
+#define reg_fpcc_cp_memidx_len 8
+#define reg_fpcc_cp_memidx_lsb 0
+#define xd_p_reg_fpcc_cpmask_en (*(volatile byte xdata *) 0xF556)
+#define    p_reg_fpcc_cpmask_en 0xF556
+#define reg_fpcc_cpmask_en_pos 0
+#define reg_fpcc_cpmask_en_len 1
+#define reg_fpcc_cpmask_en_lsb 0
+#define xd_p_reg_fpcc_cp_grpidx (*(volatile byte xdata *) 0xF557)
+#define    p_reg_fpcc_cp_grpidx 0xF557
+#define reg_fpcc_cp_grpidx_pos 0
+#define reg_fpcc_cp_grpidx_len 5
+#define reg_fpcc_cp_grpidx_lsb 0
+#define xd_r_reg_fpcc_cp_sts    (*(volatile byte xdata *) 0xF558)
+#define    r_reg_fpcc_cp_sts    0xF558
+#define reg_fpcc_cp_sts_pos 0
+#define reg_fpcc_cp_sts_len 1
+#define reg_fpcc_cp_sts_lsb 0
+#define xd_p_reg_sfoe_ns_7_0    (*(volatile byte xdata *) 0xF559)
+#define    p_reg_sfoe_ns_7_0    0xF559
+#define reg_sfoe_ns_7_0_pos 0
+#define reg_sfoe_ns_7_0_len 8
+#define reg_sfoe_ns_7_0_lsb 0
+#define xd_p_reg_sfoe_ns_14_8   (*(volatile byte xdata *) 0xF55A)
+#define    p_reg_sfoe_ns_14_8   0xF55A
+#define reg_sfoe_ns_14_8_pos 0
+#define reg_sfoe_ns_14_8_len 7
+#define reg_sfoe_ns_14_8_lsb 8
+#define xd_p_reg_sfoe_c1_7_0    (*(volatile byte xdata *) 0xF55B)
+#define    p_reg_sfoe_c1_7_0    0xF55B
+#define reg_sfoe_c1_7_0_pos 0
+#define reg_sfoe_c1_7_0_len 8
+#define reg_sfoe_c1_7_0_lsb 0
+#define xd_p_reg_sfoe_c1_9_8    (*(volatile byte xdata *) 0xF55C)
+#define    p_reg_sfoe_c1_9_8    0xF55C
+#define reg_sfoe_c1_9_8_pos 0
+#define reg_sfoe_c1_9_8_len 2
+#define reg_sfoe_c1_9_8_lsb 8
+#define xd_p_reg_sfoe_c2_7_0    (*(volatile byte xdata *) 0xF55D)
+#define    p_reg_sfoe_c2_7_0    0xF55D
+#define reg_sfoe_c2_7_0_pos 0
+#define reg_sfoe_c2_7_0_len 8
+#define reg_sfoe_c2_7_0_lsb 0
+#define xd_p_reg_sfoe_c2_9_8    (*(volatile byte xdata *) 0xF55E)
+#define    p_reg_sfoe_c2_9_8    0xF55E
+#define reg_sfoe_c2_9_8_pos 0
+#define reg_sfoe_c2_9_8_len 2
+#define reg_sfoe_c2_9_8_lsb 8
+#define xd_p_reg_sfoe_lm_counter_th (*(volatile byte xdata *) 0xF55F)
+#define    p_reg_sfoe_lm_counter_th 0xF55F
+#define reg_sfoe_lm_counter_th_pos 0
+#define reg_sfoe_lm_counter_th_len 4
+#define reg_sfoe_lm_counter_th_lsb 0
+#define xd_p_reg_sfoe_spec_inv  (*(volatile byte xdata *) 0xF560)
+#define    p_reg_sfoe_spec_inv  0xF560
+#define reg_sfoe_spec_inv_pos 0
+#define reg_sfoe_spec_inv_len 1
+#define reg_sfoe_spec_inv_lsb 0
+#define xd_p_reg_sfoe_convg_th  (*(volatile byte xdata *) 0xF561)
+#define    p_reg_sfoe_convg_th  0xF561
+#define reg_sfoe_convg_th_pos 0
+#define reg_sfoe_convg_th_len 8
+#define reg_sfoe_convg_th_lsb 0
+#define xd_p_reg_sfoe_divg_th   (*(volatile byte xdata *) 0xF562)
+#define    p_reg_sfoe_divg_th   0xF562
+#define reg_sfoe_divg_th_pos 0
+#define reg_sfoe_divg_th_len 8
+#define reg_sfoe_divg_th_lsb 0
+#define xd_p_reg_sfoe_pullin_ctr_th (*(volatile byte xdata *) 0xF563)
+#define    p_reg_sfoe_pullin_ctr_th 0xF563
+#define reg_sfoe_pullin_ctr_th_pos 0
+#define reg_sfoe_pullin_ctr_th_len 4
+#define reg_sfoe_pullin_ctr_th_lsb 0
+#define xd_p_reg_sfoe_sf_ctr_th (*(volatile byte xdata *) 0xF564)
+#define    p_reg_sfoe_sf_ctr_th 0xF564
+#define reg_sfoe_sf_ctr_th_pos 0
+#define reg_sfoe_sf_ctr_th_len 4
+#define reg_sfoe_sf_ctr_th_lsb 0
+#define xd_p_reg_sfoe_pullin_th (*(volatile byte xdata *) 0xF565)
+#define    p_reg_sfoe_pullin_th 0xF565
+#define reg_sfoe_pullin_th_pos 0
+#define reg_sfoe_pullin_th_len 8
+#define reg_sfoe_pullin_th_lsb 0
+#define xd_p_reg_sfoe_kalman_cnt    (*(volatile byte xdata *) 0xF566)
+#define    p_reg_sfoe_kalman_cnt    0xF566
+#define reg_sfoe_kalman_cnt_pos 0
+#define reg_sfoe_kalman_cnt_len 4
+#define reg_sfoe_kalman_cnt_lsb 0
+#define xd_p_reg_sfoe_fsm_info  (*(volatile byte xdata *) 0xF567)
+#define    p_reg_sfoe_fsm_info  0xF567
+#define reg_sfoe_fsm_info_pos 0
+#define reg_sfoe_fsm_info_len 4
+#define reg_sfoe_fsm_info_lsb 0
+#define xd_r_reg_sfoe_pullin_cnt    (*(volatile byte xdata *) 0xF568)
+#define    r_reg_sfoe_pullin_cnt    0xF568
+#define reg_sfoe_pullin_cnt_pos 0
+#define reg_sfoe_pullin_cnt_len 4
+#define reg_sfoe_pullin_cnt_lsb 0
+#define xd_r_reg_sfoe_sf_cnt    (*(volatile byte xdata *) 0xF569)
+#define    r_reg_sfoe_sf_cnt    0xF569
+#define reg_sfoe_sf_cnt_pos 0
+#define reg_sfoe_sf_cnt_len 4
+#define reg_sfoe_sf_cnt_lsb 0
+#define xd_p_reg_fste_phase_ini_7_0 (*(volatile byte xdata *) 0xF56A)
+#define    p_reg_fste_phase_ini_7_0 0xF56A
+#define reg_fste_phase_ini_7_0_pos 0
+#define reg_fste_phase_ini_7_0_len 8
+#define reg_fste_phase_ini_7_0_lsb 0
+#define xd_p_reg_fste_phase_ini_11_8    (*(volatile byte xdata *) 0xF56B)
+#define    p_reg_fste_phase_ini_11_8    0xF56B
+#define reg_fste_phase_ini_11_8_pos 0
+#define reg_fste_phase_ini_11_8_len 4
+#define reg_fste_phase_ini_11_8_lsb 8
+#define xd_p_reg_fste_phase_inc_7_0 (*(volatile byte xdata *) 0xF56C)
+#define    p_reg_fste_phase_inc_7_0 0xF56C
+#define reg_fste_phase_inc_7_0_pos 0
+#define reg_fste_phase_inc_7_0_len 8
+#define reg_fste_phase_inc_7_0_lsb 0
+#define xd_p_reg_fste_phase_inc_11_8    (*(volatile byte xdata *) 0xF56D)
+#define    p_reg_fste_phase_inc_11_8    0xF56D
+#define reg_fste_phase_inc_11_8_pos 0
+#define reg_fste_phase_inc_11_8_len 4
+#define reg_fste_phase_inc_11_8_lsb 8
+#define xd_p_reg_fste_acum_cost_cnt_max (*(volatile byte xdata *) 0xF56E)
+#define    p_reg_fste_acum_cost_cnt_max 0xF56E
+#define reg_fste_acum_cost_cnt_max_pos 0
+#define reg_fste_acum_cost_cnt_max_len 4
+#define reg_fste_acum_cost_cnt_max_lsb 0
+#define xd_p_reg_fste_step_size_std (*(volatile byte xdata *) 0xF56F)
+#define    p_reg_fste_step_size_std 0xF56F
+#define reg_fste_step_size_std_pos 0
+#define reg_fste_step_size_std_len 4
+#define reg_fste_step_size_std_lsb 0
+#define xd_p_reg_fste_step_size_max (*(volatile byte xdata *) 0xF570)
+#define    p_reg_fste_step_size_max 0xF570
+#define reg_fste_step_size_max_pos 0
+#define reg_fste_step_size_max_len 4
+#define reg_fste_step_size_max_lsb 0
+#define xd_p_reg_fste_rpd_dir_cnt_max   (*(volatile byte xdata *) 0xF571)
+#define    p_reg_fste_rpd_dir_cnt_max   0xF571
+#define reg_fste_rpd_dir_cnt_max_pos 0
+#define reg_fste_rpd_dir_cnt_max_len 4
+#define reg_fste_rpd_dir_cnt_max_lsb 0
+#define xd_p_reg_fste_frac_cost_cnt_max_7_0 (*(volatile byte xdata *) 0xF572)
+#define    p_reg_fste_frac_cost_cnt_max_7_0 0xF572
+#define reg_fste_frac_cost_cnt_max_7_0_pos 0
+#define reg_fste_frac_cost_cnt_max_7_0_len 8
+#define reg_fste_frac_cost_cnt_max_7_0_lsb 0
+#define xd_p_reg_fste_frac_cost_cnt_max_9_8 (*(volatile byte xdata *) 0xF573)
+#define    p_reg_fste_frac_cost_cnt_max_9_8 0xF573
+#define reg_fste_frac_cost_cnt_max_9_8_pos 0
+#define reg_fste_frac_cost_cnt_max_9_8_len 2
+#define reg_fste_frac_cost_cnt_max_9_8_lsb 8
+#define xd_p_reg_fste_isLongWeakTail    (*(volatile byte xdata *) 0xF574)
+#define    p_reg_fste_isLongWeakTail    0xF574
+#define reg_fste_isLongWeakTail_pos 0
+#define reg_fste_isLongWeakTail_len 1
+#define reg_fste_isLongWeakTail_lsb 0
+#define xd_p_reg_fste_isLongWeakHead    (*(volatile byte xdata *) 0xF575)
+#define    p_reg_fste_isLongWeakHead    0xF575
+#define reg_fste_isLongWeakHead_pos 0
+#define reg_fste_isLongWeakHead_len 1
+#define reg_fste_isLongWeakHead_lsb 0
+#define xd_p_reg_fste_w0_7_0    (*(volatile byte xdata *) 0xF576)
+#define    p_reg_fste_w0_7_0    0xF576
+#define reg_fste_w0_7_0_pos 0
+#define reg_fste_w0_7_0_len 8
+#define reg_fste_w0_7_0_lsb 0
+#define xd_p_reg_fste_w0_9_8    (*(volatile byte xdata *) 0xF577)
+#define    p_reg_fste_w0_9_8    0xF577
+#define reg_fste_w0_9_8_pos 0
+#define reg_fste_w0_9_8_len 2
+#define reg_fste_w0_9_8_lsb 8
+#define xd_p_reg_fste_w1_7_0    (*(volatile byte xdata *) 0xF578)
+#define    p_reg_fste_w1_7_0    0xF578
+#define reg_fste_w1_7_0_pos 0
+#define reg_fste_w1_7_0_len 8
+#define reg_fste_w1_7_0_lsb 0
+#define xd_p_reg_fste_w1_9_8    (*(volatile byte xdata *) 0xF579)
+#define    p_reg_fste_w1_9_8    0xF579
+#define reg_fste_w1_9_8_pos 0
+#define reg_fste_w1_9_8_len 2
+#define reg_fste_w1_9_8_lsb 8
+#define xd_p_reg_fste_w2_7_0    (*(volatile byte xdata *) 0xF57A)
+#define    p_reg_fste_w2_7_0    0xF57A
+#define reg_fste_w2_7_0_pos 0
+#define reg_fste_w2_7_0_len 8
+#define reg_fste_w2_7_0_lsb 0
+#define xd_p_reg_fste_w2_9_8    (*(volatile byte xdata *) 0xF57B)
+#define    p_reg_fste_w2_9_8    0xF57B
+#define reg_fste_w2_9_8_pos 0
+#define reg_fste_w2_9_8_len 2
+#define reg_fste_w2_9_8_lsb 8
+#define xd_p_reg_fste_w3_7_0    (*(volatile byte xdata *) 0xF57C)
+#define    p_reg_fste_w3_7_0    0xF57C
+#define reg_fste_w3_7_0_pos 0
+#define reg_fste_w3_7_0_len 8
+#define reg_fste_w3_7_0_lsb 0
+#define xd_p_reg_fste_w3_9_8    (*(volatile byte xdata *) 0xF57D)
+#define    p_reg_fste_w3_9_8    0xF57D
+#define reg_fste_w3_9_8_pos 0
+#define reg_fste_w3_9_8_len 2
+#define reg_fste_w3_9_8_lsb 8
+#define xd_p_reg_fste_w4_7_0    (*(volatile byte xdata *) 0xF57E)
+#define    p_reg_fste_w4_7_0    0xF57E
+#define reg_fste_w4_7_0_pos 0
+#define reg_fste_w4_7_0_len 8
+#define reg_fste_w4_7_0_lsb 0
+#define xd_p_reg_fste_w4_9_8    (*(volatile byte xdata *) 0xF57F)
+#define    p_reg_fste_w4_9_8    0xF57F
+#define reg_fste_w4_9_8_pos 0
+#define reg_fste_w4_9_8_len 2
+#define reg_fste_w4_9_8_lsb 8
+#define xd_p_reg_fste_w5_7_0    (*(volatile byte xdata *) 0xF580)
+#define    p_reg_fste_w5_7_0    0xF580
+#define reg_fste_w5_7_0_pos 0
+#define reg_fste_w5_7_0_len 8
+#define reg_fste_w5_7_0_lsb 0
+#define xd_p_reg_fste_w5_9_8    (*(volatile byte xdata *) 0xF581)
+#define    p_reg_fste_w5_9_8    0xF581
+#define reg_fste_w5_9_8_pos 0
+#define reg_fste_w5_9_8_len 2
+#define reg_fste_w5_9_8_lsb 8
+#define xd_p_reg_fste_w6_7_0    (*(volatile byte xdata *) 0xF582)
+#define    p_reg_fste_w6_7_0    0xF582
+#define reg_fste_w6_7_0_pos 0
+#define reg_fste_w6_7_0_len 8
+#define reg_fste_w6_7_0_lsb 0
+#define xd_p_reg_fste_w6_9_8    (*(volatile byte xdata *) 0xF583)
+#define    p_reg_fste_w6_9_8    0xF583
+#define reg_fste_w6_9_8_pos 0
+#define reg_fste_w6_9_8_len 2
+#define reg_fste_w6_9_8_lsb 8
+#define xd_p_reg_fste_w7_7_0    (*(volatile byte xdata *) 0xF584)
+#define    p_reg_fste_w7_7_0    0xF584
+#define reg_fste_w7_7_0_pos 0
+#define reg_fste_w7_7_0_len 8
+#define reg_fste_w7_7_0_lsb 0
+#define xd_p_reg_fste_w7_9_8    (*(volatile byte xdata *) 0xF585)
+#define    p_reg_fste_w7_9_8    0xF585
+#define reg_fste_w7_9_8_pos 0
+#define reg_fste_w7_9_8_len 2
+#define reg_fste_w7_9_8_lsb 8
+#define xd_p_reg_fste_w8_7_0    (*(volatile byte xdata *) 0xF586)
+#define    p_reg_fste_w8_7_0    0xF586
+#define reg_fste_w8_7_0_pos 0
+#define reg_fste_w8_7_0_len 8
+#define reg_fste_w8_7_0_lsb 0
+#define xd_p_reg_fste_w8_9_8    (*(volatile byte xdata *) 0xF587)
+#define    p_reg_fste_w8_9_8    0xF587
+#define reg_fste_w8_9_8_pos 0
+#define reg_fste_w8_9_8_len 2
+#define reg_fste_w8_9_8_lsb 8
+#define xd_p_reg_fste_w9_7_0    (*(volatile byte xdata *) 0xF588)
+#define    p_reg_fste_w9_7_0    0xF588
+#define reg_fste_w9_7_0_pos 0
+#define reg_fste_w9_7_0_len 8
+#define reg_fste_w9_7_0_lsb 0
+#define xd_p_reg_fste_w9_9_8    (*(volatile byte xdata *) 0xF589)
+#define    p_reg_fste_w9_9_8    0xF589
+#define reg_fste_w9_9_8_pos 0
+#define reg_fste_w9_9_8_len 2
+#define reg_fste_w9_9_8_lsb 8
+#define xd_p_reg_fste_wa_7_0    (*(volatile byte xdata *) 0xF58A)
+#define    p_reg_fste_wa_7_0    0xF58A
+#define reg_fste_wa_7_0_pos 0
+#define reg_fste_wa_7_0_len 8
+#define reg_fste_wa_7_0_lsb 0
+#define xd_p_reg_fste_wa_9_8    (*(volatile byte xdata *) 0xF58B)
+#define    p_reg_fste_wa_9_8    0xF58B
+#define reg_fste_wa_9_8_pos 0
+#define reg_fste_wa_9_8_len 2
+#define reg_fste_wa_9_8_lsb 8
+#define xd_p_reg_fste_wb_7_0    (*(volatile byte xdata *) 0xF58C)
+#define    p_reg_fste_wb_7_0    0xF58C
+#define reg_fste_wb_7_0_pos 0
+#define reg_fste_wb_7_0_len 8
+#define reg_fste_wb_7_0_lsb 0
+#define xd_p_reg_fste_wb_9_8    (*(volatile byte xdata *) 0xF58D)
+#define    p_reg_fste_wb_9_8    0xF58D
+#define reg_fste_wb_9_8_pos 0
+#define reg_fste_wb_9_8_len 2
+#define reg_fste_wb_9_8_lsb 8
+#define xd_p_reg_fste_wc_7_0    (*(volatile byte xdata *) 0xF58E)
+#define    p_reg_fste_wc_7_0    0xF58E
+#define reg_fste_wc_7_0_pos 0
+#define reg_fste_wc_7_0_len 8
+#define reg_fste_wc_7_0_lsb 0
+#define xd_p_reg_fste_wc_9_8    (*(volatile byte xdata *) 0xF58F)
+#define    p_reg_fste_wc_9_8    0xF58F
+#define reg_fste_wc_9_8_pos 0
+#define reg_fste_wc_9_8_len 2
+#define reg_fste_wc_9_8_lsb 8
+#define xd_p_reg_fste_wd_7_0    (*(volatile byte xdata *) 0xF590)
+#define    p_reg_fste_wd_7_0    0xF590
+#define reg_fste_wd_7_0_pos 0
+#define reg_fste_wd_7_0_len 8
+#define reg_fste_wd_7_0_lsb 0
+#define xd_p_reg_fste_wd_9_8    (*(volatile byte xdata *) 0xF591)
+#define    p_reg_fste_wd_9_8    0xF591
+#define reg_fste_wd_9_8_pos 0
+#define reg_fste_wd_9_8_len 2
+#define reg_fste_wd_9_8_lsb 8
+#define xd_p_reg_fste_we_7_0    (*(volatile byte xdata *) 0xF592)
+#define    p_reg_fste_we_7_0    0xF592
+#define reg_fste_we_7_0_pos 0
+#define reg_fste_we_7_0_len 8
+#define reg_fste_we_7_0_lsb 0
+#define xd_p_reg_fste_we_9_8    (*(volatile byte xdata *) 0xF593)
+#define    p_reg_fste_we_9_8    0xF593
+#define reg_fste_we_9_8_pos 0
+#define reg_fste_we_9_8_len 2
+#define reg_fste_we_9_8_lsb 8
+#define xd_p_reg_fste_wf_7_0    (*(volatile byte xdata *) 0xF594)
+#define    p_reg_fste_wf_7_0    0xF594
+#define reg_fste_wf_7_0_pos 0
+#define reg_fste_wf_7_0_len 8
+#define reg_fste_wf_7_0_lsb 0
+#define xd_p_reg_fste_wf_9_8    (*(volatile byte xdata *) 0xF595)
+#define    p_reg_fste_wf_9_8    0xF595
+#define reg_fste_wf_9_8_pos 0
+#define reg_fste_wf_9_8_len 2
+#define reg_fste_wf_9_8_lsb 8
+#define xd_p_reg_fste_wg_7_0    (*(volatile byte xdata *) 0xF596)
+#define    p_reg_fste_wg_7_0    0xF596
+#define reg_fste_wg_7_0_pos 0
+#define reg_fste_wg_7_0_len 8
+#define reg_fste_wg_7_0_lsb 0
+#define xd_p_reg_fste_wg_9_8    (*(volatile byte xdata *) 0xF597)
+#define    p_reg_fste_wg_9_8    0xF597
+#define reg_fste_wg_9_8_pos 0
+#define reg_fste_wg_9_8_len 2
+#define reg_fste_wg_9_8_lsb 8
+#define xd_p_reg_fste_wh_7_0    (*(volatile byte xdata *) 0xF598)
+#define    p_reg_fste_wh_7_0    0xF598
+#define reg_fste_wh_7_0_pos 0
+#define reg_fste_wh_7_0_len 8
+#define reg_fste_wh_7_0_lsb 0
+#define xd_p_reg_fste_wh_9_8    (*(volatile byte xdata *) 0xF599)
+#define    p_reg_fste_wh_9_8    0xF599
+#define reg_fste_wh_9_8_pos 0
+#define reg_fste_wh_9_8_len 2
+#define reg_fste_wh_9_8_lsb 8
+#define xd_r_fd_fste_i_adj_org  (*(volatile byte xdata *) 0xF59A)
+#define    r_fd_fste_i_adj_org  0xF59A
+#define fd_fste_i_adj_org_pos 0
+#define fd_fste_i_adj_org_len 5
+#define fd_fste_i_adj_org_lsb 0
+#define xd_r_fd_fste_f_adj_7_0  (*(volatile byte xdata *) 0xF59B)
+#define    r_fd_fste_f_adj_7_0  0xF59B
+#define fd_fste_f_adj_7_0_pos 0
+#define fd_fste_f_adj_7_0_len 8
+#define fd_fste_f_adj_7_0_lsb 0
+#define xd_r_fd_fste_f_adj_15_8 (*(volatile byte xdata *) 0xF59C)
+#define    r_fd_fste_f_adj_15_8 0xF59C
+#define fd_fste_f_adj_15_8_pos 0
+#define fd_fste_f_adj_15_8_len 8
+#define fd_fste_f_adj_15_8_lsb 8
+#define xd_r_fd_fste_f_adj_19_16    (*(volatile byte xdata *) 0xF59D)
+#define    r_fd_fste_f_adj_19_16    0xF59D
+#define fd_fste_f_adj_19_16_pos 0
+#define fd_fste_f_adj_19_16_len 4
+#define fd_fste_f_adj_19_16_lsb 16
+#define xd_p_reg_fste_ehw_7_0   (*(volatile byte xdata *) 0xF59E)
+#define    p_reg_fste_ehw_7_0   0xF59E
+#define reg_fste_ehw_7_0_pos 0
+#define reg_fste_ehw_7_0_len 8
+#define reg_fste_ehw_7_0_lsb 0
+#define xd_p_reg_fste_ehw_12_8  (*(volatile byte xdata *) 0xF59F)
+#define    p_reg_fste_ehw_12_8  0xF59F
+#define reg_fste_ehw_12_8_pos 0
+#define reg_fste_ehw_12_8_len 5
+#define reg_fste_ehw_12_8_lsb 8
+#define xd_p_reg_fste_i_adj_vld (*(volatile byte xdata *) 0xF5A0)
+#define    p_reg_fste_i_adj_vld 0xF5A0
+#define reg_fste_i_adj_vld_pos 0
+#define reg_fste_i_adj_vld_len 1
+#define reg_fste_i_adj_vld_lsb 0
+#define xd_p_reg_fste_ceTimesPhasor_real    (*(volatile byte xdata *) 0xF5A1)
+#define    p_reg_fste_ceTimesPhasor_real    0xF5A1
+#define reg_fste_ceTimesPhasor_real_pos 0
+#define reg_fste_ceTimesPhasor_real_len 1
+#define reg_fste_ceTimesPhasor_real_lsb 0
+#define xd_p_reg_fste_ceTimesPhasor_imag    (*(volatile byte xdata *) 0xF5A2)
+#define    p_reg_fste_ceTimesPhasor_imag    0xF5A2
+#define reg_fste_ceTimesPhasor_imag_pos 0
+#define reg_fste_ceTimesPhasor_imag_len 1
+#define reg_fste_ceTimesPhasor_imag_lsb 0
+#define xd_p_reg_fste_cerTimesW_real    (*(volatile byte xdata *) 0xF5A3)
+#define    p_reg_fste_cerTimesW_real    0xF5A3
+#define reg_fste_cerTimesW_real_pos 0
+#define reg_fste_cerTimesW_real_len 1
+#define reg_fste_cerTimesW_real_lsb 0
+#define xd_p_reg_fste_cerTimesW_imag    (*(volatile byte xdata *) 0xF5A4)
+#define    p_reg_fste_cerTimesW_imag    0xF5A4
+#define reg_fste_cerTimesW_imag_pos 0
+#define reg_fste_cerTimesW_imag_len 1
+#define reg_fste_cerTimesW_imag_lsb 0
+#define xd_p_reg_fste_cerTimesWAccum_real   (*(volatile byte xdata *) 0xF5A5)
+#define    p_reg_fste_cerTimesWAccum_real   0xF5A5
+#define reg_fste_cerTimesWAccum_real_pos 0
+#define reg_fste_cerTimesWAccum_real_len 1
+#define reg_fste_cerTimesWAccum_real_lsb 0
+#define xd_p_reg_fste_cerTimesWAccum_imag   (*(volatile byte xdata *) 0xF5A6)
+#define    p_reg_fste_cerTimesWAccum_imag   0xF5A6
+#define reg_fste_cerTimesWAccum_imag_pos 0
+#define reg_fste_cerTimesWAccum_imag_len 1
+#define reg_fste_cerTimesWAccum_imag_lsb 0
+#define xd_p_reg_fste_cost  (*(volatile byte xdata *) 0xF5A7)
+#define    p_reg_fste_cost  0xF5A7
+#define reg_fste_cost_pos 0
+#define reg_fste_cost_len 1
+#define reg_fste_cost_lsb 0
+#define xd_p_fd_tpsd_en (*(volatile byte xdata *) 0xF5A8)
+#define    p_fd_tpsd_en 0xF5A8
+#define fd_tpsd_en_pos 0
+#define fd_tpsd_en_len 1
+#define fd_tpsd_en_lsb 0
+#define xd_p_fd_tpsd_lock   (*(volatile byte xdata *) 0xF5A9)
+#define    p_fd_tpsd_lock   0xF5A9
+#define fd_tpsd_lock_pos 0
+#define fd_tpsd_lock_len 1
+#define fd_tpsd_lock_lsb 0
+#define xd_r_fd_tpsd_s19    (*(volatile byte xdata *) 0xF5AA)
+#define    r_fd_tpsd_s19    0xF5AA
+#define fd_tpsd_s19_pos 0
+#define fd_tpsd_s19_len 1
+#define fd_tpsd_s19_lsb 0
+#define xd_r_fd_tpsd_s17    (*(volatile byte xdata *) 0xF5AB)
+#define    r_fd_tpsd_s17    0xF5AB
+#define fd_tpsd_s17_pos 0
+#define fd_tpsd_s17_len 1
+#define fd_tpsd_s17_lsb 0
+#define xd_p_fd_sfr_ste_en  (*(volatile byte xdata *) 0xF5AC)
+#define    p_fd_sfr_ste_en  0xF5AC
+#define fd_sfr_ste_en_pos 0
+#define fd_sfr_ste_en_len 1
+#define fd_sfr_ste_en_lsb 0
+#define xd_p_fd_sfr_ste_mode    (*(volatile byte xdata *) 0xF5AD)
+#define    p_fd_sfr_ste_mode    0xF5AD
+#define fd_sfr_ste_mode_pos 0
+#define fd_sfr_ste_mode_len 2
+#define fd_sfr_ste_mode_lsb 0
+#define xd_p_fd_sfr_ste_done    (*(volatile byte xdata *) 0xF5AE)
+#define    p_fd_sfr_ste_done    0xF5AE
+#define fd_sfr_ste_done_pos 0
+#define fd_sfr_ste_done_len 1
+#define fd_sfr_ste_done_lsb 0
+#define xd_p_reg_cfoe_ffoe_en   (*(volatile byte xdata *) 0xF5AF)
+#define    p_reg_cfoe_ffoe_en   0xF5AF
+#define reg_cfoe_ffoe_en_pos 0
+#define reg_cfoe_ffoe_en_len 1
+#define reg_cfoe_ffoe_en_lsb 0
+#define xd_p_reg_cfoe_ifoe_en   (*(volatile byte xdata *) 0xF5B0)
+#define    p_reg_cfoe_ifoe_en   0xF5B0
+#define reg_cfoe_ifoe_en_pos 0
+#define reg_cfoe_ifoe_en_len 1
+#define reg_cfoe_ifoe_en_lsb 0
+#define xd_p_reg_cfoe_fot_en    (*(volatile byte xdata *) 0xF5B1)
+#define    p_reg_cfoe_fot_en    0xF5B1
+#define reg_cfoe_fot_en_pos 0
+#define reg_cfoe_fot_en_len 1
+#define reg_cfoe_fot_en_lsb 0
+#define xd_p_reg_cfoe_fot_lm_en (*(volatile byte xdata *) 0xF5B2)
+#define    p_reg_cfoe_fot_lm_en 0xF5B2
+#define reg_cfoe_fot_lm_en_pos 0
+#define reg_cfoe_fot_lm_en_len 1
+#define reg_cfoe_fot_lm_en_lsb 0
+#define xd_p_reg_cfoe_fot_rst   (*(volatile byte xdata *) 0xF5B3)
+#define    p_reg_cfoe_fot_rst   0xF5B3
+#define reg_cfoe_fot_rst_pos 0
+#define reg_cfoe_fot_rst_len 1
+#define reg_cfoe_fot_rst_lsb 0
+#define xd_r_fd_cfoe_ffoe_done  (*(volatile byte xdata *) 0xF5B4)
+#define    r_fd_cfoe_ffoe_done  0xF5B4
+#define fd_cfoe_ffoe_done_pos 0
+#define fd_cfoe_ffoe_done_len 1
+#define fd_cfoe_ffoe_done_lsb 0
+#define xd_p_fd_cfoe_metric_vld (*(volatile byte xdata *) 0xF5B5)
+#define    p_fd_cfoe_metric_vld 0xF5B5
+#define fd_cfoe_metric_vld_pos 0
+#define fd_cfoe_metric_vld_len 1
+#define fd_cfoe_metric_vld_lsb 0
+#define xd_p_reg_cfoe_ifod_vld  (*(volatile byte xdata *) 0xF5B6)
+#define    p_reg_cfoe_ifod_vld  0xF5B6
+#define reg_cfoe_ifod_vld_pos 0
+#define reg_cfoe_ifod_vld_len 1
+#define reg_cfoe_ifod_vld_lsb 0
+#define xd_r_fd_cfoe_ifoe_done  (*(volatile byte xdata *) 0xF5B7)
+#define    r_fd_cfoe_ifoe_done  0xF5B7
+#define fd_cfoe_ifoe_done_pos 0
+#define fd_cfoe_ifoe_done_len 1
+#define fd_cfoe_ifoe_done_lsb 0
+#define xd_p_reg_cfoe_ifoe_spec_inv (*(volatile byte xdata *) 0xF5B8)
+#define    p_reg_cfoe_ifoe_spec_inv 0xF5B8
+#define reg_cfoe_ifoe_spec_inv_pos 0
+#define reg_cfoe_ifoe_spec_inv_len 1
+#define reg_cfoe_ifoe_spec_inv_lsb 0
+#define xd_p_reg_cfoe_divg_int  (*(volatile byte xdata *) 0xF5B9)
+#define    p_reg_cfoe_divg_int  0xF5B9
+#define reg_cfoe_divg_int_pos 0
+#define reg_cfoe_divg_int_len 1
+#define reg_cfoe_divg_int_lsb 0
+#define xd_r_reg_cfoe_divg_flag (*(volatile byte xdata *) 0xF5BA)
+#define    r_reg_cfoe_divg_flag 0xF5BA
+#define reg_cfoe_divg_flag_pos 0
+#define reg_cfoe_divg_flag_len 1
+#define reg_cfoe_divg_flag_lsb 0
+#define xd_p_reg_sfoe_en    (*(volatile byte xdata *) 0xF5BB)
+#define    p_reg_sfoe_en    0xF5BB
+#define reg_sfoe_en_pos 0
+#define reg_sfoe_en_len 1
+#define reg_sfoe_en_lsb 0
+#define xd_p_reg_sfoe_dis   (*(volatile byte xdata *) 0xF5BC)
+#define    p_reg_sfoe_dis   0xF5BC
+#define reg_sfoe_dis_pos 0
+#define reg_sfoe_dis_len 1
+#define reg_sfoe_dis_lsb 0
+#define xd_p_reg_sfoe_rst   (*(volatile byte xdata *) 0xF5BD)
+#define    p_reg_sfoe_rst   0xF5BD
+#define reg_sfoe_rst_pos 0
+#define reg_sfoe_rst_len 1
+#define reg_sfoe_rst_lsb 0
+#define xd_p_reg_sfoe_vld_int   (*(volatile byte xdata *) 0xF5BE)
+#define    p_reg_sfoe_vld_int   0xF5BE
+#define reg_sfoe_vld_int_pos 0
+#define reg_sfoe_vld_int_len 1
+#define reg_sfoe_vld_int_lsb 0
+#define xd_p_reg_sfoe_lm_en (*(volatile byte xdata *) 0xF5BF)
+#define    p_reg_sfoe_lm_en 0xF5BF
+#define reg_sfoe_lm_en_pos 0
+#define reg_sfoe_lm_en_len 1
+#define reg_sfoe_lm_en_lsb 0
+#define xd_p_reg_sfoe_divg_int  (*(volatile byte xdata *) 0xF5C0)
+#define    p_reg_sfoe_divg_int  0xF5C0
+#define reg_sfoe_divg_int_pos 0
+#define reg_sfoe_divg_int_len 1
+#define reg_sfoe_divg_int_lsb 0
+#define xd_r_reg_sfoe_divg_flag (*(volatile byte xdata *) 0xF5C1)
+#define    r_reg_sfoe_divg_flag 0xF5C1
+#define reg_sfoe_divg_flag_pos 0
+#define reg_sfoe_divg_flag_len 1
+#define reg_sfoe_divg_flag_lsb 0
+#define xd_p_reg_fft_rst    (*(volatile byte xdata *) 0xF5C2)
+#define    p_reg_fft_rst    0xF5C2
+#define reg_fft_rst_pos 0
+#define reg_fft_rst_len 1
+#define reg_fft_rst_lsb 0
+#define xd_p_reg_fft_mask2_en   (*(volatile byte xdata *) 0xF5C3)
+#define    p_reg_fft_mask2_en   0xF5C3
+#define reg_fft_mask2_en_pos 0
+#define reg_fft_mask2_en_len 1
+#define reg_fft_mask2_en_lsb 0
+#define xd_p_reg_fft_mask3_en   (*(volatile byte xdata *) 0xF5C4)
+#define    p_reg_fft_mask3_en   0xF5C4
+#define reg_fft_mask3_en_pos 0
+#define reg_fft_mask3_en_len 1
+#define reg_fft_mask3_en_lsb 0
+#define xd_p_reg_fft_crc_en (*(volatile byte xdata *) 0xF5C5)
+#define    p_reg_fft_crc_en 0xF5C5
+#define reg_fft_crc_en_pos 0
+#define reg_fft_crc_en_len 1
+#define reg_fft_crc_en_lsb 0
+#define xd_p_reg_fft_mask0_en   (*(volatile byte xdata *) 0xF5C6)
+#define    p_reg_fft_mask0_en   0xF5C6
+#define reg_fft_mask0_en_pos 0
+#define reg_fft_mask0_en_len 1
+#define reg_fft_mask0_en_lsb 0
+#define xd_p_reg_fft_mask1_en   (*(volatile byte xdata *) 0xF5C7)
+#define    p_reg_fft_mask1_en   0xF5C7
+#define reg_fft_mask1_en_pos 0
+#define reg_fft_mask1_en_len 1
+#define reg_fft_mask1_en_lsb 0
+#define xd_p_fd_fste_en (*(volatile byte xdata *) 0xF5C8)
+#define    p_fd_fste_en 0xF5C8
+#define fd_fste_en_pos 0
+#define fd_fste_en_len 1
+#define fd_fste_en_lsb 0
+#define xd_p_reg_feq_eh2_comp_en    (*(volatile byte xdata *) 0xF5C9)
+#define    p_reg_feq_eh2_comp_en    0xF5C9
+#define reg_feq_eh2_comp_en_pos 0
+#define reg_feq_eh2_comp_en_len 1
+#define reg_feq_eh2_comp_en_lsb 0
+#define xd_p_reg_feq_read_update    (*(volatile byte xdata *) 0xF5CA)
+#define    p_reg_feq_read_update    0xF5CA
+#define reg_feq_read_update_pos 0
+#define reg_feq_read_update_len 1
+#define reg_feq_read_update_lsb 0
+#define xd_p_reg_feq_data_vld   (*(volatile byte xdata *) 0xF5CB)
+#define    p_reg_feq_data_vld   0xF5CB
+#define reg_feq_data_vld_pos 0
+#define reg_feq_data_vld_len 1
+#define reg_feq_data_vld_lsb 0
+#define xd_p_reg_feq_tone_idx_7_0   (*(volatile byte xdata *) 0xF5CC)
+#define    p_reg_feq_tone_idx_7_0   0xF5CC
+#define reg_feq_tone_idx_7_0_pos 0
+#define reg_feq_tone_idx_7_0_len 8
+#define reg_feq_tone_idx_7_0_lsb 0
+#define xd_p_reg_feq_tone_idx_12_8  (*(volatile byte xdata *) 0xF5CD)
+#define    p_reg_feq_tone_idx_12_8  0xF5CD
+#define reg_feq_tone_idx_12_8_pos 0
+#define reg_feq_tone_idx_12_8_len 5
+#define reg_feq_tone_idx_12_8_lsb 8
+#define xd_r_reg_feq_data_re_7_0    (*(volatile byte xdata *) 0xF5CE)
+#define    r_reg_feq_data_re_7_0    0xF5CE
+#define reg_feq_data_re_7_0_pos 0
+#define reg_feq_data_re_7_0_len 8
+#define reg_feq_data_re_7_0_lsb 0
+#define xd_r_reg_feq_data_re_15_8   (*(volatile byte xdata *) 0xF5CF)
+#define    r_reg_feq_data_re_15_8   0xF5CF
+#define reg_feq_data_re_15_8_pos 0
+#define reg_feq_data_re_15_8_len 8
+#define reg_feq_data_re_15_8_lsb 8
+#define xd_r_reg_feq_data_re_21_16  (*(volatile byte xdata *) 0xF5D0)
+#define    r_reg_feq_data_re_21_16  0xF5D0
+#define reg_feq_data_re_21_16_pos 0
+#define reg_feq_data_re_21_16_len 6
+#define reg_feq_data_re_21_16_lsb 16
+#define xd_r_reg_feq_data_im_7_0    (*(volatile byte xdata *) 0xF5D1)
+#define    r_reg_feq_data_im_7_0    0xF5D1
+#define reg_feq_data_im_7_0_pos 0
+#define reg_feq_data_im_7_0_len 8
+#define reg_feq_data_im_7_0_lsb 0
+#define xd_r_reg_feq_data_im_15_8   (*(volatile byte xdata *) 0xF5D2)
+#define    r_reg_feq_data_im_15_8   0xF5D2
+#define reg_feq_data_im_15_8_pos 0
+#define reg_feq_data_im_15_8_len 8
+#define reg_feq_data_im_15_8_lsb 8
+#define xd_r_reg_feq_data_im_21_16  (*(volatile byte xdata *) 0xF5D3)
+#define    r_reg_feq_data_im_21_16  0xF5D3
+#define reg_feq_data_im_21_16_pos 0
+#define reg_feq_data_im_21_16_len 6
+#define reg_feq_data_im_21_16_lsb 16
+#define xd_r_reg_feq_data_h2_7_0    (*(volatile byte xdata *) 0xF5D4)
+#define    r_reg_feq_data_h2_7_0    0xF5D4
+#define reg_feq_data_h2_7_0_pos 0
+#define reg_feq_data_h2_7_0_len 8
+#define reg_feq_data_h2_7_0_lsb 0
+#define xd_r_reg_feq_data_h2_15_8   (*(volatile byte xdata *) 0xF5D5)
+#define    r_reg_feq_data_h2_15_8   0xF5D5
+#define reg_feq_data_h2_15_8_pos 0
+#define reg_feq_data_h2_15_8_len 8
+#define reg_feq_data_h2_15_8_lsb 8
+#define xd_r_reg_feq_data_h2_18_16  (*(volatile byte xdata *) 0xF5D6)
+#define    r_reg_feq_data_h2_18_16  0xF5D6
+#define reg_feq_data_h2_18_16_pos 0
+#define reg_feq_data_h2_18_16_len 3
+#define reg_feq_data_h2_18_16_lsb 16
+#define xd_p_reg_fs_en  (*(volatile byte xdata *) 0xF5D7)
+#define    p_reg_fs_en  0xF5D7
+#define reg_fs_en_pos 0
+#define reg_fs_en_len 1
+#define reg_fs_en_lsb 0
+#define xd_p_reg_fs_offset  (*(volatile byte xdata *) 0xF5D8)
+#define    p_reg_fs_offset  0xF5D8
+#define reg_fs_offset_pos 0
+#define reg_fs_offset_len 3
+#define reg_fs_offset_lsb 0
+#define xd_p_reg_fs_debug   (*(volatile byte xdata *) 0xF5D9)
+#define    p_reg_fs_debug   0xF5D9
+#define reg_fs_debug_pos 0
+#define reg_fs_debug_len 1
+#define reg_fs_debug_lsb 0
+#define xd_p_reg_fs_half_inv    (*(volatile byte xdata *) 0xF5DA)
+#define    p_reg_fs_half_inv    0xF5DA
+#define reg_fs_half_inv_pos 0
+#define reg_fs_half_inv_len 1
+#define reg_fs_half_inv_lsb 0
+#define xd_p_reg_cdpf_currentfftposition_7_0    (*(volatile byte xdata *) 0xF5DB)
+#define    p_reg_cdpf_currentfftposition_7_0    0xF5DB
+#define reg_cdpf_currentfftposition_7_0_pos 0
+#define reg_cdpf_currentfftposition_7_0_len 8
+#define reg_cdpf_currentfftposition_7_0_lsb 0
+#define xd_p_reg_cdpf_currentfftposition_14_8   (*(volatile byte xdata *) 0xF5DC)
+#define    p_reg_cdpf_currentfftposition_14_8   0xF5DC
+#define reg_cdpf_currentfftposition_14_8_pos 0
+#define reg_cdpf_currentfftposition_14_8_len 7
+#define reg_cdpf_currentfftposition_14_8_lsb 8
+#define xd_r_reg_cdpf_fftshift_7_0  (*(volatile byte xdata *) 0xF5DD)
+#define    r_reg_cdpf_fftshift_7_0  0xF5DD
+#define reg_cdpf_fftshift_7_0_pos 0
+#define reg_cdpf_fftshift_7_0_len 8
+#define reg_cdpf_fftshift_7_0_lsb 0
+#define xd_r_reg_cdpf_fftshift_13_8 (*(volatile byte xdata *) 0xF5DE)
+#define    r_reg_cdpf_fftshift_13_8 0xF5DE
+#define reg_cdpf_fftshift_13_8_pos 0
+#define reg_cdpf_fftshift_13_8_len 6
+#define reg_cdpf_fftshift_13_8_lsb 8
+#define xd_p_reg_cdpf_channelpowerdown_7_0  (*(volatile byte xdata *) 0xF5DF)
+#define    p_reg_cdpf_channelpowerdown_7_0  0xF5DF
+#define reg_cdpf_channelpowerdown_7_0_pos 0
+#define reg_cdpf_channelpowerdown_7_0_len 8
+#define reg_cdpf_channelpowerdown_7_0_lsb 0
+#define xd_p_reg_cdpf_channelpowerdown_10_8 (*(volatile byte xdata *) 0xF5E0)
+#define    p_reg_cdpf_channelpowerdown_10_8 0xF5E0
+#define reg_cdpf_channelpowerdown_10_8_pos 0
+#define reg_cdpf_channelpowerdown_10_8_len 3
+#define reg_cdpf_channelpowerdown_10_8_lsb 8
+#define xd_p_reg_cdpf_state (*(volatile byte xdata *) 0xF5E1)
+#define    p_reg_cdpf_state 0xF5E1
+#define reg_cdpf_state_pos 0
+#define reg_cdpf_state_len 4
+#define reg_cdpf_state_lsb 0
+#define xd_p_reg_cdpf_echotestsearchingrange    (*(volatile byte xdata *) 0xF5E2)
+#define    p_reg_cdpf_echotestsearchingrange    0xF5E2
+#define reg_cdpf_echotestsearchingrange_pos 0
+#define reg_cdpf_echotestsearchingrange_len 8
+#define reg_cdpf_echotestsearchingrange_lsb 0
+#define xd_p_reg_cdpf_rxsymboldelay (*(volatile byte xdata *) 0xF5E3)
+#define    p_reg_cdpf_rxsymboldelay 0xF5E3
+#define reg_cdpf_rxsymboldelay_pos 0
+#define reg_cdpf_rxsymboldelay_len 4
+#define reg_cdpf_rxsymboldelay_lsb 0
+#define xd_p_reg_cdpf_ceavesymbolno (*(volatile byte xdata *) 0xF5E4)
+#define    p_reg_cdpf_ceavesymbolno 0xF5E4
+#define reg_cdpf_ceavesymbolno_pos 0
+#define reg_cdpf_ceavesymbolno_len 4
+#define reg_cdpf_ceavesymbolno_lsb 0
+#define xd_p_reg_cdpf_ceshift   (*(volatile byte xdata *) 0xF5E5)
+#define    p_reg_cdpf_ceshift   0xF5E5
+#define reg_cdpf_ceshift_pos 0
+#define reg_cdpf_ceshift_len 3
+#define reg_cdpf_ceshift_lsb 0
+#define xd_p_reg_cdpf_postpreechotry    (*(volatile byte xdata *) 0xF5E6)
+#define    p_reg_cdpf_postpreechotry    0xF5E6
+#define reg_cdpf_postpreechotry_pos 0
+#define reg_cdpf_postpreechotry_len 2
+#define reg_cdpf_postpreechotry_lsb 0
+#define xd_p_reg_cdpf_en    (*(volatile byte xdata *) 0xF5E7)
+#define    p_reg_cdpf_en    0xF5E7
+#define reg_cdpf_en_pos 0
+#define reg_cdpf_en_len 1
+#define reg_cdpf_en_lsb 0
+#define xd_p_reg_cdpf_stateready    (*(volatile byte xdata *) 0xF5E8)
+#define    p_reg_cdpf_stateready    0xF5E8
+#define reg_cdpf_stateready_pos 0
+#define reg_cdpf_stateready_len 1
+#define reg_cdpf_stateready_lsb 0
+#define xd_r_reg_cdpf_prepostpowercompare   (*(volatile byte xdata *) 0xF5E9)
+#define    r_reg_cdpf_prepostpowercompare   0xF5E9
+#define reg_cdpf_prepostpowercompare_pos 0
+#define reg_cdpf_prepostpowercompare_len 1
+#define reg_cdpf_prepostpowercompare_lsb 0
+#define xd_r_reg_cdpf_candidateno   (*(volatile byte xdata *) 0xF5EA)
+#define    r_reg_cdpf_candidateno   0xF5EA
+#define reg_cdpf_candidateno_pos 0
+#define reg_cdpf_candidateno_len 6
+#define reg_cdpf_candidateno_lsb 0
+#define xd_p_reg_cdpf_preechopower_7_0  (*(volatile byte xdata *) 0xF5EB)
+#define    p_reg_cdpf_preechopower_7_0  0xF5EB
+#define reg_cdpf_preechopower_7_0_pos 0
+#define reg_cdpf_preechopower_7_0_len 8
+#define reg_cdpf_preechopower_7_0_lsb 0
+#define xd_p_reg_cdpf_preechopower_15_8 (*(volatile byte xdata *) 0xF5EC)
+#define    p_reg_cdpf_preechopower_15_8 0xF5EC
+#define reg_cdpf_preechopower_15_8_pos 0
+#define reg_cdpf_preechopower_15_8_len 8
+#define reg_cdpf_preechopower_15_8_lsb 8
+#define xd_p_reg_cdpf_postechopower_7_0 (*(volatile byte xdata *) 0xF5ED)
+#define    p_reg_cdpf_postechopower_7_0 0xF5ED
+#define reg_cdpf_postechopower_7_0_pos 0
+#define reg_cdpf_postechopower_7_0_len 8
+#define reg_cdpf_postechopower_7_0_lsb 0
+#define xd_p_reg_cdpf_postechopower_15_8    (*(volatile byte xdata *) 0xF5EE)
+#define    p_reg_cdpf_postechopower_15_8    0xF5EE
+#define reg_cdpf_postechopower_15_8_pos 0
+#define reg_cdpf_postechopower_15_8_len 8
+#define reg_cdpf_postechopower_15_8_lsb 8
+#define xd_p_reg_cdpf_searchingend  (*(volatile byte xdata *) 0xF5EF)
+#define    p_reg_cdpf_searchingend  0xF5EF
+#define reg_cdpf_searchingend_pos 0
+#define reg_cdpf_searchingend_len 8
+#define reg_cdpf_searchingend_lsb 0
+#define xd_r_reg_cdpf_candidate_7_0 (*(volatile byte xdata *) 0xF5F0)
+#define    r_reg_cdpf_candidate_7_0 0xF5F0
+#define reg_cdpf_candidate_7_0_pos 0
+#define reg_cdpf_candidate_7_0_len 8
+#define reg_cdpf_candidate_7_0_lsb 0
+#define xd_r_reg_cdpf_candidate_15_8    (*(volatile byte xdata *) 0xF5F1)
+#define    r_reg_cdpf_candidate_15_8    0xF5F1
+#define reg_cdpf_candidate_15_8_pos 0
+#define reg_cdpf_candidate_15_8_len 8
+#define reg_cdpf_candidate_15_8_lsb 8
+#define xd_p_reg_cdpf_candidate_rptr    (*(volatile byte xdata *) 0xF5F2)
+#define    p_reg_cdpf_candidate_rptr    0xF5F2
+#define reg_cdpf_candidate_rptr_pos 0
+#define reg_cdpf_candidate_rptr_len 7
+#define reg_cdpf_candidate_rptr_lsb 0
+#define xd_p_reg_cdpf_candidate_rptr_force  (*(volatile byte xdata *) 0xF5F3)
+#define    p_reg_cdpf_candidate_rptr_force  0xF5F3
+#define reg_cdpf_candidate_rptr_force_pos 0
+#define reg_cdpf_candidate_rptr_force_len 1
+#define reg_cdpf_candidate_rptr_force_lsb 0
+#define xd_p_reg_cdpf_trialshiftoffset_7_0  (*(volatile byte xdata *) 0xF5F4)
+#define    p_reg_cdpf_trialshiftoffset_7_0  0xF5F4
+#define reg_cdpf_trialshiftoffset_7_0_pos 0
+#define reg_cdpf_trialshiftoffset_7_0_len 8
+#define reg_cdpf_trialshiftoffset_7_0_lsb 0
+#define xd_p_reg_cdpf_trialshiftoffset_13_8 (*(volatile byte xdata *) 0xF5F5)
+#define    p_reg_cdpf_trialshiftoffset_13_8 0xF5F5
+#define reg_cdpf_trialshiftoffset_13_8_pos 0
+#define reg_cdpf_trialshiftoffset_13_8_len 6
+#define reg_cdpf_trialshiftoffset_13_8_lsb 8
+#define xd_p_reg_cdpf_channellength_7_0 (*(volatile byte xdata *) 0xF5F6)
+#define    p_reg_cdpf_channellength_7_0 0xF5F6
+#define reg_cdpf_channellength_7_0_pos 0
+#define reg_cdpf_channellength_7_0_len 8
+#define reg_cdpf_channellength_7_0_lsb 0
+#define xd_p_reg_cdpf_channellength_12_8    (*(volatile byte xdata *) 0xF5F7)
+#define    p_reg_cdpf_channellength_12_8    0xF5F7
+#define reg_cdpf_channellength_12_8_pos 0
+#define reg_cdpf_channellength_12_8_len 5
+#define reg_cdpf_channellength_12_8_lsb 8
+#define xd_p_reg_cdpf_hardwaresort  (*(volatile byte xdata *) 0xF5F8)
+#define    p_reg_cdpf_hardwaresort  0xF5F8
+#define reg_cdpf_hardwaresort_pos 0
+#define reg_cdpf_hardwaresort_len 1
+#define reg_cdpf_hardwaresort_lsb 0
+#define xd_p_reg_cdpf_maxcandidateno    (*(volatile byte xdata *) 0xF5F9)
+#define    p_reg_cdpf_maxcandidateno    0xF5F9
+#define reg_cdpf_maxcandidateno_pos 0
+#define reg_cdpf_maxcandidateno_len 3
+#define reg_cdpf_maxcandidateno_lsb 0
+#define xd_p_reg_cdpf_channelleftindex  (*(volatile byte xdata *) 0xF5FA)
+#define    p_reg_cdpf_channelleftindex  0xF5FA
+#define reg_cdpf_channelleftindex_pos 0
+#define reg_cdpf_channelleftindex_len 4
+#define reg_cdpf_channelleftindex_lsb 0
+#define xd_r_reg_cdpf_fdishift_7_0  (*(volatile byte xdata *) 0xF5FB)
+#define    r_reg_cdpf_fdishift_7_0  0xF5FB
+#define reg_cdpf_fdishift_7_0_pos 0
+#define reg_cdpf_fdishift_7_0_len 8
+#define reg_cdpf_fdishift_7_0_lsb 0
+#define xd_r_reg_cdpf_fdishift_15_8 (*(volatile byte xdata *) 0xF5FC)
+#define    r_reg_cdpf_fdishift_15_8 0xF5FC
+#define reg_cdpf_fdishift_15_8_pos 0
+#define reg_cdpf_fdishift_15_8_len 8
+#define reg_cdpf_fdishift_15_8_lsb 8
+#define xd_p_reg_cdpf_guardband (*(volatile byte xdata *) 0xF5FD)
+#define    p_reg_cdpf_guardband 0xF5FD
+#define reg_cdpf_guardband_pos 0
+#define reg_cdpf_guardband_len 5
+#define reg_cdpf_guardband_lsb 0
+#define xd_p_reg_cdpf_maxtonemaxindex_7_0   (*(volatile byte xdata *) 0xF5FE)
+#define    p_reg_cdpf_maxtonemaxindex_7_0   0xF5FE
+#define reg_cdpf_maxtonemaxindex_7_0_pos 0
+#define reg_cdpf_maxtonemaxindex_7_0_len 8
+#define reg_cdpf_maxtonemaxindex_7_0_lsb 0
+#define xd_p_reg_cdpf_maxtonemaxindex_12_8  (*(volatile byte xdata *) 0xF5FF)
+#define    p_reg_cdpf_maxtonemaxindex_12_8  0xF5FF
+#define reg_cdpf_maxtonemaxindex_12_8_pos 0
+#define reg_cdpf_maxtonemaxindex_12_8_len 5
+#define reg_cdpf_maxtonemaxindex_12_8_lsb 8
+#define xd_p_reg_cdpf_fdiw0 (*(volatile byte xdata *) 0xF600)
+#define    p_reg_cdpf_fdiw0 0xF600
+#define reg_cdpf_fdiw0_pos 0
+#define reg_cdpf_fdiw0_len 7
+#define reg_cdpf_fdiw0_lsb 0
+#define xd_p_reg_cdpf_fdiw1 (*(volatile byte xdata *) 0xF601)
+#define    p_reg_cdpf_fdiw1 0xF601
+#define reg_cdpf_fdiw1_pos 0
+#define reg_cdpf_fdiw1_len 7
+#define reg_cdpf_fdiw1_lsb 0
+#define xd_p_reg_cdpf_fdiw2 (*(volatile byte xdata *) 0xF602)
+#define    p_reg_cdpf_fdiw2 0xF602
+#define reg_cdpf_fdiw2_pos 0
+#define reg_cdpf_fdiw2_len 7
+#define reg_cdpf_fdiw2_lsb 0
+#define xd_p_reg_cdpf_fdiw3 (*(volatile byte xdata *) 0xF603)
+#define    p_reg_cdpf_fdiw3 0xF603
+#define reg_cdpf_fdiw3_pos 0
+#define reg_cdpf_fdiw3_len 7
+#define reg_cdpf_fdiw3_lsb 0
+#define xd_p_reg_cdpf_fdiw4 (*(volatile byte xdata *) 0xF604)
+#define    p_reg_cdpf_fdiw4 0xF604
+#define reg_cdpf_fdiw4_pos 0
+#define reg_cdpf_fdiw4_len 7
+#define reg_cdpf_fdiw4_lsb 0
+#define xd_p_reg_cdpf_fdiw5 (*(volatile byte xdata *) 0xF605)
+#define    p_reg_cdpf_fdiw5 0xF605
+#define reg_cdpf_fdiw5_pos 0
+#define reg_cdpf_fdiw5_len 7
+#define reg_cdpf_fdiw5_lsb 0
+#define xd_p_reg_cdpf_fdiw6 (*(volatile byte xdata *) 0xF606)
+#define    p_reg_cdpf_fdiw6 0xF606
+#define reg_cdpf_fdiw6_pos 0
+#define reg_cdpf_fdiw6_len 7
+#define reg_cdpf_fdiw6_lsb 0
+#define xd_p_reg_cdpf_fdiw7 (*(volatile byte xdata *) 0xF607)
+#define    p_reg_cdpf_fdiw7 0xF607
+#define reg_cdpf_fdiw7_pos 0
+#define reg_cdpf_fdiw7_len 7
+#define reg_cdpf_fdiw7_lsb 0
+#define xd_r_reg_cdpf_fdiwindowsize (*(volatile byte xdata *) 0xF608)
+#define    r_reg_cdpf_fdiwindowsize 0xF608
+#define reg_cdpf_fdiwindowsize_pos 0
+#define reg_cdpf_fdiwindowsize_len 4
+#define reg_cdpf_fdiwindowsize_lsb 0
+#define xd_p_reg_stes_mode  (*(volatile byte xdata *) 0xF609)
+#define    p_reg_stes_mode  0xF609
+#define reg_stes_mode_pos 0
+#define reg_stes_mode_len 1
+#define reg_stes_mode_lsb 0
+#define xd_p_reg_stes_done_st   (*(volatile byte xdata *) 0xF60A)
+#define    p_reg_stes_done_st   0xF60A
+#define reg_stes_done_st_pos 0
+#define reg_stes_done_st_len 2
+#define reg_stes_done_st_lsb 0
+#define xd_p_reg_stes_done  (*(volatile byte xdata *) 0xF60B)
+#define    p_reg_stes_done  0xF60B
+#define reg_stes_done_pos 0
+#define reg_stes_done_len 1
+#define reg_stes_done_lsb 0
+#define xd_p_reg_stes_timing_7_0    (*(volatile byte xdata *) 0xF60C)
+#define    p_reg_stes_timing_7_0    0xF60C
+#define reg_stes_timing_7_0_pos 0
+#define reg_stes_timing_7_0_len 8
+#define reg_stes_timing_7_0_lsb 0
+#define xd_p_reg_stes_timing_15_8   (*(volatile byte xdata *) 0xF60D)
+#define    p_reg_stes_timing_15_8   0xF60D
+#define reg_stes_timing_15_8_pos 0
+#define reg_stes_timing_15_8_len 8
+#define reg_stes_timing_15_8_lsb 8
+#define xd_p_reg_stes_sym_tot_adj_thre_7_0  (*(volatile byte xdata *) 0xF60E)
+#define    p_reg_stes_sym_tot_adj_thre_7_0  0xF60E
+#define reg_stes_sym_tot_adj_thre_7_0_pos 0
+#define reg_stes_sym_tot_adj_thre_7_0_len 8
+#define reg_stes_sym_tot_adj_thre_7_0_lsb 0
+#define xd_p_reg_stes_sym_tot_adj_thre_15_8 (*(volatile byte xdata *) 0xF60F)
+#define    p_reg_stes_sym_tot_adj_thre_15_8 0xF60F
+#define reg_stes_sym_tot_adj_thre_15_8_pos 0
+#define reg_stes_sym_tot_adj_thre_15_8_len 8
+#define reg_stes_sym_tot_adj_thre_15_8_lsb 8
+#define xd_p_reg_stes_sym_thre_9_2  (*(volatile byte xdata *) 0xF610)
+#define    p_reg_stes_sym_thre_9_2  0xF610
+#define reg_stes_sym_thre_9_2_pos 0
+#define reg_stes_sym_thre_9_2_len 8
+#define reg_stes_sym_thre_9_2_lsb 0
+#define xd_p_reg_stes_sym_wo_adj_thre_9_2   (*(volatile byte xdata *) 0xF611)
+#define    p_reg_stes_sym_wo_adj_thre_9_2   0xF611
+#define reg_stes_sym_wo_adj_thre_9_2_pos 0
+#define reg_stes_sym_wo_adj_thre_9_2_len 8
+#define reg_stes_sym_wo_adj_thre_9_2_lsb 0
+#define xd_p_reg_fste_i_adj_7_0 (*(volatile byte xdata *) 0xF612)
+#define    p_reg_fste_i_adj_7_0 0xF612
+#define reg_fste_i_adj_7_0_pos 0
+#define reg_fste_i_adj_7_0_len 8
+#define reg_fste_i_adj_7_0_lsb 0
+#define xd_p_reg_fste_i_adj_15_8    (*(volatile byte xdata *) 0xF613)
+#define    p_reg_fste_i_adj_15_8    0xF613
+#define reg_fste_i_adj_15_8_pos 0
+#define reg_fste_i_adj_15_8_len 8
+#define reg_fste_i_adj_15_8_lsb 8
+#define xd_r_fd_stes_iadj_val_7_0   (*(volatile byte xdata *) 0xF614)
+#define    r_fd_stes_iadj_val_7_0   0xF614
+#define fd_stes_iadj_val_7_0_pos 0
+#define fd_stes_iadj_val_7_0_len 8
+#define fd_stes_iadj_val_7_0_lsb 0
+#define xd_r_fd_stes_iadj_val_15_8  (*(volatile byte xdata *) 0xF615)
+#define    r_fd_stes_iadj_val_15_8  0xF615
+#define fd_stes_iadj_val_15_8_pos 0
+#define fd_stes_iadj_val_15_8_len 8
+#define fd_stes_iadj_val_15_8_lsb 8
+#define xd_r_fd_stes_symb_cnt_9_2   (*(volatile byte xdata *) 0xF616)
+#define    r_fd_stes_symb_cnt_9_2   0xF616
+#define fd_stes_symb_cnt_9_2_pos 0
+#define fd_stes_symb_cnt_9_2_len 8
+#define fd_stes_symb_cnt_9_2_lsb 0
+#define xd_r_fd_stes_snoi_cnt_9_2   (*(volatile byte xdata *) 0xF617)
+#define    r_fd_stes_snoi_cnt_9_2   0xF617
+#define fd_stes_snoi_cnt_9_2_pos 0
+#define fd_stes_snoi_cnt_9_2_len 8
+#define fd_stes_snoi_cnt_9_2_lsb 0
+#define xd_r_fd_last_iadj_val_7_0   (*(volatile byte xdata *) 0xF618)
+#define    r_fd_last_iadj_val_7_0   0xF618
+#define fd_last_iadj_val_7_0_pos 0
+#define fd_last_iadj_val_7_0_len 8
+#define fd_last_iadj_val_7_0_lsb 0
+#define xd_r_fd_last_iadj_val_15_8  (*(volatile byte xdata *) 0xF619)
+#define    r_fd_last_iadj_val_15_8  0xF619
+#define fd_last_iadj_val_15_8_pos 0
+#define fd_last_iadj_val_15_8_len 8
+#define fd_last_iadj_val_15_8_lsb 8
+#define xd_p_reg_stes_bypass    (*(volatile byte xdata *) 0xF61A)
+#define    p_reg_stes_bypass    0xF61A
+#define reg_stes_bypass_pos 0
+#define reg_stes_bypass_len 1
+#define reg_stes_bypass_lsb 0
+#define xd_p_reg_stes_best_timing_idx   (*(volatile byte xdata *) 0xF61B)
+#define    p_reg_stes_best_timing_idx   0xF61B
+#define reg_stes_best_timing_idx_pos 0
+#define reg_stes_best_timing_idx_len 4
+#define reg_stes_best_timing_idx_lsb 0
+#define xd_p_reg_stes_iadj_val_7_0  (*(volatile byte xdata *) 0xF61C)
+#define    p_reg_stes_iadj_val_7_0  0xF61C
+#define reg_stes_iadj_val_7_0_pos 0
+#define reg_stes_iadj_val_7_0_len 8
+#define reg_stes_iadj_val_7_0_lsb 0
+#define xd_p_reg_stes_iadj_val_15_8 (*(volatile byte xdata *) 0xF61D)
+#define    p_reg_stes_iadj_val_15_8 0xF61D
+#define reg_stes_iadj_val_15_8_pos 0
+#define reg_stes_iadj_val_15_8_len 8
+#define reg_stes_iadj_val_15_8_lsb 8
+#define xd_p_reg_p_ste_start_guard_7_0  (*(volatile byte xdata *) 0xF620)
+#define    p_reg_p_ste_start_guard_7_0  0xF620
+#define reg_p_ste_start_guard_7_0_pos 0
+#define reg_p_ste_start_guard_7_0_len 8
+#define reg_p_ste_start_guard_7_0_lsb 0
+#define xd_p_reg_p_ste_start_guard_9_8  (*(volatile byte xdata *) 0xF621)
+#define    p_reg_p_ste_start_guard_9_8  0xF621
+#define reg_p_ste_start_guard_9_8_pos 0
+#define reg_p_ste_start_guard_9_8_len 2
+#define reg_p_ste_start_guard_9_8_lsb 8
+#define xd_p_reg_p_ste_end_guard_7_0    (*(volatile byte xdata *) 0xF622)
+#define    p_reg_p_ste_end_guard_7_0    0xF622
+#define reg_p_ste_end_guard_7_0_pos 0
+#define reg_p_ste_end_guard_7_0_len 8
+#define reg_p_ste_end_guard_7_0_lsb 0
+#define xd_p_reg_p_ste_end_guard_9_8    (*(volatile byte xdata *) 0xF623)
+#define    p_reg_p_ste_end_guard_9_8    0xF623
+#define reg_p_ste_end_guard_9_8_pos 0
+#define reg_p_ste_end_guard_9_8_len 2
+#define reg_p_ste_end_guard_9_8_lsb 8
+#define xd_r_reg_r_ste_wrong_beacon_count   (*(volatile byte xdata *) 0xF624)
+#define    r_reg_r_ste_wrong_beacon_count   0xF624
+#define reg_r_ste_wrong_beacon_count_pos 0
+#define reg_r_ste_wrong_beacon_count_len 7
+#define reg_r_ste_wrong_beacon_count_lsb 0
+#define xd_p_reg_p_fccid_en (*(volatile byte xdata *) 0xF625)
+#define    p_reg_p_fccid_en 0xF625
+#define reg_p_fccid_en_pos 0
+#define reg_p_fccid_en_len 1
+#define reg_p_fccid_en_lsb 0
+#define xd_p_reg_p_fccid_fft_ave_symbol_num (*(volatile byte xdata *) 0xF626)
+#define    p_reg_p_fccid_fft_ave_symbol_num 0xF626
+#define reg_p_fccid_fft_ave_symbol_num_pos 0
+#define reg_p_fccid_fft_ave_symbol_num_len 6
+#define reg_p_fccid_fft_ave_symbol_num_lsb 0
+#define xd_p_reg_p_fccid_fft_work_start_tone_7_0    (*(volatile byte xdata *) 0xF627)
+#define    p_reg_p_fccid_fft_work_start_tone_7_0    0xF627
+#define reg_p_fccid_fft_work_start_tone_7_0_pos 0
+#define reg_p_fccid_fft_work_start_tone_7_0_len 8
+#define reg_p_fccid_fft_work_start_tone_7_0_lsb 0
+#define xd_p_reg_p_fccid_fft_work_start_tone_12_8   (*(volatile byte xdata *) 0xF628)
+#define    p_reg_p_fccid_fft_work_start_tone_12_8   0xF628
+#define reg_p_fccid_fft_work_start_tone_12_8_pos 0
+#define reg_p_fccid_fft_work_start_tone_12_8_len 5
+#define reg_p_fccid_fft_work_start_tone_12_8_lsb 8
+#define xd_p_reg_p_fccid_fft_work_end_tone_7_0  (*(volatile byte xdata *) 0xF629)
+#define    p_reg_p_fccid_fft_work_end_tone_7_0  0xF629
+#define reg_p_fccid_fft_work_end_tone_7_0_pos 0
+#define reg_p_fccid_fft_work_end_tone_7_0_len 8
+#define reg_p_fccid_fft_work_end_tone_7_0_lsb 0
+#define xd_p_reg_p_fccid_fft_work_end_tone_12_8 (*(volatile byte xdata *) 0xF62A)
+#define    p_reg_p_fccid_fft_work_end_tone_12_8 0xF62A
+#define reg_p_fccid_fft_work_end_tone_12_8_pos 0
+#define reg_p_fccid_fft_work_end_tone_12_8_len 5
+#define reg_p_fccid_fft_work_end_tone_12_8_lsb 8
+#define xd_p_reg_p_fccid_peak_to_th_divider (*(volatile byte xdata *) 0xF62B)
+#define    p_reg_p_fccid_peak_to_th_divider 0xF62B
+#define reg_p_fccid_peak_to_th_divider_pos 0
+#define reg_p_fccid_peak_to_th_divider_len 4
+#define reg_p_fccid_peak_to_th_divider_lsb 0
+#define xd_p_reg_p_fccid_peak_to_th_mode    (*(volatile byte xdata *) 0xF62C)
+#define    p_reg_p_fccid_peak_to_th_mode    0xF62C
+#define reg_p_fccid_peak_to_th_mode_pos 0
+#define reg_p_fccid_peak_to_th_mode_len 2
+#define reg_p_fccid_peak_to_th_mode_lsb 0
+#define xd_p_reg_p_fccid_search_mode    (*(volatile byte xdata *) 0xF62D)
+#define    p_reg_p_fccid_search_mode    0xF62D
+#define reg_p_fccid_search_mode_pos 0
+#define reg_p_fccid_search_mode_len 1
+#define reg_p_fccid_search_mode_lsb 0
+#define xd_p_reg_p_fccid_group_th   (*(volatile byte xdata *) 0xF62E)
+#define    p_reg_p_fccid_group_th   0xF62E
+#define reg_p_fccid_group_th_pos 0
+#define reg_p_fccid_group_th_len 7
+#define reg_p_fccid_group_th_lsb 0
+#define xd_p_reg_p_fccid_search_rdy (*(volatile byte xdata *) 0xF62F)
+#define    p_reg_p_fccid_search_rdy 0xF62F
+#define reg_p_fccid_search_rdy_pos 0
+#define reg_p_fccid_search_rdy_len 1
+#define reg_p_fccid_search_rdy_lsb 0
+#define xd_r_reg_r_fccid_fft_ave_read_out_7_0   (*(volatile byte xdata *) 0xF630)
+#define    r_reg_r_fccid_fft_ave_read_out_7_0   0xF630
+#define reg_r_fccid_fft_ave_read_out_7_0_pos 0
+#define reg_r_fccid_fft_ave_read_out_7_0_len 8
+#define reg_r_fccid_fft_ave_read_out_7_0_lsb 0
+#define xd_r_reg_r_fccid_fft_ave_read_out_15_8  (*(volatile byte xdata *) 0xF631)
+#define    r_reg_r_fccid_fft_ave_read_out_15_8  0xF631
+#define reg_r_fccid_fft_ave_read_out_15_8_pos 0
+#define reg_r_fccid_fft_ave_read_out_15_8_len 8
+#define reg_r_fccid_fft_ave_read_out_15_8_lsb 8
+#define xd_r_reg_r_fccid_large_tone_num_7_0 (*(volatile byte xdata *) 0xF632)
+#define    r_reg_r_fccid_large_tone_num_7_0 0xF632
+#define reg_r_fccid_large_tone_num_7_0_pos 0
+#define reg_r_fccid_large_tone_num_7_0_len 8
+#define reg_r_fccid_large_tone_num_7_0_lsb 0
+#define xd_r_reg_r_fccid_large_tone_num_12_8    (*(volatile byte xdata *) 0xF633)
+#define    r_reg_r_fccid_large_tone_num_12_8    0xF633
+#define reg_r_fccid_large_tone_num_12_8_pos 0
+#define reg_r_fccid_large_tone_num_12_8_len 5
+#define reg_r_fccid_large_tone_num_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci1_start_tone_7_0    (*(volatile byte xdata *) 0xF634)
+#define    r_reg_r_fccid_cci1_start_tone_7_0    0xF634
+#define reg_r_fccid_cci1_start_tone_7_0_pos 0
+#define reg_r_fccid_cci1_start_tone_7_0_len 8
+#define reg_r_fccid_cci1_start_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci1_start_tone_12_8   (*(volatile byte xdata *) 0xF635)
+#define    r_reg_r_fccid_cci1_start_tone_12_8   0xF635
+#define reg_r_fccid_cci1_start_tone_12_8_pos 0
+#define reg_r_fccid_cci1_start_tone_12_8_len 5
+#define reg_r_fccid_cci1_start_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci1_end_tone_7_0  (*(volatile byte xdata *) 0xF636)
+#define    r_reg_r_fccid_cci1_end_tone_7_0  0xF636
+#define reg_r_fccid_cci1_end_tone_7_0_pos 0
+#define reg_r_fccid_cci1_end_tone_7_0_len 8
+#define reg_r_fccid_cci1_end_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci1_end_tone_12_8 (*(volatile byte xdata *) 0xF637)
+#define    r_reg_r_fccid_cci1_end_tone_12_8 0xF637
+#define reg_r_fccid_cci1_end_tone_12_8_pos 0
+#define reg_r_fccid_cci1_end_tone_12_8_len 5
+#define reg_r_fccid_cci1_end_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci1_peak_7_0  (*(volatile byte xdata *) 0xF638)
+#define    r_reg_r_fccid_cci1_peak_7_0  0xF638
+#define reg_r_fccid_cci1_peak_7_0_pos 0
+#define reg_r_fccid_cci1_peak_7_0_len 8
+#define reg_r_fccid_cci1_peak_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci1_peak_15_8 (*(volatile byte xdata *) 0xF639)
+#define    r_reg_r_fccid_cci1_peak_15_8 0xF639
+#define reg_r_fccid_cci1_peak_15_8_pos 0
+#define reg_r_fccid_cci1_peak_15_8_len 8
+#define reg_r_fccid_cci1_peak_15_8_lsb 8
+#define xd_r_reg_r_fccid_cci2_start_tone_7_0    (*(volatile byte xdata *) 0xF63A)
+#define    r_reg_r_fccid_cci2_start_tone_7_0    0xF63A
+#define reg_r_fccid_cci2_start_tone_7_0_pos 0
+#define reg_r_fccid_cci2_start_tone_7_0_len 8
+#define reg_r_fccid_cci2_start_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci2_start_tone_12_8   (*(volatile byte xdata *) 0xF63B)
+#define    r_reg_r_fccid_cci2_start_tone_12_8   0xF63B
+#define reg_r_fccid_cci2_start_tone_12_8_pos 0
+#define reg_r_fccid_cci2_start_tone_12_8_len 5
+#define reg_r_fccid_cci2_start_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci2_end_tone_7_0  (*(volatile byte xdata *) 0xF63C)
+#define    r_reg_r_fccid_cci2_end_tone_7_0  0xF63C
+#define reg_r_fccid_cci2_end_tone_7_0_pos 0
+#define reg_r_fccid_cci2_end_tone_7_0_len 8
+#define reg_r_fccid_cci2_end_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci2_end_tone_12_8 (*(volatile byte xdata *) 0xF63D)
+#define    r_reg_r_fccid_cci2_end_tone_12_8 0xF63D
+#define reg_r_fccid_cci2_end_tone_12_8_pos 0
+#define reg_r_fccid_cci2_end_tone_12_8_len 5
+#define reg_r_fccid_cci2_end_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci2_peak_7_0  (*(volatile byte xdata *) 0xF63E)
+#define    r_reg_r_fccid_cci2_peak_7_0  0xF63E
+#define reg_r_fccid_cci2_peak_7_0_pos 0
+#define reg_r_fccid_cci2_peak_7_0_len 8
+#define reg_r_fccid_cci2_peak_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci2_peak_15_8 (*(volatile byte xdata *) 0xF63F)
+#define    r_reg_r_fccid_cci2_peak_15_8 0xF63F
+#define reg_r_fccid_cci2_peak_15_8_pos 0
+#define reg_r_fccid_cci2_peak_15_8_len 8
+#define reg_r_fccid_cci2_peak_15_8_lsb 8
+#define xd_r_reg_r_fccid_cci3_start_tone_7_0    (*(volatile byte xdata *) 0xF640)
+#define    r_reg_r_fccid_cci3_start_tone_7_0    0xF640
+#define reg_r_fccid_cci3_start_tone_7_0_pos 0
+#define reg_r_fccid_cci3_start_tone_7_0_len 8
+#define reg_r_fccid_cci3_start_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci3_start_tone_12_8   (*(volatile byte xdata *) 0xF641)
+#define    r_reg_r_fccid_cci3_start_tone_12_8   0xF641
+#define reg_r_fccid_cci3_start_tone_12_8_pos 0
+#define reg_r_fccid_cci3_start_tone_12_8_len 5
+#define reg_r_fccid_cci3_start_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci3_end_tone_7_0  (*(volatile byte xdata *) 0xF642)
+#define    r_reg_r_fccid_cci3_end_tone_7_0  0xF642
+#define reg_r_fccid_cci3_end_tone_7_0_pos 0
+#define reg_r_fccid_cci3_end_tone_7_0_len 8
+#define reg_r_fccid_cci3_end_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci3_end_tone_12_8 (*(volatile byte xdata *) 0xF643)
+#define    r_reg_r_fccid_cci3_end_tone_12_8 0xF643
+#define reg_r_fccid_cci3_end_tone_12_8_pos 0
+#define reg_r_fccid_cci3_end_tone_12_8_len 5
+#define reg_r_fccid_cci3_end_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci3_peak_7_0  (*(volatile byte xdata *) 0xF644)
+#define    r_reg_r_fccid_cci3_peak_7_0  0xF644
+#define reg_r_fccid_cci3_peak_7_0_pos 0
+#define reg_r_fccid_cci3_peak_7_0_len 8
+#define reg_r_fccid_cci3_peak_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci3_peak_15_8 (*(volatile byte xdata *) 0xF645)
+#define    r_reg_r_fccid_cci3_peak_15_8 0xF645
+#define reg_r_fccid_cci3_peak_15_8_pos 0
+#define reg_r_fccid_cci3_peak_15_8_len 8
+#define reg_r_fccid_cci3_peak_15_8_lsb 8
+#define xd_r_reg_r_fccid_cci4_start_tone_7_0    (*(volatile byte xdata *) 0xF646)
+#define    r_reg_r_fccid_cci4_start_tone_7_0    0xF646
+#define reg_r_fccid_cci4_start_tone_7_0_pos 0
+#define reg_r_fccid_cci4_start_tone_7_0_len 8
+#define reg_r_fccid_cci4_start_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci4_start_tone_12_8   (*(volatile byte xdata *) 0xF647)
+#define    r_reg_r_fccid_cci4_start_tone_12_8   0xF647
+#define reg_r_fccid_cci4_start_tone_12_8_pos 0
+#define reg_r_fccid_cci4_start_tone_12_8_len 5
+#define reg_r_fccid_cci4_start_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci4_end_tone_7_0  (*(volatile byte xdata *) 0xF648)
+#define    r_reg_r_fccid_cci4_end_tone_7_0  0xF648
+#define reg_r_fccid_cci4_end_tone_7_0_pos 0
+#define reg_r_fccid_cci4_end_tone_7_0_len 8
+#define reg_r_fccid_cci4_end_tone_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci4_end_tone_12_8 (*(volatile byte xdata *) 0xF649)
+#define    r_reg_r_fccid_cci4_end_tone_12_8 0xF649
+#define reg_r_fccid_cci4_end_tone_12_8_pos 0
+#define reg_r_fccid_cci4_end_tone_12_8_len 5
+#define reg_r_fccid_cci4_end_tone_12_8_lsb 8
+#define xd_r_reg_r_fccid_cci4_peak_7_0  (*(volatile byte xdata *) 0xF64A)
+#define    r_reg_r_fccid_cci4_peak_7_0  0xF64A
+#define reg_r_fccid_cci4_peak_7_0_pos 0
+#define reg_r_fccid_cci4_peak_7_0_len 8
+#define reg_r_fccid_cci4_peak_7_0_lsb 0
+#define xd_r_reg_r_fccid_cci4_peak_15_8 (*(volatile byte xdata *) 0xF64B)
+#define    r_reg_r_fccid_cci4_peak_15_8 0xF64B
+#define reg_r_fccid_cci4_peak_15_8_pos 0
+#define reg_r_fccid_cci4_peak_15_8_len 8
+#define reg_r_fccid_cci4_peak_15_8_lsb 8
+#define xd_r_reg_r_fccid_cci1_rank  (*(volatile byte xdata *) 0xF64C)
+#define    r_reg_r_fccid_cci1_rank  0xF64C
+#define reg_r_fccid_cci1_rank_pos 0
+#define reg_r_fccid_cci1_rank_len 3
+#define reg_r_fccid_cci1_rank_lsb 0
+#define xd_r_reg_r_fccid_cci2_rank  (*(volatile byte xdata *) 0xF64D)
+#define    r_reg_r_fccid_cci2_rank  0xF64D
+#define reg_r_fccid_cci2_rank_pos 0
+#define reg_r_fccid_cci2_rank_len 3
+#define reg_r_fccid_cci2_rank_lsb 0
+#define xd_r_reg_r_fccid_cci3_rank  (*(volatile byte xdata *) 0xF64E)
+#define    r_reg_r_fccid_cci3_rank  0xF64E
+#define reg_r_fccid_cci3_rank_pos 0
+#define reg_r_fccid_cci3_rank_len 3
+#define reg_r_fccid_cci3_rank_lsb 0
+#define xd_r_reg_r_fccid_cci4_rank  (*(volatile byte xdata *) 0xF64F)
+#define    r_reg_r_fccid_cci4_rank  0xF64F
+#define reg_r_fccid_cci4_rank_pos 0
+#define reg_r_fccid_cci4_rank_len 3
+#define reg_r_fccid_cci4_rank_lsb 0
+#define xd_p_reg_p_csi_shift3   (*(volatile byte xdata *) 0xF650)
+#define    p_reg_p_csi_shift3   0xF650
+#define reg_p_csi_shift3_pos 0
+#define reg_p_csi_shift3_len 4
+#define reg_p_csi_shift3_lsb 0
+#define xd_p_reg_p_csi_mul3 (*(volatile byte xdata *) 0xF651)
+#define    p_reg_p_csi_mul3 0xF651
+#define reg_p_csi_mul3_pos 0
+#define reg_p_csi_mul3_len 8
+#define reg_p_csi_mul3_lsb 0
+#define xd_p_reg_p_csi_level3_7_0   (*(volatile byte xdata *) 0xF652)
+#define    p_reg_p_csi_level3_7_0   0xF652
+#define reg_p_csi_level3_7_0_pos 0
+#define reg_p_csi_level3_7_0_len 8
+#define reg_p_csi_level3_7_0_lsb 0
+#define xd_p_reg_p_csi_level3_8 (*(volatile byte xdata *) 0xF653)
+#define    p_reg_p_csi_level3_8 0xF653
+#define reg_p_csi_level3_8_pos 0
+#define reg_p_csi_level3_8_len 1
+#define reg_p_csi_level3_8_lsb 8
+#define xd_p_reg_p_csi_fftout_shift_fix_value   (*(volatile byte xdata *) 0xF654)
+#define    p_reg_p_csi_fftout_shift_fix_value   0xF654
+#define reg_p_csi_fftout_shift_fix_value_pos 0
+#define reg_p_csi_fftout_shift_fix_value_len 4
+#define reg_p_csi_fftout_shift_fix_value_lsb 0
+#define xd_p_reg_p_feq_scale_pow    (*(volatile byte xdata *) 0xF655)
+#define    p_reg_p_feq_scale_pow    0xF655
+#define reg_p_feq_scale_pow_pos 0
+#define reg_p_feq_scale_pow_len 6
+#define reg_p_feq_scale_pow_lsb 0
+#define xd_p_reg_p_csi_cp_idx   (*(volatile byte xdata *) 0xF656)
+#define    p_reg_p_csi_cp_idx   0xF656
+#define reg_p_csi_cp_idx_pos 0
+#define reg_p_csi_cp_idx_len 8
+#define reg_p_csi_cp_idx_lsb 0
+#define xd_p_reg_p_csi_outsh_zero_th_7_0    (*(volatile byte xdata *) 0xF657)
+#define    p_reg_p_csi_outsh_zero_th_7_0    0xF657
+#define reg_p_csi_outsh_zero_th_7_0_pos 0
+#define reg_p_csi_outsh_zero_th_7_0_len 8
+#define reg_p_csi_outsh_zero_th_7_0_lsb 0
+#define xd_p_reg_p_csi_outsh_zero_th_10_8   (*(volatile byte xdata *) 0xF658)
+#define    p_reg_p_csi_outsh_zero_th_10_8   0xF658
+#define reg_p_csi_outsh_zero_th_10_8_pos 0
+#define reg_p_csi_outsh_zero_th_10_8_len 3
+#define reg_p_csi_outsh_zero_th_10_8_lsb 8
+#define xd_p_reg_p_csi_ar_ratio (*(volatile byte xdata *) 0xF659)
+#define    p_reg_p_csi_ar_ratio 0xF659
+#define reg_p_csi_ar_ratio_pos 0
+#define reg_p_csi_ar_ratio_len 8
+#define reg_p_csi_ar_ratio_lsb 0
+#define xd_p_reg_r_csi_cp_vld   (*(volatile byte xdata *) 0xF65A)
+#define    p_reg_r_csi_cp_vld   0xF65A
+#define reg_r_csi_cp_vld_pos 0
+#define reg_r_csi_cp_vld_len 1
+#define reg_r_csi_cp_vld_lsb 0
+#define xd_p_reg_r_csi_sp_vld   (*(volatile byte xdata *) 0xF65B)
+#define    p_reg_r_csi_sp_vld   0xF65B
+#define reg_r_csi_sp_vld_pos 0
+#define reg_r_csi_sp_vld_len 1
+#define reg_r_csi_sp_vld_lsb 0
+#define xd_p_reg_p_csi_fft_out_shift_en (*(volatile byte xdata *) 0xF65C)
+#define    p_reg_p_csi_fft_out_shift_en 0xF65C
+#define reg_p_csi_fft_out_shift_en_pos 0
+#define reg_p_csi_fft_out_shift_en_len 1
+#define reg_p_csi_fft_out_shift_en_lsb 0
+#define xd_p_reg_p_csi_feq_out_shift_en (*(volatile byte xdata *) 0xF65D)
+#define    p_reg_p_csi_feq_out_shift_en 0xF65D
+#define reg_p_csi_feq_out_shift_en_pos 0
+#define reg_p_csi_feq_out_shift_en_len 1
+#define reg_p_csi_feq_out_shift_en_lsb 0
+#define xd_p_reg_r_csi_cp_fft_out   (*(volatile byte xdata *) 0xF65E)
+#define    p_reg_r_csi_cp_fft_out   0xF65E
+#define reg_r_csi_cp_fft_out_pos 0
+#define reg_r_csi_cp_fft_out_len 1
+#define reg_r_csi_cp_fft_out_lsb 0
+#define xd_p_reg_r_csi_sp_feq_log2_out  (*(volatile byte xdata *) 0xF65F)
+#define    p_reg_r_csi_sp_feq_log2_out  0xF65F
+#define reg_r_csi_sp_feq_log2_out_pos 0
+#define reg_r_csi_sp_feq_log2_out_len 8
+#define reg_r_csi_sp_feq_log2_out_lsb 0
+#define xd_p_reg_r_csi_sp_fft_out   (*(volatile byte xdata *) 0xF660)
+#define    p_reg_r_csi_sp_fft_out   0xF660
+#define reg_r_csi_sp_fft_out_pos 0
+#define reg_r_csi_sp_fft_out_len 1
+#define reg_r_csi_sp_fft_out_lsb 0
+#define xd_p_reg_p_feq_eh2_from_fpcc_en (*(volatile byte xdata *) 0xF661)
+#define    p_reg_p_feq_eh2_from_fpcc_en 0xF661
+#define reg_p_feq_eh2_from_fpcc_en_pos 0
+#define reg_p_feq_eh2_from_fpcc_en_len 1
+#define reg_p_feq_eh2_from_fpcc_en_lsb 0
+#define xd_r_reg_r_fccid_fft_ave_peak_7_0   (*(volatile byte xdata *) 0xF662)
+#define    r_reg_r_fccid_fft_ave_peak_7_0   0xF662
+#define reg_r_fccid_fft_ave_peak_7_0_pos 0
+#define reg_r_fccid_fft_ave_peak_7_0_len 8
+#define reg_r_fccid_fft_ave_peak_7_0_lsb 0
+#define xd_r_reg_r_fccid_fft_ave_peak_15_8  (*(volatile byte xdata *) 0xF663)
+#define    r_reg_r_fccid_fft_ave_peak_15_8  0xF663
+#define reg_r_fccid_fft_ave_peak_15_8_pos 0
+#define reg_r_fccid_fft_ave_peak_15_8_len 8
+#define reg_r_fccid_fft_ave_peak_15_8_lsb 8
+#define xd_r_reg_r_fccid_fft_ave_peak_23_16 (*(volatile byte xdata *) 0xF664)
+#define    r_reg_r_fccid_fft_ave_peak_23_16 0xF664
+#define reg_r_fccid_fft_ave_peak_23_16_pos 0
+#define reg_r_fccid_fft_ave_peak_23_16_len 8
+#define reg_r_fccid_fft_ave_peak_23_16_lsb 16
+#define xd_r_reg_r_fccid_fft_ave_peak_26_24 (*(volatile byte xdata *) 0xF665)
+#define    r_reg_r_fccid_fft_ave_peak_26_24 0xF665
+#define reg_r_fccid_fft_ave_peak_26_24_pos 0
+#define reg_r_fccid_fft_ave_peak_26_24_len 3
+#define reg_r_fccid_fft_ave_peak_26_24_lsb 24
+#define xd_p_reg_p_fccid_fft_ave_read_rdy   (*(volatile byte xdata *) 0xF666)
+#define    p_reg_p_fccid_fft_ave_read_rdy   0xF666
+#define reg_p_fccid_fft_ave_read_rdy_pos 0
+#define reg_p_fccid_fft_ave_read_rdy_len 1
+#define reg_p_fccid_fft_ave_read_rdy_lsb 0
+#define xd_p_reg_p_fccid_fft_ave_read_index_7_0 (*(volatile byte xdata *) 0xF667)
+#define    p_reg_p_fccid_fft_ave_read_index_7_0 0xF667
+#define reg_p_fccid_fft_ave_read_index_7_0_pos 0
+#define reg_p_fccid_fft_ave_read_index_7_0_len 8
+#define reg_p_fccid_fft_ave_read_index_7_0_lsb 0
+#define xd_p_reg_p_fccid_fft_ave_read_index_12_8    (*(volatile byte xdata *) 0xF668)
+#define    p_reg_p_fccid_fft_ave_read_index_12_8    0xF668
+#define reg_p_fccid_fft_ave_read_index_12_8_pos 0
+#define reg_p_fccid_fft_ave_read_index_12_8_len 5
+#define reg_p_fccid_fft_ave_read_index_12_8_lsb 8
+#define xd_p_reg_cdpf_candidate_rw  (*(volatile byte xdata *) 0xF669)
+#define    p_reg_cdpf_candidate_rw  0xF669
+#define reg_cdpf_candidate_rw_pos 0
+#define reg_cdpf_candidate_rw_len 1
+#define reg_cdpf_candidate_rw_lsb 0
+#define xd_p_reg_cdpf_candidate_prog_7_0    (*(volatile byte xdata *) 0xF66A)
+#define    p_reg_cdpf_candidate_prog_7_0    0xF66A
+#define reg_cdpf_candidate_prog_7_0_pos 0
+#define reg_cdpf_candidate_prog_7_0_len 8
+#define reg_cdpf_candidate_prog_7_0_lsb 0
+#define xd_p_reg_cdpf_candidate_prog_15_8   (*(volatile byte xdata *) 0xF66B)
+#define    p_reg_cdpf_candidate_prog_15_8   0xF66B
+#define reg_cdpf_candidate_prog_15_8_pos 0
+#define reg_cdpf_candidate_prog_15_8_len 8
+#define reg_cdpf_candidate_prog_15_8_lsb 8
+#define xd_p_reg_cdpf_candidateno_prog  (*(volatile byte xdata *) 0xF66C)
+#define    p_reg_cdpf_candidateno_prog  0xF66C
+#define reg_cdpf_candidateno_prog_pos 0
+#define reg_cdpf_candidateno_prog_len 6
+#define reg_cdpf_candidateno_prog_lsb 0
+#define xd_p_reg_cdpf_candidateno_switch    (*(volatile byte xdata *) 0xF66D)
+#define    p_reg_cdpf_candidateno_switch    0xF66D
+#define reg_cdpf_candidateno_switch_pos 0
+#define reg_cdpf_candidateno_switch_len 1
+#define reg_cdpf_candidateno_switch_lsb 0
+#define xd_g_reg_tpsd_txmod (*(volatile byte xdata *) 0xF900)
+#define    g_reg_tpsd_txmod 0xF900
+#define reg_tpsd_txmod_pos 0
+#define reg_tpsd_txmod_len 2
+#define reg_tpsd_txmod_lsb 0
+#define xd_g_reg_tpsd_gi    (*(volatile byte xdata *) 0xF901)
+#define    g_reg_tpsd_gi    0xF901
+#define reg_tpsd_gi_pos 0
+#define reg_tpsd_gi_len 2
+#define reg_tpsd_gi_lsb 0
+#define xd_g_reg_tpsd_hier  (*(volatile byte xdata *) 0xF902)
+#define    g_reg_tpsd_hier  0xF902
+#define reg_tpsd_hier_pos 0
+#define reg_tpsd_hier_len 3
+#define reg_tpsd_hier_lsb 0
+#define xd_g_reg_tpsd_const (*(volatile byte xdata *) 0xF903)
+#define    g_reg_tpsd_const 0xF903
+#define reg_tpsd_const_pos 0
+#define reg_tpsd_const_len 2
+#define reg_tpsd_const_lsb 0
+#define xd_g_reg_bw (*(volatile byte xdata *) 0xF904)
+#define    g_reg_bw 0xF904
+#define reg_bw_pos 0
+#define reg_bw_len 2
+#define reg_bw_lsb 0
+#define xd_g_reg_dec_pri    (*(volatile byte xdata *) 0xF905)
+#define    g_reg_dec_pri    0xF905
+#define reg_dec_pri_pos 0
+#define reg_dec_pri_len 1
+#define reg_dec_pri_lsb 0
+#define xd_g_reg_tpsd_hpcr  (*(volatile byte xdata *) 0xF906)
+#define    g_reg_tpsd_hpcr  0xF906
+#define reg_tpsd_hpcr_pos 0
+#define reg_tpsd_hpcr_len 3
+#define reg_tpsd_hpcr_lsb 0
+#define xd_g_reg_tpsd_lpcr  (*(volatile byte xdata *) 0xF907)
+#define    g_reg_tpsd_lpcr  0xF907
+#define reg_tpsd_lpcr_pos 0
+#define reg_tpsd_lpcr_len 3
+#define reg_tpsd_lpcr_lsb 0
+#define xd_g_reg_tpsd_indep (*(volatile byte xdata *) 0xF908)
+#define    g_reg_tpsd_indep 0xF908
+#define reg_tpsd_indep_pos 0
+#define reg_tpsd_indep_len 1
+#define reg_tpsd_indep_lsb 0
+#define xd_g_reg_tpsd_tslice    (*(volatile byte xdata *) 0xF909)
+#define    g_reg_tpsd_tslice    0xF909
+#define reg_tpsd_tslice_pos 0
+#define reg_tpsd_tslice_len 1
+#define reg_tpsd_tslice_lsb 0
+#define xd_g_reg_tpsd_mpefec    (*(volatile byte xdata *) 0xF90A)
+#define    g_reg_tpsd_mpefec    0xF90A
+#define reg_tpsd_mpefec_pos 0
+#define reg_tpsd_mpefec_len 1
+#define reg_tpsd_mpefec_lsb 0
+#define xd_g_reg_sntc_en    (*(volatile byte xdata *) 0xF90B)
+#define    g_reg_sntc_en    0xF90B
+#define reg_sntc_en_pos 0
+#define reg_sntc_en_len 1
+#define reg_sntc_en_lsb 0
+#define xd_g_reg_intp_sys_div   (*(volatile byte xdata *) 0xF90C)
+#define    g_reg_intp_sys_div   0xF90C
+#define reg_intp_sys_div_pos 0
+#define reg_intp_sys_div_len 1
+#define reg_intp_sys_div_lsb 0
+#define xd_g_reg_clk_sntc_sel   (*(volatile byte xdata *) 0xF90D)
+#define    g_reg_clk_sntc_sel   0xF90D
+#define reg_clk_sntc_sel_pos 0
+#define reg_clk_sntc_sel_len 3
+#define reg_clk_sntc_sel_lsb 0
+#define xd_p_reg_ce_gs_force    (*(volatile byte xdata *) 0xFD00)
+#define    p_reg_ce_gs_force    0xFD00
+#define reg_ce_gs_force_pos 0
+#define reg_ce_gs_force_len 1
+#define reg_ce_gs_force_lsb 0
+#define xd_p_reg_ce_dagcgain_delay  (*(volatile byte xdata *) 0xFD01)
+#define    p_reg_ce_dagcgain_delay  0xFD01
+#define reg_ce_dagcgain_delay_pos 0
+#define reg_ce_dagcgain_delay_len 2
+#define reg_ce_dagcgain_delay_lsb 0
+#define xd_p_reg_ce_derot_en    (*(volatile byte xdata *) 0xFD02)
+#define    p_reg_ce_derot_en    0xFD02
+#define reg_ce_derot_en_pos 0
+#define reg_ce_derot_en_len 1
+#define reg_ce_derot_en_lsb 0
+#define xd_p_reg_ce_fctrl_en    (*(volatile byte xdata *) 0xFD05)
+#define    p_reg_ce_fctrl_en    0xFD05
+#define reg_ce_fctrl_en_pos 0
+#define reg_ce_fctrl_en_len 1
+#define reg_ce_fctrl_en_lsb 0
+#define xd_p_reg_ce_en  (*(volatile byte xdata *) 0xFD06)
+#define    p_reg_ce_en  0xFD06
+#define reg_ce_en_pos 0
+#define reg_ce_en_len 1
+#define reg_ce_en_lsb 0
+#define xd_p_reg_ce_sat_wes (*(volatile byte xdata *) 0xFD07)
+#define    p_reg_ce_sat_wes 0xFD07
+#define reg_ce_sat_wes_pos 0
+#define reg_ce_sat_wes_len 1
+#define reg_ce_sat_wes_lsb 0
+#define xd_p_reg_ce_sat_sigma2  (*(volatile byte xdata *) 0xFD08)
+#define    p_reg_ce_sat_sigma2  0xFD08
+#define reg_ce_sat_sigma2_pos 0
+#define reg_ce_sat_sigma2_len 1
+#define reg_ce_sat_sigma2_lsb 0
+#define xd_p_reg_ce_sat_tdi_br_re   (*(volatile byte xdata *) 0xFD09)
+#define    p_reg_ce_sat_tdi_br_re   0xFD09
+#define reg_ce_sat_tdi_br_re_pos 0
+#define reg_ce_sat_tdi_br_re_len 1
+#define reg_ce_sat_tdi_br_re_lsb 0
+#define xd_p_reg_ce_sat_tdi_br_im   (*(volatile byte xdata *) 0xFD0A)
+#define    p_reg_ce_sat_tdi_br_im   0xFD0A
+#define reg_ce_sat_tdi_br_im_pos 0
+#define reg_ce_sat_tdi_br_im_len 1
+#define reg_ce_sat_tdi_br_im_lsb 0
+#define xd_p_reg_ce_sat_tdi_ar_re   (*(volatile byte xdata *) 0xFD0B)
+#define    p_reg_ce_sat_tdi_ar_re   0xFD0B
+#define reg_ce_sat_tdi_ar_re_pos 0
+#define reg_ce_sat_tdi_ar_re_len 1
+#define reg_ce_sat_tdi_ar_re_lsb 0
+#define xd_p_reg_ce_sat_tdi_ar_im   (*(volatile byte xdata *) 0xFD0C)
+#define    p_reg_ce_sat_tdi_ar_im   0xFD0C
+#define reg_ce_sat_tdi_ar_im_pos 0
+#define reg_ce_sat_tdi_ar_im_len 1
+#define reg_ce_sat_tdi_ar_im_lsb 0
+#define xd_p_reg_ce_sat_fdi_br_re   (*(volatile byte xdata *) 0xFD0D)
+#define    p_reg_ce_sat_fdi_br_re   0xFD0D
+#define reg_ce_sat_fdi_br_re_pos 0
+#define reg_ce_sat_fdi_br_re_len 1
+#define reg_ce_sat_fdi_br_re_lsb 0
+#define xd_p_reg_ce_sat_fdi_br_im   (*(volatile byte xdata *) 0xFD0E)
+#define    p_reg_ce_sat_fdi_br_im   0xFD0E
+#define reg_ce_sat_fdi_br_im_pos 0
+#define reg_ce_sat_fdi_br_im_len 1
+#define reg_ce_sat_fdi_br_im_lsb 0
+#define xd_p_reg_ce_var_forced_value    (*(volatile byte xdata *) 0xFD0F)
+#define    p_reg_ce_var_forced_value    0xFD0F
+#define reg_ce_var_forced_value_pos 0
+#define reg_ce_var_forced_value_len 3
+#define reg_ce_var_forced_value_lsb 0
+#define xd_p_reg_ce_s1  (*(volatile byte xdata *) 0xFD10)
+#define    p_reg_ce_s1  0xFD10
+#define reg_ce_s1_pos 0
+#define reg_ce_s1_len 5
+#define reg_ce_s1_lsb 0
+#define xd_r_reg_ce_tdi_flatness_7_0    (*(volatile byte xdata *) 0xFD11)
+#define    r_reg_ce_tdi_flatness_7_0    0xFD11
+#define reg_ce_tdi_flatness_7_0_pos 0
+#define reg_ce_tdi_flatness_7_0_len 8
+#define reg_ce_tdi_flatness_7_0_lsb 0
+#define xd_r_reg_ce_tdi_flatness_8  (*(volatile byte xdata *) 0xFD12)
+#define    r_reg_ce_tdi_flatness_8  0xFD12
+#define reg_ce_tdi_flatness_8_pos 0
+#define reg_ce_tdi_flatness_8_len 1
+#define reg_ce_tdi_flatness_8_lsb 8
+#define xd_r_reg_ce_tone_7_0    (*(volatile byte xdata *) 0xFD13)
+#define    r_reg_ce_tone_7_0    0xFD13
+#define reg_ce_tone_7_0_pos 0
+#define reg_ce_tone_7_0_len 8
+#define reg_ce_tone_7_0_lsb 0
+#define xd_r_reg_ce_tone_12_8   (*(volatile byte xdata *) 0xFD14)
+#define    r_reg_ce_tone_12_8   0xFD14
+#define reg_ce_tone_12_8_pos 0
+#define reg_ce_tone_12_8_len 5
+#define reg_ce_tone_12_8_lsb 8
+#define xd_p_reg_ce_centroid_drift_th   (*(volatile byte xdata *) 0xFD15)
+#define    p_reg_ce_centroid_drift_th   0xFD15
+#define reg_ce_centroid_drift_th_pos 0
+#define reg_ce_centroid_drift_th_len 8
+#define reg_ce_centroid_drift_th_lsb 0
+#define xd_p_reg_ce_centroid_bias_inc_7_0   (*(volatile byte xdata *) 0xFD16)
+#define    p_reg_ce_centroid_bias_inc_7_0   0xFD16
+#define reg_ce_centroid_bias_inc_7_0_pos 0
+#define reg_ce_centroid_bias_inc_7_0_len 8
+#define reg_ce_centroid_bias_inc_7_0_lsb 0
+#define xd_p_reg_ce_centroid_bias_inc_8 (*(volatile byte xdata *) 0xFD17)
+#define    p_reg_ce_centroid_bias_inc_8 0xFD17
+#define reg_ce_centroid_bias_inc_8_pos 0
+#define reg_ce_centroid_bias_inc_8_len 1
+#define reg_ce_centroid_bias_inc_8_lsb 8
+#define xd_p_reg_ce_centroid_count_max  (*(volatile byte xdata *) 0xFD18)
+#define    p_reg_ce_centroid_count_max  0xFD18
+#define reg_ce_centroid_count_max_pos 0
+#define reg_ce_centroid_count_max_len 4
+#define reg_ce_centroid_count_max_lsb 0
+#define xd_p_reg_ce_var_th0_7_0 (*(volatile byte xdata *) 0xFD19)
+#define    p_reg_ce_var_th0_7_0 0xFD19
+#define reg_ce_var_th0_7_0_pos 0
+#define reg_ce_var_th0_7_0_len 8
+#define reg_ce_var_th0_7_0_lsb 0
+#define xd_p_reg_ce_var_th0_15_8    (*(volatile byte xdata *) 0xFD1A)
+#define    p_reg_ce_var_th0_15_8    0xFD1A
+#define reg_ce_var_th0_15_8_pos 0
+#define reg_ce_var_th0_15_8_len 8
+#define reg_ce_var_th0_15_8_lsb 8
+#define xd_p_reg_ce_var_th1_7_0 (*(volatile byte xdata *) 0xFD1B)
+#define    p_reg_ce_var_th1_7_0 0xFD1B
+#define reg_ce_var_th1_7_0_pos 0
+#define reg_ce_var_th1_7_0_len 8
+#define reg_ce_var_th1_7_0_lsb 0
+#define xd_p_reg_ce_var_th1_15_8    (*(volatile byte xdata *) 0xFD1C)
+#define    p_reg_ce_var_th1_15_8    0xFD1C
+#define reg_ce_var_th1_15_8_pos 0
+#define reg_ce_var_th1_15_8_len 8
+#define reg_ce_var_th1_15_8_lsb 8
+#define xd_p_reg_ce_var_th2_7_0 (*(volatile byte xdata *) 0xFD1D)
+#define    p_reg_ce_var_th2_7_0 0xFD1D
+#define reg_ce_var_th2_7_0_pos 0
+#define reg_ce_var_th2_7_0_len 8
+#define reg_ce_var_th2_7_0_lsb 0
+#define xd_p_reg_ce_var_th2_15_8    (*(volatile byte xdata *) 0xFD1E)
+#define    p_reg_ce_var_th2_15_8    0xFD1E
+#define reg_ce_var_th2_15_8_pos 0
+#define reg_ce_var_th2_15_8_len 8
+#define reg_ce_var_th2_15_8_lsb 8
+#define xd_p_reg_ce_var_th3_7_0 (*(volatile byte xdata *) 0xFD1F)
+#define    p_reg_ce_var_th3_7_0 0xFD1F
+#define reg_ce_var_th3_7_0_pos 0
+#define reg_ce_var_th3_7_0_len 8
+#define reg_ce_var_th3_7_0_lsb 0
+#define xd_p_reg_ce_var_th3_15_8    (*(volatile byte xdata *) 0xFD20)
+#define    p_reg_ce_var_th3_15_8    0xFD20
+#define reg_ce_var_th3_15_8_pos 0
+#define reg_ce_var_th3_15_8_len 8
+#define reg_ce_var_th3_15_8_lsb 8
+#define xd_p_reg_ce_var_th4_7_0 (*(volatile byte xdata *) 0xFD21)
+#define    p_reg_ce_var_th4_7_0 0xFD21
+#define reg_ce_var_th4_7_0_pos 0
+#define reg_ce_var_th4_7_0_len 8
+#define reg_ce_var_th4_7_0_lsb 0
+#define xd_p_reg_ce_var_th4_15_8    (*(volatile byte xdata *) 0xFD22)
+#define    p_reg_ce_var_th4_15_8    0xFD22
+#define reg_ce_var_th4_15_8_pos 0
+#define reg_ce_var_th4_15_8_len 8
+#define reg_ce_var_th4_15_8_lsb 8
+#define xd_p_reg_ce_var_th5_7_0 (*(volatile byte xdata *) 0xFD23)
+#define    p_reg_ce_var_th5_7_0 0xFD23
+#define reg_ce_var_th5_7_0_pos 0
+#define reg_ce_var_th5_7_0_len 8
+#define reg_ce_var_th5_7_0_lsb 0
+#define xd_p_reg_ce_var_th5_15_8    (*(volatile byte xdata *) 0xFD24)
+#define    p_reg_ce_var_th5_15_8    0xFD24
+#define reg_ce_var_th5_15_8_pos 0
+#define reg_ce_var_th5_15_8_len 8
+#define reg_ce_var_th5_15_8_lsb 8
+#define xd_p_reg_ce_var_th6_7_0 (*(volatile byte xdata *) 0xFD25)
+#define    p_reg_ce_var_th6_7_0 0xFD25
+#define reg_ce_var_th6_7_0_pos 0
+#define reg_ce_var_th6_7_0_len 8
+#define reg_ce_var_th6_7_0_lsb 0
+#define xd_p_reg_ce_var_th6_15_8    (*(volatile byte xdata *) 0xFD26)
+#define    p_reg_ce_var_th6_15_8    0xFD26
+#define reg_ce_var_th6_15_8_pos 0
+#define reg_ce_var_th6_15_8_len 8
+#define reg_ce_var_th6_15_8_lsb 8
+#define xd_p_reg_ce_var_max (*(volatile byte xdata *) 0xFD27)
+#define    p_reg_ce_var_max 0xFD27
+#define reg_ce_var_max_pos 0
+#define reg_ce_var_max_len 3
+#define reg_ce_var_max_lsb 0
+#define xd_p_reg_ce_cent_forced_en  (*(volatile byte xdata *) 0xFD28)
+#define    p_reg_ce_cent_forced_en  0xFD28
+#define reg_ce_cent_forced_en_pos 0
+#define reg_ce_cent_forced_en_len 1
+#define reg_ce_cent_forced_en_lsb 0
+#define xd_p_reg_ce_var_forced_en   (*(volatile byte xdata *) 0xFD29)
+#define    p_reg_ce_var_forced_en   0xFD29
+#define reg_ce_var_forced_en_pos 0
+#define reg_ce_var_forced_en_len 1
+#define reg_ce_var_forced_en_lsb 0
+#define xd_p_reg_ce_fctrl_auto_reset_en (*(volatile byte xdata *) 0xFD2A)
+#define    p_reg_ce_fctrl_auto_reset_en 0xFD2A
+#define reg_ce_fctrl_auto_reset_en_pos 0
+#define reg_ce_fctrl_auto_reset_en_len 1
+#define reg_ce_fctrl_auto_reset_en_lsb 0
+#define xd_p_reg_ce_cent_auto_clr_en    (*(volatile byte xdata *) 0xFD2B)
+#define    p_reg_ce_cent_auto_clr_en    0xFD2B
+#define reg_ce_cent_auto_clr_en_pos 0
+#define reg_ce_cent_auto_clr_en_len 1
+#define reg_ce_cent_auto_clr_en_lsb 0
+#define xd_p_reg_ce_fctrl_reset (*(volatile byte xdata *) 0xFD2C)
+#define    p_reg_ce_fctrl_reset 0xFD2C
+#define reg_ce_fctrl_reset_pos 0
+#define reg_ce_fctrl_reset_len 1
+#define reg_ce_fctrl_reset_lsb 0
+#define xd_p_reg_ce_cent_forced_value_7_0   (*(volatile byte xdata *) 0xFD2D)
+#define    p_reg_ce_cent_forced_value_7_0   0xFD2D
+#define reg_ce_cent_forced_value_7_0_pos 0
+#define reg_ce_cent_forced_value_7_0_len 8
+#define reg_ce_cent_forced_value_7_0_lsb 0
+#define xd_p_reg_ce_cent_forced_value_11_8  (*(volatile byte xdata *) 0xFD2E)
+#define    p_reg_ce_cent_forced_value_11_8  0xFD2E
+#define reg_ce_cent_forced_value_11_8_pos 0
+#define reg_ce_cent_forced_value_11_8_len 4
+#define reg_ce_cent_forced_value_11_8_lsb 8
+#define xd_p_reg_ce_cent_auto_clr_value_7_0 (*(volatile byte xdata *) 0xFD2F)
+#define    p_reg_ce_cent_auto_clr_value_7_0 0xFD2F
+#define reg_ce_cent_auto_clr_value_7_0_pos 0
+#define reg_ce_cent_auto_clr_value_7_0_len 8
+#define reg_ce_cent_auto_clr_value_7_0_lsb 0
+#define xd_p_reg_ce_cent_auto_clr_value_11_8    (*(volatile byte xdata *) 0xFD30)
+#define    p_reg_ce_cent_auto_clr_value_11_8    0xFD30
+#define reg_ce_cent_auto_clr_value_11_8_pos 0
+#define reg_ce_cent_auto_clr_value_11_8_len 4
+#define reg_ce_cent_auto_clr_value_11_8_lsb 8
+#define xd_p_reg_ce_centroid_max_7_0    (*(volatile byte xdata *) 0xFD31)
+#define    p_reg_ce_centroid_max_7_0    0xFD31
+#define reg_ce_centroid_max_7_0_pos 0
+#define reg_ce_centroid_max_7_0_len 8
+#define reg_ce_centroid_max_7_0_lsb 0
+#define xd_p_reg_ce_centroid_max_11_8   (*(volatile byte xdata *) 0xFD32)
+#define    p_reg_ce_centroid_max_11_8   0xFD32
+#define reg_ce_centroid_max_11_8_pos 0
+#define reg_ce_centroid_max_11_8_len 4
+#define reg_ce_centroid_max_11_8_lsb 8
+#define xd_p_reg_ce_fctrl_rd    (*(volatile byte xdata *) 0xFD33)
+#define    p_reg_ce_fctrl_rd    0xFD33
+#define reg_ce_fctrl_rd_pos 0
+#define reg_ce_fctrl_rd_len 1
+#define reg_ce_fctrl_rd_lsb 0
+#define xd_r_reg_ce_centroid_out_7_0    (*(volatile byte xdata *) 0xFD34)
+#define    r_reg_ce_centroid_out_7_0    0xFD34
+#define reg_ce_centroid_out_7_0_pos 0
+#define reg_ce_centroid_out_7_0_len 8
+#define reg_ce_centroid_out_7_0_lsb 0
+#define xd_r_reg_ce_centroid_out_11_8   (*(volatile byte xdata *) 0xFD35)
+#define    r_reg_ce_centroid_out_11_8   0xFD35
+#define reg_ce_centroid_out_11_8_pos 0
+#define reg_ce_centroid_out_11_8_len 4
+#define reg_ce_centroid_out_11_8_lsb 8
+#define xd_r_reg_ce_fctrl_rdy   (*(volatile byte xdata *) 0xFD36)
+#define    r_reg_ce_fctrl_rdy   0xFD36
+#define reg_ce_fctrl_rdy_pos 0
+#define reg_ce_fctrl_rdy_len 1
+#define reg_ce_fctrl_rdy_lsb 0
+#define xd_r_reg_ce_var (*(volatile byte xdata *) 0xFD37)
+#define    r_reg_ce_var 0xFD37
+#define reg_ce_var_pos 0
+#define reg_ce_var_len 3
+#define reg_ce_var_lsb 0
+#define xd_r_reg_ce_bias_7_0    (*(volatile byte xdata *) 0xFD38)
+#define    r_reg_ce_bias_7_0    0xFD38
+#define reg_ce_bias_7_0_pos 0
+#define reg_ce_bias_7_0_len 8
+#define reg_ce_bias_7_0_lsb 0
+#define xd_r_reg_ce_bias_11_8   (*(volatile byte xdata *) 0xFD39)
+#define    r_reg_ce_bias_11_8   0xFD39
+#define reg_ce_bias_11_8_pos 0
+#define reg_ce_bias_11_8_len 4
+#define reg_ce_bias_11_8_lsb 8
+#define xd_r_reg_ce_m1_7_0  (*(volatile byte xdata *) 0xFD3A)
+#define    r_reg_ce_m1_7_0  0xFD3A
+#define reg_ce_m1_7_0_pos 0
+#define reg_ce_m1_7_0_len 8
+#define reg_ce_m1_7_0_lsb 0
+#define xd_r_reg_ce_m1_11_8 (*(volatile byte xdata *) 0xFD3B)
+#define    r_reg_ce_m1_11_8 0xFD3B
+#define reg_ce_m1_11_8_pos 0
+#define reg_ce_m1_11_8_len 4
+#define reg_ce_m1_11_8_lsb 8
+#define xd_r_reg_ce_rh0_7_0 (*(volatile byte xdata *) 0xFD3C)
+#define    r_reg_ce_rh0_7_0 0xFD3C
+#define reg_ce_rh0_7_0_pos 0
+#define reg_ce_rh0_7_0_len 8
+#define reg_ce_rh0_7_0_lsb 0
+#define xd_r_reg_ce_rh0_15_8    (*(volatile byte xdata *) 0xFD3D)
+#define    r_reg_ce_rh0_15_8    0xFD3D
+#define reg_ce_rh0_15_8_pos 0
+#define reg_ce_rh0_15_8_len 8
+#define reg_ce_rh0_15_8_lsb 8
+#define xd_r_reg_ce_rh0_23_16   (*(volatile byte xdata *) 0xFD3E)
+#define    r_reg_ce_rh0_23_16   0xFD3E
+#define reg_ce_rh0_23_16_pos 0
+#define reg_ce_rh0_23_16_len 8
+#define reg_ce_rh0_23_16_lsb 16
+#define xd_r_reg_ce_rh0_31_24   (*(volatile byte xdata *) 0xFD3F)
+#define    r_reg_ce_rh0_31_24   0xFD3F
+#define reg_ce_rh0_31_24_pos 0
+#define reg_ce_rh0_31_24_len 8
+#define reg_ce_rh0_31_24_lsb 24
+#define xd_p_reg_ce_tdi_delta   (*(volatile byte xdata *) 0xFD40)
+#define    p_reg_ce_tdi_delta   0xFD40
+#define reg_ce_tdi_delta_pos 0
+#define reg_ce_tdi_delta_len 3
+#define reg_ce_tdi_delta_lsb 0
+#define xd_p_reg_ce_fdi_delta   (*(volatile byte xdata *) 0xFD41)
+#define    p_reg_ce_fdi_delta   0xFD41
+#define reg_ce_fdi_delta_pos 0
+#define reg_ce_fdi_delta_len 3
+#define reg_ce_fdi_delta_lsb 0
+#define xd_p_reg_ce_fste_delta  (*(volatile byte xdata *) 0xFD42)
+#define    p_reg_ce_fste_delta  0xFD42
+#define reg_ce_fste_delta_pos 0
+#define reg_ce_fste_delta_len 3
+#define reg_ce_fste_delta_lsb 0
+#define xd_r_reg_ce_fft_s1  (*(volatile byte xdata *) 0xFD43)
+#define    r_reg_ce_fft_s1  0xFD43
+#define reg_ce_fft_s1_pos 0
+#define reg_ce_fft_s1_len 4
+#define reg_ce_fft_s1_lsb 0
+#define xd_r_reg_feq_fix_eh2_7_0    (*(volatile byte xdata *) 0xFD44)
+#define    r_reg_feq_fix_eh2_7_0    0xFD44
+#define reg_feq_fix_eh2_7_0_pos 0
+#define reg_feq_fix_eh2_7_0_len 8
+#define reg_feq_fix_eh2_7_0_lsb 0
+#define xd_r_reg_feq_fix_eh2_15_8   (*(volatile byte xdata *) 0xFD45)
+#define    r_reg_feq_fix_eh2_15_8   0xFD45
+#define reg_feq_fix_eh2_15_8_pos 0
+#define reg_feq_fix_eh2_15_8_len 8
+#define reg_feq_fix_eh2_15_8_lsb 8
+#define xd_r_reg_feq_fix_eh2_23_16  (*(volatile byte xdata *) 0xFD46)
+#define    r_reg_feq_fix_eh2_23_16  0xFD46
+#define reg_feq_fix_eh2_23_16_pos 0
+#define reg_feq_fix_eh2_23_16_len 8
+#define reg_feq_fix_eh2_23_16_lsb 16
+#define xd_r_reg_feq_fix_eh2_31_24  (*(volatile byte xdata *) 0xFD47)
+#define    r_reg_feq_fix_eh2_31_24  0xFD47
+#define reg_feq_fix_eh2_31_24_pos 0
+#define reg_feq_fix_eh2_31_24_len 8
+#define reg_feq_fix_eh2_31_24_lsb 24
+#define xd_r_reg_ce_m2_central_7_0  (*(volatile byte xdata *) 0xFD48)
+#define    r_reg_ce_m2_central_7_0  0xFD48
+#define reg_ce_m2_central_7_0_pos 0
+#define reg_ce_m2_central_7_0_len 8
+#define reg_ce_m2_central_7_0_lsb 0
+#define xd_r_reg_ce_m2_central_15_8 (*(volatile byte xdata *) 0xFD49)
+#define    r_reg_ce_m2_central_15_8 0xFD49
+#define reg_ce_m2_central_15_8_pos 0
+#define reg_ce_m2_central_15_8_len 8
+#define reg_ce_m2_central_15_8_lsb 8
+#define xd_r_reg_ce_sigma2_7_0  (*(volatile byte xdata *) 0xFD4A)
+#define    r_reg_ce_sigma2_7_0  0xFD4A
+#define reg_ce_sigma2_7_0_pos 0
+#define reg_ce_sigma2_7_0_len 8
+#define reg_ce_sigma2_7_0_lsb 0
+#define xd_r_reg_ce_sigma2_15_8 (*(volatile byte xdata *) 0xFD4B)
+#define    r_reg_ce_sigma2_15_8 0xFD4B
+#define reg_ce_sigma2_15_8_pos 0
+#define reg_ce_sigma2_15_8_len 8
+#define reg_ce_sigma2_15_8_lsb 8
+#define xd_r_reg_ce_sigma2_19_16    (*(volatile byte xdata *) 0xFD4C)
+#define    r_reg_ce_sigma2_19_16    0xFD4C
+#define reg_ce_sigma2_19_16_pos 0
+#define reg_ce_sigma2_19_16_len 4
+#define reg_ce_sigma2_19_16_lsb 16
+#define xd_r_reg_ce_data_im_7_0 (*(volatile byte xdata *) 0xFD4D)
+#define    r_reg_ce_data_im_7_0 0xFD4D
+#define reg_ce_data_im_7_0_pos 0
+#define reg_ce_data_im_7_0_len 8
+#define reg_ce_data_im_7_0_lsb 0
+#define xd_r_reg_ce_data_im_14_8    (*(volatile byte xdata *) 0xFD4E)
+#define    r_reg_ce_data_im_14_8    0xFD4E
+#define reg_ce_data_im_14_8_pos 0
+#define reg_ce_data_im_14_8_len 7
+#define reg_ce_data_im_14_8_lsb 8
+#define xd_r_reg_ce_data_re_7_0 (*(volatile byte xdata *) 0xFD4F)
+#define    r_reg_ce_data_re_7_0 0xFD4F
+#define reg_ce_data_re_7_0_pos 0
+#define reg_ce_data_re_7_0_len 8
+#define reg_ce_data_re_7_0_lsb 0
+#define xd_r_reg_ce_data_re_14_8    (*(volatile byte xdata *) 0xFD50)
+#define    r_reg_ce_data_re_14_8    0xFD50
+#define reg_ce_data_re_14_8_pos 0
+#define reg_ce_data_re_14_8_len 7
+#define reg_ce_data_re_14_8_lsb 8
+#define xd_p_reg_ce_var_default_value   (*(volatile byte xdata *) 0xFD51)
+#define    p_reg_ce_var_default_value   0xFD51
+#define reg_ce_var_default_value_pos 0
+#define reg_ce_var_default_value_len 3
+#define reg_ce_var_default_value_lsb 0
+#define xd_p_reg_ce_cent_default_value_7_0  (*(volatile byte xdata *) 0xFD52)
+#define    p_reg_ce_cent_default_value_7_0  0xFD52
+#define reg_ce_cent_default_value_7_0_pos 0
+#define reg_ce_cent_default_value_7_0_len 8
+#define reg_ce_cent_default_value_7_0_lsb 0
+#define xd_p_reg_ce_cent_default_value_11_8 (*(volatile byte xdata *) 0xFD53)
+#define    p_reg_ce_cent_default_value_11_8 0xFD53
+#define reg_ce_cent_default_value_11_8_pos 0
+#define reg_ce_cent_default_value_11_8_len 4
+#define reg_ce_cent_default_value_11_8_lsb 8
+#define xd_r_reg_ce_var_hw  (*(volatile byte xdata *) 0xFD54)
+#define    r_reg_ce_var_hw  0xFD54
+#define reg_ce_var_hw_pos 0
+#define reg_ce_var_hw_len 3
+#define reg_ce_var_hw_lsb 0
+#define xd_r_reg_ce_cent_hw_7_0 (*(volatile byte xdata *) 0xFD55)
+#define    r_reg_ce_cent_hw_7_0 0xFD55
+#define reg_ce_cent_hw_7_0_pos 0
+#define reg_ce_cent_hw_7_0_len 8
+#define reg_ce_cent_hw_7_0_lsb 0
+#define xd_r_reg_ce_cent_hw_11_8    (*(volatile byte xdata *) 0xFD56)
+#define    r_reg_ce_cent_hw_11_8    0xFD56
+#define reg_ce_cent_hw_11_8_pos 0
+#define reg_ce_cent_hw_11_8_len 4
+#define reg_ce_cent_hw_11_8_lsb 8
+#define xd_p_reg_ce_fdi_cp_test_en  (*(volatile byte xdata *) 0xFD57)
+#define    p_reg_ce_fdi_cp_test_en  0xFD57
+#define reg_ce_fdi_cp_test_en_pos 0
+#define reg_ce_fdi_cp_test_en_len 1
+#define reg_ce_fdi_cp_test_en_lsb 0
+#define xd_p_reg_ce_cptestindex0_7_0    (*(volatile byte xdata *) 0xFD58)
+#define    p_reg_ce_cptestindex0_7_0    0xFD58
+#define reg_ce_cptestindex0_7_0_pos 0
+#define reg_ce_cptestindex0_7_0_len 8
+#define reg_ce_cptestindex0_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex0_12_8   (*(volatile byte xdata *) 0xFD59)
+#define    p_reg_ce_cptestindex0_12_8   0xFD59
+#define reg_ce_cptestindex0_12_8_pos 0
+#define reg_ce_cptestindex0_12_8_len 5
+#define reg_ce_cptestindex0_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi0  (*(volatile byte xdata *) 0xFD5A)
+#define    p_reg_ce_cptestfdi0  0xFD5A
+#define reg_ce_cptestfdi0_pos 0
+#define reg_ce_cptestfdi0_len 3
+#define reg_ce_cptestfdi0_lsb 0
+#define xd_p_reg_ce_cptestindex1_7_0    (*(volatile byte xdata *) 0xFD5B)
+#define    p_reg_ce_cptestindex1_7_0    0xFD5B
+#define reg_ce_cptestindex1_7_0_pos 0
+#define reg_ce_cptestindex1_7_0_len 8
+#define reg_ce_cptestindex1_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex1_12_8   (*(volatile byte xdata *) 0xFD5C)
+#define    p_reg_ce_cptestindex1_12_8   0xFD5C
+#define reg_ce_cptestindex1_12_8_pos 0
+#define reg_ce_cptestindex1_12_8_len 5
+#define reg_ce_cptestindex1_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi1  (*(volatile byte xdata *) 0xFD5D)
+#define    p_reg_ce_cptestfdi1  0xFD5D
+#define reg_ce_cptestfdi1_pos 0
+#define reg_ce_cptestfdi1_len 3
+#define reg_ce_cptestfdi1_lsb 0
+#define xd_p_reg_ce_cptestindex2_7_0    (*(volatile byte xdata *) 0xFD5E)
+#define    p_reg_ce_cptestindex2_7_0    0xFD5E
+#define reg_ce_cptestindex2_7_0_pos 0
+#define reg_ce_cptestindex2_7_0_len 8
+#define reg_ce_cptestindex2_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex2_12_8   (*(volatile byte xdata *) 0xFD5F)
+#define    p_reg_ce_cptestindex2_12_8   0xFD5F
+#define reg_ce_cptestindex2_12_8_pos 0
+#define reg_ce_cptestindex2_12_8_len 5
+#define reg_ce_cptestindex2_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi2  (*(volatile byte xdata *) 0xFD60)
+#define    p_reg_ce_cptestfdi2  0xFD60
+#define reg_ce_cptestfdi2_pos 0
+#define reg_ce_cptestfdi2_len 3
+#define reg_ce_cptestfdi2_lsb 0
+#define xd_p_reg_ce_cptestindex3_7_0    (*(volatile byte xdata *) 0xFD61)
+#define    p_reg_ce_cptestindex3_7_0    0xFD61
+#define reg_ce_cptestindex3_7_0_pos 0
+#define reg_ce_cptestindex3_7_0_len 8
+#define reg_ce_cptestindex3_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex3_12_8   (*(volatile byte xdata *) 0xFD62)
+#define    p_reg_ce_cptestindex3_12_8   0xFD62
+#define reg_ce_cptestindex3_12_8_pos 0
+#define reg_ce_cptestindex3_12_8_len 5
+#define reg_ce_cptestindex3_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi3  (*(volatile byte xdata *) 0xFD63)
+#define    p_reg_ce_cptestfdi3  0xFD63
+#define reg_ce_cptestfdi3_pos 0
+#define reg_ce_cptestfdi3_len 3
+#define reg_ce_cptestfdi3_lsb 0
+#define xd_p_reg_ce_cptestindex4_7_0    (*(volatile byte xdata *) 0xFD64)
+#define    p_reg_ce_cptestindex4_7_0    0xFD64
+#define reg_ce_cptestindex4_7_0_pos 0
+#define reg_ce_cptestindex4_7_0_len 8
+#define reg_ce_cptestindex4_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex4_12_8   (*(volatile byte xdata *) 0xFD65)
+#define    p_reg_ce_cptestindex4_12_8   0xFD65
+#define reg_ce_cptestindex4_12_8_pos 0
+#define reg_ce_cptestindex4_12_8_len 5
+#define reg_ce_cptestindex4_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi4  (*(volatile byte xdata *) 0xFD66)
+#define    p_reg_ce_cptestfdi4  0xFD66
+#define reg_ce_cptestfdi4_pos 0
+#define reg_ce_cptestfdi4_len 3
+#define reg_ce_cptestfdi4_lsb 0
+#define xd_p_reg_ce_cptestindex5_7_0    (*(volatile byte xdata *) 0xFD67)
+#define    p_reg_ce_cptestindex5_7_0    0xFD67
+#define reg_ce_cptestindex5_7_0_pos 0
+#define reg_ce_cptestindex5_7_0_len 8
+#define reg_ce_cptestindex5_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex5_12_8   (*(volatile byte xdata *) 0xFD68)
+#define    p_reg_ce_cptestindex5_12_8   0xFD68
+#define reg_ce_cptestindex5_12_8_pos 0
+#define reg_ce_cptestindex5_12_8_len 5
+#define reg_ce_cptestindex5_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi5  (*(volatile byte xdata *) 0xFD69)
+#define    p_reg_ce_cptestfdi5  0xFD69
+#define reg_ce_cptestfdi5_pos 0
+#define reg_ce_cptestfdi5_len 3
+#define reg_ce_cptestfdi5_lsb 0
+#define xd_p_reg_ce_cptestindex6_7_0    (*(volatile byte xdata *) 0xFD6A)
+#define    p_reg_ce_cptestindex6_7_0    0xFD6A
+#define reg_ce_cptestindex6_7_0_pos 0
+#define reg_ce_cptestindex6_7_0_len 8
+#define reg_ce_cptestindex6_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex6_12_8   (*(volatile byte xdata *) 0xFD6B)
+#define    p_reg_ce_cptestindex6_12_8   0xFD6B
+#define reg_ce_cptestindex6_12_8_pos 0
+#define reg_ce_cptestindex6_12_8_len 5
+#define reg_ce_cptestindex6_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi6  (*(volatile byte xdata *) 0xFD6C)
+#define    p_reg_ce_cptestfdi6  0xFD6C
+#define reg_ce_cptestfdi6_pos 0
+#define reg_ce_cptestfdi6_len 3
+#define reg_ce_cptestfdi6_lsb 0
+#define xd_p_reg_ce_cptestindex7_7_0    (*(volatile byte xdata *) 0xFD6D)
+#define    p_reg_ce_cptestindex7_7_0    0xFD6D
+#define reg_ce_cptestindex7_7_0_pos 0
+#define reg_ce_cptestindex7_7_0_len 8
+#define reg_ce_cptestindex7_7_0_lsb 0
+#define xd_p_reg_ce_cptestindex7_12_8   (*(volatile byte xdata *) 0xFD6E)
+#define    p_reg_ce_cptestindex7_12_8   0xFD6E
+#define reg_ce_cptestindex7_12_8_pos 0
+#define reg_ce_cptestindex7_12_8_len 5
+#define reg_ce_cptestindex7_12_8_lsb 8
+#define xd_p_reg_ce_cptestfdi7  (*(volatile byte xdata *) 0xFD6F)
+#define    p_reg_ce_cptestfdi7  0xFD6F
+#define reg_ce_cptestfdi7_pos 0
+#define reg_ce_cptestfdi7_len 3
+#define reg_ce_cptestfdi7_lsb 0
+#define xd_p_reg_ce_cp_replace_tdiout_en    (*(volatile byte xdata *) 0xFD74)
+#define    p_reg_ce_cp_replace_tdiout_en    0xFD74
+#define reg_ce_cp_replace_tdiout_en_pos 0
+#define reg_ce_cp_replace_tdiout_en_len 1
+#define reg_ce_cp_replace_tdiout_en_lsb 0
+#define xd_p_reg_ce_tdi_mask0_en    (*(volatile byte xdata *) 0xFD7D)
+#define    p_reg_ce_tdi_mask0_en    0xFD7D
+#define reg_ce_tdi_mask0_en_pos 0
+#define reg_ce_tdi_mask0_en_len 1
+#define reg_ce_tdi_mask0_en_lsb 0
+#define xd_p_reg_ce_tdi_mask_from0_7_0  (*(volatile byte xdata *) 0xFD7E)
+#define    p_reg_ce_tdi_mask_from0_7_0  0xFD7E
+#define reg_ce_tdi_mask_from0_7_0_pos 0
+#define reg_ce_tdi_mask_from0_7_0_len 8
+#define reg_ce_tdi_mask_from0_7_0_lsb 0
+#define xd_p_reg_ce_tdi_mask_from0_12_8 (*(volatile byte xdata *) 0xFD7F)
+#define    p_reg_ce_tdi_mask_from0_12_8 0xFD7F
+#define reg_ce_tdi_mask_from0_12_8_pos 0
+#define reg_ce_tdi_mask_from0_12_8_len 5
+#define reg_ce_tdi_mask_from0_12_8_lsb 8
+#define xd_p_reg_ce_tdi_mask_to0_7_0    (*(volatile byte xdata *) 0xFD80)
+#define    p_reg_ce_tdi_mask_to0_7_0    0xFD80
+#define reg_ce_tdi_mask_to0_7_0_pos 0
+#define reg_ce_tdi_mask_to0_7_0_len 8
+#define reg_ce_tdi_mask_to0_7_0_lsb 0
+#define xd_p_reg_ce_tdi_mask_to0_12_8   (*(volatile byte xdata *) 0xFD81)
+#define    p_reg_ce_tdi_mask_to0_12_8   0xFD81
+#define reg_ce_tdi_mask_to0_12_8_pos 0
+#define reg_ce_tdi_mask_to0_12_8_len 5
+#define reg_ce_tdi_mask_to0_12_8_lsb 8
+#define xd_p_reg_ce_tdi_mask1_en    (*(volatile byte xdata *) 0xFD82)
+#define    p_reg_ce_tdi_mask1_en    0xFD82
+#define reg_ce_tdi_mask1_en_pos 0
+#define reg_ce_tdi_mask1_en_len 1
+#define reg_ce_tdi_mask1_en_lsb 0
+#define xd_p_reg_ce_tdi_mask_from1_7_0  (*(volatile byte xdata *) 0xFD83)
+#define    p_reg_ce_tdi_mask_from1_7_0  0xFD83
+#define reg_ce_tdi_mask_from1_7_0_pos 0
+#define reg_ce_tdi_mask_from1_7_0_len 8
+#define reg_ce_tdi_mask_from1_7_0_lsb 0
+#define xd_p_reg_ce_tdi_mask_from1_12_8 (*(volatile byte xdata *) 0xFD84)
+#define    p_reg_ce_tdi_mask_from1_12_8 0xFD84
+#define reg_ce_tdi_mask_from1_12_8_pos 0
+#define reg_ce_tdi_mask_from1_12_8_len 5
+#define reg_ce_tdi_mask_from1_12_8_lsb 8
+#define xd_p_reg_ce_tdi_mask_to1_7_0    (*(volatile byte xdata *) 0xFD85)
+#define    p_reg_ce_tdi_mask_to1_7_0    0xFD85
+#define reg_ce_tdi_mask_to1_7_0_pos 0
+#define reg_ce_tdi_mask_to1_7_0_len 8
+#define reg_ce_tdi_mask_to1_7_0_lsb 0
+#define xd_p_reg_ce_tdi_mask_to1_12_8   (*(volatile byte xdata *) 0xFD86)
+#define    p_reg_ce_tdi_mask_to1_12_8   0xFD86
+#define reg_ce_tdi_mask_to1_12_8_pos 0
+#define reg_ce_tdi_mask_to1_12_8_len 5
+#define reg_ce_tdi_mask_to1_12_8_lsb 8
+#define xd_p_reg_ce_2nd_var_max (*(volatile byte xdata *) 0xFD87)
+#define    p_reg_ce_2nd_var_max 0xFD87
+#define reg_ce_2nd_var_max_pos 0
+#define reg_ce_2nd_var_max_len 3
+#define reg_ce_2nd_var_max_lsb 0
+#define xd_p_reg_ce_2nd_cent_forced_en  (*(volatile byte xdata *) 0xFD88)
+#define    p_reg_ce_2nd_cent_forced_en  0xFD88
+#define reg_ce_2nd_cent_forced_en_pos 0
+#define reg_ce_2nd_cent_forced_en_len 1
+#define reg_ce_2nd_cent_forced_en_lsb 0
+#define xd_p_reg_ce_2nd_var_forced_en   (*(volatile byte xdata *) 0xFD89)
+#define    p_reg_ce_2nd_var_forced_en   0xFD89
+#define reg_ce_2nd_var_forced_en_pos 0
+#define reg_ce_2nd_var_forced_en_len 1
+#define reg_ce_2nd_var_forced_en_lsb 0
+#define xd_p_reg_ce_2nd_fctrl_auto_reset_en (*(volatile byte xdata *) 0xFD8A)
+#define    p_reg_ce_2nd_fctrl_auto_reset_en 0xFD8A
+#define reg_ce_2nd_fctrl_auto_reset_en_pos 0
+#define reg_ce_2nd_fctrl_auto_reset_en_len 1
+#define reg_ce_2nd_fctrl_auto_reset_en_lsb 0
+#define xd_p_reg_ce_2nd_cent_auto_clr_en    (*(volatile byte xdata *) 0xFD8B)
+#define    p_reg_ce_2nd_cent_auto_clr_en    0xFD8B
+#define reg_ce_2nd_cent_auto_clr_en_pos 0
+#define reg_ce_2nd_cent_auto_clr_en_len 1
+#define reg_ce_2nd_cent_auto_clr_en_lsb 0
+#define xd_p_reg_ce_2nd_cent_forced_value_7_0   (*(volatile byte xdata *) 0xFD8C)
+#define    p_reg_ce_2nd_cent_forced_value_7_0   0xFD8C
+#define reg_ce_2nd_cent_forced_value_7_0_pos 0
+#define reg_ce_2nd_cent_forced_value_7_0_len 8
+#define reg_ce_2nd_cent_forced_value_7_0_lsb 0
+#define xd_p_reg_ce_2nd_cent_forced_value_11_8  (*(volatile byte xdata *) 0xFD8D)
+#define    p_reg_ce_2nd_cent_forced_value_11_8  0xFD8D
+#define reg_ce_2nd_cent_forced_value_11_8_pos 0
+#define reg_ce_2nd_cent_forced_value_11_8_len 4
+#define reg_ce_2nd_cent_forced_value_11_8_lsb 8
+#define xd_p_reg_ce_2nd_cent_auto_clr_value_7_0 (*(volatile byte xdata *) 0xFD8E)
+#define    p_reg_ce_2nd_cent_auto_clr_value_7_0 0xFD8E
+#define reg_ce_2nd_cent_auto_clr_value_7_0_pos 0
+#define reg_ce_2nd_cent_auto_clr_value_7_0_len 8
+#define reg_ce_2nd_cent_auto_clr_value_7_0_lsb 0
+#define xd_p_reg_ce_2nd_cent_auto_clr_value_11_8    (*(volatile byte xdata *) 0xFD8F)
+#define    p_reg_ce_2nd_cent_auto_clr_value_11_8    0xFD8F
+#define reg_ce_2nd_cent_auto_clr_value_11_8_pos 0
+#define reg_ce_2nd_cent_auto_clr_value_11_8_len 4
+#define reg_ce_2nd_cent_auto_clr_value_11_8_lsb 8
+#define xd_p_reg_ce_gs_s1_var   (*(volatile byte xdata *) 0xFD90)
+#define    p_reg_ce_gs_s1_var   0xFD90
+#define reg_ce_gs_s1_var_pos 0
+#define reg_ce_gs_s1_var_len 4
+#define reg_ce_gs_s1_var_lsb 0
+#define xd_p_reg_ce_2nd_centroid_max_7_0    (*(volatile byte xdata *) 0xFD91)
+#define    p_reg_ce_2nd_centroid_max_7_0    0xFD91
+#define reg_ce_2nd_centroid_max_7_0_pos 0
+#define reg_ce_2nd_centroid_max_7_0_len 8
+#define reg_ce_2nd_centroid_max_7_0_lsb 0
+#define xd_p_reg_ce_2nd_centroid_max_11_8   (*(volatile byte xdata *) 0xFD92)
+#define    p_reg_ce_2nd_centroid_max_11_8   0xFD92
+#define reg_ce_2nd_centroid_max_11_8_pos 0
+#define reg_ce_2nd_centroid_max_11_8_len 4
+#define reg_ce_2nd_centroid_max_11_8_lsb 8
+#define xd_r_reg_ce_2nd_centroid_out_7_0    (*(volatile byte xdata *) 0xFD93)
+#define    r_reg_ce_2nd_centroid_out_7_0    0xFD93
+#define reg_ce_2nd_centroid_out_7_0_pos 0
+#define reg_ce_2nd_centroid_out_7_0_len 8
+#define reg_ce_2nd_centroid_out_7_0_lsb 0
+#define xd_r_reg_ce_2nd_centroid_out_11_8   (*(volatile byte xdata *) 0xFD94)
+#define    r_reg_ce_2nd_centroid_out_11_8   0xFD94
+#define reg_ce_2nd_centroid_out_11_8_pos 0
+#define reg_ce_2nd_centroid_out_11_8_len 4
+#define reg_ce_2nd_centroid_out_11_8_lsb 8
+#define xd_r_reg_ce_2nd_fctrl_rdy   (*(volatile byte xdata *) 0xFD95)
+#define    r_reg_ce_2nd_fctrl_rdy   0xFD95
+#define reg_ce_2nd_fctrl_rdy_pos 0
+#define reg_ce_2nd_fctrl_rdy_len 1
+#define reg_ce_2nd_fctrl_rdy_lsb 0
+#define xd_r_reg_ce_2nd_var (*(volatile byte xdata *) 0xFD96)
+#define    r_reg_ce_2nd_var 0xFD96
+#define reg_ce_2nd_var_pos 0
+#define reg_ce_2nd_var_len 3
+#define reg_ce_2nd_var_lsb 0
+#define xd_r_reg_ce_2nd_bias_7_0    (*(volatile byte xdata *) 0xFD97)
+#define    r_reg_ce_2nd_bias_7_0    0xFD97
+#define reg_ce_2nd_bias_7_0_pos 0
+#define reg_ce_2nd_bias_7_0_len 8
+#define reg_ce_2nd_bias_7_0_lsb 0
+#define xd_r_reg_ce_2nd_bias_11_8   (*(volatile byte xdata *) 0xFD98)
+#define    r_reg_ce_2nd_bias_11_8   0xFD98
+#define reg_ce_2nd_bias_11_8_pos 0
+#define reg_ce_2nd_bias_11_8_len 4
+#define reg_ce_2nd_bias_11_8_lsb 8
+#define xd_r_reg_ce_2nd_m1_7_0  (*(volatile byte xdata *) 0xFD99)
+#define    r_reg_ce_2nd_m1_7_0  0xFD99
+#define reg_ce_2nd_m1_7_0_pos 0
+#define reg_ce_2nd_m1_7_0_len 8
+#define reg_ce_2nd_m1_7_0_lsb 0
+#define xd_r_reg_ce_2nd_m1_11_8 (*(volatile byte xdata *) 0xFD9A)
+#define    r_reg_ce_2nd_m1_11_8 0xFD9A
+#define reg_ce_2nd_m1_11_8_pos 0
+#define reg_ce_2nd_m1_11_8_len 4
+#define reg_ce_2nd_m1_11_8_lsb 8
+#define xd_p_reg_ce_2nd_var_forced_value    (*(volatile byte xdata *) 0xFD9B)
+#define    p_reg_ce_2nd_var_forced_value    0xFD9B
+#define reg_ce_2nd_var_forced_value_pos 0
+#define reg_ce_2nd_var_forced_value_len 3
+#define reg_ce_2nd_var_forced_value_lsb 0
+#define xd_r_reg_ce_2nd_m2_central_7_0  (*(volatile byte xdata *) 0xFD9C)
+#define    r_reg_ce_2nd_m2_central_7_0  0xFD9C
+#define reg_ce_2nd_m2_central_7_0_pos 0
+#define reg_ce_2nd_m2_central_7_0_len 8
+#define reg_ce_2nd_m2_central_7_0_lsb 0
+#define xd_r_reg_ce_2nd_m2_central_15_8 (*(volatile byte xdata *) 0xFD9D)
+#define    r_reg_ce_2nd_m2_central_15_8 0xFD9D
+#define reg_ce_2nd_m2_central_15_8_pos 0
+#define reg_ce_2nd_m2_central_15_8_len 8
+#define reg_ce_2nd_m2_central_15_8_lsb 8
+#define xd_p_reg_ce_2nd_var_default_value   (*(volatile byte xdata *) 0xFD9E)
+#define    p_reg_ce_2nd_var_default_value   0xFD9E
+#define reg_ce_2nd_var_default_value_pos 0
+#define reg_ce_2nd_var_default_value_len 3
+#define reg_ce_2nd_var_default_value_lsb 0
+#define xd_p_reg_ce_2nd_cent_default_value_7_0  (*(volatile byte xdata *) 0xFD9F)
+#define    p_reg_ce_2nd_cent_default_value_7_0  0xFD9F
+#define reg_ce_2nd_cent_default_value_7_0_pos 0
+#define reg_ce_2nd_cent_default_value_7_0_len 8
+#define reg_ce_2nd_cent_default_value_7_0_lsb 0
+#define xd_p_reg_ce_2nd_cent_default_value_11_8 (*(volatile byte xdata *) 0xFDA0)
+#define    p_reg_ce_2nd_cent_default_value_11_8 0xFDA0
+#define reg_ce_2nd_cent_default_value_11_8_pos 0
+#define reg_ce_2nd_cent_default_value_11_8_len 4
+#define reg_ce_2nd_cent_default_value_11_8_lsb 8
+#define xd_p_reg_ce_use_fdi_long    (*(volatile byte xdata *) 0xFDA1)
+#define    p_reg_ce_use_fdi_long    0xFDA1
+#define reg_ce_use_fdi_long_pos 0
+#define reg_ce_use_fdi_long_len 1
+#define reg_ce_use_fdi_long_lsb 0
+#define xd_p_reg_p_ce_tdi_lms_en    (*(volatile byte xdata *) 0xFDA2)
+#define    p_reg_p_ce_tdi_lms_en    0xFDA2
+#define reg_p_ce_tdi_lms_en_pos 0
+#define reg_p_ce_tdi_lms_en_len 1
+#define reg_p_ce_tdi_lms_en_lsb 0
+#define xd_p_reg_p_ce_tdi_lms_bufshift  (*(volatile byte xdata *) 0xFDA3)
+#define    p_reg_p_ce_tdi_lms_bufshift  0xFDA3
+#define reg_p_ce_tdi_lms_bufshift_pos 0
+#define reg_p_ce_tdi_lms_bufshift_len 2
+#define reg_p_ce_tdi_lms_bufshift_lsb 0
+#define xd_p_reg_p_ce_tdi_lms_ave_ratio (*(volatile byte xdata *) 0xFDA4)
+#define    p_reg_p_ce_tdi_lms_ave_ratio 0xFDA4
+#define reg_p_ce_tdi_lms_ave_ratio_pos 0
+#define reg_p_ce_tdi_lms_ave_ratio_len 5
+#define reg_p_ce_tdi_lms_ave_ratio_lsb 0
+#define xd_p_reg_p_ce_conf2_in_con0_en  (*(volatile byte xdata *) 0xFDA5)
+#define    p_reg_p_ce_conf2_in_con0_en  0xFDA5
+#define reg_p_ce_conf2_in_con0_en_pos 0
+#define reg_p_ce_conf2_in_con0_en_len 1
+#define reg_p_ce_conf2_in_con0_en_lsb 0
+// biu_reg.h 7-6-2007
+// gen_biu Ver 1.0 generated by
+#define xd_p_fec_rsd_packet_unit_7_0    (*(volatile byte xdata *) 0xF700)
+#define    p_fec_rsd_packet_unit_7_0    0xF700
+#define fec_rsd_packet_unit_7_0_pos 0
+#define fec_rsd_packet_unit_7_0_len 8
+#define fec_rsd_packet_unit_7_0_lsb 0
+#define xd_p_fec_rsd_packet_unit_15_8   (*(volatile byte xdata *) 0xF701)
+#define    p_fec_rsd_packet_unit_15_8   0xF701
+#define fec_rsd_packet_unit_15_8_pos 0
+#define fec_rsd_packet_unit_15_8_len 8
+#define fec_rsd_packet_unit_15_8_lsb 8
+#define xd_r_reg_rsd_bit_err_cnt_7_0    (*(volatile byte xdata *) 0xF702)
+#define    r_reg_rsd_bit_err_cnt_7_0    0xF702
+#define reg_rsd_bit_err_cnt_7_0_pos 0
+#define reg_rsd_bit_err_cnt_7_0_len 8
+#define reg_rsd_bit_err_cnt_7_0_lsb 0
+#define xd_r_reg_rsd_bit_err_cnt_15_8   (*(volatile byte xdata *) 0xF703)
+#define    r_reg_rsd_bit_err_cnt_15_8   0xF703
+#define reg_rsd_bit_err_cnt_15_8_pos 0
+#define reg_rsd_bit_err_cnt_15_8_len 8
+#define reg_rsd_bit_err_cnt_15_8_lsb 8
+#define xd_r_reg_rsd_bit_err_cnt_23_16  (*(volatile byte xdata *) 0xF704)
+#define    r_reg_rsd_bit_err_cnt_23_16  0xF704
+#define reg_rsd_bit_err_cnt_23_16_pos 0
+#define reg_rsd_bit_err_cnt_23_16_len 8
+#define reg_rsd_bit_err_cnt_23_16_lsb 16
+#define xd_r_reg_rsd_abort_packet_cnt_7_0   (*(volatile byte xdata *) 0xF705)
+#define    r_reg_rsd_abort_packet_cnt_7_0   0xF705
+#define reg_rsd_abort_packet_cnt_7_0_pos 0
+#define reg_rsd_abort_packet_cnt_7_0_len 8
+#define reg_rsd_abort_packet_cnt_7_0_lsb 0
+#define xd_r_reg_rsd_abort_packet_cnt_15_8  (*(volatile byte xdata *) 0xF706)
+#define    r_reg_rsd_abort_packet_cnt_15_8  0xF706
+#define reg_rsd_abort_packet_cnt_15_8_pos 0
+#define reg_rsd_abort_packet_cnt_15_8_len 8
+#define reg_rsd_abort_packet_cnt_15_8_lsb 8
+#define xd_p_fec_RSD_PKT_NUM_PER_UNIT_7_0   (*(volatile byte xdata *) 0xF707)
+#define    p_fec_RSD_PKT_NUM_PER_UNIT_7_0   0xF707
+#define fec_RSD_PKT_NUM_PER_UNIT_7_0_pos 0
+#define fec_RSD_PKT_NUM_PER_UNIT_7_0_len 8
+#define fec_RSD_PKT_NUM_PER_UNIT_7_0_lsb 0
+#define xd_p_fec_RSD_PKT_NUM_PER_UNIT_15_8  (*(volatile byte xdata *) 0xF708)
+#define    p_fec_RSD_PKT_NUM_PER_UNIT_15_8  0xF708
+#define fec_RSD_PKT_NUM_PER_UNIT_15_8_pos 0
+#define fec_RSD_PKT_NUM_PER_UNIT_15_8_len 8
+#define fec_RSD_PKT_NUM_PER_UNIT_15_8_lsb 8
+#define xd_p_fec_RS_TH_1_7_0    (*(volatile byte xdata *) 0xF709)
+#define    p_fec_RS_TH_1_7_0    0xF709
+#define fec_RS_TH_1_7_0_pos 0
+#define fec_RS_TH_1_7_0_len 8
+#define fec_RS_TH_1_7_0_lsb 0
+#define xd_p_fec_RS_TH_1_15_8   (*(volatile byte xdata *) 0xF70A)
+#define    p_fec_RS_TH_1_15_8   0xF70A
+#define fec_RS_TH_1_15_8_pos 0
+#define fec_RS_TH_1_15_8_len 8
+#define fec_RS_TH_1_15_8_lsb 8
+#define xd_p_fec_RS_TH_2    (*(volatile byte xdata *) 0xF70B)
+#define    p_fec_RS_TH_2    0xF70B
+#define fec_RS_TH_2_pos 0
+#define fec_RS_TH_2_len 8
+#define fec_RS_TH_2_lsb 0
+#define xd_p_fec_rsd_ber_rst    (*(volatile byte xdata *) 0xF70C)
+#define    p_fec_rsd_ber_rst    0xF70C
+#define fec_rsd_ber_rst_pos 0
+#define fec_rsd_ber_rst_len 1
+#define fec_rsd_ber_rst_lsb 0
+#define xd_p_reg_rsd_ber_rdy    (*(volatile byte xdata *) 0xF70D)
+#define    p_reg_rsd_ber_rdy    0xF70D
+#define reg_rsd_ber_rdy_pos 0
+#define reg_rsd_ber_rdy_len 1
+#define reg_rsd_ber_rdy_lsb 0
+#define xd_p_reg_rsd_trigger_retrain    (*(volatile byte xdata *) 0xF70E)
+#define    p_reg_rsd_trigger_retrain    0xF70E
+#define reg_rsd_trigger_retrain_pos 0
+#define reg_rsd_trigger_retrain_len 1
+#define reg_rsd_trigger_retrain_lsb 0
+#define xd_p_reg_sync_recover   (*(volatile byte xdata *) 0xF70F)
+#define    p_reg_sync_recover   0xF70F
+#define reg_sync_recover_pos 0
+#define reg_sync_recover_len 1
+#define reg_sync_recover_lsb 0
+#define xd_p_fec_crc_en (*(volatile byte xdata *) 0xF710)
+#define    p_fec_crc_en 0xF710
+#define fec_crc_en_pos 0
+#define fec_crc_en_len 1
+#define fec_crc_en_lsb 0
+#define xd_p_fec_mon_en (*(volatile byte xdata *) 0xF711)
+#define    p_fec_mon_en 0xF711
+#define fec_mon_en_pos 0
+#define fec_mon_en_len 1
+#define fec_mon_en_lsb 0
+#define xd_p_reg_sync_chk   (*(volatile byte xdata *) 0xF712)
+#define    p_reg_sync_chk   0xF712
+#define reg_sync_chk_pos 0
+#define reg_sync_chk_len 1
+#define reg_sync_chk_lsb 0
+#define xd_p_fec_dummy_reg_2    (*(volatile byte xdata *) 0xF713)
+#define    p_fec_dummy_reg_2    0xF713
+#define fec_dummy_reg_2_pos 0
+#define fec_dummy_reg_2_len 3
+#define fec_dummy_reg_2_lsb 0
+#define xd_p_reg_fec_data_en    (*(volatile byte xdata *) 0xF714)
+#define    p_reg_fec_data_en    0xF714
+#define reg_fec_data_en_pos 0
+#define reg_fec_data_en_len 1
+#define reg_fec_data_en_lsb 0
+#define xd_p_fec_vtb_rsd_mon_en (*(volatile byte xdata *) 0xF715)
+#define    p_fec_vtb_rsd_mon_en 0xF715
+#define fec_vtb_rsd_mon_en_pos 0
+#define fec_vtb_rsd_mon_en_len 1
+#define fec_vtb_rsd_mon_en_lsb 0
+#define xd_p_reg_fec_sw_rst (*(volatile byte xdata *) 0xF716)
+#define    p_reg_fec_sw_rst 0xF716
+#define reg_fec_sw_rst_pos 0
+#define reg_fec_sw_rst_len 1
+#define reg_fec_sw_rst_lsb 0
+#define xd_r_fec_vtb_pm_crc (*(volatile byte xdata *) 0xF717)
+#define    r_fec_vtb_pm_crc 0xF717
+#define fec_vtb_pm_crc_pos 0
+#define fec_vtb_pm_crc_len 8
+#define fec_vtb_pm_crc_lsb 0
+#define xd_r_fec_vtb_tb_7_crc   (*(volatile byte xdata *) 0xF718)
+#define    r_fec_vtb_tb_7_crc   0xF718
+#define fec_vtb_tb_7_crc_pos 0
+#define fec_vtb_tb_7_crc_len 8
+#define fec_vtb_tb_7_crc_lsb 0
+#define xd_r_fec_vtb_tb_6_crc   (*(volatile byte xdata *) 0xF719)
+#define    r_fec_vtb_tb_6_crc   0xF719
+#define fec_vtb_tb_6_crc_pos 0
+#define fec_vtb_tb_6_crc_len 8
+#define fec_vtb_tb_6_crc_lsb 0
+#define xd_r_fec_vtb_tb_5_crc   (*(volatile byte xdata *) 0xF71A)
+#define    r_fec_vtb_tb_5_crc   0xF71A
+#define fec_vtb_tb_5_crc_pos 0
+#define fec_vtb_tb_5_crc_len 8
+#define fec_vtb_tb_5_crc_lsb 0
+#define xd_r_fec_vtb_tb_4_crc   (*(volatile byte xdata *) 0xF71B)
+#define    r_fec_vtb_tb_4_crc   0xF71B
+#define fec_vtb_tb_4_crc_pos 0
+#define fec_vtb_tb_4_crc_len 8
+#define fec_vtb_tb_4_crc_lsb 0
+#define xd_r_fec_vtb_tb_3_crc   (*(volatile byte xdata *) 0xF71C)
+#define    r_fec_vtb_tb_3_crc   0xF71C
+#define fec_vtb_tb_3_crc_pos 0
+#define fec_vtb_tb_3_crc_len 8
+#define fec_vtb_tb_3_crc_lsb 0
+#define xd_r_fec_vtb_tb_2_crc   (*(volatile byte xdata *) 0xF71D)
+#define    r_fec_vtb_tb_2_crc   0xF71D
+#define fec_vtb_tb_2_crc_pos 0
+#define fec_vtb_tb_2_crc_len 8
+#define fec_vtb_tb_2_crc_lsb 0
+#define xd_r_fec_vtb_tb_1_crc   (*(volatile byte xdata *) 0xF71E)
+#define    r_fec_vtb_tb_1_crc   0xF71E
+#define fec_vtb_tb_1_crc_pos 0
+#define fec_vtb_tb_1_crc_len 8
+#define fec_vtb_tb_1_crc_lsb 0
+#define xd_r_fec_vtb_tb_0_crc   (*(volatile byte xdata *) 0xF71F)
+#define    r_fec_vtb_tb_0_crc   0xF71F
+#define fec_vtb_tb_0_crc_pos 0
+#define fec_vtb_tb_0_crc_len 8
+#define fec_vtb_tb_0_crc_lsb 0
+#define xd_r_fec_rsd_bank0_crc  (*(volatile byte xdata *) 0xF720)
+#define    r_fec_rsd_bank0_crc  0xF720
+#define fec_rsd_bank0_crc_pos 0
+#define fec_rsd_bank0_crc_len 8
+#define fec_rsd_bank0_crc_lsb 0
+#define xd_r_fec_rsd_bank1_crc  (*(volatile byte xdata *) 0xF721)
+#define    r_fec_rsd_bank1_crc  0xF721
+#define fec_rsd_bank1_crc_pos 0
+#define fec_rsd_bank1_crc_len 8
+#define fec_rsd_bank1_crc_lsb 0
+#define xd_r_fec_idi_vtb_crc    (*(volatile byte xdata *) 0xF722)
+#define    r_fec_idi_vtb_crc    0xF722
+#define fec_idi_vtb_crc_pos 0
+#define fec_idi_vtb_crc_len 8
+#define fec_idi_vtb_crc_lsb 0
+#define xd_p_reg_fec_rsd_packet_unit_exp    (*(volatile byte xdata *) 0xF723)
+#define    p_reg_fec_rsd_packet_unit_exp    0xF723
+#define reg_fec_rsd_packet_unit_exp_pos 0
+#define reg_fec_rsd_packet_unit_exp_len 4
+#define reg_fec_rsd_packet_unit_exp_lsb 0
+#define xd_p_reg_rsd_bit_err_exp_rdy    (*(volatile byte xdata *) 0xF724)
+#define    p_reg_rsd_bit_err_exp_rdy    0xF724
+#define reg_rsd_bit_err_exp_rdy_pos 0
+#define reg_rsd_bit_err_exp_rdy_len 1
+#define reg_rsd_bit_err_exp_rdy_lsb 0
+#define xd_r_reg_rsd_bit_err_exp    (*(volatile byte xdata *) 0xF725)
+#define    r_reg_rsd_bit_err_exp    0xF725
+#define reg_rsd_bit_err_exp_pos 0
+#define reg_rsd_bit_err_exp_len 5
+#define reg_rsd_bit_err_exp_lsb 0
+#define xd_p_fec_rsd_packet_unit1_7_0   (*(volatile byte xdata *) 0xF726)
+#define    p_fec_rsd_packet_unit1_7_0   0xF726
+#define fec_rsd_packet_unit1_7_0_pos 0
+#define fec_rsd_packet_unit1_7_0_len 8
+#define fec_rsd_packet_unit1_7_0_lsb 0
+#define xd_p_fec_rsd_packet_unit1_15_8  (*(volatile byte xdata *) 0xF727)
+#define    p_fec_rsd_packet_unit1_15_8  0xF727
+#define fec_rsd_packet_unit1_15_8_pos 0
+#define fec_rsd_packet_unit1_15_8_len 8
+#define fec_rsd_packet_unit1_15_8_lsb 8
+#define xd_r_reg_rsd_bit_err_cnt1_7_0   (*(volatile byte xdata *) 0xF728)
+#define    r_reg_rsd_bit_err_cnt1_7_0   0xF728
+#define reg_rsd_bit_err_cnt1_7_0_pos 0
+#define reg_rsd_bit_err_cnt1_7_0_len 8
+#define reg_rsd_bit_err_cnt1_7_0_lsb 0
+#define xd_r_reg_rsd_bit_err_cnt1_15_8  (*(volatile byte xdata *) 0xF729)
+#define    r_reg_rsd_bit_err_cnt1_15_8  0xF729
+#define reg_rsd_bit_err_cnt1_15_8_pos 0
+#define reg_rsd_bit_err_cnt1_15_8_len 8
+#define reg_rsd_bit_err_cnt1_15_8_lsb 8
+#define xd_r_reg_rsd_bit_err_cnt1_23_16 (*(volatile byte xdata *) 0xF72A)
+#define    r_reg_rsd_bit_err_cnt1_23_16 0xF72A
+#define reg_rsd_bit_err_cnt1_23_16_pos 0
+#define reg_rsd_bit_err_cnt1_23_16_len 8
+#define reg_rsd_bit_err_cnt1_23_16_lsb 16
+#define xd_r_reg_rsd_abort_packet_cnt1_7_0  (*(volatile byte xdata *) 0xF72B)
+#define    r_reg_rsd_abort_packet_cnt1_7_0  0xF72B
+#define reg_rsd_abort_packet_cnt1_7_0_pos 0
+#define reg_rsd_abort_packet_cnt1_7_0_len 8
+#define reg_rsd_abort_packet_cnt1_7_0_lsb 0
+#define xd_r_reg_rsd_abort_packet_cnt1_15_8 (*(volatile byte xdata *) 0xF72C)
+#define    r_reg_rsd_abort_packet_cnt1_15_8 0xF72C
+#define reg_rsd_abort_packet_cnt1_15_8_pos 0
+#define reg_rsd_abort_packet_cnt1_15_8_len 8
+#define reg_rsd_abort_packet_cnt1_15_8_lsb 8
+#define xd_p_fec_rsd_ber_rst1   (*(volatile byte xdata *) 0xF72D)
+#define    p_fec_rsd_ber_rst1   0xF72D
+#define fec_rsd_ber_rst1_pos 0
+#define fec_rsd_ber_rst1_len 1
+#define fec_rsd_ber_rst1_lsb 0
+#define xd_p_reg_rsd_ber_rdy1   (*(volatile byte xdata *) 0xF72E)
+#define    p_reg_rsd_ber_rdy1   0xF72E
+#define reg_rsd_ber_rdy1_pos 0
+#define reg_rsd_ber_rdy1_len 1
+#define reg_rsd_ber_rdy1_lsb 0
+#define xd_p_reg_dca_txmod_sel  (*(volatile byte xdata *) 0xF72F)
+#define    p_reg_dca_txmod_sel  0xF72F
+#define reg_dca_txmod_sel_pos 0
+#define reg_dca_txmod_sel_len 1
+#define reg_dca_txmod_sel_lsb 0
+#define xd_p_reg_dca_platch (*(volatile byte xdata *) 0xF730)
+#define    p_reg_dca_platch 0xF730
+#define reg_dca_platch_pos 0
+#define reg_dca_platch_len 1
+#define reg_dca_platch_lsb 0
+#define xd_p_reg_dca_upper_chip (*(volatile byte xdata *) 0xF731)
+#define    p_reg_dca_upper_chip 0xF731
+#define reg_dca_upper_chip_pos 0
+#define reg_dca_upper_chip_len 1
+#define reg_dca_upper_chip_lsb 0
+#define xd_p_reg_dca_lower_chip (*(volatile byte xdata *) 0xF732)
+#define    p_reg_dca_lower_chip 0xF732
+#define reg_dca_lower_chip_pos 0
+#define reg_dca_lower_chip_len 1
+#define reg_dca_lower_chip_lsb 0
+#define xd_p_reg_dca_enl    (*(volatile byte xdata *) 0xF733)
+#define    p_reg_dca_enl    0xF733
+#define reg_dca_enl_pos 0
+#define reg_dca_enl_len 1
+#define reg_dca_enl_lsb 0
+#define xd_p_reg_dca_enu    (*(volatile byte xdata *) 0xF734)
+#define    p_reg_dca_enu    0xF734
+#define reg_dca_enu_pos 0
+#define reg_dca_enu_len 1
+#define reg_dca_enu_lsb 0
+#define xd_p_reg_dca_th (*(volatile byte xdata *) 0xF735)
+#define    p_reg_dca_th 0xF735
+#define reg_dca_th_pos 0
+#define reg_dca_th_len 5
+#define reg_dca_th_lsb 0
+#define xd_p_reg_dca_scale  (*(volatile byte xdata *) 0xF736)
+#define    p_reg_dca_scale  0xF736
+#define reg_dca_scale_pos 0
+#define reg_dca_scale_len 4
+#define reg_dca_scale_lsb 0
+#define xd_p_reg_dca_tone_7_0   (*(volatile byte xdata *) 0xF737)
+#define    p_reg_dca_tone_7_0   0xF737
+#define reg_dca_tone_7_0_pos 0
+#define reg_dca_tone_7_0_len 8
+#define reg_dca_tone_7_0_lsb 0
+#define xd_p_reg_dca_tone_12_8  (*(volatile byte xdata *) 0xF738)
+#define    p_reg_dca_tone_12_8  0xF738
+#define reg_dca_tone_12_8_pos 0
+#define reg_dca_tone_12_8_len 5
+#define reg_dca_tone_12_8_lsb 8
+#define xd_p_reg_dca_time_7_0   (*(volatile byte xdata *) 0xF739)
+#define    p_reg_dca_time_7_0   0xF739
+#define reg_dca_time_7_0_pos 0
+#define reg_dca_time_7_0_len 8
+#define reg_dca_time_7_0_lsb 0
+#define xd_p_reg_dca_time_15_8  (*(volatile byte xdata *) 0xF73A)
+#define    p_reg_dca_time_15_8  0xF73A
+#define reg_dca_time_15_8_pos 0
+#define reg_dca_time_15_8_len 8
+#define reg_dca_time_15_8_lsb 8
+#define xd_r_fec_dcasm  (*(volatile byte xdata *) 0xF73B)
+#define    r_fec_dcasm  0xF73B
+#define fec_dcasm_pos 0
+#define fec_dcasm_len 3
+#define fec_dcasm_lsb 0
+#define xd_p_reg_dca_stand_alone    (*(volatile byte xdata *) 0xF73C)
+#define    p_reg_dca_stand_alone    0xF73C
+#define reg_dca_stand_alone_pos 0
+#define reg_dca_stand_alone_len 1
+#define reg_dca_stand_alone_lsb 0
+#define xd_p_reg_dca_upper_out_en   (*(volatile byte xdata *) 0xF73D)
+#define    p_reg_dca_upper_out_en   0xF73D
+#define reg_dca_upper_out_en_pos 0
+#define reg_dca_upper_out_en_len 1
+#define reg_dca_upper_out_en_lsb 0
+#define xd_p_reg_dca_rc_en  (*(volatile byte xdata *) 0xF73E)
+#define    p_reg_dca_rc_en  0xF73E
+#define reg_dca_rc_en_pos 0
+#define reg_dca_rc_en_len 1
+#define reg_dca_rc_en_lsb 0
+#define xd_p_reg_dca_retrain_send   (*(volatile byte xdata *) 0xF73F)
+#define    p_reg_dca_retrain_send   0xF73F
+#define reg_dca_retrain_send_pos 0
+#define reg_dca_retrain_send_len 1
+#define reg_dca_retrain_send_lsb 0
+#define xd_p_reg_dca_retrain_rec    (*(volatile byte xdata *) 0xF740)
+#define    p_reg_dca_retrain_rec    0xF740
+#define reg_dca_retrain_rec_pos 0
+#define reg_dca_retrain_rec_len 1
+#define reg_dca_retrain_rec_lsb 0
+#define xd_p_reg_dca_gi_gap (*(volatile byte xdata *) 0xF741)
+#define    p_reg_dca_gi_gap 0xF741
+#define reg_dca_gi_gap_pos 0
+#define reg_dca_gi_gap_len 8
+#define reg_dca_gi_gap_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_txmod  (*(volatile byte xdata *) 0xF742)
+#define    r_reg_dca_rec_up_tpsd_txmod  0xF742
+#define reg_dca_rec_up_tpsd_txmod_pos 0
+#define reg_dca_rec_up_tpsd_txmod_len 2
+#define reg_dca_rec_up_tpsd_txmod_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_const  (*(volatile byte xdata *) 0xF743)
+#define    r_reg_dca_rec_up_tpsd_const  0xF743
+#define reg_dca_rec_up_tpsd_const_pos 0
+#define reg_dca_rec_up_tpsd_const_len 2
+#define reg_dca_rec_up_tpsd_const_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_indep  (*(volatile byte xdata *) 0xF744)
+#define    r_reg_dca_rec_up_tpsd_indep  0xF744
+#define reg_dca_rec_up_tpsd_indep_pos 0
+#define reg_dca_rec_up_tpsd_indep_len 1
+#define reg_dca_rec_up_tpsd_indep_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_hier   (*(volatile byte xdata *) 0xF745)
+#define    r_reg_dca_rec_up_tpsd_hier   0xF745
+#define reg_dca_rec_up_tpsd_hier_pos 0
+#define reg_dca_rec_up_tpsd_hier_len 2
+#define reg_dca_rec_up_tpsd_hier_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_hpcr   (*(volatile byte xdata *) 0xF746)
+#define    r_reg_dca_rec_up_tpsd_hpcr   0xF746
+#define reg_dca_rec_up_tpsd_hpcr_pos 0
+#define reg_dca_rec_up_tpsd_hpcr_len 3
+#define reg_dca_rec_up_tpsd_hpcr_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_lpcr   (*(volatile byte xdata *) 0xF747)
+#define    r_reg_dca_rec_up_tpsd_lpcr   0xF747
+#define reg_dca_rec_up_tpsd_lpcr_pos 0
+#define reg_dca_rec_up_tpsd_lpcr_len 3
+#define reg_dca_rec_up_tpsd_lpcr_lsb 0
+#define xd_r_reg_dca_rec_up_tpsd_lock   (*(volatile byte xdata *) 0xF748)
+#define    r_reg_dca_rec_up_tpsd_lock   0xF748
+#define reg_dca_rec_up_tpsd_lock_pos 0
+#define reg_dca_rec_up_tpsd_lock_len 1
+#define reg_dca_rec_up_tpsd_lock_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_txmod  (*(volatile byte xdata *) 0xF749)
+#define    r_reg_dca_rec_lo_tpsd_txmod  0xF749
+#define reg_dca_rec_lo_tpsd_txmod_pos 0
+#define reg_dca_rec_lo_tpsd_txmod_len 2
+#define reg_dca_rec_lo_tpsd_txmod_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_const  (*(volatile byte xdata *) 0xF74A)
+#define    r_reg_dca_rec_lo_tpsd_const  0xF74A
+#define reg_dca_rec_lo_tpsd_const_pos 0
+#define reg_dca_rec_lo_tpsd_const_len 2
+#define reg_dca_rec_lo_tpsd_const_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_indep  (*(volatile byte xdata *) 0xF74B)
+#define    r_reg_dca_rec_lo_tpsd_indep  0xF74B
+#define reg_dca_rec_lo_tpsd_indep_pos 0
+#define reg_dca_rec_lo_tpsd_indep_len 1
+#define reg_dca_rec_lo_tpsd_indep_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_hier   (*(volatile byte xdata *) 0xF74C)
+#define    r_reg_dca_rec_lo_tpsd_hier   0xF74C
+#define reg_dca_rec_lo_tpsd_hier_pos 0
+#define reg_dca_rec_lo_tpsd_hier_len 2
+#define reg_dca_rec_lo_tpsd_hier_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_hpcr   (*(volatile byte xdata *) 0xF74D)
+#define    r_reg_dca_rec_lo_tpsd_hpcr   0xF74D
+#define reg_dca_rec_lo_tpsd_hpcr_pos 0
+#define reg_dca_rec_lo_tpsd_hpcr_len 3
+#define reg_dca_rec_lo_tpsd_hpcr_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_lpcr   (*(volatile byte xdata *) 0xF74E)
+#define    r_reg_dca_rec_lo_tpsd_lpcr   0xF74E
+#define reg_dca_rec_lo_tpsd_lpcr_pos 0
+#define reg_dca_rec_lo_tpsd_lpcr_len 3
+#define reg_dca_rec_lo_tpsd_lpcr_lsb 0
+#define xd_r_reg_dca_rec_lo_tpsd_lock   (*(volatile byte xdata *) 0xF74F)
+#define    r_reg_dca_rec_lo_tpsd_lock   0xF74F
+#define reg_dca_rec_lo_tpsd_lock_pos 0
+#define reg_dca_rec_lo_tpsd_lock_len 1
+#define reg_dca_rec_lo_tpsd_lock_lsb 0
+#define xd_p_reg_dca_gpr_ctr_up_send    (*(volatile byte xdata *) 0xF750)
+#define    p_reg_dca_gpr_ctr_up_send    0xF750
+#define reg_dca_gpr_ctr_up_send_pos 0
+#define reg_dca_gpr_ctr_up_send_len 8
+#define reg_dca_gpr_ctr_up_send_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_0  (*(volatile byte xdata *) 0xF751)
+#define    p_reg_dca_gpr_dat_up_send_0  0xF751
+#define reg_dca_gpr_dat_up_send_0_pos 0
+#define reg_dca_gpr_dat_up_send_0_len 8
+#define reg_dca_gpr_dat_up_send_0_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_1  (*(volatile byte xdata *) 0xF752)
+#define    p_reg_dca_gpr_dat_up_send_1  0xF752
+#define reg_dca_gpr_dat_up_send_1_pos 0
+#define reg_dca_gpr_dat_up_send_1_len 8
+#define reg_dca_gpr_dat_up_send_1_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_2  (*(volatile byte xdata *) 0xF753)
+#define    p_reg_dca_gpr_dat_up_send_2  0xF753
+#define reg_dca_gpr_dat_up_send_2_pos 0
+#define reg_dca_gpr_dat_up_send_2_len 8
+#define reg_dca_gpr_dat_up_send_2_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_3  (*(volatile byte xdata *) 0xF754)
+#define    p_reg_dca_gpr_dat_up_send_3  0xF754
+#define reg_dca_gpr_dat_up_send_3_pos 0
+#define reg_dca_gpr_dat_up_send_3_len 8
+#define reg_dca_gpr_dat_up_send_3_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_4  (*(volatile byte xdata *) 0xF755)
+#define    p_reg_dca_gpr_dat_up_send_4  0xF755
+#define reg_dca_gpr_dat_up_send_4_pos 0
+#define reg_dca_gpr_dat_up_send_4_len 8
+#define reg_dca_gpr_dat_up_send_4_lsb 0
+#define xd_p_reg_dca_gpr_dat_up_send_5  (*(volatile byte xdata *) 0xF756)
+#define    p_reg_dca_gpr_dat_up_send_5  0xF756
+#define reg_dca_gpr_dat_up_send_5_pos 0
+#define reg_dca_gpr_dat_up_send_5_len 8
+#define reg_dca_gpr_dat_up_send_5_lsb 0
+#define xd_p_reg_dca_over_wr_up_send    (*(volatile byte xdata *) 0xF757)
+#define    p_reg_dca_over_wr_up_send    0xF757
+#define reg_dca_over_wr_up_send_pos 0
+#define reg_dca_over_wr_up_send_len 1
+#define reg_dca_over_wr_up_send_lsb 0
+#define xd_p_reg_dca_int_up_send    (*(volatile byte xdata *) 0xF758)
+#define    p_reg_dca_int_up_send    0xF758
+#define reg_dca_int_up_send_pos 0
+#define reg_dca_int_up_send_len 1
+#define reg_dca_int_up_send_lsb 0
+#define xd_p_reg_dca_gpr_ctr_lo_send    (*(volatile byte xdata *) 0xF759)
+#define    p_reg_dca_gpr_ctr_lo_send    0xF759
+#define reg_dca_gpr_ctr_lo_send_pos 0
+#define reg_dca_gpr_ctr_lo_send_len 8
+#define reg_dca_gpr_ctr_lo_send_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_0  (*(volatile byte xdata *) 0xF75A)
+#define    p_reg_dca_gpr_dat_lo_send_0  0xF75A
+#define reg_dca_gpr_dat_lo_send_0_pos 0
+#define reg_dca_gpr_dat_lo_send_0_len 8
+#define reg_dca_gpr_dat_lo_send_0_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_1  (*(volatile byte xdata *) 0xF75B)
+#define    p_reg_dca_gpr_dat_lo_send_1  0xF75B
+#define reg_dca_gpr_dat_lo_send_1_pos 0
+#define reg_dca_gpr_dat_lo_send_1_len 8
+#define reg_dca_gpr_dat_lo_send_1_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_2  (*(volatile byte xdata *) 0xF75C)
+#define    p_reg_dca_gpr_dat_lo_send_2  0xF75C
+#define reg_dca_gpr_dat_lo_send_2_pos 0
+#define reg_dca_gpr_dat_lo_send_2_len 8
+#define reg_dca_gpr_dat_lo_send_2_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_3  (*(volatile byte xdata *) 0xF75D)
+#define    p_reg_dca_gpr_dat_lo_send_3  0xF75D
+#define reg_dca_gpr_dat_lo_send_3_pos 0
+#define reg_dca_gpr_dat_lo_send_3_len 8
+#define reg_dca_gpr_dat_lo_send_3_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_4  (*(volatile byte xdata *) 0xF75E)
+#define    p_reg_dca_gpr_dat_lo_send_4  0xF75E
+#define reg_dca_gpr_dat_lo_send_4_pos 0
+#define reg_dca_gpr_dat_lo_send_4_len 8
+#define reg_dca_gpr_dat_lo_send_4_lsb 0
+#define xd_p_reg_dca_gpr_dat_lo_send_5  (*(volatile byte xdata *) 0xF75F)
+#define    p_reg_dca_gpr_dat_lo_send_5  0xF75F
+#define reg_dca_gpr_dat_lo_send_5_pos 0
+#define reg_dca_gpr_dat_lo_send_5_len 8
+#define reg_dca_gpr_dat_lo_send_5_lsb 0
+#define xd_p_reg_dca_over_wr_lo_send    (*(volatile byte xdata *) 0xF760)
+#define    p_reg_dca_over_wr_lo_send    0xF760
+#define reg_dca_over_wr_lo_send_pos 0
+#define reg_dca_over_wr_lo_send_len 1
+#define reg_dca_over_wr_lo_send_lsb 0
+#define xd_p_reg_dca_int_lo_send    (*(volatile byte xdata *) 0xF761)
+#define    p_reg_dca_int_lo_send    0xF761
+#define reg_dca_int_lo_send_pos 0
+#define reg_dca_int_lo_send_len 1
+#define reg_dca_int_lo_send_lsb 0
+#define xd_r_reg_dca_gpr_ctr_up_rec (*(volatile byte xdata *) 0xF762)
+#define    r_reg_dca_gpr_ctr_up_rec 0xF762
+#define reg_dca_gpr_ctr_up_rec_pos 0
+#define reg_dca_gpr_ctr_up_rec_len 8
+#define reg_dca_gpr_ctr_up_rec_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_0   (*(volatile byte xdata *) 0xF763)
+#define    r_reg_dca_gpr_dat_up_rec_0   0xF763
+#define reg_dca_gpr_dat_up_rec_0_pos 0
+#define reg_dca_gpr_dat_up_rec_0_len 8
+#define reg_dca_gpr_dat_up_rec_0_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_1   (*(volatile byte xdata *) 0xF764)
+#define    r_reg_dca_gpr_dat_up_rec_1   0xF764
+#define reg_dca_gpr_dat_up_rec_1_pos 0
+#define reg_dca_gpr_dat_up_rec_1_len 8
+#define reg_dca_gpr_dat_up_rec_1_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_2   (*(volatile byte xdata *) 0xF765)
+#define    r_reg_dca_gpr_dat_up_rec_2   0xF765
+#define reg_dca_gpr_dat_up_rec_2_pos 0
+#define reg_dca_gpr_dat_up_rec_2_len 8
+#define reg_dca_gpr_dat_up_rec_2_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_3   (*(volatile byte xdata *) 0xF766)
+#define    r_reg_dca_gpr_dat_up_rec_3   0xF766
+#define reg_dca_gpr_dat_up_rec_3_pos 0
+#define reg_dca_gpr_dat_up_rec_3_len 8
+#define reg_dca_gpr_dat_up_rec_3_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_4   (*(volatile byte xdata *) 0xF767)
+#define    r_reg_dca_gpr_dat_up_rec_4   0xF767
+#define reg_dca_gpr_dat_up_rec_4_pos 0
+#define reg_dca_gpr_dat_up_rec_4_len 8
+#define reg_dca_gpr_dat_up_rec_4_lsb 0
+#define xd_r_reg_dca_gpr_dat_up_rec_5   (*(volatile byte xdata *) 0xF768)
+#define    r_reg_dca_gpr_dat_up_rec_5   0xF768
+#define reg_dca_gpr_dat_up_rec_5_pos 0
+#define reg_dca_gpr_dat_up_rec_5_len 8
+#define reg_dca_gpr_dat_up_rec_5_lsb 0
+#define xd_r_reg_dca_over_wr_up_rec (*(volatile byte xdata *) 0xF769)
+#define    r_reg_dca_over_wr_up_rec 0xF769
+#define reg_dca_over_wr_up_rec_pos 0
+#define reg_dca_over_wr_up_rec_len 1
+#define reg_dca_over_wr_up_rec_lsb 0
+#define xd_p_reg_dca_int_up_rec (*(volatile byte xdata *) 0xF76A)
+#define    p_reg_dca_int_up_rec 0xF76A
+#define reg_dca_int_up_rec_pos 0
+#define reg_dca_int_up_rec_len 1
+#define reg_dca_int_up_rec_lsb 0
+#define xd_p_reg_dca_fw_read_yet_up (*(volatile byte xdata *) 0xF76B)
+#define    p_reg_dca_fw_read_yet_up 0xF76B
+#define reg_dca_fw_read_yet_up_pos 0
+#define reg_dca_fw_read_yet_up_len 1
+#define reg_dca_fw_read_yet_up_lsb 0
+#define xd_r_reg_dca_gpr_ctr_lo_rec (*(volatile byte xdata *) 0xF76C)
+#define    r_reg_dca_gpr_ctr_lo_rec 0xF76C
+#define reg_dca_gpr_ctr_lo_rec_pos 0
+#define reg_dca_gpr_ctr_lo_rec_len 8
+#define reg_dca_gpr_ctr_lo_rec_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_0   (*(volatile byte xdata *) 0xF76D)
+#define    r_reg_dca_gpr_dat_lo_rec_0   0xF76D
+#define reg_dca_gpr_dat_lo_rec_0_pos 0
+#define reg_dca_gpr_dat_lo_rec_0_len 8
+#define reg_dca_gpr_dat_lo_rec_0_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_1   (*(volatile byte xdata *) 0xF76E)
+#define    r_reg_dca_gpr_dat_lo_rec_1   0xF76E
+#define reg_dca_gpr_dat_lo_rec_1_pos 0
+#define reg_dca_gpr_dat_lo_rec_1_len 8
+#define reg_dca_gpr_dat_lo_rec_1_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_2   (*(volatile byte xdata *) 0xF76F)
+#define    r_reg_dca_gpr_dat_lo_rec_2   0xF76F
+#define reg_dca_gpr_dat_lo_rec_2_pos 0
+#define reg_dca_gpr_dat_lo_rec_2_len 8
+#define reg_dca_gpr_dat_lo_rec_2_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_3   (*(volatile byte xdata *) 0xF770)
+#define    r_reg_dca_gpr_dat_lo_rec_3   0xF770
+#define reg_dca_gpr_dat_lo_rec_3_pos 0
+#define reg_dca_gpr_dat_lo_rec_3_len 8
+#define reg_dca_gpr_dat_lo_rec_3_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_4   (*(volatile byte xdata *) 0xF771)
+#define    r_reg_dca_gpr_dat_lo_rec_4   0xF771
+#define reg_dca_gpr_dat_lo_rec_4_pos 0
+#define reg_dca_gpr_dat_lo_rec_4_len 8
+#define reg_dca_gpr_dat_lo_rec_4_lsb 0
+#define xd_r_reg_dca_gpr_dat_lo_rec_5   (*(volatile byte xdata *) 0xF772)
+#define    r_reg_dca_gpr_dat_lo_rec_5   0xF772
+#define reg_dca_gpr_dat_lo_rec_5_pos 0
+#define reg_dca_gpr_dat_lo_rec_5_len 8
+#define reg_dca_gpr_dat_lo_rec_5_lsb 0
+#define xd_r_reg_dca_over_wr_lo_rec (*(volatile byte xdata *) 0xF773)
+#define    r_reg_dca_over_wr_lo_rec 0xF773
+#define reg_dca_over_wr_lo_rec_pos 0
+#define reg_dca_over_wr_lo_rec_len 1
+#define reg_dca_over_wr_lo_rec_lsb 0
+#define xd_p_reg_dca_int_lo_rec (*(volatile byte xdata *) 0xF774)
+#define    p_reg_dca_int_lo_rec 0xF774
+#define reg_dca_int_lo_rec_pos 0
+#define reg_dca_int_lo_rec_len 1
+#define reg_dca_int_lo_rec_lsb 0
+#define xd_p_reg_dca_fw_read_yet_lo (*(volatile byte xdata *) 0xF775)
+#define    p_reg_dca_fw_read_yet_lo 0xF775
+#define reg_dca_fw_read_yet_lo_pos 0
+#define reg_dca_fw_read_yet_lo_len 1
+#define reg_dca_fw_read_yet_lo_lsb 0
+#define xd_p_reg_dca_en (*(volatile byte xdata *) 0xF776)
+#define    p_reg_dca_en 0xF776
+#define reg_dca_en_pos 0
+#define reg_dca_en_len 1
+#define reg_dca_en_lsb 0
+#define xd_p_reg_dca_ulrdy_delay    (*(volatile byte xdata *) 0xF777)
+#define    p_reg_dca_ulrdy_delay    0xF777
+#define reg_dca_ulrdy_delay_pos 0
+#define reg_dca_ulrdy_delay_len 8
+#define reg_dca_ulrdy_delay_lsb 0
+#define xd_p_reg_dca_fpga_latch (*(volatile byte xdata *) 0xF778)
+#define    p_reg_dca_fpga_latch 0xF778
+#define reg_dca_fpga_latch_pos 0
+#define reg_dca_fpga_latch_len 8
+#define reg_dca_fpga_latch_lsb 0
+#define xd_p_reg_dca_vldld_err  (*(volatile byte xdata *) 0xF779)
+#define    p_reg_dca_vldld_err  0xF779
+#define reg_dca_vldld_err_pos 0
+#define reg_dca_vldld_err_len 1
+#define reg_dca_vldld_err_lsb 0
+#define xd_p_reg_dca_vldud_err  (*(volatile byte xdata *) 0xF77A)
+#define    p_reg_dca_vldud_err  0xF77A
+#define reg_dca_vldud_err_pos 0
+#define reg_dca_vldud_err_len 1
+#define reg_dca_vldud_err_lsb 0
+#define xd_p_reg_dca_modeu_err  (*(volatile byte xdata *) 0xF77B)
+#define    p_reg_dca_modeu_err  0xF77B
+#define reg_dca_modeu_err_pos 0
+#define reg_dca_modeu_err_len 1
+#define reg_dca_modeu_err_lsb 0
+#define xd_p_reg_dca_model_err  (*(volatile byte xdata *) 0xF77C)
+#define    p_reg_dca_model_err  0xF77C
+#define reg_dca_model_err_pos 0
+#define reg_dca_model_err_len 1
+#define reg_dca_model_err_lsb 0
+#define xd_p_reg_dca_interrupt  (*(volatile byte xdata *) 0xF77D)
+#define    p_reg_dca_interrupt  0xF77D
+#define reg_dca_interrupt_pos 0
+#define reg_dca_interrupt_len 1
+#define reg_dca_interrupt_lsb 0
+#define xd_p_reg_dca_auto_reset_en  (*(volatile byte xdata *) 0xF77E)
+#define    p_reg_dca_auto_reset_en  0xF77E
+#define reg_dca_auto_reset_en_pos 0
+#define reg_dca_auto_reset_en_len 1
+#define reg_dca_auto_reset_en_lsb 0
+#define xd_p_reg_qnt_valuew_7_0 (*(volatile byte xdata *) 0xF77F)
+#define    p_reg_qnt_valuew_7_0 0xF77F
+#define reg_qnt_valuew_7_0_pos 0
+#define reg_qnt_valuew_7_0_len 8
+#define reg_qnt_valuew_7_0_lsb 0
+#define xd_p_reg_qnt_valuew_10_8    (*(volatile byte xdata *) 0xF780)
+#define    p_reg_qnt_valuew_10_8    0xF780
+#define reg_qnt_valuew_10_8_pos 0
+#define reg_qnt_valuew_10_8_len 3
+#define reg_qnt_valuew_10_8_lsb 8
+#define xd_p_reg_qnt_nfvaluew_7_0   (*(volatile byte xdata *) 0xF781)
+#define    p_reg_qnt_nfvaluew_7_0   0xF781
+#define reg_qnt_nfvaluew_7_0_pos 0
+#define reg_qnt_nfvaluew_7_0_len 8
+#define reg_qnt_nfvaluew_7_0_lsb 0
+#define xd_p_reg_qnt_nfvaluew_10_8  (*(volatile byte xdata *) 0xF782)
+#define    p_reg_qnt_nfvaluew_10_8  0xF782
+#define reg_qnt_nfvaluew_10_8_pos 0
+#define reg_qnt_nfvaluew_10_8_len 3
+#define reg_qnt_nfvaluew_10_8_lsb 8
+#define xd_p_reg_qnt_flatness_thr_7_0   (*(volatile byte xdata *) 0xF783)
+#define    p_reg_qnt_flatness_thr_7_0   0xF783
+#define reg_qnt_flatness_thr_7_0_pos 0
+#define reg_qnt_flatness_thr_7_0_len 8
+#define reg_qnt_flatness_thr_7_0_lsb 0
+#define xd_p_reg_qnt_flatness_thr_8 (*(volatile byte xdata *) 0xF784)
+#define    p_reg_qnt_flatness_thr_8 0xF784
+#define reg_qnt_flatness_thr_8_pos 0
+#define reg_qnt_flatness_thr_8_len 1
+#define reg_qnt_flatness_thr_8_lsb 8
+#define xd_p_reg_llr_to_be_monitor  (*(volatile byte xdata *) 0xF785)
+#define    p_reg_llr_to_be_monitor  0xF785
+#define reg_llr_to_be_monitor_pos 0
+#define reg_llr_to_be_monitor_len 1
+#define reg_llr_to_be_monitor_lsb 0
+#define xd_p_reg_qnt_vbc_rdy    (*(volatile byte xdata *) 0xF786)
+#define    p_reg_qnt_vbc_rdy    0xF786
+#define reg_qnt_vbc_rdy_pos 0
+#define reg_qnt_vbc_rdy_len 1
+#define reg_qnt_vbc_rdy_lsb 0
+#define xd_p_reg_qnt_noncmb_vbc_rdy (*(volatile byte xdata *) 0xF787)
+#define    p_reg_qnt_noncmb_vbc_rdy 0xF787
+#define reg_qnt_noncmb_vbc_rdy_pos 0
+#define reg_qnt_noncmb_vbc_rdy_len 1
+#define reg_qnt_noncmb_vbc_rdy_lsb 0
+#define xd_p_reg_use_eh2_mean   (*(volatile byte xdata *) 0xF788)
+#define    p_reg_use_eh2_mean   0xF788
+#define reg_use_eh2_mean_pos 0
+#define reg_use_eh2_mean_len 1
+#define reg_use_eh2_mean_lsb 0
+#define xd_p_reg_qnt_vbc_ccid_mode  (*(volatile byte xdata *) 0xF789)
+#define    p_reg_qnt_vbc_ccid_mode  0xF789
+#define reg_qnt_vbc_ccid_mode_pos 0
+#define reg_qnt_vbc_ccid_mode_len 1
+#define reg_qnt_vbc_ccid_mode_lsb 0
+#define xd_p_reg_qnt_cci_bandsize   (*(volatile byte xdata *) 0xF78A)
+#define    p_reg_qnt_cci_bandsize   0xF78A
+#define reg_qnt_cci_bandsize_pos 0
+#define reg_qnt_cci_bandsize_len 4
+#define reg_qnt_cci_bandsize_lsb 0
+#define xd_p_reg_qnt_vbc_sframe_num (*(volatile byte xdata *) 0xF78B)
+#define    p_reg_qnt_vbc_sframe_num 0xF78B
+#define reg_qnt_vbc_sframe_num_pos 0
+#define reg_qnt_vbc_sframe_num_len 8
+#define reg_qnt_vbc_sframe_num_lsb 0
+#define xd_p_reg_sbx_gain_diff_7_0  (*(volatile byte xdata *) 0xF78C)
+#define    p_reg_sbx_gain_diff_7_0  0xF78C
+#define reg_sbx_gain_diff_7_0_pos 0
+#define reg_sbx_gain_diff_7_0_len 8
+#define reg_sbx_gain_diff_7_0_lsb 0
+#define xd_p_reg_sbx_gain_diff_8    (*(volatile byte xdata *) 0xF78D)
+#define    p_reg_sbx_gain_diff_8    0xF78D
+#define reg_sbx_gain_diff_8_pos 0
+#define reg_sbx_gain_diff_8_len 1
+#define reg_sbx_gain_diff_8_lsb 8
+#define xd_p_reg_sbx_gain_diff_rdy  (*(volatile byte xdata *) 0xF78E)
+#define    p_reg_sbx_gain_diff_rdy  0xF78E
+#define reg_sbx_gain_diff_rdy_pos 0
+#define reg_sbx_gain_diff_rdy_len 1
+#define reg_sbx_gain_diff_rdy_lsb 0
+#define xd_p_reg_sbx_noncmb_gain_diff_7_0   (*(volatile byte xdata *) 0xF78F)
+#define    p_reg_sbx_noncmb_gain_diff_7_0   0xF78F
+#define reg_sbx_noncmb_gain_diff_7_0_pos 0
+#define reg_sbx_noncmb_gain_diff_7_0_len 8
+#define reg_sbx_noncmb_gain_diff_7_0_lsb 0
+#define xd_p_reg_sbx_noncmb_gain_diff_8 (*(volatile byte xdata *) 0xF790)
+#define    p_reg_sbx_noncmb_gain_diff_8 0xF790
+#define reg_sbx_noncmb_gain_diff_8_pos 0
+#define reg_sbx_noncmb_gain_diff_8_len 1
+#define reg_sbx_noncmb_gain_diff_8_lsb 8
+#define xd_p_reg_sbx_noncmb_gain_diff_rdy   (*(volatile byte xdata *) 0xF791)
+#define    p_reg_sbx_noncmb_gain_diff_rdy   0xF791
+#define reg_sbx_noncmb_gain_diff_rdy_pos 0
+#define reg_sbx_noncmb_gain_diff_rdy_len 1
+#define reg_sbx_noncmb_gain_diff_rdy_lsb 0
+#define xd_r_reg_qnt_vbc_err_7_0    (*(volatile byte xdata *) 0xF792)
+#define    r_reg_qnt_vbc_err_7_0    0xF792
+#define reg_qnt_vbc_err_7_0_pos 0
+#define reg_qnt_vbc_err_7_0_len 8
+#define reg_qnt_vbc_err_7_0_lsb 0
+#define xd_r_reg_qnt_vbc_err_15_8   (*(volatile byte xdata *) 0xF793)
+#define    r_reg_qnt_vbc_err_15_8   0xF793
+#define reg_qnt_vbc_err_15_8_pos 0
+#define reg_qnt_vbc_err_15_8_len 8
+#define reg_qnt_vbc_err_15_8_lsb 8
+#define xd_r_reg_qnt_vbc_err_23_16  (*(volatile byte xdata *) 0xF794)
+#define    r_reg_qnt_vbc_err_23_16  0xF794
+#define reg_qnt_vbc_err_23_16_pos 0
+#define reg_qnt_vbc_err_23_16_len 8
+#define reg_qnt_vbc_err_23_16_lsb 16
+#define xd_r_reg_qnt_noncmb_vbc_err_7_0 (*(volatile byte xdata *) 0xF795)
+#define    r_reg_qnt_noncmb_vbc_err_7_0 0xF795
+#define reg_qnt_noncmb_vbc_err_7_0_pos 0
+#define reg_qnt_noncmb_vbc_err_7_0_len 8
+#define reg_qnt_noncmb_vbc_err_7_0_lsb 0
+#define xd_r_reg_qnt_noncmb_vbc_err_15_8    (*(volatile byte xdata *) 0xF796)
+#define    r_reg_qnt_noncmb_vbc_err_15_8    0xF796
+#define reg_qnt_noncmb_vbc_err_15_8_pos 0
+#define reg_qnt_noncmb_vbc_err_15_8_len 8
+#define reg_qnt_noncmb_vbc_err_15_8_lsb 8
+#define xd_r_reg_qnt_noncmb_vbc_err_23_16   (*(volatile byte xdata *) 0xF797)
+#define    r_reg_qnt_noncmb_vbc_err_23_16   0xF797
+#define reg_qnt_noncmb_vbc_err_23_16_pos 0
+#define reg_qnt_noncmb_vbc_err_23_16_len 8
+#define reg_qnt_noncmb_vbc_err_23_16_lsb 16
+#define xd_p_reg_sbx_signalquality_threshold    (*(volatile byte xdata *) 0xF798)
+#define    p_reg_sbx_signalquality_threshold    0xF798
+#define reg_sbx_signalquality_threshold_pos 0
+#define reg_sbx_signalquality_threshold_len 4
+#define reg_sbx_signalquality_threshold_lsb 0
+#define xd_r_reg_sbx_signalquality_ind  (*(volatile byte xdata *) 0xF799)
+#define    r_reg_sbx_signalquality_ind  0xF799
+#define reg_sbx_signalquality_ind_pos 0
+#define reg_sbx_signalquality_ind_len 1
+#define reg_sbx_signalquality_ind_lsb 0
+#define xd_p_reg_p_sbxqnt_th1   (*(volatile byte xdata *) 0xF79A)
+#define    p_reg_p_sbxqnt_th1   0xF79A
+#define reg_p_sbxqnt_th1_pos 0
+#define reg_p_sbxqnt_th1_len 8
+#define reg_p_sbxqnt_th1_lsb 0
+#define xd_p_reg_p_sbxqnt_th2   (*(volatile byte xdata *) 0xF79B)
+#define    p_reg_p_sbxqnt_th2   0xF79B
+#define reg_p_sbxqnt_th2_pos 0
+#define reg_p_sbxqnt_th2_len 8
+#define reg_p_sbxqnt_th2_lsb 0
+#define xd_p_reg_p_sbxqnt_th3   (*(volatile byte xdata *) 0xF79C)
+#define    p_reg_p_sbxqnt_th3   0xF79C
+#define reg_p_sbxqnt_th3_pos 0
+#define reg_p_sbxqnt_th3_len 8
+#define reg_p_sbxqnt_th3_lsb 0
+#define xd_p_reg_p_sbxqnt_th4   (*(volatile byte xdata *) 0xF79D)
+#define    p_reg_p_sbxqnt_th4   0xF79D
+#define reg_p_sbxqnt_th4_pos 0
+#define reg_p_sbxqnt_th4_len 8
+#define reg_p_sbxqnt_th4_lsb 0
+#define xd_p_reg_p_sbxqnt_th5   (*(volatile byte xdata *) 0xF79E)
+#define    p_reg_p_sbxqnt_th5   0xF79E
+#define reg_p_sbxqnt_th5_pos 0
+#define reg_p_sbxqnt_th5_len 8
+#define reg_p_sbxqnt_th5_lsb 0
+#define xd_p_reg_p_sbxqnt_th6   (*(volatile byte xdata *) 0xF79F)
+#define    p_reg_p_sbxqnt_th6   0xF79F
+#define reg_p_sbxqnt_th6_pos 0
+#define reg_p_sbxqnt_th6_len 8
+#define reg_p_sbxqnt_th6_lsb 0
+#define xd_p_reg_p_sbxqnt_th7   (*(volatile byte xdata *) 0xF800)
+#define    p_reg_p_sbxqnt_th7   0xF800
+#define reg_p_sbxqnt_th7_pos 0
+#define reg_p_sbxqnt_th7_len 8
+#define reg_p_sbxqnt_th7_lsb 0
+#define xd_p_reg_p_sbxqnt_th8   (*(volatile byte xdata *) 0xF801)
+#define    p_reg_p_sbxqnt_th8   0xF801
+#define reg_p_sbxqnt_th8_pos 0
+#define reg_p_sbxqnt_th8_len 8
+#define reg_p_sbxqnt_th8_lsb 0
+#define xd_p_reg_p_sbxqnt_th9   (*(volatile byte xdata *) 0xF802)
+#define    p_reg_p_sbxqnt_th9   0xF802
+#define reg_p_sbxqnt_th9_pos 0
+#define reg_p_sbxqnt_th9_len 8
+#define reg_p_sbxqnt_th9_lsb 0
+#define xd_p_reg_p_sbxqnt_th10  (*(volatile byte xdata *) 0xF803)
+#define    p_reg_p_sbxqnt_th10  0xF803
+#define reg_p_sbxqnt_th10_pos 0
+#define reg_p_sbxqnt_th10_len 8
+#define reg_p_sbxqnt_th10_lsb 0
+#define xd_p_reg_p_sbxqnt_th11  (*(volatile byte xdata *) 0xF804)
+#define    p_reg_p_sbxqnt_th11  0xF804
+#define reg_p_sbxqnt_th11_pos 0
+#define reg_p_sbxqnt_th11_len 8
+#define reg_p_sbxqnt_th11_lsb 0
+#define xd_p_reg_p_sbxqnt_th12  (*(volatile byte xdata *) 0xF805)
+#define    p_reg_p_sbxqnt_th12  0xF805
+#define reg_p_sbxqnt_th12_pos 0
+#define reg_p_sbxqnt_th12_len 8
+#define reg_p_sbxqnt_th12_lsb 0
+#define xd_p_reg_p_sbxqnt_th13_7_0  (*(volatile byte xdata *) 0xF806)
+#define    p_reg_p_sbxqnt_th13_7_0  0xF806
+#define reg_p_sbxqnt_th13_7_0_pos 0
+#define reg_p_sbxqnt_th13_7_0_len 8
+#define reg_p_sbxqnt_th13_7_0_lsb 0
+#define xd_p_reg_p_sbxqnt_th13_9_8  (*(volatile byte xdata *) 0xF807)
+#define    p_reg_p_sbxqnt_th13_9_8  0xF807
+#define reg_p_sbxqnt_th13_9_8_pos 0
+#define reg_p_sbxqnt_th13_9_8_len 2
+#define reg_p_sbxqnt_th13_9_8_lsb 8
+#define xd_p_reg_p_sbxqnt_th14_7_0  (*(volatile byte xdata *) 0xF808)
+#define    p_reg_p_sbxqnt_th14_7_0  0xF808
+#define reg_p_sbxqnt_th14_7_0_pos 0
+#define reg_p_sbxqnt_th14_7_0_len 8
+#define reg_p_sbxqnt_th14_7_0_lsb 0
+#define xd_p_reg_p_sbxqnt_th14_9_8  (*(volatile byte xdata *) 0xF809)
+#define    p_reg_p_sbxqnt_th14_9_8  0xF809
+#define reg_p_sbxqnt_th14_9_8_pos 0
+#define reg_p_sbxqnt_th14_9_8_len 2
+#define reg_p_sbxqnt_th14_9_8_lsb 8
+#define xd_p_reg_p_sbxqnt_th15_7_0  (*(volatile byte xdata *) 0xF80A)
+#define    p_reg_p_sbxqnt_th15_7_0  0xF80A
+#define reg_p_sbxqnt_th15_7_0_pos 0
+#define reg_p_sbxqnt_th15_7_0_len 8
+#define reg_p_sbxqnt_th15_7_0_lsb 0
+#define xd_p_reg_p_sbxqnt_th15_9_8  (*(volatile byte xdata *) 0xF80B)
+#define    p_reg_p_sbxqnt_th15_9_8  0xF80B
+#define reg_p_sbxqnt_th15_9_8_pos 0
+#define reg_p_sbxqnt_th15_9_8_len 2
+#define reg_p_sbxqnt_th15_9_8_lsb 8
+#define xd_p_reg_p_sbxqnt_vzh2_th0  (*(volatile byte xdata *) 0xF80C)
+#define    p_reg_p_sbxqnt_vzh2_th0  0xF80C
+#define reg_p_sbxqnt_vzh2_th0_pos 0
+#define reg_p_sbxqnt_vzh2_th0_len 8
+#define reg_p_sbxqnt_vzh2_th0_lsb 0
+#define xd_p_reg_p_sbxqnt_vzh2_th1  (*(volatile byte xdata *) 0xF80D)
+#define    p_reg_p_sbxqnt_vzh2_th1  0xF80D
+#define reg_p_sbxqnt_vzh2_th1_pos 0
+#define reg_p_sbxqnt_vzh2_th1_len 8
+#define reg_p_sbxqnt_vzh2_th1_lsb 0
+#define xd_p_reg_p_sbxqnt_vzh2_th2  (*(volatile byte xdata *) 0xF80E)
+#define    p_reg_p_sbxqnt_vzh2_th2  0xF80E
+#define reg_p_sbxqnt_vzh2_th2_pos 0
+#define reg_p_sbxqnt_vzh2_th2_len 8
+#define reg_p_sbxqnt_vzh2_th2_lsb 0
+#define xd_p_reg_p_qnt_w_comp1  (*(volatile byte xdata *) 0xF80F)
+#define    p_reg_p_qnt_w_comp1  0xF80F
+#define reg_p_qnt_w_comp1_pos 0
+#define reg_p_qnt_w_comp1_len 8
+#define reg_p_qnt_w_comp1_lsb 0
+#define xd_p_reg_p_qnt_w_comp2  (*(volatile byte xdata *) 0xF810)
+#define    p_reg_p_qnt_w_comp2  0xF810
+#define reg_p_qnt_w_comp2_pos 0
+#define reg_p_qnt_w_comp2_len 8
+#define reg_p_qnt_w_comp2_lsb 0
+#define xd_p_reg_p_qnt_w_comp3  (*(volatile byte xdata *) 0xF811)
+#define    p_reg_p_qnt_w_comp3  0xF811
+#define reg_p_qnt_w_comp3_pos 0
+#define reg_p_qnt_w_comp3_len 8
+#define reg_p_qnt_w_comp3_lsb 0
+#define xd_p_reg_p_vtb_in_0 (*(volatile byte xdata *) 0xF821)
+#define    p_reg_p_vtb_in_0 0xF821
+#define reg_p_vtb_in_0_pos 0
+#define reg_p_vtb_in_0_len 6
+#define reg_p_vtb_in_0_lsb 0
+#define xd_p_reg_p_vtb_in_1 (*(volatile byte xdata *) 0xF822)
+#define    p_reg_p_vtb_in_1 0xF822
+#define reg_p_vtb_in_1_pos 0
+#define reg_p_vtb_in_1_len 6
+#define reg_p_vtb_in_1_lsb 0
+#define xd_p_reg_p_vtb_in_2 (*(volatile byte xdata *) 0xF823)
+#define    p_reg_p_vtb_in_2 0xF823
+#define reg_p_vtb_in_2_pos 0
+#define reg_p_vtb_in_2_len 6
+#define reg_p_vtb_in_2_lsb 0
+#define xd_p_reg_p_vtb_in_3 (*(volatile byte xdata *) 0xF824)
+#define    p_reg_p_vtb_in_3 0xF824
+#define reg_p_vtb_in_3_pos 0
+#define reg_p_vtb_in_3_len 6
+#define reg_p_vtb_in_3_lsb 0
+#define xd_p_reg_p_vtb_in_4 (*(volatile byte xdata *) 0xF825)
+#define    p_reg_p_vtb_in_4 0xF825
+#define reg_p_vtb_in_4_pos 0
+#define reg_p_vtb_in_4_len 6
+#define reg_p_vtb_in_4_lsb 0
+#define xd_p_reg_p_vtb_in_5 (*(volatile byte xdata *) 0xF826)
+#define    p_reg_p_vtb_in_5 0xF826
+#define reg_p_vtb_in_5_pos 0
+#define reg_p_vtb_in_5_len 6
+#define reg_p_vtb_in_5_lsb 0
+#define xd_p_reg_p_vtb_in_6 (*(volatile byte xdata *) 0xF827)
+#define    p_reg_p_vtb_in_6 0xF827
+#define reg_p_vtb_in_6_pos 0
+#define reg_p_vtb_in_6_len 6
+#define reg_p_vtb_in_6_lsb 0
+#define xd_p_reg_p_vtb_in_7 (*(volatile byte xdata *) 0xF828)
+#define    p_reg_p_vtb_in_7 0xF828
+#define reg_p_vtb_in_7_pos 0
+#define reg_p_vtb_in_7_len 6
+#define reg_p_vtb_in_7_lsb 0
+#define xd_p_reg_p_vtb_in_8 (*(volatile byte xdata *) 0xF829)
+#define    p_reg_p_vtb_in_8 0xF829
+#define reg_p_vtb_in_8_pos 0
+#define reg_p_vtb_in_8_len 6
+#define reg_p_vtb_in_8_lsb 0
+#define xd_p_reg_p_vtb_in_9 (*(volatile byte xdata *) 0xF82A)
+#define    p_reg_p_vtb_in_9 0xF82A
+#define reg_p_vtb_in_9_pos 0
+#define reg_p_vtb_in_9_len 6
+#define reg_p_vtb_in_9_lsb 0
+#define xd_p_reg_p_vtb_in_10    (*(volatile byte xdata *) 0xF82B)
+#define    p_reg_p_vtb_in_10    0xF82B
+#define reg_p_vtb_in_10_pos 0
+#define reg_p_vtb_in_10_len 6
+#define reg_p_vtb_in_10_lsb 0
+#define xd_p_reg_p_vtb_in_11    (*(volatile byte xdata *) 0xF82C)
+#define    p_reg_p_vtb_in_11    0xF82C
+#define reg_p_vtb_in_11_pos 0
+#define reg_p_vtb_in_11_len 6
+#define reg_p_vtb_in_11_lsb 0
+#define xd_p_reg_p_vtb_in_12    (*(volatile byte xdata *) 0xF82D)
+#define    p_reg_p_vtb_in_12    0xF82D
+#define reg_p_vtb_in_12_pos 0
+#define reg_p_vtb_in_12_len 6
+#define reg_p_vtb_in_12_lsb 0
+#define xd_p_reg_p_vtb_in_13    (*(volatile byte xdata *) 0xF82E)
+#define    p_reg_p_vtb_in_13    0xF82E
+#define reg_p_vtb_in_13_pos 0
+#define reg_p_vtb_in_13_len 6
+#define reg_p_vtb_in_13_lsb 0
+#define xd_p_reg_p_vtb_in_14    (*(volatile byte xdata *) 0xF82F)
+#define    p_reg_p_vtb_in_14    0xF82F
+#define reg_p_vtb_in_14_pos 0
+#define reg_p_vtb_in_14_len 6
+#define reg_p_vtb_in_14_lsb 0
+#define xd_p_reg_p_vtb_in_15    (*(volatile byte xdata *) 0xF830)
+#define    p_reg_p_vtb_in_15    0xF830
+#define reg_p_vtb_in_15_pos 0
+#define reg_p_vtb_in_15_len 6
+#define reg_p_vtb_in_15_lsb 0
+#define xd_I2C_i2c_m_slave_addr (*(volatile byte xdata *) 0xF940)
+#define    I2C_i2c_m_slave_addr 0xF940
+#define i2c_m_slave_addr_pos 0
+#define i2c_m_slave_addr_len 8
+#define i2c_m_slave_addr_lsb 0
+#define xd_I2C_i2c_m_data1  (*(volatile byte xdata *) 0xF941)
+#define    I2C_i2c_m_data1  0xF941
+#define i2c_m_data1_pos 0
+#define i2c_m_data1_len 8
+#define i2c_m_data1_lsb 0
+#define xd_I2C_i2c_m_data2  (*(volatile byte xdata *) 0xF942)
+#define    I2C_i2c_m_data2  0xF942
+#define i2c_m_data2_pos 0
+#define i2c_m_data2_len 8
+#define i2c_m_data2_lsb 0
+#define xd_I2C_i2c_m_data3  (*(volatile byte xdata *) 0xF943)
+#define    I2C_i2c_m_data3  0xF943
+#define i2c_m_data3_pos 0
+#define i2c_m_data3_len 8
+#define i2c_m_data3_lsb 0
+#define xd_I2C_i2c_m_data4  (*(volatile byte xdata *) 0xF944)
+#define    I2C_i2c_m_data4  0xF944
+#define i2c_m_data4_pos 0
+#define i2c_m_data4_len 8
+#define i2c_m_data4_lsb 0
+#define xd_I2C_i2c_m_data5  (*(volatile byte xdata *) 0xF945)
+#define    I2C_i2c_m_data5  0xF945
+#define i2c_m_data5_pos 0
+#define i2c_m_data5_len 8
+#define i2c_m_data5_lsb 0
+#define xd_I2C_i2c_m_data6  (*(volatile byte xdata *) 0xF946)
+#define    I2C_i2c_m_data6  0xF946
+#define i2c_m_data6_pos 0
+#define i2c_m_data6_len 8
+#define i2c_m_data6_lsb 0
+#define xd_I2C_i2c_m_data7  (*(volatile byte xdata *) 0xF947)
+#define    I2C_i2c_m_data7  0xF947
+#define i2c_m_data7_pos 0
+#define i2c_m_data7_len 8
+#define i2c_m_data7_lsb 0
+#define xd_I2C_i2c_m_data8  (*(volatile byte xdata *) 0xF948)
+#define    I2C_i2c_m_data8  0xF948
+#define i2c_m_data8_pos 0
+#define i2c_m_data8_len 8
+#define i2c_m_data8_lsb 0
+#define xd_I2C_i2c_m_data9  (*(volatile byte xdata *) 0xF949)
+#define    I2C_i2c_m_data9  0xF949
+#define i2c_m_data9_pos 0
+#define i2c_m_data9_len 8
+#define i2c_m_data9_lsb 0
+#define xd_I2C_i2c_m_data10 (*(volatile byte xdata *) 0xF94A)
+#define    I2C_i2c_m_data10 0xF94A
+#define i2c_m_data10_pos 0
+#define i2c_m_data10_len 8
+#define i2c_m_data10_lsb 0
+#define xd_I2C_i2c_m_data11 (*(volatile byte xdata *) 0xF94B)
+#define    I2C_i2c_m_data11 0xF94B
+#define i2c_m_data11_pos 0
+#define i2c_m_data11_len 8
+#define i2c_m_data11_lsb 0
+#define xd_I2C_i2c_m_data12 (*(volatile byte xdata *) 0xF94C)
+#define    I2C_i2c_m_data12 0xF94C
+#define i2c_m_data12_pos 0
+#define i2c_m_data12_len 8
+#define i2c_m_data12_lsb 0
+#define xd_I2C_i2c_m_data13 (*(volatile byte xdata *) 0xF94D)
+#define    I2C_i2c_m_data13 0xF94D
+#define i2c_m_data13_pos 0
+#define i2c_m_data13_len 8
+#define i2c_m_data13_lsb 0
+#define xd_I2C_i2c_m_data14 (*(volatile byte xdata *) 0xF94E)
+#define    I2C_i2c_m_data14 0xF94E
+#define i2c_m_data14_pos 0
+#define i2c_m_data14_len 8
+#define i2c_m_data14_lsb 0
+#define xd_I2C_i2c_m_data15 (*(volatile byte xdata *) 0xF94F)
+#define    I2C_i2c_m_data15 0xF94F
+#define i2c_m_data15_pos 0
+#define i2c_m_data15_len 8
+#define i2c_m_data15_lsb 0
+#define xd_I2C_i2c_m_data16 (*(volatile byte xdata *) 0xF950)
+#define    I2C_i2c_m_data16 0xF950
+#define i2c_m_data16_pos 0
+#define i2c_m_data16_len 8
+#define i2c_m_data16_lsb 0
+#define xd_I2C_i2c_m_data17 (*(volatile byte xdata *) 0xF951)
+#define    I2C_i2c_m_data17 0xF951
+#define i2c_m_data17_pos 0
+#define i2c_m_data17_len 8
+#define i2c_m_data17_lsb 0
+#define xd_I2C_i2c_m_data18 (*(volatile byte xdata *) 0xF952)
+#define    I2C_i2c_m_data18 0xF952
+#define i2c_m_data18_pos 0
+#define i2c_m_data18_len 8
+#define i2c_m_data18_lsb 0
+#define xd_I2C_i2c_m_data19 (*(volatile byte xdata *) 0xF953)
+#define    I2C_i2c_m_data19 0xF953
+#define i2c_m_data19_pos 0
+#define i2c_m_data19_len 8
+#define i2c_m_data19_lsb 0
+#define xd_I2C_i2c_m_cmd_rw (*(volatile byte xdata *) 0xF954)
+#define    I2C_i2c_m_cmd_rw 0xF954
+#define i2c_m_cmd_rw_pos 0
+#define i2c_m_cmd_rw_len 1
+#define i2c_m_cmd_rw_lsb 0
+#define xd_I2C_i2c_m_cmd_rwlen  (*(volatile byte xdata *) 0xF954)
+#define    I2C_i2c_m_cmd_rwlen  0xF954
+#define i2c_m_cmd_rwlen_pos 3
+#define i2c_m_cmd_rwlen_len 4
+#define i2c_m_cmd_rwlen_lsb 0
+#define xd_I2C_i2c_m_status_cmd_exe (*(volatile byte xdata *) 0xF955)
+#define    I2C_i2c_m_status_cmd_exe 0xF955
+#define i2c_m_status_cmd_exe_pos 0
+#define i2c_m_status_cmd_exe_len 1
+#define i2c_m_status_cmd_exe_lsb 0
+#define xd_I2C_i2c_m_status_wdat_done   (*(volatile byte xdata *) 0xF955)
+#define    I2C_i2c_m_status_wdat_done   0xF955
+#define i2c_m_status_wdat_done_pos 1
+#define i2c_m_status_wdat_done_len 1
+#define i2c_m_status_wdat_done_lsb 0
+#define xd_I2C_i2c_m_status_wdat_fail   (*(volatile byte xdata *) 0xF955)
+#define    I2C_i2c_m_status_wdat_fail   0xF955
+#define i2c_m_status_wdat_fail_pos 2
+#define i2c_m_status_wdat_fail_len 1
+#define i2c_m_status_wdat_fail_lsb 0
+#define xd_I2C_i2c_m_status_rdat_rdy    (*(volatile byte xdata *) 0xF955)
+#define    I2C_i2c_m_status_rdat_rdy    0xF955
+#define i2c_m_status_rdat_rdy_pos 3
+#define i2c_m_status_rdat_rdy_len 1
+#define i2c_m_status_rdat_rdy_lsb 0
+#define xd_I2C_i2c_m_period (*(volatile byte xdata *) 0xF956)
+#define    I2C_i2c_m_period 0xF956
+#define i2c_m_period_pos 0
+#define i2c_m_period_len 8
+#define i2c_m_period_lsb 0
+#define xd_I2C_i2c_m_reg_msb_lsb    (*(volatile byte xdata *) 0xF957)
+#define    I2C_i2c_m_reg_msb_lsb    0xF957
+#define i2c_m_reg_msb_lsb_pos 0
+#define i2c_m_reg_msb_lsb_len 1
+#define i2c_m_reg_msb_lsb_lsb 0
+#define xd_I2C_reg_ofdm_rst (*(volatile byte xdata *) 0xF957)
+#define    I2C_reg_ofdm_rst 0xF957
+#define reg_ofdm_rst_pos 1
+#define reg_ofdm_rst_len 1
+#define reg_ofdm_rst_lsb 0
+#define xd_I2C_reg_sample_period_on_tuner   (*(volatile byte xdata *) 0xF957)
+#define    I2C_reg_sample_period_on_tuner   0xF957
+#define reg_sample_period_on_tuner_pos 2
+#define reg_sample_period_on_tuner_len 1
+#define reg_sample_period_on_tuner_lsb 0
+#define xd_I2C_reg_sel_tuner    (*(volatile byte xdata *) 0xF957)
+#define    I2C_reg_sel_tuner    0xF957
+#define reg_sel_tuner_pos 3
+#define reg_sel_tuner_len 1
+#define reg_sel_tuner_lsb 0
+#define xd_I2C_reg_ofdm_rst_en  (*(volatile byte xdata *) 0xF957)
+#define    I2C_reg_ofdm_rst_en  0xF957
+#define reg_ofdm_rst_en_pos 4
+#define reg_ofdm_rst_en_len 1
+#define reg_ofdm_rst_en_lsb 0
+#define xd_p_mp2if_psb_overflow (*(volatile byte xdata *) 0xF980)
+#define    p_mp2if_psb_overflow 0xF980
+#define mp2if_psb_overflow_pos 0
+#define mp2if_psb_overflow_len 1
+#define mp2if_psb_overflow_lsb 0
+#define xd_p_mp2if_no_modify_tei_bit    (*(volatile byte xdata *) 0xF981)
+#define    p_mp2if_no_modify_tei_bit    0xF981
+#define mp2if_no_modify_tei_bit_pos 0
+#define mp2if_no_modify_tei_bit_len 1
+#define mp2if_no_modify_tei_bit_lsb 0
+#define xd_p_mp2if_keep_sf_sync_byte    (*(volatile byte xdata *) 0xF982)
+#define    p_mp2if_keep_sf_sync_byte    0xF982
+#define mp2if_keep_sf_sync_byte_pos 0
+#define mp2if_keep_sf_sync_byte_len 1
+#define mp2if_keep_sf_sync_byte_lsb 0
+#define xd_p_mp2if_data_access_disable  (*(volatile byte xdata *) 0xF983)
+#define    p_mp2if_data_access_disable  0xF983
+#define mp2if_data_access_disable_pos 0
+#define mp2if_data_access_disable_len 1
+#define mp2if_data_access_disable_lsb 0
+#define xd_p_mp2if_mpeg_ser_do7 (*(volatile byte xdata *) 0xF984)
+#define    p_mp2if_mpeg_ser_do7 0xF984
+#define mp2if_mpeg_ser_do7_pos 0
+#define mp2if_mpeg_ser_do7_len 1
+#define mp2if_mpeg_ser_do7_lsb 0
+#define xd_p_mp2if_mpeg_ser_mode    (*(volatile byte xdata *) 0xF985)
+#define    p_mp2if_mpeg_ser_mode    0xF985
+#define mp2if_mpeg_ser_mode_pos 0
+#define mp2if_mpeg_ser_mode_len 1
+#define mp2if_mpeg_ser_mode_lsb 0
+#define xd_p_mp2if_mpeg_par_mode    (*(volatile byte xdata *) 0xF986)
+#define    p_mp2if_mpeg_par_mode    0xF986
+#define mp2if_mpeg_par_mode_pos 0
+#define mp2if_mpeg_par_mode_len 1
+#define mp2if_mpeg_par_mode_lsb 0
+#define xd_r_mp2if_psb_empty    (*(volatile byte xdata *) 0xF987)
+#define    r_mp2if_psb_empty    0xF987
+#define mp2if_psb_empty_pos 0
+#define mp2if_psb_empty_len 1
+#define mp2if_psb_empty_lsb 0
+#define xd_r_mp2if_ts_not_188   (*(volatile byte xdata *) 0xF988)
+#define    r_mp2if_ts_not_188   0xF988
+#define mp2if_ts_not_188_pos 0
+#define mp2if_ts_not_188_len 1
+#define mp2if_ts_not_188_lsb 0
+#define xd_p_mp2if_mssync_len   (*(volatile byte xdata *) 0xF989)
+#define    p_mp2if_mssync_len   0xF989
+#define mp2if_mssync_len_pos 0
+#define mp2if_mssync_len_len 1
+#define mp2if_mssync_len_lsb 0
+#define xd_p_mp2if_msdo_msb (*(volatile byte xdata *) 0xF98A)
+#define    p_mp2if_msdo_msb 0xF98A
+#define mp2if_msdo_msb_pos 0
+#define mp2if_msdo_msb_len 1
+#define mp2if_msdo_msb_lsb 0
+#define xd_p_mp2if_mpeg_clk_gated   (*(volatile byte xdata *) 0xF98B)
+#define    p_mp2if_mpeg_clk_gated   0xF98B
+#define mp2if_mpeg_clk_gated_pos 0
+#define mp2if_mpeg_clk_gated_len 1
+#define mp2if_mpeg_clk_gated_lsb 0
+#define xd_p_mp2if_mpeg_err_pol (*(volatile byte xdata *) 0xF98C)
+#define    p_mp2if_mpeg_err_pol 0xF98C
+#define mp2if_mpeg_err_pol_pos 0
+#define mp2if_mpeg_err_pol_len 1
+#define mp2if_mpeg_err_pol_lsb 0
+#define xd_p_mp2if_mpeg_sync_pol    (*(volatile byte xdata *) 0xF98D)
+#define    p_mp2if_mpeg_sync_pol    0xF98D
+#define mp2if_mpeg_sync_pol_pos 0
+#define mp2if_mpeg_sync_pol_len 1
+#define mp2if_mpeg_sync_pol_lsb 0
+#define xd_p_mp2if_mpeg_vld_pol (*(volatile byte xdata *) 0xF98E)
+#define    p_mp2if_mpeg_vld_pol 0xF98E
+#define mp2if_mpeg_vld_pol_pos 0
+#define mp2if_mpeg_vld_pol_len 1
+#define mp2if_mpeg_vld_pol_lsb 0
+#define xd_p_mp2if_mpeg_clk_pol (*(volatile byte xdata *) 0xF98F)
+#define    p_mp2if_mpeg_clk_pol 0xF98F
+#define mp2if_mpeg_clk_pol_pos 0
+#define mp2if_mpeg_clk_pol_len 1
+#define mp2if_mpeg_clk_pol_lsb 0
+#define xd_p_reg_mpeg_full_speed    (*(volatile byte xdata *) 0xF990)
+#define    p_reg_mpeg_full_speed    0xF990
+#define reg_mpeg_full_speed_pos 0
+#define reg_mpeg_full_speed_len 1
+#define reg_mpeg_full_speed_lsb 0
+#define xd_p_mp2if_pid_complement   (*(volatile byte xdata *) 0xF991)
+#define    p_mp2if_pid_complement   0xF991
+#define mp2if_pid_complement_pos 0
+#define mp2if_pid_complement_len 1
+#define mp2if_pid_complement_lsb 0
+#define xd_p_mp2if_pid_rst  (*(volatile byte xdata *) 0xF992)
+#define    p_mp2if_pid_rst  0xF992
+#define mp2if_pid_rst_pos 0
+#define mp2if_pid_rst_len 1
+#define mp2if_pid_rst_lsb 0
+#define xd_p_mp2if_pid_en   (*(volatile byte xdata *) 0xF993)
+#define    p_mp2if_pid_en   0xF993
+#define mp2if_pid_en_pos 0
+#define mp2if_pid_en_len 1
+#define mp2if_pid_en_lsb 0
+#define xd_p_mp2if_pid_index_en (*(volatile byte xdata *) 0xF994)
+#define    p_mp2if_pid_index_en 0xF994
+#define mp2if_pid_index_en_pos 0
+#define mp2if_pid_index_en_len 1
+#define mp2if_pid_index_en_lsb 0
+#define xd_p_mp2if_pid_index    (*(volatile byte xdata *) 0xF995)
+#define    p_mp2if_pid_index    0xF995
+#define mp2if_pid_index_pos 0
+#define mp2if_pid_index_len 5
+#define mp2if_pid_index_lsb 0
+#define xd_p_mp2if_pid_dat_l    (*(volatile byte xdata *) 0xF996)
+#define    p_mp2if_pid_dat_l    0xF996
+#define mp2if_pid_dat_l_pos 0
+#define mp2if_pid_dat_l_len 8
+#define mp2if_pid_dat_l_lsb 0
+#define xd_p_mp2if_pid_dat_h    (*(volatile byte xdata *) 0xF997)
+#define    p_mp2if_pid_dat_h    0xF997
+#define mp2if_pid_dat_h_pos 0
+#define mp2if_pid_dat_h_len 5
+#define mp2if_pid_dat_h_lsb 0
+#define xd_p_reg_latch_clk  (*(volatile byte xdata *) 0xF998)
+#define    p_reg_latch_clk  0xF998
+#define reg_latch_clk_pos 0
+#define reg_latch_clk_len 1
+#define reg_latch_clk_lsb 0
+#define xd_r_mp2if_sync_byte_locked (*(volatile byte xdata *) 0xF999)
+#define    r_mp2if_sync_byte_locked 0xF999
+#define mp2if_sync_byte_locked_pos 0
+#define mp2if_sync_byte_locked_len 1
+#define mp2if_sync_byte_locked_lsb 0
+#define xd_p_mp2if_ignore_sync_byte (*(volatile byte xdata *) 0xF99A)
+#define    p_mp2if_ignore_sync_byte 0xF99A
+#define mp2if_ignore_sync_byte_pos 0
+#define mp2if_ignore_sync_byte_len 1
+#define mp2if_ignore_sync_byte_lsb 0
+#define xd_p_reg_mp2if_clk_en   (*(volatile byte xdata *) 0xF99B)
+#define    p_reg_mp2if_clk_en   0xF99B
+#define reg_mp2if_clk_en_pos 0
+#define reg_mp2if_clk_en_len 1
+#define reg_mp2if_clk_en_lsb 0
+#define xd_p_reg_mpeg_vld_tgl   (*(volatile byte xdata *) 0xF99C)
+#define    p_reg_mpeg_vld_tgl   0xF99C
+#define reg_mpeg_vld_tgl_pos 0
+#define reg_mpeg_vld_tgl_len 1
+#define reg_mpeg_vld_tgl_lsb 0
+#define xd_p_reg_mp2_sw_rst (*(volatile byte xdata *) 0xF99D)
+#define    p_reg_mp2_sw_rst 0xF99D
+#define reg_mp2_sw_rst_pos 0
+#define reg_mp2_sw_rst_len 1
+#define reg_mp2_sw_rst_lsb 0
+#define xd_p_mp2if_psb_en   (*(volatile byte xdata *) 0xF99E)
+#define    p_mp2if_psb_en   0xF99E
+#define mp2if_psb_en_pos 0
+#define mp2if_psb_en_len 1
+#define mp2if_psb_en_lsb 0
+#define xd_r_mp2if_usb20_mode   (*(volatile byte xdata *) 0xF99F)
+#define    r_mp2if_usb20_mode   0xF99F
+#define mp2if_usb20_mode_pos 0
+#define mp2if_usb20_mode_len 1
+#define mp2if_usb20_mode_lsb 0
+#define xd_r_mp2if_strap_usb20_mode (*(volatile byte xdata *) 0xF9A0)
+#define    r_mp2if_strap_usb20_mode 0xF9A0
+#define mp2if_strap_usb20_mode_pos 0
+#define mp2if_strap_usb20_mode_len 1
+#define mp2if_strap_usb20_mode_lsb 0
+#define xd_r_mp2if_lost_pkt_cnt_l   (*(volatile byte xdata *) 0xF9A1)
+#define    r_mp2if_lost_pkt_cnt_l   0xF9A1
+#define mp2if_lost_pkt_cnt_l_pos 0
+#define mp2if_lost_pkt_cnt_l_len 8
+#define mp2if_lost_pkt_cnt_l_lsb 0
+#define xd_r_mp2if_lost_pkt_cnt_h   (*(volatile byte xdata *) 0xF9A2)
+#define    r_mp2if_lost_pkt_cnt_h   0xF9A2
+#define mp2if_lost_pkt_cnt_h_pos 0
+#define mp2if_lost_pkt_cnt_h_len 8
+#define mp2if_lost_pkt_cnt_h_lsb 0
+#define xd_p_reg_mp2if2_en  (*(volatile byte xdata *) 0xF9A3)
+#define    p_reg_mp2if2_en  0xF9A3
+#define reg_mp2if2_en_pos 0
+#define reg_mp2if2_en_len 1
+#define reg_mp2if2_en_lsb 0
+#define xd_p_reg_mp2if2_sw_rst  (*(volatile byte xdata *) 0xF9A4)
+#define    p_reg_mp2if2_sw_rst  0xF9A4
+#define reg_mp2if2_sw_rst_pos 0
+#define reg_mp2if2_sw_rst_len 1
+#define reg_mp2if2_sw_rst_lsb 0
+#define xd_p_reg_mp2if2_half_psb    (*(volatile byte xdata *) 0xF9A5)
+#define    p_reg_mp2if2_half_psb    0xF9A5
+#define reg_mp2if2_half_psb_pos 0
+#define reg_mp2if2_half_psb_len 1
+#define reg_mp2if2_half_psb_lsb 0
+#define xd_p_reg_ts_byte_endian (*(volatile byte xdata *) 0xF9A6)
+#define    p_reg_ts_byte_endian 0xF9A6
+#define reg_ts_byte_endian_pos 0
+#define reg_ts_byte_endian_len 1
+#define reg_ts_byte_endian_lsb 0
+#define xd_p_reg_mp2_dioif  (*(volatile byte xdata *) 0xF9A7)
+#define    p_reg_mp2_dioif  0xF9A7
+#define reg_mp2_dioif_pos 0
+#define reg_mp2_dioif_len 1
+#define reg_mp2_dioif_lsb 0
+#define xd_p_reg_mp2_dioif_fast (*(volatile byte xdata *) 0xF9A8)
+#define    p_reg_mp2_dioif_fast 0xF9A8
+#define reg_mp2_dioif_fast_pos 0
+#define reg_mp2_dioif_fast_len 1
+#define reg_mp2_dioif_fast_lsb 0
+#define xd_p_reg_tpsd_bw_mp2if  (*(volatile byte xdata *) 0xF9A9)
+#define    p_reg_tpsd_bw_mp2if  0xF9A9
+#define reg_tpsd_bw_mp2if_pos 0
+#define reg_tpsd_bw_mp2if_len 2
+#define reg_tpsd_bw_mp2if_lsb 0
+#define xd_p_reg_tpsd_gi_mp2if  (*(volatile byte xdata *) 0xF9AA)
+#define    p_reg_tpsd_gi_mp2if  0xF9AA
+#define reg_tpsd_gi_mp2if_pos 0
+#define reg_tpsd_gi_mp2if_len 2
+#define reg_tpsd_gi_mp2if_lsb 0
+#define xd_p_reg_tpsd_cr_mp2if  (*(volatile byte xdata *) 0xF9AB)
+#define    p_reg_tpsd_cr_mp2if  0xF9AB
+#define reg_tpsd_cr_mp2if_pos 0
+#define reg_tpsd_cr_mp2if_len 3
+#define reg_tpsd_cr_mp2if_lsb 0
+#define xd_p_reg_tpsd_cons_mp2if    (*(volatile byte xdata *) 0xF9AC)
+#define    p_reg_tpsd_cons_mp2if    0xF9AC
+#define reg_tpsd_cons_mp2if_pos 0
+#define reg_tpsd_cons_mp2if_len 2
+#define reg_tpsd_cons_mp2if_lsb 0
+#define xd_p_reg_fw_table_en    (*(volatile byte xdata *) 0xF9AD)
+#define    p_reg_fw_table_en    0xF9AD
+#define reg_fw_table_en_pos 0
+#define reg_fw_table_en_len 1
+#define reg_fw_table_en_lsb 0
+#define xd_p_reg_p_aud_pk_gen_aud_pk_size   (*(volatile byte xdata *) 0xF9AD)
+#define    p_reg_p_aud_pk_gen_aud_pk_size   0xF9AD
+#define reg_p_aud_pk_gen_aud_pk_size_pos 1
+#define reg_p_aud_pk_gen_aud_pk_size_len 6
+#define reg_p_aud_pk_gen_aud_pk_size_lsb 0
+#define xd_p_mp2if_psb_num_blk  (*(volatile byte xdata *) 0xF9AE)
+#define    p_mp2if_psb_num_blk  0xF9AE
+#define mp2if_psb_num_blk_pos 0
+#define mp2if_psb_num_blk_len 6
+#define mp2if_psb_num_blk_lsb 0
+#define xd_p_reg_fec_fake   (*(volatile byte xdata *) 0xF9AF)
+#define    p_reg_fec_fake   0xF9AF
+#define reg_fec_fake_pos 0
+#define reg_fec_fake_len 1
+#define reg_fec_fake_lsb 0
+#define xd_p_reg_p_ccir_atv_en  (*(volatile byte xdata *) 0xF9AF)
+#define    p_reg_p_ccir_atv_en  0xF9AF
+#define reg_p_ccir_atv_en_pos 1
+#define reg_p_ccir_atv_en_len 1
+#define reg_p_ccir_atv_en_lsb 0
+#define xd_p_reg_video_stop_n   (*(volatile byte xdata *) 0xF9AF)
+#define    p_reg_video_stop_n   0xF9AF
+#define reg_video_stop_n_pos 2
+#define reg_video_stop_n_len 1
+#define reg_video_stop_n_lsb 0
+#define xd_p_reg_audio_stop_n   (*(volatile byte xdata *) 0xF9AF)
+#define    p_reg_audio_stop_n   0xF9AF
+#define reg_audio_stop_n_pos 3
+#define reg_audio_stop_n_len 1
+#define reg_audio_stop_n_lsb 0
+#define xd_p_mp2if_i2smode  (*(volatile byte xdata *) 0xF9AF)
+#define    p_mp2if_i2smode  0xF9AF
+#define mp2if_i2smode_pos 4
+#define mp2if_i2smode_len 2
+#define mp2if_i2smode_lsb 0
+#define xd_p_mp2if_word_size    (*(volatile byte xdata *) 0xF9AF)
+#define    p_mp2if_word_size    0xF9AF
+#define mp2if_word_size_pos 6
+#define mp2if_word_size_len 2
+#define mp2if_word_size_lsb 0
+#define xd_p_reg_packet_gap (*(volatile byte xdata *) 0xF9B0)
+#define    p_reg_packet_gap 0xF9B0
+#define reg_packet_gap_pos 0
+#define reg_packet_gap_len 8
+#define reg_packet_gap_lsb 0
+#define xd_p_reg_ts_dat_inv (*(volatile byte xdata *) 0xF9B2)
+#define    p_reg_ts_dat_inv 0xF9B2
+#define reg_ts_dat_inv_pos 0
+#define reg_ts_dat_inv_len 1
+#define reg_ts_dat_inv_lsb 0
+#define xd_p_reg_ts_lsb_1st (*(volatile byte xdata *) 0xF9B3)
+#define    p_reg_ts_lsb_1st 0xF9B3
+#define reg_ts_lsb_1st_pos 0
+#define reg_ts_lsb_1st_len 1
+#define reg_ts_lsb_1st_lsb 0
+#define xd_p_reg_ts_capt_bg_sel (*(volatile byte xdata *) 0xF9B4)
+#define    p_reg_ts_capt_bg_sel 0xF9B4
+#define reg_ts_capt_bg_sel_pos 0
+#define reg_ts_capt_bg_sel_len 1
+#define reg_ts_capt_bg_sel_lsb 0
+#define xd_p_reg_mp2if_stop_en  (*(volatile byte xdata *) 0xF9B5)
+#define    p_reg_mp2if_stop_en  0xF9B5
+#define reg_mp2if_stop_en_pos 0
+#define reg_mp2if_stop_en_len 1
+#define reg_mp2if_stop_en_lsb 0
+#define xd_p_reg_mp2if2_pes_base    (*(volatile byte xdata *) 0xF9B6)
+#define    p_reg_mp2if2_pes_base    0xF9B6
+#define reg_mp2if2_pes_base_pos 0
+#define reg_mp2if2_pes_base_len 1
+#define reg_mp2if2_pes_base_lsb 0
+#define xd_p_reg_ts_sync_inv    (*(volatile byte xdata *) 0xF9B7)
+#define    p_reg_ts_sync_inv    0xF9B7
+#define reg_ts_sync_inv_pos 0
+#define reg_ts_sync_inv_len 1
+#define reg_ts_sync_inv_lsb 0
+#define xd_p_reg_ts_vld_inv (*(volatile byte xdata *) 0xF9B8)
+#define    p_reg_ts_vld_inv 0xF9B8
+#define reg_ts_vld_inv_pos 0
+#define reg_ts_vld_inv_len 1
+#define reg_ts_vld_inv_lsb 0
+#define xd_p_reg_sys_buf_overflow   (*(volatile byte xdata *) 0xF9B9)
+#define    p_reg_sys_buf_overflow   0xF9B9
+#define reg_sys_buf_overflow_pos 0
+#define reg_sys_buf_overflow_len 1
+#define reg_sys_buf_overflow_lsb 0
+#define xd_p_reg_top_dummy0 (*(volatile byte xdata *) 0xF9BB)
+#define    p_reg_top_dummy0 0xF9BB
+#define reg_top_dummy0_pos 0
+#define reg_top_dummy0_len 8
+#define reg_top_dummy0_lsb 0
+#define xd_p_reg_top_dummy1 (*(volatile byte xdata *) 0xF9BC)
+#define    p_reg_top_dummy1 0xF9BC
+#define reg_top_dummy1_pos 0
+#define reg_top_dummy1_len 8
+#define reg_top_dummy1_lsb 0
+#define xd_p_reg_top_dummy2 (*(volatile byte xdata *) 0xF9BD)
+#define    p_reg_top_dummy2 0xF9BD
+#define reg_top_dummy2_pos 0
+#define reg_top_dummy2_len 8
+#define reg_top_dummy2_lsb 0
+#define xd_p_reg_top_dummy3 (*(volatile byte xdata *) 0xF9BE)
+#define    p_reg_top_dummy3 0xF9BE
+#define reg_top_dummy3_pos 0
+#define reg_top_dummy3_len 8
+#define reg_top_dummy3_lsb 0
+#define xd_p_reg_top_dummy4 (*(volatile byte xdata *) 0xF9BF)
+#define    p_reg_top_dummy4 0xF9BF
+#define reg_top_dummy4_pos 0
+#define reg_top_dummy4_len 8
+#define reg_top_dummy4_lsb 0
+#define xd_p_reg_top_dummy5 (*(volatile byte xdata *) 0xF9C0)
+#define    p_reg_top_dummy5 0xF9C0
+#define reg_top_dummy5_pos 0
+#define reg_top_dummy5_len 8
+#define reg_top_dummy5_lsb 0
+#define xd_p_reg_top_dummy6 (*(volatile byte xdata *) 0xF9C1)
+#define    p_reg_top_dummy6 0xF9C1
+#define reg_top_dummy6_pos 0
+#define reg_top_dummy6_len 8
+#define reg_top_dummy6_lsb 0
+#define xd_p_reg_top_dummy7 (*(volatile byte xdata *) 0xF9C2)
+#define    p_reg_top_dummy7 0xF9C2
+#define reg_top_dummy7_pos 0
+#define reg_top_dummy7_len 8
+#define reg_top_dummy7_lsb 0
+#define xd_p_reg_top_dummy8 (*(volatile byte xdata *) 0xF9C3)
+#define    p_reg_top_dummy8 0xF9C3
+#define reg_top_dummy8_pos 0
+#define reg_top_dummy8_len 8
+#define reg_top_dummy8_lsb 0
+#define xd_p_reg_top_dummy9 (*(volatile byte xdata *) 0xF9C4)
+#define    p_reg_top_dummy9 0xF9C4
+#define reg_top_dummy9_pos 0
+#define reg_top_dummy9_len 8
+#define reg_top_dummy9_lsb 0
+#define xd_p_reg_top_dummyA (*(volatile byte xdata *) 0xF9C5)
+#define    p_reg_top_dummyA 0xF9C5
+#define reg_top_dummyA_pos 0
+#define reg_top_dummyA_len 8
+#define reg_top_dummyA_lsb 0
+#define xd_p_reg_top_dummyB (*(volatile byte xdata *) 0xF9C6)
+#define    p_reg_top_dummyB 0xF9C6
+#define reg_top_dummyB_pos 0
+#define reg_top_dummyB_len 8
+#define reg_top_dummyB_lsb 0
+#define xd_p_reg_top_dummyC (*(volatile byte xdata *) 0xF9C7)
+#define    p_reg_top_dummyC 0xF9C7
+#define reg_top_dummyC_pos 0
+#define reg_top_dummyC_len 8
+#define reg_top_dummyC_lsb 0
+#define xd_p_reg_top_dummyD (*(volatile byte xdata *) 0xF9C8)
+#define    p_reg_top_dummyD 0xF9C8
+#define reg_top_dummyD_pos 0
+#define reg_top_dummyD_len 8
+#define reg_top_dummyD_lsb 0
+#define xd_p_reg_top_dummyE (*(volatile byte xdata *) 0xF9C9)
+#define    p_reg_top_dummyE 0xF9C9
+#define reg_top_dummyE_pos 0
+#define reg_top_dummyE_len 8
+#define reg_top_dummyE_lsb 0
+#define xd_p_reg_top_dummyF (*(volatile byte xdata *) 0xF9CA)
+#define    p_reg_top_dummyF 0xF9CA
+#define reg_top_dummyF_pos 0
+#define reg_top_dummyF_len 8
+#define reg_top_dummyF_lsb 0
+#define xd_p_reg_mp2if_clk_coeff    (*(volatile byte xdata *) 0xF9CB)
+#define    p_reg_mp2if_clk_coeff    0xF9CB
+#define reg_mp2if_clk_coeff_pos 0
+#define reg_mp2if_clk_coeff_len 7
+#define reg_mp2if_clk_coeff_lsb 0
+#define xd_p_reg_tsip_en    (*(volatile byte xdata *) 0xF9CC)
+#define    p_reg_tsip_en    0xF9CC
+#define reg_tsip_en_pos 0
+#define reg_tsip_en_len 1
+#define reg_tsip_en_lsb 0
+#define xd_p_reg_tsis_en    (*(volatile byte xdata *) 0xF9CD)
+#define    p_reg_tsis_en    0xF9CD
+#define reg_tsis_en_pos 0
+#define reg_tsis_en_len 1
+#define reg_tsis_en_lsb 0
+#define xd_p_reg_tsip_br    (*(volatile byte xdata *) 0xF9CE)
+#define    p_reg_tsip_br    0xF9CE
+#define reg_tsip_br_pos 0
+#define reg_tsip_br_len 1
+#define reg_tsip_br_lsb 0
+#define xd_p_reg_tsip_frm_inv   (*(volatile byte xdata *) 0xF9D0)
+#define    p_reg_tsip_frm_inv   0xF9D0
+#define reg_tsip_frm_inv_pos 0
+#define reg_tsip_frm_inv_len 1
+#define reg_tsip_frm_inv_lsb 0
+#define xd_p_reg_tsip_str_inv   (*(volatile byte xdata *) 0xF9D1)
+#define    p_reg_tsip_str_inv   0xF9D1
+#define reg_tsip_str_inv_pos 0
+#define reg_tsip_str_inv_len 1
+#define reg_tsip_str_inv_lsb 0
+#define xd_p_reg_tsip_fail_inv  (*(volatile byte xdata *) 0xF9D2)
+#define    p_reg_tsip_fail_inv  0xF9D2
+#define reg_tsip_fail_inv_pos 0
+#define reg_tsip_fail_inv_len 1
+#define reg_tsip_fail_inv_lsb 0
+#define xd_p_reg_tsip_frm_ignore    (*(volatile byte xdata *) 0xF9D3)
+#define    p_reg_tsip_frm_ignore    0xF9D3
+#define reg_tsip_frm_ignore_pos 0
+#define reg_tsip_frm_ignore_len 1
+#define reg_tsip_frm_ignore_lsb 0
+#define xd_p_reg_tsip_str_ignore    (*(volatile byte xdata *) 0xF9D4)
+#define    p_reg_tsip_str_ignore    0xF9D4
+#define reg_tsip_str_ignore_pos 0
+#define reg_tsip_str_ignore_len 1
+#define reg_tsip_str_ignore_lsb 0
+#define xd_p_reg_tsip_fail_ignore   (*(volatile byte xdata *) 0xF9D5)
+#define    p_reg_tsip_fail_ignore   0xF9D5
+#define reg_tsip_fail_ignore_pos 0
+#define reg_tsip_fail_ignore_len 1
+#define reg_tsip_fail_ignore_lsb 0
+#define xd_p_reg_tsip_endian    (*(volatile byte xdata *) 0xF9D6)
+#define    p_reg_tsip_endian    0xF9D6
+#define reg_tsip_endian_pos 0
+#define reg_tsip_endian_len 1
+#define reg_tsip_endian_lsb 0
+#define xd_p_reg_tsip_overflow  (*(volatile byte xdata *) 0xF9D7)
+#define    p_reg_tsip_overflow  0xF9D7
+#define reg_tsip_overflow_pos 0
+#define reg_tsip_overflow_len 1
+#define reg_tsip_overflow_lsb 0
+#define xd_p_reg_ts_in_src  (*(volatile byte xdata *) 0xF9D8)
+#define    p_reg_ts_in_src  0xF9D8
+#define reg_ts_in_src_pos 0
+#define reg_ts_in_src_len 1
+#define reg_ts_in_src_lsb 0
+#define xd_r_reg_clk_sel    (*(volatile byte xdata *) 0xF9D9)
+#define    r_reg_clk_sel    0xF9D9
+#define reg_clk_sel_pos 0
+#define reg_clk_sel_len 2
+#define reg_clk_sel_lsb 0
+#define xd_r_reg_tog_sel    (*(volatile byte xdata *) 0xF9DA)
+#define    r_reg_tog_sel    0xF9DA
+#define reg_tog_sel_pos 0
+#define reg_tog_sel_len 2
+#define reg_tog_sel_lsb 0
+#define xd_p_reg_ts_str_ignore  (*(volatile byte xdata *) 0xF9DB)
+#define    p_reg_ts_str_ignore  0xF9DB
+#define reg_ts_str_ignore_pos 0
+#define reg_ts_str_ignore_len 1
+#define reg_ts_str_ignore_lsb 0
+#define xd_p_reg_ts_frm_ignore  (*(volatile byte xdata *) 0xF9DC)
+#define    p_reg_ts_frm_ignore  0xF9DC
+#define reg_ts_frm_ignore_pos 0
+#define reg_ts_frm_ignore_len 1
+#define reg_ts_frm_ignore_lsb 0
+#define xd_p_reg_clk_sel_fix    (*(volatile byte xdata *) 0xF9DD)
+#define    p_reg_clk_sel_fix    0xF9DD
+#define reg_clk_sel_fix_pos 0
+#define reg_clk_sel_fix_len 2
+#define reg_clk_sel_fix_lsb 0
+#define xd_p_reg_tog_sel_fix    (*(volatile byte xdata *) 0xF9DE)
+#define    p_reg_tog_sel_fix    0xF9DE
+#define reg_tog_sel_fix_pos 0
+#define reg_tog_sel_fix_len 2
+#define reg_tog_sel_fix_lsb 0
+#define xd_p_reg_en_fix (*(volatile byte xdata *) 0xF9DF)
+#define    p_reg_en_fix 0xF9DF
+#define reg_en_fix_pos 0
+#define reg_en_fix_len 1
+#define reg_en_fix_lsb 0
+#define xd_p_reg_check_tpsd_hier    (*(volatile byte xdata *) 0xF9E0)
+#define    p_reg_check_tpsd_hier    0xF9E0
+#define reg_check_tpsd_hier_pos 0
+#define reg_check_tpsd_hier_len 1
+#define reg_check_tpsd_hier_lsb 0
+#define xd_p_reg_p_i2s_master_mode  (*(volatile byte xdata *) 0xF9E1)
+#define    p_reg_p_i2s_master_mode  0xF9E1
+#define reg_p_i2s_master_mode_pos 0
+#define reg_p_i2s_master_mode_len 1
+#define reg_p_i2s_master_mode_lsb 0
+#define xd_p_reg_p_sc_lr_ratio  (*(volatile byte xdata *) 0xF9E2)
+#define    p_reg_p_sc_lr_ratio  0xF9E2
+#define reg_p_sc_lr_ratio_pos 0
+#define reg_p_sc_lr_ratio_len 2
+#define reg_p_sc_lr_ratio_lsb 0
+#define xd_p_reg_p_i2s_fs_type  (*(volatile byte xdata *) 0xF9E2)
+#define    p_reg_p_i2s_fs_type  0xF9E2
+#define reg_p_i2s_fs_type_pos 2
+#define reg_p_i2s_fs_type_len 2
+#define reg_p_i2s_fs_type_lsb 0
+#define xd_r_reg_r_pp_fullq (*(volatile byte xdata *) 0xF9E3)
+#define    r_reg_r_pp_fullq 0xF9E3
+#define reg_r_pp_fullq_pos 0
+#define reg_r_pp_fullq_len 1
+#define reg_r_pp_fullq_lsb 0
+#define xd_p_reg_r_ccir_rst (*(volatile byte xdata *) 0xF9E3)
+#define    p_reg_r_ccir_rst 0xF9E3
+#define reg_r_ccir_rst_pos 1
+#define reg_r_ccir_rst_len 1
+#define reg_r_ccir_rst_lsb 0
+#define xd_p_reg_p_full_en  (*(volatile byte xdata *) 0xF9E3)
+#define    p_reg_p_full_en  0xF9E3
+#define reg_p_full_en_pos 2
+#define reg_p_full_en_len 1
+#define reg_p_full_en_lsb 0
+#define xd_p_reg_p_vbi_dis  (*(volatile byte xdata *) 0xF9E3)
+#define    p_reg_p_vbi_dis  0xF9E3
+#define reg_p_vbi_dis_pos 3
+#define reg_p_vbi_dis_len 1
+#define reg_p_vbi_dis_lsb 0
+#define xd_p_reg_p_ccir_all (*(volatile byte xdata *) 0xF9E3)
+#define    p_reg_p_ccir_all 0xF9E3
+#define reg_p_ccir_all_pos 4
+#define reg_p_ccir_all_len 1
+#define reg_p_ccir_all_lsb 0
+#define xd_p_reg_p_ccir_vbi_raw_en  (*(volatile byte xdata *) 0xF9E3)
+#define    p_reg_p_ccir_vbi_raw_en  0xF9E3
+#define reg_p_ccir_vbi_raw_en_pos 5
+#define reg_p_ccir_vbi_raw_en_len 1
+#define reg_p_ccir_vbi_raw_en_lsb 0
+#define xd_p_reg_err_byte_en    (*(volatile byte xdata *) 0xF9E4)
+#define    p_reg_err_byte_en    0xF9E4
+#define reg_err_byte_en_pos 0
+#define reg_err_byte_en_len 1
+#define reg_err_byte_en_lsb 0
+#define xd_p_reg_mp2_f_adc_7_0  (*(volatile byte xdata *) 0xF9E5)
+#define    p_reg_mp2_f_adc_7_0  0xF9E5
+#define reg_mp2_f_adc_7_0_pos 0
+#define reg_mp2_f_adc_7_0_len 8
+#define reg_mp2_f_adc_7_0_lsb 0
+#define xd_p_reg_mp2_f_adc_15_8 (*(volatile byte xdata *) 0xF9E6)
+#define    p_reg_mp2_f_adc_15_8 0xF9E6
+#define reg_mp2_f_adc_15_8_pos 0
+#define reg_mp2_f_adc_15_8_len 8
+#define reg_mp2_f_adc_15_8_lsb 8
+#define xd_p_reg_mp2_f_adc_23_16    (*(volatile byte xdata *) 0xF9E7)
+#define    p_reg_mp2_f_adc_23_16    0xF9E7
+#define reg_mp2_f_adc_23_16_pos 0
+#define reg_mp2_f_adc_23_16_len 8
+#define reg_mp2_f_adc_23_16_lsb 16
+#define xd_p_reg_set_util   (*(volatile byte xdata *) 0xF9E8)
+#define    p_reg_set_util   0xF9E8
+#define reg_set_util_pos 0
+#define reg_set_util_len 8
+#define reg_set_util_lsb 0
+#define xd_r_reg_err_byte   (*(volatile byte xdata *) 0xF9E9)
+#define    r_reg_err_byte   0xF9E9
+#define reg_err_byte_pos 0
+#define reg_err_byte_len 8
+#define reg_err_byte_lsb 0
+#define xd_p_reg_p_ln_num1  (*(volatile byte xdata *) 0xF9EA)
+#define    p_reg_p_ln_num1  0xF9EA
+#define reg_p_ln_num1_pos 0
+#define reg_p_ln_num1_len 5
+#define reg_p_ln_num1_lsb 0
+#define xd_p_reg_p_ln_num2_2_0  (*(volatile byte xdata *) 0xF9EA)
+#define    p_reg_p_ln_num2_2_0  0xF9EA
+#define reg_p_ln_num2_2_0_pos 5
+#define reg_p_ln_num2_2_0_len 3
+#define reg_p_ln_num2_2_0_lsb 0
+#define xd_p_reg_p_ln_num2_4_3  (*(volatile byte xdata *) 0xF9EB)
+#define    p_reg_p_ln_num2_4_3  0xF9EB
+#define reg_p_ln_num2_4_3_pos 0
+#define reg_p_ln_num2_4_3_len 2
+#define reg_p_ln_num2_4_3_lsb 3
+#define xd_p_reg_p_ln_num3_5_0  (*(volatile byte xdata *) 0xF9EB)
+#define    p_reg_p_ln_num3_5_0  0xF9EB
+#define reg_p_ln_num3_5_0_pos 2
+#define reg_p_ln_num3_5_0_len 6
+#define reg_p_ln_num3_5_0_lsb 0
+#define xd_p_reg_p_ln_num3_8_6  (*(volatile byte xdata *) 0xF9EC)
+#define    p_reg_p_ln_num3_8_6  0xF9EC
+#define reg_p_ln_num3_8_6_pos 0
+#define reg_p_ln_num3_8_6_len 3
+#define reg_p_ln_num3_8_6_lsb 6
+#define xd_p_reg_p_ln_num4_4_0  (*(volatile byte xdata *) 0xF9EC)
+#define    p_reg_p_ln_num4_4_0  0xF9EC
+#define reg_p_ln_num4_4_0_pos 3
+#define reg_p_ln_num4_4_0_len 5
+#define reg_p_ln_num4_4_0_lsb 0
+#define xd_p_reg_p_ln_num4_8_5  (*(volatile byte xdata *) 0xF9ED)
+#define    p_reg_p_ln_num4_8_5  0xF9ED
+#define reg_p_ln_num4_8_5_pos 0
+#define reg_p_ln_num4_8_5_len 4
+#define reg_p_ln_num4_8_5_lsb 5
+#define xd_p_reg_p_ln_num5_3_0  (*(volatile byte xdata *) 0xF9ED)
+#define    p_reg_p_ln_num5_3_0  0xF9ED
+#define reg_p_ln_num5_3_0_pos 4
+#define reg_p_ln_num5_3_0_len 4
+#define reg_p_ln_num5_3_0_lsb 0
+#define xd_p_reg_p_ln_num5_8_4  (*(volatile byte xdata *) 0xF9EE)
+#define    p_reg_p_ln_num5_8_4  0xF9EE
+#define reg_p_ln_num5_8_4_pos 0
+#define reg_p_ln_num5_8_4_len 5
+#define reg_p_ln_num5_8_4_lsb 4
+#define xd_p_reg_p_ln_num6_2_0  (*(volatile byte xdata *) 0xF9EE)
+#define    p_reg_p_ln_num6_2_0  0xF9EE
+#define reg_p_ln_num6_2_0_pos 5
+#define reg_p_ln_num6_2_0_len 3
+#define reg_p_ln_num6_2_0_lsb 0
+#define xd_p_reg_p_ln_num6_8_3  (*(volatile byte xdata *) 0xF9EF)
+#define    p_reg_p_ln_num6_8_3  0xF9EF
+#define reg_p_ln_num6_8_3_pos 0
+#define reg_p_ln_num6_8_3_len 6
+#define reg_p_ln_num6_8_3_lsb 3
+#define xd_p_reg_p_pixel_num_7_0    (*(volatile byte xdata *) 0xF9F0)
+#define    p_reg_p_pixel_num_7_0    0xF9F0
+#define reg_p_pixel_num_7_0_pos 0
+#define reg_p_pixel_num_7_0_len 8
+#define reg_p_pixel_num_7_0_lsb 0
+#define xd_p_reg_p_pixel_num_10_8   (*(volatile byte xdata *) 0xF9F1)
+#define    p_reg_p_pixel_num_10_8   0xF9F1
+#define reg_p_pixel_num_10_8_pos 0
+#define reg_p_pixel_num_10_8_len 3
+#define reg_p_pixel_num_10_8_lsb 8
+#define xd_p_reg_p_ccir_yuv_en  (*(volatile byte xdata *) 0xF9F1)
+#define    p_reg_p_ccir_yuv_en  0xF9F1
+#define reg_p_ccir_yuv_en_pos 3
+#define reg_p_ccir_yuv_en_len 1
+#define reg_p_ccir_yuv_en_lsb 0
+#define xd_p_reg_p_ccir_size_sft    (*(volatile byte xdata *) 0xF9F1)
+#define    p_reg_p_ccir_size_sft    0xF9F1
+#define reg_p_ccir_size_sft_pos 4
+#define reg_p_ccir_size_sft_len 2
+#define reg_p_ccir_size_sft_lsb 0
+#define xd_p_reg_p_psb_cnt_sft  (*(volatile byte xdata *) 0xF9F1)
+#define    p_reg_p_psb_cnt_sft  0xF9F1
+#define reg_p_psb_cnt_sft_pos 6
+#define reg_p_psb_cnt_sft_len 2
+#define reg_p_psb_cnt_sft_lsb 0
+#define xd_p_reg_p_tpsd_lock_trigger    (*(volatile byte xdata *) 0xF9F2)
+#define    p_reg_p_tpsd_lock_trigger    0xF9F2
+#define reg_p_tpsd_lock_trigger_pos 0
+#define reg_p_tpsd_lock_trigger_len 1
+#define reg_p_tpsd_lock_trigger_lsb 0
+#define xd_p_reg_p_ccir_clk_sel (*(volatile byte xdata *) 0xF9F3)
+#define    p_reg_p_ccir_clk_sel 0xF9F3
+#define reg_p_ccir_clk_sel_pos 0
+#define reg_p_ccir_clk_sel_len 1
+#define reg_p_ccir_clk_sel_lsb 0
+#define xd_p_reg_i2c_16_8_data_sel  (*(volatile byte xdata *) 0xFB00)
+#define    p_reg_i2c_16_8_data_sel  0xFB00
+#define reg_i2c_16_8_data_sel_pos 0
+#define reg_i2c_16_8_data_sel_len 1
+#define reg_i2c_16_8_data_sel_lsb 0
+#define xd_p_reg_i2c_slave_trigger_byte (*(volatile byte xdata *) 0xFB01)
+#define    p_reg_i2c_slave_trigger_byte 0xFB01
+#define reg_i2c_slave_trigger_byte_pos 0
+#define reg_i2c_slave_trigger_byte_len 1
+#define reg_i2c_slave_trigger_byte_lsb 0
+#define xd_p_reg_wdti_level (*(volatile byte xdata *) 0xFB05)
+#define    p_reg_wdti_level 0xFB05
+#define reg_wdti_level_pos 0
+#define reg_wdti_level_len 1
+#define reg_wdti_level_lsb 0
+#define xd_p_reg_rssi_avg_sel_lat   (*(volatile byte xdata *) 0xFB06)
+#define    p_reg_rssi_avg_sel_lat   0xFB06
+#define reg_rssi_avg_sel_lat_pos 0
+#define reg_rssi_avg_sel_lat_len 2
+#define reg_rssi_avg_sel_lat_lsb 0
+#define xd_r_ofsm_rssi_avg_7_0  (*(volatile byte xdata *) 0xFB07)
+#define    r_ofsm_rssi_avg_7_0  0xFB07
+#define ofsm_rssi_avg_7_0_pos 0
+#define ofsm_rssi_avg_7_0_len 8
+#define ofsm_rssi_avg_7_0_lsb 0
+#define xd_r_ofsm_rssi_avg_9_8  (*(volatile byte xdata *) 0xFB08)
+#define    r_ofsm_rssi_avg_9_8  0xFB08
+#define ofsm_rssi_avg_9_8_pos 0
+#define ofsm_rssi_avg_9_8_len 2
+#define ofsm_rssi_avg_9_8_lsb 8
+#define xd_r_ofsm_mbist_fail_mon51  (*(volatile byte xdata *) 0xFB09)
+#define    r_ofsm_mbist_fail_mon51  0xFB09
+#define ofsm_mbist_fail_mon51_pos 0
+#define ofsm_mbist_fail_mon51_len 1
+#define ofsm_mbist_fail_mon51_lsb 0
+#define xd_r_ofsm_mbist_fail_com    (*(volatile byte xdata *) 0xFB0A)
+#define    r_ofsm_mbist_fail_com    0xFB0A
+#define ofsm_mbist_fail_com_pos 0
+#define ofsm_mbist_fail_com_len 1
+#define ofsm_mbist_fail_com_lsb 0
+#define xd_r_ofsm_mbist_fail_fft    (*(volatile byte xdata *) 0xFB0B)
+#define    r_ofsm_mbist_fail_fft    0xFB0B
+#define ofsm_mbist_fail_fft_pos 0
+#define ofsm_mbist_fail_fft_len 1
+#define ofsm_mbist_fail_fft_lsb 0
+#define xd_r_ofsm_mbist_fail_fd (*(volatile byte xdata *) 0xFB0C)
+#define    r_ofsm_mbist_fail_fd 0xFB0C
+#define ofsm_mbist_fail_fd_pos 0
+#define ofsm_mbist_fail_fd_len 1
+#define ofsm_mbist_fail_fd_lsb 0
+#define xd_r_ofsm_mbist_fail_link   (*(volatile byte xdata *) 0xFB0D)
+#define    r_ofsm_mbist_fail_link   0xFB0D
+#define ofsm_mbist_fail_link_pos 0
+#define ofsm_mbist_fail_link_len 1
+#define ofsm_mbist_fail_link_lsb 0
+#define xd_r_ofsm_mbist_fail_mpe    (*(volatile byte xdata *) 0xFB0E)
+#define    r_ofsm_mbist_fail_mpe    0xFB0E
+#define ofsm_mbist_fail_mpe_pos 0
+#define ofsm_mbist_fail_mpe_len 1
+#define ofsm_mbist_fail_mpe_lsb 0
+#define xd_r_ofsm_mbist_done_mpe    (*(volatile byte xdata *) 0xFB0F)
+#define    r_ofsm_mbist_done_mpe    0xFB0F
+#define ofsm_mbist_done_mpe_pos 0
+#define ofsm_mbist_done_mpe_len 1
+#define ofsm_mbist_done_mpe_lsb 0
+#define xd_r_ofsm_mbist_mode_mpe    (*(volatile byte xdata *) 0xFB10)
+#define    r_ofsm_mbist_mode_mpe    0xFB10
+#define ofsm_mbist_mode_mpe_pos 0
+#define ofsm_mbist_mode_mpe_len 1
+#define ofsm_mbist_mode_mpe_lsb 0
+#define xd_p_ofsm_cmd_reg   (*(volatile byte xdata *) 0xFB11)
+#define    p_ofsm_cmd_reg   0xFB11
+#define ofsm_cmd_reg_pos 0
+#define ofsm_cmd_reg_len 8
+#define ofsm_cmd_reg_lsb 0
+#define xd_p_ofsm_addr_reg_h    (*(volatile byte xdata *) 0xFB12)
+#define    p_ofsm_addr_reg_h    0xFB12
+#define ofsm_addr_reg_h_pos 0
+#define ofsm_addr_reg_h_len 8
+#define ofsm_addr_reg_h_lsb 0
+#define xd_p_ofsm_addr_reg_l    (*(volatile byte xdata *) 0xFB13)
+#define    p_ofsm_addr_reg_l    0xFB13
+#define ofsm_addr_reg_l_pos 0
+#define ofsm_addr_reg_l_len 8
+#define ofsm_addr_reg_l_lsb 0
+#define xd_p_ofsm_data_reg_0    (*(volatile byte xdata *) 0xFB14)
+#define    p_ofsm_data_reg_0    0xFB14
+#define ofsm_data_reg_0_pos 0
+#define ofsm_data_reg_0_len 8
+#define ofsm_data_reg_0_lsb 0
+#define xd_p_ofsm_data_reg_1    (*(volatile byte xdata *) 0xFB15)
+#define    p_ofsm_data_reg_1    0xFB15
+#define ofsm_data_reg_1_pos 0
+#define ofsm_data_reg_1_len 8
+#define ofsm_data_reg_1_lsb 0
+#define xd_p_ofsm_data_reg_2    (*(volatile byte xdata *) 0xFB16)
+#define    p_ofsm_data_reg_2    0xFB16
+#define ofsm_data_reg_2_pos 0
+#define ofsm_data_reg_2_len 8
+#define ofsm_data_reg_2_lsb 0
+#define xd_p_ofsm_data_reg_3    (*(volatile byte xdata *) 0xFB17)
+#define    p_ofsm_data_reg_3    0xFB17
+#define ofsm_data_reg_3_pos 0
+#define ofsm_data_reg_3_len 8
+#define ofsm_data_reg_3_lsb 0
+#define xd_p_ofsm_data_reg_4    (*(volatile byte xdata *) 0xFB18)
+#define    p_ofsm_data_reg_4    0xFB18
+#define ofsm_data_reg_4_pos 0
+#define ofsm_data_reg_4_len 8
+#define ofsm_data_reg_4_lsb 0
+#define xd_p_ofsm_data_reg_5    (*(volatile byte xdata *) 0xFB19)
+#define    p_ofsm_data_reg_5    0xFB19
+#define ofsm_data_reg_5_pos 0
+#define ofsm_data_reg_5_len 8
+#define ofsm_data_reg_5_lsb 0
+#define xd_p_ofsm_data_reg_6    (*(volatile byte xdata *) 0xFB1A)
+#define    p_ofsm_data_reg_6    0xFB1A
+#define ofsm_data_reg_6_pos 0
+#define ofsm_data_reg_6_len 8
+#define ofsm_data_reg_6_lsb 0
+#define xd_p_ofsm_data_reg_7    (*(volatile byte xdata *) 0xFB1B)
+#define    p_ofsm_data_reg_7    0xFB1B
+#define ofsm_data_reg_7_pos 0
+#define ofsm_data_reg_7_len 8
+#define ofsm_data_reg_7_lsb 0
+#define xd_p_ofsm_data_reg_8    (*(volatile byte xdata *) 0xFB1C)
+#define    p_ofsm_data_reg_8    0xFB1C
+#define ofsm_data_reg_8_pos 0
+#define ofsm_data_reg_8_len 8
+#define ofsm_data_reg_8_lsb 0
+#define xd_p_ofsm_data_reg_9    (*(volatile byte xdata *) 0xFB1D)
+#define    p_ofsm_data_reg_9    0xFB1D
+#define ofsm_data_reg_9_pos 0
+#define ofsm_data_reg_9_len 8
+#define ofsm_data_reg_9_lsb 0
+#define xd_p_ofsm_data_reg_10   (*(volatile byte xdata *) 0xFB1E)
+#define    p_ofsm_data_reg_10   0xFB1E
+#define ofsm_data_reg_10_pos 0
+#define ofsm_data_reg_10_len 8
+#define ofsm_data_reg_10_lsb 0
+#define xd_p_ofsm_data_reg_11   (*(volatile byte xdata *) 0xFB1F)
+#define    p_ofsm_data_reg_11   0xFB1F
+#define ofsm_data_reg_11_pos 0
+#define ofsm_data_reg_11_len 8
+#define ofsm_data_reg_11_lsb 0
+#define xd_p_ofsm_data_reg_12   (*(volatile byte xdata *) 0xFB20)
+#define    p_ofsm_data_reg_12   0xFB20
+#define ofsm_data_reg_12_pos 0
+#define ofsm_data_reg_12_len 8
+#define ofsm_data_reg_12_lsb 0
+#define xd_p_ofsm_data_reg_13   (*(volatile byte xdata *) 0xFB21)
+#define    p_ofsm_data_reg_13   0xFB21
+#define ofsm_data_reg_13_pos 0
+#define ofsm_data_reg_13_len 8
+#define ofsm_data_reg_13_lsb 0
+#define xd_p_ofsm_data_reg_14   (*(volatile byte xdata *) 0xFB22)
+#define    p_ofsm_data_reg_14   0xFB22
+#define ofsm_data_reg_14_pos 0
+#define ofsm_data_reg_14_len 8
+#define ofsm_data_reg_14_lsb 0
+#define xd_p_ofsm_data_reg_15   (*(volatile byte xdata *) 0xFB23)
+#define    p_ofsm_data_reg_15   0xFB23
+#define ofsm_data_reg_15_pos 0
+#define ofsm_data_reg_15_len 8
+#define ofsm_data_reg_15_lsb 0
+#define xd_p_reg_afe_mem0   (*(volatile byte xdata *) 0xFB24)
+#define    p_reg_afe_mem0   0xFB24
+#define reg_afe_mem0_pos 0
+#define reg_afe_mem0_len 8
+#define reg_afe_mem0_lsb 0
+#define xd_p_reg_afe_mem1   (*(volatile byte xdata *) 0xFB25)
+#define    p_reg_afe_mem1   0xFB25
+#define reg_afe_mem1_pos 0
+#define reg_afe_mem1_len 8
+#define reg_afe_mem1_lsb 0
+#define xd_p_reg_afe_mem2   (*(volatile byte xdata *) 0xFB26)
+#define    p_reg_afe_mem2   0xFB26
+#define reg_afe_mem2_pos 0
+#define reg_afe_mem2_len 8
+#define reg_afe_mem2_lsb 0
+#define xd_p_reg_afe_mem3   (*(volatile byte xdata *) 0xFB27)
+#define    p_reg_afe_mem3   0xFB27
+#define reg_afe_mem3_pos 0
+#define reg_afe_mem3_len 8
+#define reg_afe_mem3_lsb 0
+#define xd_p_reg_afe_mem4   (*(volatile byte xdata *) 0xFB28)
+#define    p_reg_afe_mem4   0xFB28
+#define reg_afe_mem4_pos 0
+#define reg_afe_mem4_len 8
+#define reg_afe_mem4_lsb 0
+#define xd_p_reg_afe_mem5   (*(volatile byte xdata *) 0xFB29)
+#define    p_reg_afe_mem5   0xFB29
+#define reg_afe_mem5_pos 0
+#define reg_afe_mem5_len 8
+#define reg_afe_mem5_lsb 0
+#define xd_p_reg_afe_mem6   (*(volatile byte xdata *) 0xFB2A)
+#define    p_reg_afe_mem6   0xFB2A
+#define reg_afe_mem6_pos 0
+#define reg_afe_mem6_len 8
+#define reg_afe_mem6_lsb 0
+#define xd_p_reg_afe_mem7   (*(volatile byte xdata *) 0xFB2B)
+#define    p_reg_afe_mem7   0xFB2B
+#define reg_afe_mem7_pos 0
+#define reg_afe_mem7_len 8
+#define reg_afe_mem7_lsb 0
+#define xd_p_reg_i2cbootreq (*(volatile byte xdata *) 0xFB2C)
+#define    p_reg_i2cbootreq 0xFB2C
+#define reg_i2cbootreq_pos 0
+#define reg_i2cbootreq_len 1
+#define reg_i2cbootreq_lsb 0
+#define xd_p_reg_rst_i2cm   (*(volatile byte xdata *) 0xFB30)
+#define    p_reg_rst_i2cm   0xFB30
+#define reg_rst_i2cm_pos 0
+#define reg_rst_i2cm_len 1
+#define reg_rst_i2cm_lsb 0
+#define xd_p_reg_rst_i2cs   (*(volatile byte xdata *) 0xFB31)
+#define    p_reg_rst_i2cs   0xFB31
+#define reg_rst_i2cs_pos 0
+#define reg_rst_i2cs_len 1
+#define reg_rst_i2cs_lsb 0
+#define xd_r_reg_top_gpioscli   (*(volatile byte xdata *) 0xFB32)
+#define    r_reg_top_gpioscli   0xFB32
+#define reg_top_gpioscli_pos 0
+#define reg_top_gpioscli_len 1
+#define reg_top_gpioscli_lsb 0
+#define xd_p_reg_top_gpiosclo   (*(volatile byte xdata *) 0xFB33)
+#define    p_reg_top_gpiosclo   0xFB33
+#define reg_top_gpiosclo_pos 0
+#define reg_top_gpiosclo_len 1
+#define reg_top_gpiosclo_lsb 0
+#define xd_p_reg_top_gpiosclen  (*(volatile byte xdata *) 0xFB34)
+#define    p_reg_top_gpiosclen  0xFB34
+#define reg_top_gpiosclen_pos 0
+#define reg_top_gpiosclen_len 1
+#define reg_top_gpiosclen_lsb 0
+#define xd_p_reg_top_gpiosclon  (*(volatile byte xdata *) 0xFB35)
+#define    p_reg_top_gpiosclon  0xFB35
+#define reg_top_gpiosclon_pos 0
+#define reg_top_gpiosclon_len 1
+#define reg_top_gpiosclon_lsb 0
+#define xd_r_reg_top_gpiosdai   (*(volatile byte xdata *) 0xFB36)
+#define    r_reg_top_gpiosdai   0xFB36
+#define reg_top_gpiosdai_pos 0
+#define reg_top_gpiosdai_len 1
+#define reg_top_gpiosdai_lsb 0
+#define xd_p_reg_top_gpiosdao   (*(volatile byte xdata *) 0xFB37)
+#define    p_reg_top_gpiosdao   0xFB37
+#define reg_top_gpiosdao_pos 0
+#define reg_top_gpiosdao_len 1
+#define reg_top_gpiosdao_lsb 0
+#define xd_p_reg_top_gpiosdaen  (*(volatile byte xdata *) 0xFB38)
+#define    p_reg_top_gpiosdaen  0xFB38
+#define reg_top_gpiosdaen_pos 0
+#define reg_top_gpiosdaen_len 1
+#define reg_top_gpiosdaen_lsb 0
+#define xd_p_reg_top_gpiosdaon  (*(volatile byte xdata *) 0xFB39)
+#define    p_reg_top_gpiosdaon  0xFB39
+#define reg_top_gpiosdaon_pos 0
+#define reg_top_gpiosdaon_len 1
+#define reg_top_gpiosdaon_lsb 0
+#define xd_p_reg_fix_rom_en (*(volatile byte xdata *) 0xFB3A)
+#define    p_reg_fix_rom_en 0xFB3A
+#define reg_fix_rom_en_pos 0
+#define reg_fix_rom_en_len 1
+#define reg_fix_rom_en_lsb 0
+#define xd_p_reg_ofsm_bug_addh_0    (*(volatile byte xdata *) 0xFB3B)
+#define    p_reg_ofsm_bug_addh_0    0xFB3B
+#define reg_ofsm_bug_addh_0_pos 0
+#define reg_ofsm_bug_addh_0_len 8
+#define reg_ofsm_bug_addh_0_lsb 0
+#define xd_p_reg_ofsm_bug_addl_0    (*(volatile byte xdata *) 0xFB3C)
+#define    p_reg_ofsm_bug_addl_0    0xFB3C
+#define reg_ofsm_bug_addl_0_pos 0
+#define reg_ofsm_bug_addl_0_len 8
+#define reg_ofsm_bug_addl_0_lsb 0
+#define xd_p_reg_ofsm_bug_addh_1    (*(volatile byte xdata *) 0xFB3D)
+#define    p_reg_ofsm_bug_addh_1    0xFB3D
+#define reg_ofsm_bug_addh_1_pos 0
+#define reg_ofsm_bug_addh_1_len 8
+#define reg_ofsm_bug_addh_1_lsb 0
+#define xd_p_reg_ofsm_bug_addl_1    (*(volatile byte xdata *) 0xFB3E)
+#define    p_reg_ofsm_bug_addl_1    0xFB3E
+#define reg_ofsm_bug_addl_1_pos 0
+#define reg_ofsm_bug_addl_1_len 8
+#define reg_ofsm_bug_addl_1_lsb 0
+#define xd_p_reg_ofsm_bug_addh_2    (*(volatile byte xdata *) 0xFB3F)
+#define    p_reg_ofsm_bug_addh_2    0xFB3F
+#define reg_ofsm_bug_addh_2_pos 0
+#define reg_ofsm_bug_addh_2_len 8
+#define reg_ofsm_bug_addh_2_lsb 0
+#define xd_p_reg_ofsm_bug_addl_2    (*(volatile byte xdata *) 0xFB40)
+#define    p_reg_ofsm_bug_addl_2    0xFB40
+#define reg_ofsm_bug_addl_2_pos 0
+#define reg_ofsm_bug_addl_2_len 8
+#define reg_ofsm_bug_addl_2_lsb 0
+#define xd_p_reg_ofsm_bug_addh_3    (*(volatile byte xdata *) 0xFB41)
+#define    p_reg_ofsm_bug_addh_3    0xFB41
+#define reg_ofsm_bug_addh_3_pos 0
+#define reg_ofsm_bug_addh_3_len 8
+#define reg_ofsm_bug_addh_3_lsb 0
+#define xd_p_reg_ofsm_bug_addl_3    (*(volatile byte xdata *) 0xFB42)
+#define    p_reg_ofsm_bug_addl_3    0xFB42
+#define reg_ofsm_bug_addl_3_pos 0
+#define reg_ofsm_bug_addl_3_len 8
+#define reg_ofsm_bug_addl_3_lsb 0
+#define xd_p_reg_ofsm_bug_addh_4    (*(volatile byte xdata *) 0xFB43)
+#define    p_reg_ofsm_bug_addh_4    0xFB43
+#define reg_ofsm_bug_addh_4_pos 0
+#define reg_ofsm_bug_addh_4_len 8
+#define reg_ofsm_bug_addh_4_lsb 0
+#define xd_p_reg_ofsm_bug_addl_4    (*(volatile byte xdata *) 0xFB44)
+#define    p_reg_ofsm_bug_addl_4    0xFB44
+#define reg_ofsm_bug_addl_4_pos 0
+#define reg_ofsm_bug_addl_4_len 8
+#define reg_ofsm_bug_addl_4_lsb 0
+#define xd_p_reg_ofsm_bug_addh_5    (*(volatile byte xdata *) 0xFB45)
+#define    p_reg_ofsm_bug_addh_5    0xFB45
+#define reg_ofsm_bug_addh_5_pos 0
+#define reg_ofsm_bug_addh_5_len 8
+#define reg_ofsm_bug_addh_5_lsb 0
+#define xd_p_reg_ofsm_bug_addl_5    (*(volatile byte xdata *) 0xFB46)
+#define    p_reg_ofsm_bug_addl_5    0xFB46
+#define reg_ofsm_bug_addl_5_pos 0
+#define reg_ofsm_bug_addl_5_len 8
+#define reg_ofsm_bug_addl_5_lsb 0
+#define xd_p_reg_ofsm_bug_addh_6    (*(volatile byte xdata *) 0xFB47)
+#define    p_reg_ofsm_bug_addh_6    0xFB47
+#define reg_ofsm_bug_addh_6_pos 0
+#define reg_ofsm_bug_addh_6_len 8
+#define reg_ofsm_bug_addh_6_lsb 0
+#define xd_p_reg_ofsm_bug_addl_6    (*(volatile byte xdata *) 0xFB48)
+#define    p_reg_ofsm_bug_addl_6    0xFB48
+#define reg_ofsm_bug_addl_6_pos 0
+#define reg_ofsm_bug_addl_6_len 8
+#define reg_ofsm_bug_addl_6_lsb 0
+#define xd_p_reg_ofsm_bug_addh_7    (*(volatile byte xdata *) 0xFB49)
+#define    p_reg_ofsm_bug_addh_7    0xFB49
+#define reg_ofsm_bug_addh_7_pos 0
+#define reg_ofsm_bug_addh_7_len 8
+#define reg_ofsm_bug_addh_7_lsb 0
+#define xd_p_reg_ofsm_bug_addl_7    (*(volatile byte xdata *) 0xFB4A)
+#define    p_reg_ofsm_bug_addl_7    0xFB4A
+#define reg_ofsm_bug_addl_7_pos 0
+#define reg_ofsm_bug_addl_7_len 8
+#define reg_ofsm_bug_addl_7_lsb 0
+#define xd_p_reg_ofsm_bug_addh_8    (*(volatile byte xdata *) 0xFB4B)
+#define    p_reg_ofsm_bug_addh_8    0xFB4B
+#define reg_ofsm_bug_addh_8_pos 0
+#define reg_ofsm_bug_addh_8_len 8
+#define reg_ofsm_bug_addh_8_lsb 0
+#define xd_p_reg_ofsm_bug_addl_8    (*(volatile byte xdata *) 0xFB4C)
+#define    p_reg_ofsm_bug_addl_8    0xFB4C
+#define reg_ofsm_bug_addl_8_pos 0
+#define reg_ofsm_bug_addl_8_len 8
+#define reg_ofsm_bug_addl_8_lsb 0
+#define xd_p_reg_ofsm_bug_addh_9    (*(volatile byte xdata *) 0xFB4D)
+#define    p_reg_ofsm_bug_addh_9    0xFB4D
+#define reg_ofsm_bug_addh_9_pos 0
+#define reg_ofsm_bug_addh_9_len 8
+#define reg_ofsm_bug_addh_9_lsb 0
+#define xd_p_reg_ofsm_bug_addl_9    (*(volatile byte xdata *) 0xFB4E)
+#define    p_reg_ofsm_bug_addl_9    0xFB4E
+#define reg_ofsm_bug_addl_9_pos 0
+#define reg_ofsm_bug_addl_9_len 8
+#define reg_ofsm_bug_addl_9_lsb 0
+#define xd_p_reg_ofsm_bug_addh_10   (*(volatile byte xdata *) 0xFB4F)
+#define    p_reg_ofsm_bug_addh_10   0xFB4F
+#define reg_ofsm_bug_addh_10_pos 0
+#define reg_ofsm_bug_addh_10_len 8
+#define reg_ofsm_bug_addh_10_lsb 0
+#define xd_p_reg_ofsm_bug_addl_10   (*(volatile byte xdata *) 0xFB50)
+#define    p_reg_ofsm_bug_addl_10   0xFB50
+#define reg_ofsm_bug_addl_10_pos 0
+#define reg_ofsm_bug_addl_10_len 8
+#define reg_ofsm_bug_addl_10_lsb 0
+#define xd_p_reg_ofsm_bug_addh_11   (*(volatile byte xdata *) 0xFB51)
+#define    p_reg_ofsm_bug_addh_11   0xFB51
+#define reg_ofsm_bug_addh_11_pos 0
+#define reg_ofsm_bug_addh_11_len 8
+#define reg_ofsm_bug_addh_11_lsb 0
+#define xd_p_reg_ofsm_bug_addl_11   (*(volatile byte xdata *) 0xFB52)
+#define    p_reg_ofsm_bug_addl_11   0xFB52
+#define reg_ofsm_bug_addl_11_pos 0
+#define reg_ofsm_bug_addl_11_len 8
+#define reg_ofsm_bug_addl_11_lsb 0
+#define xd_p_reg_ofsm_bug_addh_12   (*(volatile byte xdata *) 0xFB53)
+#define    p_reg_ofsm_bug_addh_12   0xFB53
+#define reg_ofsm_bug_addh_12_pos 0
+#define reg_ofsm_bug_addh_12_len 8
+#define reg_ofsm_bug_addh_12_lsb 0
+#define xd_p_reg_ofsm_bug_addl_12   (*(volatile byte xdata *) 0xFB54)
+#define    p_reg_ofsm_bug_addl_12   0xFB54
+#define reg_ofsm_bug_addl_12_pos 0
+#define reg_ofsm_bug_addl_12_len 8
+#define reg_ofsm_bug_addl_12_lsb 0
+#define xd_p_reg_ofsm_bug_addh_13   (*(volatile byte xdata *) 0xFB55)
+#define    p_reg_ofsm_bug_addh_13   0xFB55
+#define reg_ofsm_bug_addh_13_pos 0
+#define reg_ofsm_bug_addh_13_len 8
+#define reg_ofsm_bug_addh_13_lsb 0
+#define xd_p_reg_ofsm_bug_addl_13   (*(volatile byte xdata *) 0xFB56)
+#define    p_reg_ofsm_bug_addl_13   0xFB56
+#define reg_ofsm_bug_addl_13_pos 0
+#define reg_ofsm_bug_addl_13_len 8
+#define reg_ofsm_bug_addl_13_lsb 0
+#define xd_p_reg_ofsm_bug_addh_14   (*(volatile byte xdata *) 0xFB57)
+#define    p_reg_ofsm_bug_addh_14   0xFB57
+#define reg_ofsm_bug_addh_14_pos 0
+#define reg_ofsm_bug_addh_14_len 8
+#define reg_ofsm_bug_addh_14_lsb 0
+#define xd_p_reg_ofsm_bug_addl_14   (*(volatile byte xdata *) 0xFB58)
+#define    p_reg_ofsm_bug_addl_14   0xFB58
+#define reg_ofsm_bug_addl_14_pos 0
+#define reg_ofsm_bug_addl_14_len 8
+#define reg_ofsm_bug_addl_14_lsb 0
+#define xd_p_reg_ofsm_bug_addh_15   (*(volatile byte xdata *) 0xFB59)
+#define    p_reg_ofsm_bug_addh_15   0xFB59
+#define reg_ofsm_bug_addh_15_pos 0
+#define reg_ofsm_bug_addh_15_len 8
+#define reg_ofsm_bug_addh_15_lsb 0
+#define xd_p_reg_ofsm_bug_addl_15   (*(volatile byte xdata *) 0xFB5A)
+#define    p_reg_ofsm_bug_addl_15   0xFB5A
+#define reg_ofsm_bug_addl_15_pos 0
+#define reg_ofsm_bug_addl_15_len 8
+#define reg_ofsm_bug_addl_15_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_0    (*(volatile byte xdata *) 0xFB5B)
+#define    p_reg_ofsm_jmp_addh_0    0xFB5B
+#define reg_ofsm_jmp_addh_0_pos 0
+#define reg_ofsm_jmp_addh_0_len 8
+#define reg_ofsm_jmp_addh_0_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_0    (*(volatile byte xdata *) 0xFB5C)
+#define    p_reg_ofsm_jmp_addl_0    0xFB5C
+#define reg_ofsm_jmp_addl_0_pos 0
+#define reg_ofsm_jmp_addl_0_len 8
+#define reg_ofsm_jmp_addl_0_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_1    (*(volatile byte xdata *) 0xFB5D)
+#define    p_reg_ofsm_jmp_addh_1    0xFB5D
+#define reg_ofsm_jmp_addh_1_pos 0
+#define reg_ofsm_jmp_addh_1_len 8
+#define reg_ofsm_jmp_addh_1_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_1    (*(volatile byte xdata *) 0xFB5E)
+#define    p_reg_ofsm_jmp_addl_1    0xFB5E
+#define reg_ofsm_jmp_addl_1_pos 0
+#define reg_ofsm_jmp_addl_1_len 8
+#define reg_ofsm_jmp_addl_1_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_2    (*(volatile byte xdata *) 0xFB5F)
+#define    p_reg_ofsm_jmp_addh_2    0xFB5F
+#define reg_ofsm_jmp_addh_2_pos 0
+#define reg_ofsm_jmp_addh_2_len 8
+#define reg_ofsm_jmp_addh_2_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_2    (*(volatile byte xdata *) 0xFB60)
+#define    p_reg_ofsm_jmp_addl_2    0xFB60
+#define reg_ofsm_jmp_addl_2_pos 0
+#define reg_ofsm_jmp_addl_2_len 8
+#define reg_ofsm_jmp_addl_2_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_3    (*(volatile byte xdata *) 0xFB61)
+#define    p_reg_ofsm_jmp_addh_3    0xFB61
+#define reg_ofsm_jmp_addh_3_pos 0
+#define reg_ofsm_jmp_addh_3_len 8
+#define reg_ofsm_jmp_addh_3_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_3    (*(volatile byte xdata *) 0xFB62)
+#define    p_reg_ofsm_jmp_addl_3    0xFB62
+#define reg_ofsm_jmp_addl_3_pos 0
+#define reg_ofsm_jmp_addl_3_len 8
+#define reg_ofsm_jmp_addl_3_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_4    (*(volatile byte xdata *) 0xFB63)
+#define    p_reg_ofsm_jmp_addh_4    0xFB63
+#define reg_ofsm_jmp_addh_4_pos 0
+#define reg_ofsm_jmp_addh_4_len 8
+#define reg_ofsm_jmp_addh_4_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_4    (*(volatile byte xdata *) 0xFB64)
+#define    p_reg_ofsm_jmp_addl_4    0xFB64
+#define reg_ofsm_jmp_addl_4_pos 0
+#define reg_ofsm_jmp_addl_4_len 8
+#define reg_ofsm_jmp_addl_4_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_5    (*(volatile byte xdata *) 0xFB65)
+#define    p_reg_ofsm_jmp_addh_5    0xFB65
+#define reg_ofsm_jmp_addh_5_pos 0
+#define reg_ofsm_jmp_addh_5_len 8
+#define reg_ofsm_jmp_addh_5_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_5    (*(volatile byte xdata *) 0xFB66)
+#define    p_reg_ofsm_jmp_addl_5    0xFB66
+#define reg_ofsm_jmp_addl_5_pos 0
+#define reg_ofsm_jmp_addl_5_len 8
+#define reg_ofsm_jmp_addl_5_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_6    (*(volatile byte xdata *) 0xFB67)
+#define    p_reg_ofsm_jmp_addh_6    0xFB67
+#define reg_ofsm_jmp_addh_6_pos 0
+#define reg_ofsm_jmp_addh_6_len 8
+#define reg_ofsm_jmp_addh_6_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_6    (*(volatile byte xdata *) 0xFB68)
+#define    p_reg_ofsm_jmp_addl_6    0xFB68
+#define reg_ofsm_jmp_addl_6_pos 0
+#define reg_ofsm_jmp_addl_6_len 8
+#define reg_ofsm_jmp_addl_6_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_7    (*(volatile byte xdata *) 0xFB69)
+#define    p_reg_ofsm_jmp_addh_7    0xFB69
+#define reg_ofsm_jmp_addh_7_pos 0
+#define reg_ofsm_jmp_addh_7_len 8
+#define reg_ofsm_jmp_addh_7_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_7    (*(volatile byte xdata *) 0xFB6A)
+#define    p_reg_ofsm_jmp_addl_7    0xFB6A
+#define reg_ofsm_jmp_addl_7_pos 0
+#define reg_ofsm_jmp_addl_7_len 8
+#define reg_ofsm_jmp_addl_7_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_8    (*(volatile byte xdata *) 0xFB6B)
+#define    p_reg_ofsm_jmp_addh_8    0xFB6B
+#define reg_ofsm_jmp_addh_8_pos 0
+#define reg_ofsm_jmp_addh_8_len 8
+#define reg_ofsm_jmp_addh_8_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_8    (*(volatile byte xdata *) 0xFB6C)
+#define    p_reg_ofsm_jmp_addl_8    0xFB6C
+#define reg_ofsm_jmp_addl_8_pos 0
+#define reg_ofsm_jmp_addl_8_len 8
+#define reg_ofsm_jmp_addl_8_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_9    (*(volatile byte xdata *) 0xFB6D)
+#define    p_reg_ofsm_jmp_addh_9    0xFB6D
+#define reg_ofsm_jmp_addh_9_pos 0
+#define reg_ofsm_jmp_addh_9_len 8
+#define reg_ofsm_jmp_addh_9_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_9    (*(volatile byte xdata *) 0xFB6E)
+#define    p_reg_ofsm_jmp_addl_9    0xFB6E
+#define reg_ofsm_jmp_addl_9_pos 0
+#define reg_ofsm_jmp_addl_9_len 8
+#define reg_ofsm_jmp_addl_9_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_10   (*(volatile byte xdata *) 0xFB6F)
+#define    p_reg_ofsm_jmp_addh_10   0xFB6F
+#define reg_ofsm_jmp_addh_10_pos 0
+#define reg_ofsm_jmp_addh_10_len 8
+#define reg_ofsm_jmp_addh_10_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_10   (*(volatile byte xdata *) 0xFB70)
+#define    p_reg_ofsm_jmp_addl_10   0xFB70
+#define reg_ofsm_jmp_addl_10_pos 0
+#define reg_ofsm_jmp_addl_10_len 8
+#define reg_ofsm_jmp_addl_10_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_11   (*(volatile byte xdata *) 0xFB71)
+#define    p_reg_ofsm_jmp_addh_11   0xFB71
+#define reg_ofsm_jmp_addh_11_pos 0
+#define reg_ofsm_jmp_addh_11_len 8
+#define reg_ofsm_jmp_addh_11_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_11   (*(volatile byte xdata *) 0xFB72)
+#define    p_reg_ofsm_jmp_addl_11   0xFB72
+#define reg_ofsm_jmp_addl_11_pos 0
+#define reg_ofsm_jmp_addl_11_len 8
+#define reg_ofsm_jmp_addl_11_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_12   (*(volatile byte xdata *) 0xFB73)
+#define    p_reg_ofsm_jmp_addh_12   0xFB73
+#define reg_ofsm_jmp_addh_12_pos 0
+#define reg_ofsm_jmp_addh_12_len 8
+#define reg_ofsm_jmp_addh_12_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_12   (*(volatile byte xdata *) 0xFB74)
+#define    p_reg_ofsm_jmp_addl_12   0xFB74
+#define reg_ofsm_jmp_addl_12_pos 0
+#define reg_ofsm_jmp_addl_12_len 8
+#define reg_ofsm_jmp_addl_12_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_13   (*(volatile byte xdata *) 0xFB75)
+#define    p_reg_ofsm_jmp_addh_13   0xFB75
+#define reg_ofsm_jmp_addh_13_pos 0
+#define reg_ofsm_jmp_addh_13_len 8
+#define reg_ofsm_jmp_addh_13_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_13   (*(volatile byte xdata *) 0xFB76)
+#define    p_reg_ofsm_jmp_addl_13   0xFB76
+#define reg_ofsm_jmp_addl_13_pos 0
+#define reg_ofsm_jmp_addl_13_len 8
+#define reg_ofsm_jmp_addl_13_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_14   (*(volatile byte xdata *) 0xFB77)
+#define    p_reg_ofsm_jmp_addh_14   0xFB77
+#define reg_ofsm_jmp_addh_14_pos 0
+#define reg_ofsm_jmp_addh_14_len 8
+#define reg_ofsm_jmp_addh_14_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_14   (*(volatile byte xdata *) 0xFB78)
+#define    p_reg_ofsm_jmp_addl_14   0xFB78
+#define reg_ofsm_jmp_addl_14_pos 0
+#define reg_ofsm_jmp_addl_14_len 8
+#define reg_ofsm_jmp_addl_14_lsb 0
+#define xd_p_reg_ofsm_jmp_addh_15   (*(volatile byte xdata *) 0xFB79)
+#define    p_reg_ofsm_jmp_addh_15   0xFB79
+#define reg_ofsm_jmp_addh_15_pos 0
+#define reg_ofsm_jmp_addh_15_len 8
+#define reg_ofsm_jmp_addh_15_lsb 0
+#define xd_p_reg_ofsm_jmp_addl_15   (*(volatile byte xdata *) 0xFB7A)
+#define    p_reg_ofsm_jmp_addl_15   0xFB7A
+#define reg_ofsm_jmp_addl_15_pos 0
+#define reg_ofsm_jmp_addl_15_len 8
+#define reg_ofsm_jmp_addl_15_lsb 0
+#define xd_p_reg_sw_mon51   (*(volatile byte xdata *) 0xFB7B)
+#define    p_reg_sw_mon51   0xFB7B
+#define reg_sw_mon51_pos 0
+#define reg_sw_mon51_len 7
+#define reg_sw_mon51_lsb 0
+#define xd_p_reg_ofdm_mon51_flag    (*(volatile byte xdata *) 0xFB7C)
+#define    p_reg_ofdm_mon51_flag    0xFB7C
+#define reg_ofdm_mon51_flag_pos 0
+#define reg_ofdm_mon51_flag_len 1
+#define reg_ofdm_mon51_flag_lsb 0
+#define xd_p_reg_ofdm_force_mon51   (*(volatile byte xdata *) 0xFB7D)
+#define    p_reg_ofdm_force_mon51   0xFB7D
+#define reg_ofdm_force_mon51_pos 0
+#define reg_ofdm_force_mon51_len 1
+#define reg_ofdm_force_mon51_lsb 0
+#define xd_p_reg_ofdm_which_cpu (*(volatile byte xdata *) 0xFB7E)
+#define    p_reg_ofdm_which_cpu 0xFB7E
+#define reg_ofdm_which_cpu_pos 0
+#define reg_ofdm_which_cpu_len 1
+#define reg_ofdm_which_cpu_lsb 0
+#define xd_p_reg_ofdm_code_ready    (*(volatile byte xdata *) 0xFB7F)
+#define    p_reg_ofdm_code_ready    0xFB7F
+#define reg_ofdm_code_ready_pos 0
+#define reg_ofdm_code_ready_len 1
+#define reg_ofdm_code_ready_lsb 0
+#define xd_p_reg_ofdm_mailbox_wend  (*(volatile byte xdata *) 0xFB80)
+#define    p_reg_ofdm_mailbox_wend  0xFB80
+#define reg_ofdm_mailbox_wend_pos 0
+#define reg_ofdm_mailbox_wend_len 1
+#define reg_ofdm_mailbox_wend_lsb 0
+#define xd_r_reg_fast_slow_train    (*(volatile byte xdata *) 0xFB81)
+#define    r_reg_fast_slow_train    0xFB81
+#define reg_fast_slow_train_pos 0
+#define reg_fast_slow_train_len 1
+#define reg_fast_slow_train_lsb 0
+#define xd_p_reg_ofdm_mailbox_wptr  (*(volatile byte xdata *) 0xFB82)
+#define    p_reg_ofdm_mailbox_wptr  0xFB82
+#define reg_ofdm_mailbox_wptr_pos 0
+#define reg_ofdm_mailbox_wptr_len 8
+#define reg_ofdm_mailbox_wptr_lsb 0
+#define xd_p_reg_ofdm_mailbox_int   (*(volatile byte xdata *) 0xFB86)
+#define    p_reg_ofdm_mailbox_int   0xFB86
+#define reg_ofdm_mailbox_int_pos 0
+#define reg_ofdm_mailbox_int_len 1
+#define reg_ofdm_mailbox_int_lsb 0
+#define xd_p_reg_ofdm_lnk2ofdm_int  (*(volatile byte xdata *) 0xFB87)
+#define    p_reg_ofdm_lnk2ofdm_int  0xFB87
+#define reg_ofdm_lnk2ofdm_int_pos 0
+#define reg_ofdm_lnk2ofdm_int_len 1
+#define reg_ofdm_lnk2ofdm_int_lsb 0
+#define xd_p_reg_ofdm_ofdm2lnk_int  (*(volatile byte xdata *) 0xFB88)
+#define    p_reg_ofdm_ofdm2lnk_int  0xFB88
+#define reg_ofdm_ofdm2lnk_int_pos 0
+#define reg_ofdm_ofdm2lnk_int_len 1
+#define reg_ofdm_ofdm2lnk_int_lsb 0
+#define xd_r_reg_load_ofdm_reg  (*(volatile byte xdata *) 0xFB8F)
+#define    r_reg_load_ofdm_reg  0xFB8F
+#define reg_load_ofdm_reg_pos 0
+#define reg_load_ofdm_reg_len 1
+#define reg_load_ofdm_reg_lsb 0
+#define xd_p_reg_lnk_mbx_rd_length_7_0  (*(volatile byte xdata *) 0xFB90)
+#define    p_reg_lnk_mbx_rd_length_7_0  0xFB90
+#define reg_lnk_mbx_rd_length_7_0_pos 0
+#define reg_lnk_mbx_rd_length_7_0_len 8
+#define reg_lnk_mbx_rd_length_7_0_lsb 0
+#define xd_p_reg_lnk_mbx_rd_length_15_8 (*(volatile byte xdata *) 0xFB91)
+#define    p_reg_lnk_mbx_rd_length_15_8 0xFB91
+#define reg_lnk_mbx_rd_length_15_8_pos 0
+#define reg_lnk_mbx_rd_length_15_8_len 8
+#define reg_lnk_mbx_rd_length_15_8_lsb 8
+#define xd_p_reg_lnk_mbx_rd_length_17_16    (*(volatile byte xdata *) 0xFB92)
+#define    p_reg_lnk_mbx_rd_length_17_16    0xFB92
+#define reg_lnk_mbx_rd_length_17_16_pos 0
+#define reg_lnk_mbx_rd_length_17_16_len 2
+#define reg_lnk_mbx_rd_length_17_16_lsb 16
+#define xd_p_reg_lnk_rd_data_sel    (*(volatile byte xdata *) 0xFB93)
+#define    p_reg_lnk_rd_data_sel    0xFB93
+#define reg_lnk_rd_data_sel_pos 0
+#define reg_lnk_rd_data_sel_len 2
+#define reg_lnk_rd_data_sel_lsb 0
+#define xd_p_reg_ofdm2lnk_data_7_0  (*(volatile byte xdata *) 0xFB96)
+#define    p_reg_ofdm2lnk_data_7_0  0xFB96
+#define reg_ofdm2lnk_data_7_0_pos 0
+#define reg_ofdm2lnk_data_7_0_len 8
+#define reg_ofdm2lnk_data_7_0_lsb 0
+#define xd_p_reg_ofdm2lnk_data_15_8 (*(volatile byte xdata *) 0xFB97)
+#define    p_reg_ofdm2lnk_data_15_8 0xFB97
+#define reg_ofdm2lnk_data_15_8_pos 0
+#define reg_ofdm2lnk_data_15_8_len 8
+#define reg_ofdm2lnk_data_15_8_lsb 8
+#define xd_p_reg_ofdm2lnk_data_23_16    (*(volatile byte xdata *) 0xFB98)
+#define    p_reg_ofdm2lnk_data_23_16    0xFB98
+#define reg_ofdm2lnk_data_23_16_pos 0
+#define reg_ofdm2lnk_data_23_16_len 8
+#define reg_ofdm2lnk_data_23_16_lsb 16
+#define xd_p_reg_ofdm2lnk_data_31_24    (*(volatile byte xdata *) 0xFB99)
+#define    p_reg_ofdm2lnk_data_31_24    0xFB99
+#define reg_ofdm2lnk_data_31_24_pos 0
+#define reg_ofdm2lnk_data_31_24_len 8
+#define reg_ofdm2lnk_data_31_24_lsb 24
+#define xd_p_reg_ofdm2lnk_data_39_32    (*(volatile byte xdata *) 0xFB9A)
+#define    p_reg_ofdm2lnk_data_39_32    0xFB9A
+#define reg_ofdm2lnk_data_39_32_pos 0
+#define reg_ofdm2lnk_data_39_32_len 8
+#define reg_ofdm2lnk_data_39_32_lsb 32
+#define xd_p_reg_ofdm2lnk_data_47_40    (*(volatile byte xdata *) 0xFB9B)
+#define    p_reg_ofdm2lnk_data_47_40    0xFB9B
+#define reg_ofdm2lnk_data_47_40_pos 0
+#define reg_ofdm2lnk_data_47_40_len 8
+#define reg_ofdm2lnk_data_47_40_lsb 40
+#define xd_p_reg_ofdm2lnk_data_55_48    (*(volatile byte xdata *) 0xFB9C)
+#define    p_reg_ofdm2lnk_data_55_48    0xFB9C
+#define reg_ofdm2lnk_data_55_48_pos 0
+#define reg_ofdm2lnk_data_55_48_len 8
+#define reg_ofdm2lnk_data_55_48_lsb 48
+#define xd_p_reg_ofdm2lnk_data_63_56    (*(volatile byte xdata *) 0xFB9D)
+#define    p_reg_ofdm2lnk_data_63_56    0xFB9D
+#define reg_ofdm2lnk_data_63_56_pos 0
+#define reg_ofdm2lnk_data_63_56_len 8
+#define reg_ofdm2lnk_data_63_56_lsb 56
+#define xd_p_reg_lnktoofdm_data_7_0 (*(volatile byte xdata *) 0xFB9E)
+#define    p_reg_lnktoofdm_data_7_0 0xFB9E
+#define reg_lnktoofdm_data_7_0_pos 0
+#define reg_lnktoofdm_data_7_0_len 8
+#define reg_lnktoofdm_data_7_0_lsb 0
+#define xd_p_reg_lnktoofdm_data_15_8    (*(volatile byte xdata *) 0xFB9F)
+#define    p_reg_lnktoofdm_data_15_8    0xFB9F
+#define reg_lnktoofdm_data_15_8_pos 0
+#define reg_lnktoofdm_data_15_8_len 8
+#define reg_lnktoofdm_data_15_8_lsb 8
+#define xd_p_reg_lnktoofdm_data_23_16   (*(volatile byte xdata *) 0xFBA0)
+#define    p_reg_lnktoofdm_data_23_16   0xFBA0
+#define reg_lnktoofdm_data_23_16_pos 0
+#define reg_lnktoofdm_data_23_16_len 8
+#define reg_lnktoofdm_data_23_16_lsb 16
+#define xd_p_reg_lnktoofdm_data_31_24   (*(volatile byte xdata *) 0xFBA1)
+#define    p_reg_lnktoofdm_data_31_24   0xFBA1
+#define reg_lnktoofdm_data_31_24_pos 0
+#define reg_lnktoofdm_data_31_24_len 8
+#define reg_lnktoofdm_data_31_24_lsb 24
+#define xd_p_reg_lnktoofdm_data_39_32   (*(volatile byte xdata *) 0xFBA2)
+#define    p_reg_lnktoofdm_data_39_32   0xFBA2
+#define reg_lnktoofdm_data_39_32_pos 0
+#define reg_lnktoofdm_data_39_32_len 8
+#define reg_lnktoofdm_data_39_32_lsb 32
+#define xd_p_reg_lnktoofdm_data_47_40   (*(volatile byte xdata *) 0xFBA3)
+#define    p_reg_lnktoofdm_data_47_40   0xFBA3
+#define reg_lnktoofdm_data_47_40_pos 0
+#define reg_lnktoofdm_data_47_40_len 8
+#define reg_lnktoofdm_data_47_40_lsb 40
+#define xd_p_reg_lnktoofdm_data_55_48   (*(volatile byte xdata *) 0xFBA4)
+#define    p_reg_lnktoofdm_data_55_48   0xFBA4
+#define reg_lnktoofdm_data_55_48_pos 0
+#define reg_lnktoofdm_data_55_48_len 8
+#define reg_lnktoofdm_data_55_48_lsb 48
+#define xd_p_reg_lnktoofdm_data_63_56   (*(volatile byte xdata *) 0xFBA5)
+#define    p_reg_lnktoofdm_data_63_56   0xFBA5
+#define reg_lnktoofdm_data_63_56_pos 0
+#define reg_lnktoofdm_data_63_56_len 8
+#define reg_lnktoofdm_data_63_56_lsb 56
+#define xd_p_reg_dbgif32_sel    (*(volatile byte xdata *) 0xFBA6)
+#define    p_reg_dbgif32_sel    0xFBA6
+#define reg_dbgif32_sel_pos 0
+#define reg_dbgif32_sel_len 2
+#define reg_dbgif32_sel_lsb 0
+#define xd_p_reg_dyn1_clk   (*(volatile byte xdata *) 0xFBA7)
+#define    p_reg_dyn1_clk   0xFBA7
+#define reg_dyn1_clk_pos 0
+#define reg_dyn1_clk_len 1
+#define reg_dyn1_clk_lsb 0
+#define xd_p_reg_dyn0_clk   (*(volatile byte xdata *) 0xFBA8)
+#define    p_reg_dyn0_clk   0xFBA8
+#define reg_dyn0_clk_pos 0
+#define reg_dyn0_clk_len 1
+#define reg_dyn0_clk_lsb 0
+#define xd_p_reg_free_clk   (*(volatile byte xdata *) 0xFBA9)
+#define    p_reg_free_clk   0xFBA9
+#define reg_free_clk_pos 0
+#define reg_free_clk_len 1
+#define reg_free_clk_lsb 0
+#define xd_p_reg_ofdm_stick_mem_end_7_0 (*(volatile byte xdata *) 0xFBAD)
+#define    p_reg_ofdm_stick_mem_end_7_0 0xFBAD
+#define reg_ofdm_stick_mem_end_7_0_pos 0
+#define reg_ofdm_stick_mem_end_7_0_len 8
+#define reg_ofdm_stick_mem_end_7_0_lsb 0
+#define xd_p_reg_ofdm_stick_mem_end_15_8    (*(volatile byte xdata *) 0xFBAE)
+#define    p_reg_ofdm_stick_mem_end_15_8    0xFBAE
+#define reg_ofdm_stick_mem_end_15_8_pos 0
+#define reg_ofdm_stick_mem_end_15_8_len 8
+#define reg_ofdm_stick_mem_end_15_8_lsb 8
+#define xd_p_reg_ofdm_cpu_reset (*(volatile byte xdata *) 0xFBAF)
+#define    p_reg_ofdm_cpu_reset 0xFBAF
+#define reg_ofdm_cpu_reset_pos 0
+#define reg_ofdm_cpu_reset_len 1
+#define reg_ofdm_cpu_reset_lsb 0
+#define xd_p_reg_ofdm_bank_float_en (*(volatile byte xdata *) 0xFBB0)
+#define    p_reg_ofdm_bank_float_en 0xFBB0
+#define reg_ofdm_bank_float_en_pos 0
+#define reg_ofdm_bank_float_en_len 1
+#define reg_ofdm_bank_float_en_lsb 0
+#define xd_p_reg_ofdm_bank_float_start  (*(volatile byte xdata *) 0xFBB1)
+#define    p_reg_ofdm_bank_float_start  0xFBB1
+#define reg_ofdm_bank_float_start_pos 0
+#define reg_ofdm_bank_float_start_len 8
+#define reg_ofdm_bank_float_start_lsb 0
+#define xd_p_reg_ofdm_bank_float_stop   (*(volatile byte xdata *) 0xFBB2)
+#define    p_reg_ofdm_bank_float_stop   0xFBB2
+#define reg_ofdm_bank_float_stop_pos 0
+#define reg_ofdm_bank_float_stop_len 8
+#define reg_ofdm_bank_float_stop_lsb 0
+#define xd_r_ofsm_bond0_i   (*(volatile byte xdata *) 0xFBB3)
+#define    r_ofsm_bond0_i   0xFBB3
+#define ofsm_bond0_i_pos 0
+#define ofsm_bond0_i_len 1
+#define ofsm_bond0_i_lsb 0
+#define xd_r_ofsm_bond1_i   (*(volatile byte xdata *) 0xFBB4)
+#define    r_ofsm_bond1_i   0xFBB4
+#define ofsm_bond1_i_pos 0
+#define ofsm_bond1_i_len 1
+#define ofsm_bond1_i_lsb 0
+#define xd_r_io_mux_pwron_clk_strap (*(volatile byte xdata *) 0xD800)
+#define    r_io_mux_pwron_clk_strap 0xD800
+#define io_mux_pwron_clk_strap_pos 0
+#define io_mux_pwron_clk_strap_len 4
+#define io_mux_pwron_clk_strap_lsb 0
+#define xd_r_io_mux_pwron_mode_strap    (*(volatile byte xdata *) 0xD801)
+#define    r_io_mux_pwron_mode_strap    0xD801
+#define io_mux_pwron_mode_strap_pos 0
+#define io_mux_pwron_mode_strap_len 4
+#define io_mux_pwron_mode_strap_lsb 0
+#define xd_r_io_mux_pwron_hosta (*(volatile byte xdata *) 0xD802)
+#define    r_io_mux_pwron_hosta 0xD802
+#define io_mux_pwron_hosta_pos 0
+#define io_mux_pwron_hosta_len 1
+#define io_mux_pwron_hosta_lsb 0
+#define xd_r_reg_top_revid  (*(volatile byte xdata *) 0xD803)
+#define    r_reg_top_revid  0xD803
+#define reg_top_revid_pos 0
+#define reg_top_revid_len 4
+#define reg_top_revid_lsb 0
+#define xd_r_io_mux_bond0_i (*(volatile byte xdata *) 0xD804)
+#define    r_io_mux_bond0_i 0xD804
+#define io_mux_bond0_i_pos 0
+#define io_mux_bond0_i_len 1
+#define io_mux_bond0_i_lsb 0
+#define xd_r_io_mux_bondu0_i    (*(volatile byte xdata *) 0xD805)
+#define    r_io_mux_bondu0_i    0xD805
+#define io_mux_bondu0_i_pos 0
+#define io_mux_bondu0_i_len 1
+#define io_mux_bondu0_i_lsb 0
+#define xd_p_reg_ofsm_suspend   (*(volatile byte xdata *) 0xD806)
+#define    p_reg_ofsm_suspend   0xD806
+#define reg_ofsm_suspend_pos 0
+#define reg_ofsm_suspend_len 1
+#define reg_ofsm_suspend_lsb 0
+#define xd_p_reg_tslice_off (*(volatile byte xdata *) 0xD807)
+#define    p_reg_tslice_off 0xD807
+#define reg_tslice_off_pos 0
+#define reg_tslice_off_len 1
+#define reg_tslice_off_lsb 0
+#define xd_p_io_mux_wake_int    (*(volatile byte xdata *) 0xD808)
+#define    p_io_mux_wake_int    0xD808
+#define io_mux_wake_int_pos 0
+#define io_mux_wake_int_len 1
+#define io_mux_wake_int_lsb 0
+#define xd_p_reg_top_pwrdw_hwen (*(volatile byte xdata *) 0xD809)
+#define    p_reg_top_pwrdw_hwen 0xD809
+#define reg_top_pwrdw_hwen_pos 0
+#define reg_top_pwrdw_hwen_len 1
+#define reg_top_pwrdw_hwen_lsb 0
+#define xd_p_reg_top_pwrdw_inv  (*(volatile byte xdata *) 0xD80A)
+#define    p_reg_top_pwrdw_inv  0xD80A
+#define reg_top_pwrdw_inv_pos 0
+#define reg_top_pwrdw_inv_len 1
+#define reg_top_pwrdw_inv_lsb 0
+#define xd_p_reg_top_pwrdw  (*(volatile byte xdata *) 0xD80B)
+#define    p_reg_top_pwrdw  0xD80B
+#define reg_top_pwrdw_pos 0
+#define reg_top_pwrdw_len 1
+#define reg_top_pwrdw_lsb 0
+#define xd_p_io_mux_wake_int_en (*(volatile byte xdata *) 0xD80C)
+#define    p_io_mux_wake_int_en 0xD80C
+#define io_mux_wake_int_en_pos 0
+#define io_mux_wake_int_en_len 1
+#define io_mux_wake_int_en_lsb 0
+#define xd_p_io_mux_pwrdw_int   (*(volatile byte xdata *) 0xD80D)
+#define    p_io_mux_pwrdw_int   0xD80D
+#define io_mux_pwrdw_int_pos 0
+#define io_mux_pwrdw_int_len 1
+#define io_mux_pwrdw_int_lsb 0
+#define xd_p_reg_top_adcdly (*(volatile byte xdata *) 0xD80E)
+#define    p_reg_top_adcdly 0xD80E
+#define reg_top_adcdly_pos 0
+#define reg_top_adcdly_len 2
+#define reg_top_adcdly_lsb 0
+#define xd_p_reg_top_debug  (*(volatile byte xdata *) 0xD80F)
+#define    p_reg_top_debug  0xD80F
+#define reg_top_debug_pos 0
+#define reg_top_debug_len 1
+#define reg_top_debug_lsb 0
+#define xd_p_reg_top_pcout  (*(volatile byte xdata *) 0xD810)
+#define    p_reg_top_pcout  0xD810
+#define reg_top_pcout_pos 0
+#define reg_top_pcout_len 1
+#define reg_top_pcout_lsb 0
+#define xd_p_reg_top_rs232  (*(volatile byte xdata *) 0xD811)
+#define    p_reg_top_rs232  0xD811
+#define reg_top_rs232_pos 0
+#define reg_top_rs232_len 1
+#define reg_top_rs232_lsb 0
+#define xd_p_reg_iqmode (*(volatile byte xdata *) 0xD812)
+#define    p_reg_iqmode 0xD812
+#define reg_iqmode_pos 0
+#define reg_iqmode_len 1
+#define reg_iqmode_lsb 0
+#define xd_p_reg_top_rstfd  (*(volatile byte xdata *) 0xD813)
+#define    p_reg_top_rstfd  0xD813
+#define reg_top_rstfd_pos 0
+#define reg_top_rstfd_len 1
+#define reg_top_rstfd_lsb 0
+#define xd_p_reg_sdio_clksel    (*(volatile byte xdata *) 0xD814)
+#define    p_reg_sdio_clksel    0xD814
+#define reg_sdio_clksel_pos 0
+#define reg_sdio_clksel_len 1
+#define reg_sdio_clksel_lsb 0
+#define xd_p_reg_utmi_clksel    (*(volatile byte xdata *) 0xD815)
+#define    p_reg_utmi_clksel    0xD815
+#define reg_utmi_clksel_pos 0
+#define reg_utmi_clksel_len 8
+#define reg_utmi_clksel_lsb 0
+#define xd_p_reg_top_suscnt (*(volatile byte xdata *) 0xD816)
+#define    p_reg_top_suscnt 0xD816
+#define reg_top_suscnt_pos 0
+#define reg_top_suscnt_len 2
+#define reg_top_suscnt_lsb 0
+#define xd_p_reg_top_dist2f (*(volatile byte xdata *) 0xD817)
+#define    p_reg_top_dist2f 0xD817
+#define reg_top_dist2f_pos 0
+#define reg_top_dist2f_len 1
+#define reg_top_dist2f_lsb 0
+#define xd_p_reg_top_extusb (*(volatile byte xdata *) 0xD818)
+#define    p_reg_top_extusb 0xD818
+#define reg_top_extusb_pos 0
+#define reg_top_extusb_len 1
+#define reg_top_extusb_lsb 0
+#define xd_p_reg_top_adcfifo    (*(volatile byte xdata *) 0xD819)
+#define    p_reg_top_adcfifo    0xD819
+#define reg_top_adcfifo_pos 0
+#define reg_top_adcfifo_len 1
+#define reg_top_adcfifo_lsb 0
+#define xd_p_reg_top_clkoen (*(volatile byte xdata *) 0xD81A)
+#define    p_reg_top_clkoen 0xD81A
+#define reg_top_clkoen_pos 0
+#define reg_top_clkoen_len 1
+#define reg_top_clkoen_lsb 0
+#define xd_p_reg_top_stpck  (*(volatile byte xdata *) 0xD81B)
+#define    p_reg_top_stpck  0xD81B
+#define reg_top_stpck_pos 0
+#define reg_top_stpck_len 1
+#define reg_top_stpck_lsb 0
+#define xd_p_reg_top_freeck (*(volatile byte xdata *) 0xD81C)
+#define    p_reg_top_freeck 0xD81C
+#define reg_top_freeck_pos 0
+#define reg_top_freeck_len 1
+#define reg_top_freeck_lsb 0
+#define xd_p_reg_top_dio_sel    (*(volatile byte xdata *) 0xD81D)
+#define    p_reg_top_dio_sel    0xD81D
+#define reg_top_dio_sel_pos 0
+#define reg_top_dio_sel_len 1
+#define reg_top_dio_sel_lsb 0
+#define xd_p_reg_top_int_en (*(volatile byte xdata *) 0xD81E)
+#define    p_reg_top_int_en 0xD81E
+#define reg_top_int_en_pos 0
+#define reg_top_int_en_len 1
+#define reg_top_int_en_lsb 0
+#define xd_p_reg_top_int_inv    (*(volatile byte xdata *) 0xD81F)
+#define    p_reg_top_int_inv    0xD81F
+#define reg_top_int_inv_pos 0
+#define reg_top_int_inv_len 1
+#define reg_top_int_inv_lsb 0
+#define xd_p_reg_tsip_clk_inv   (*(volatile byte xdata *) 0xD820)
+#define    p_reg_tsip_clk_inv   0xD820
+#define reg_tsip_clk_inv_pos 0
+#define reg_tsip_clk_inv_len 1
+#define reg_tsip_clk_inv_lsb 0
+#define xd_p_reg_ts_clk_inv (*(volatile byte xdata *) 0xD821)
+#define    p_reg_ts_clk_inv 0xD821
+#define reg_ts_clk_inv_pos 0
+#define reg_ts_clk_inv_len 1
+#define reg_ts_clk_inv_lsb 0
+#define xd_p_reg_ts_hybrid  (*(volatile byte xdata *) 0xD822)
+#define    p_reg_ts_hybrid  0xD822
+#define reg_ts_hybrid_pos 0
+#define reg_ts_hybrid_len 1
+#define reg_ts_hybrid_lsb 0
+#define xd_p_reg_ccir_sel   (*(volatile byte xdata *) 0xD823)
+#define    p_reg_ccir_sel   0xD823
+#define reg_ccir_sel_pos 0
+#define reg_ccir_sel_len 4
+#define reg_ccir_sel_lsb 0
+#define xd_p_reg_top_sys_gate   (*(volatile byte xdata *) 0xD824)
+#define    p_reg_top_sys_gate   0xD824
+#define reg_top_sys_gate_pos 0
+#define reg_top_sys_gate_len 1
+#define reg_top_sys_gate_lsb 0
+#define xd_p_reg_top_padpu  (*(volatile byte xdata *) 0xD825)
+#define    p_reg_top_padpu  0xD825
+#define reg_top_padpu_pos 0
+#define reg_top_padpu_len 1
+#define reg_top_padpu_lsb 0
+#define xd_p_reg_top_padpd  (*(volatile byte xdata *) 0xD826)
+#define    p_reg_top_padpd  0xD826
+#define reg_top_padpd_pos 0
+#define reg_top_padpd_len 1
+#define reg_top_padpd_lsb 0
+#define xd_p_reg_top_padodpu    (*(volatile byte xdata *) 0xD827)
+#define    p_reg_top_padodpu    0xD827
+#define reg_top_padodpu_pos 0
+#define reg_top_padodpu_len 1
+#define reg_top_padodpu_lsb 0
+#define xd_p_reg_top_thirdodpu  (*(volatile byte xdata *) 0xD828)
+#define    p_reg_top_thirdodpu  0xD828
+#define reg_top_thirdodpu_pos 0
+#define reg_top_thirdodpu_len 1
+#define reg_top_thirdodpu_lsb 0
+#define xd_p_reg_top_agc_od (*(volatile byte xdata *) 0xD829)
+#define    p_reg_top_agc_od 0xD829
+#define reg_top_agc_od_pos 0
+#define reg_top_agc_od_len 1
+#define reg_top_agc_od_lsb 0
+#define xd_p_reg_top_padmpdr2   (*(volatile byte xdata *) 0xD82A)
+#define    p_reg_top_padmpdr2   0xD82A
+#define reg_top_padmpdr2_pos 0
+#define reg_top_padmpdr2_len 1
+#define reg_top_padmpdr2_lsb 0
+#define xd_p_reg_top_padmpdr4   (*(volatile byte xdata *) 0xD82B)
+#define    p_reg_top_padmpdr4   0xD82B
+#define reg_top_padmpdr4_pos 0
+#define reg_top_padmpdr4_len 1
+#define reg_top_padmpdr4_lsb 0
+#define xd_p_reg_top_padmpdr8   (*(volatile byte xdata *) 0xD82C)
+#define    p_reg_top_padmpdr8   0xD82C
+#define reg_top_padmpdr8_pos 0
+#define reg_top_padmpdr8_len 1
+#define reg_top_padmpdr8_lsb 0
+#define xd_p_reg_top_padmpdrsr  (*(volatile byte xdata *) 0xD82D)
+#define    p_reg_top_padmpdrsr  0xD82D
+#define reg_top_padmpdrsr_pos 0
+#define reg_top_padmpdrsr_len 1
+#define reg_top_padmpdrsr_lsb 0
+#define xd_p_reg_top_padmppu    (*(volatile byte xdata *) 0xD82E)
+#define    p_reg_top_padmppu    0xD82E
+#define reg_top_padmppu_pos 0
+#define reg_top_padmppu_len 1
+#define reg_top_padmppu_lsb 0
+#define xd_p_reg_top_padmppd    (*(volatile byte xdata *) 0xD82F)
+#define    p_reg_top_padmppd    0xD82F
+#define reg_top_padmppd_pos 0
+#define reg_top_padmppd_len 1
+#define reg_top_padmppd_lsb 0
+#define xd_p_reg_top_padmiscdr2 (*(volatile byte xdata *) 0xD830)
+#define    p_reg_top_padmiscdr2 0xD830
+#define reg_top_padmiscdr2_pos 0
+#define reg_top_padmiscdr2_len 1
+#define reg_top_padmiscdr2_lsb 0
+#define xd_p_reg_top_padmiscdr4 (*(volatile byte xdata *) 0xD831)
+#define    p_reg_top_padmiscdr4 0xD831
+#define reg_top_padmiscdr4_pos 0
+#define reg_top_padmiscdr4_len 1
+#define reg_top_padmiscdr4_lsb 0
+#define xd_p_reg_top_padmiscdr8 (*(volatile byte xdata *) 0xD832)
+#define    p_reg_top_padmiscdr8 0xD832
+#define reg_top_padmiscdr8_pos 0
+#define reg_top_padmiscdr8_len 1
+#define reg_top_padmiscdr8_lsb 0
+#define xd_p_reg_top_padmiscdrsr    (*(volatile byte xdata *) 0xD833)
+#define    p_reg_top_padmiscdrsr    0xD833
+#define reg_top_padmiscdrsr_pos 0
+#define reg_top_padmiscdrsr_len 1
+#define reg_top_padmiscdrsr_lsb 0
+#define xd_p_reg_top_padmiscpu  (*(volatile byte xdata *) 0xD834)
+#define    p_reg_top_padmiscpu  0xD834
+#define reg_top_padmiscpu_pos 0
+#define reg_top_padmiscpu_len 1
+#define reg_top_padmiscpu_lsb 0
+#define xd_p_reg_top_padmiscpd  (*(volatile byte xdata *) 0xD835)
+#define    p_reg_top_padmiscpd  0xD835
+#define reg_top_padmiscpd_pos 0
+#define reg_top_padmiscpd_len 1
+#define reg_top_padmiscpd_lsb 0
+#define xd_p_reg_host_b0_smt    (*(volatile byte xdata *) 0xD836)
+#define    p_reg_host_b0_smt    0xD836
+#define reg_host_b0_smt_pos 0
+#define reg_host_b0_smt_len 1
+#define reg_host_b0_smt_lsb 0
+#define xd_p_reg_host_b1_smt    (*(volatile byte xdata *) 0xD837)
+#define    p_reg_host_b1_smt    0xD837
+#define reg_host_b1_smt_pos 0
+#define reg_host_b1_smt_len 1
+#define reg_host_b1_smt_lsb 0
+#define xd_p_reg_host_b2_smt    (*(volatile byte xdata *) 0xD838)
+#define    p_reg_host_b2_smt    0xD838
+#define reg_host_b2_smt_pos 0
+#define reg_host_b2_smt_len 1
+#define reg_host_b2_smt_lsb 0
+#define xd_p_reg_host_b3_smt    (*(volatile byte xdata *) 0xD839)
+#define    p_reg_host_b3_smt    0xD839
+#define reg_host_b3_smt_pos 0
+#define reg_host_b3_smt_len 1
+#define reg_host_b3_smt_lsb 0
+#define xd_p_reg_host_b4_smt    (*(volatile byte xdata *) 0xD83A)
+#define    p_reg_host_b4_smt    0xD83A
+#define reg_host_b4_smt_pos 0
+#define reg_host_b4_smt_len 1
+#define reg_host_b4_smt_lsb 0
+#define xd_p_reg_host_b5_smt    (*(volatile byte xdata *) 0xD83B)
+#define    p_reg_host_b5_smt    0xD83B
+#define reg_host_b5_smt_pos 0
+#define reg_host_b5_smt_len 1
+#define reg_host_b5_smt_lsb 0
+#define xd_p_reg_host_b6_smt    (*(volatile byte xdata *) 0xD83C)
+#define    p_reg_host_b6_smt    0xD83C
+#define reg_host_b6_smt_pos 0
+#define reg_host_b6_smt_len 1
+#define reg_host_b6_smt_lsb 0
+#define xd_p_reg_host_b7_smt    (*(volatile byte xdata *) 0xD83D)
+#define    p_reg_host_b7_smt    0xD83D
+#define reg_host_b7_smt_pos 0
+#define reg_host_b7_smt_len 1
+#define reg_host_b7_smt_lsb 0
+#define xd_p_reg_host_b8_smt    (*(volatile byte xdata *) 0xD83E)
+#define    p_reg_host_b8_smt    0xD83E
+#define reg_host_b8_smt_pos 0
+#define reg_host_b8_smt_len 1
+#define reg_host_b8_smt_lsb 0
+#define xd_p_reg_host_b9_smt    (*(volatile byte xdata *) 0xD83F)
+#define    p_reg_host_b9_smt    0xD83F
+#define reg_host_b9_smt_pos 0
+#define reg_host_b9_smt_len 1
+#define reg_host_b9_smt_lsb 0
+#define xd_p_reg_host_b10_smt   (*(volatile byte xdata *) 0xD840)
+#define    p_reg_host_b10_smt   0xD840
+#define reg_host_b10_smt_pos 0
+#define reg_host_b10_smt_len 1
+#define reg_host_b10_smt_lsb 0
+#define xd_p_reg_host_b11_smt   (*(volatile byte xdata *) 0xD841)
+#define    p_reg_host_b11_smt   0xD841
+#define reg_host_b11_smt_pos 0
+#define reg_host_b11_smt_len 1
+#define reg_host_b11_smt_lsb 0
+#define xd_p_reg_host_a0_smt    (*(volatile byte xdata *) 0xD842)
+#define    p_reg_host_a0_smt    0xD842
+#define reg_host_a0_smt_pos 0
+#define reg_host_a0_smt_len 1
+#define reg_host_a0_smt_lsb 0
+#define xd_p_reg_host_a1_smt    (*(volatile byte xdata *) 0xD843)
+#define    p_reg_host_a1_smt    0xD843
+#define reg_host_a1_smt_pos 0
+#define reg_host_a1_smt_len 1
+#define reg_host_a1_smt_lsb 0
+#define xd_p_reg_host_a2_smt    (*(volatile byte xdata *) 0xD844)
+#define    p_reg_host_a2_smt    0xD844
+#define reg_host_a2_smt_pos 0
+#define reg_host_a2_smt_len 1
+#define reg_host_a2_smt_lsb 0
+#define xd_p_reg_host_a3_smt    (*(volatile byte xdata *) 0xD845)
+#define    p_reg_host_a3_smt    0xD845
+#define reg_host_a3_smt_pos 0
+#define reg_host_a3_smt_len 1
+#define reg_host_a3_smt_lsb 0
+#define xd_p_reg_host_a4_smt    (*(volatile byte xdata *) 0xD846)
+#define    p_reg_host_a4_smt    0xD846
+#define reg_host_a4_smt_pos 0
+#define reg_host_a4_smt_len 1
+#define reg_host_a4_smt_lsb 0
+#define xd_p_reg_host_a5_smt    (*(volatile byte xdata *) 0xD847)
+#define    p_reg_host_a5_smt    0xD847
+#define reg_host_a5_smt_pos 0
+#define reg_host_a5_smt_len 1
+#define reg_host_a5_smt_lsb 0
+#define xd_p_reg_host_a6_smt    (*(volatile byte xdata *) 0xD848)
+#define    p_reg_host_a6_smt    0xD848
+#define reg_host_a6_smt_pos 0
+#define reg_host_a6_smt_len 1
+#define reg_host_a6_smt_lsb 0
+#define xd_p_reg_host_a7_smt    (*(volatile byte xdata *) 0xD849)
+#define    p_reg_host_a7_smt    0xD849
+#define reg_host_a7_smt_pos 0
+#define reg_host_a7_smt_len 1
+#define reg_host_a7_smt_lsb 0
+#define xd_p_reg_host_a8_smt    (*(volatile byte xdata *) 0xD84A)
+#define    p_reg_host_a8_smt    0xD84A
+#define reg_host_a8_smt_pos 0
+#define reg_host_a8_smt_len 1
+#define reg_host_a8_smt_lsb 0
+#define xd_p_reg_host_a9_smt    (*(volatile byte xdata *) 0xD84B)
+#define    p_reg_host_a9_smt    0xD84B
+#define reg_host_a9_smt_pos 0
+#define reg_host_a9_smt_len 1
+#define reg_host_a9_smt_lsb 0
+#define xd_p_reg_host_a10_smt   (*(volatile byte xdata *) 0xD84C)
+#define    p_reg_host_a10_smt   0xD84C
+#define reg_host_a10_smt_pos 0
+#define reg_host_a10_smt_len 1
+#define reg_host_a10_smt_lsb 0
+#define xd_p_reg_host_a11_smt   (*(volatile byte xdata *) 0xD84D)
+#define    p_reg_host_a11_smt   0xD84D
+#define reg_host_a11_smt_pos 0
+#define reg_host_a11_smt_len 1
+#define reg_host_a11_smt_lsb 0
+#define xd_p_reg_testmode_pds   (*(volatile byte xdata *) 0xD84E)
+#define    p_reg_testmode_pds   0xD84E
+#define reg_testmode_pds_pos 0
+#define reg_testmode_pds_len 3
+#define reg_testmode_pds_lsb 0
+#define xd_p_reg_debug31_pds    (*(volatile byte xdata *) 0xD84F)
+#define    p_reg_debug31_pds    0xD84F
+#define reg_debug31_pds_pos 0
+#define reg_debug31_pds_len 3
+#define reg_debug31_pds_lsb 0
+#define xd_p_reg_debug30_pds    (*(volatile byte xdata *) 0xD850)
+#define    p_reg_debug30_pds    0xD850
+#define reg_debug30_pds_pos 0
+#define reg_debug30_pds_len 3
+#define reg_debug30_pds_lsb 0
+#define xd_p_reg_debug29_pds    (*(volatile byte xdata *) 0xD851)
+#define    p_reg_debug29_pds    0xD851
+#define reg_debug29_pds_pos 0
+#define reg_debug29_pds_len 3
+#define reg_debug29_pds_lsb 0
+#define xd_p_reg_debug28_pds    (*(volatile byte xdata *) 0xD852)
+#define    p_reg_debug28_pds    0xD852
+#define reg_debug28_pds_pos 0
+#define reg_debug28_pds_len 3
+#define reg_debug28_pds_lsb 0
+#define xd_p_reg_debug27_pds    (*(volatile byte xdata *) 0xD853)
+#define    p_reg_debug27_pds    0xD853
+#define reg_debug27_pds_pos 0
+#define reg_debug27_pds_len 3
+#define reg_debug27_pds_lsb 0
+#define xd_p_reg_debug26_pds    (*(volatile byte xdata *) 0xD854)
+#define    p_reg_debug26_pds    0xD854
+#define reg_debug26_pds_pos 0
+#define reg_debug26_pds_len 3
+#define reg_debug26_pds_lsb 0
+#define xd_p_reg_debug25_pds    (*(volatile byte xdata *) 0xD855)
+#define    p_reg_debug25_pds    0xD855
+#define reg_debug25_pds_pos 0
+#define reg_debug25_pds_len 3
+#define reg_debug25_pds_lsb 0
+#define xd_p_reg_debug24_pds    (*(volatile byte xdata *) 0xD856)
+#define    p_reg_debug24_pds    0xD856
+#define reg_debug24_pds_pos 0
+#define reg_debug24_pds_len 3
+#define reg_debug24_pds_lsb 0
+#define xd_p_reg_debug23_pds    (*(volatile byte xdata *) 0xD857)
+#define    p_reg_debug23_pds    0xD857
+#define reg_debug23_pds_pos 0
+#define reg_debug23_pds_len 3
+#define reg_debug23_pds_lsb 0
+#define xd_p_reg_debug22_pds    (*(volatile byte xdata *) 0xD858)
+#define    p_reg_debug22_pds    0xD858
+#define reg_debug22_pds_pos 0
+#define reg_debug22_pds_len 3
+#define reg_debug22_pds_lsb 0
+#define xd_p_reg_gpioh1_pds (*(volatile byte xdata *) 0xD859)
+#define    p_reg_gpioh1_pds 0xD859
+#define reg_gpioh1_pds_pos 0
+#define reg_gpioh1_pds_len 3
+#define reg_gpioh1_pds_lsb 0
+#define xd_p_reg_gpioh2_pds (*(volatile byte xdata *) 0xD85A)
+#define    p_reg_gpioh2_pds 0xD85A
+#define reg_gpioh2_pds_pos 0
+#define reg_gpioh2_pds_len 3
+#define reg_gpioh2_pds_lsb 0
+#define xd_p_reg_gpioh3_pds (*(volatile byte xdata *) 0xD85B)
+#define    p_reg_gpioh3_pds 0xD85B
+#define reg_gpioh3_pds_pos 0
+#define reg_gpioh3_pds_len 3
+#define reg_gpioh3_pds_lsb 0
+#define xd_p_reg_gpioh4_pds (*(volatile byte xdata *) 0xD85C)
+#define    p_reg_gpioh4_pds 0xD85C
+#define reg_gpioh4_pds_pos 0
+#define reg_gpioh4_pds_len 3
+#define reg_gpioh4_pds_lsb 0
+#define xd_p_reg_iosda_pds  (*(volatile byte xdata *) 0xD85D)
+#define    p_reg_iosda_pds  0xD85D
+#define reg_iosda_pds_pos 0
+#define reg_iosda_pds_len 3
+#define reg_iosda_pds_lsb 0
+#define xd_p_reg_ioscl_pds  (*(volatile byte xdata *) 0xD85E)
+#define    p_reg_ioscl_pds  0xD85E
+#define reg_ioscl_pds_pos 0
+#define reg_ioscl_pds_len 3
+#define reg_ioscl_pds_lsb 0
+#define xd_p_reg_gpioh5_pds (*(volatile byte xdata *) 0xD85F)
+#define    p_reg_gpioh5_pds 0xD85F
+#define reg_gpioh5_pds_pos 0
+#define reg_gpioh5_pds_len 3
+#define reg_gpioh5_pds_lsb 0
+#define xd_p_reg_bond0_pds  (*(volatile byte xdata *) 0xD860)
+#define    p_reg_bond0_pds  0xD860
+#define reg_bond0_pds_pos 0
+#define reg_bond0_pds_len 3
+#define reg_bond0_pds_lsb 0
+#define xd_p_reg_i2caddr6_pds   (*(volatile byte xdata *) 0xD861)
+#define    p_reg_i2caddr6_pds   0xD861
+#define reg_i2caddr6_pds_pos 0
+#define reg_i2caddr6_pds_len 3
+#define reg_i2caddr6_pds_lsb 0
+#define xd_p_reg_i2caddr5_pds   (*(volatile byte xdata *) 0xD862)
+#define    p_reg_i2caddr5_pds   0xD862
+#define reg_i2caddr5_pds_pos 0
+#define reg_i2caddr5_pds_len 3
+#define reg_i2caddr5_pds_lsb 0
+#define xd_p_reg_i2caddr4_pds   (*(volatile byte xdata *) 0xD863)
+#define    p_reg_i2caddr4_pds   0xD863
+#define reg_i2caddr4_pds_pos 0
+#define reg_i2caddr4_pds_len 3
+#define reg_i2caddr4_pds_lsb 0
+#define xd_p_reg_host_a0_pds    (*(volatile byte xdata *) 0xD864)
+#define    p_reg_host_a0_pds    0xD864
+#define reg_host_a0_pds_pos 0
+#define reg_host_a0_pds_len 3
+#define reg_host_a0_pds_lsb 0
+#define xd_p_reg_host_a1_pds    (*(volatile byte xdata *) 0xD865)
+#define    p_reg_host_a1_pds    0xD865
+#define reg_host_a1_pds_pos 0
+#define reg_host_a1_pds_len 3
+#define reg_host_a1_pds_lsb 0
+#define xd_p_reg_debug21_pds    (*(volatile byte xdata *) 0xD866)
+#define    p_reg_debug21_pds    0xD866
+#define reg_debug21_pds_pos 0
+#define reg_debug21_pds_len 3
+#define reg_debug21_pds_lsb 0
+#define xd_p_reg_debug20_pds    (*(volatile byte xdata *) 0xD867)
+#define    p_reg_debug20_pds    0xD867
+#define reg_debug20_pds_pos 0
+#define reg_debug20_pds_len 3
+#define reg_debug20_pds_lsb 0
+#define xd_p_reg_debug19_pds    (*(volatile byte xdata *) 0xD868)
+#define    p_reg_debug19_pds    0xD868
+#define reg_debug19_pds_pos 0
+#define reg_debug19_pds_len 3
+#define reg_debug19_pds_lsb 0
+#define xd_p_reg_debug18_pds    (*(volatile byte xdata *) 0xD869)
+#define    p_reg_debug18_pds    0xD869
+#define reg_debug18_pds_pos 0
+#define reg_debug18_pds_len 3
+#define reg_debug18_pds_lsb 0
+#define xd_p_reg_debug17_pds    (*(volatile byte xdata *) 0xD86A)
+#define    p_reg_debug17_pds    0xD86A
+#define reg_debug17_pds_pos 0
+#define reg_debug17_pds_len 3
+#define reg_debug17_pds_lsb 0
+#define xd_p_reg_host_a2_pds    (*(volatile byte xdata *) 0xD86B)
+#define    p_reg_host_a2_pds    0xD86B
+#define reg_host_a2_pds_pos 0
+#define reg_host_a2_pds_len 3
+#define reg_host_a2_pds_lsb 0
+#define xd_p_reg_host_a3_pds    (*(volatile byte xdata *) 0xD86C)
+#define    p_reg_host_a3_pds    0xD86C
+#define reg_host_a3_pds_pos 0
+#define reg_host_a3_pds_len 3
+#define reg_host_a3_pds_lsb 0
+#define xd_p_reg_host_a4_pds    (*(volatile byte xdata *) 0xD86D)
+#define    p_reg_host_a4_pds    0xD86D
+#define reg_host_a4_pds_pos 0
+#define reg_host_a4_pds_len 3
+#define reg_host_a4_pds_lsb 0
+#define xd_p_reg_host_a5_pds    (*(volatile byte xdata *) 0xD86E)
+#define    p_reg_host_a5_pds    0xD86E
+#define reg_host_a5_pds_pos 0
+#define reg_host_a5_pds_len 3
+#define reg_host_a5_pds_lsb 0
+#define xd_p_reg_host_a6_pds    (*(volatile byte xdata *) 0xD86F)
+#define    p_reg_host_a6_pds    0xD86F
+#define reg_host_a6_pds_pos 0
+#define reg_host_a6_pds_len 3
+#define reg_host_a6_pds_lsb 0
+#define xd_p_reg_p160sel_pds    (*(volatile byte xdata *) 0xD870)
+#define    p_reg_p160sel_pds    0xD870
+#define reg_p160sel_pds_pos 0
+#define reg_p160sel_pds_len 3
+#define reg_p160sel_pds_lsb 0
+#define xd_p_reg_gpioh13_pds    (*(volatile byte xdata *) 0xD871)
+#define    p_reg_gpioh13_pds    0xD871
+#define reg_gpioh13_pds_pos 0
+#define reg_gpioh13_pds_len 3
+#define reg_gpioh13_pds_lsb 0
+#define xd_p_reg_gpioh12_pds    (*(volatile byte xdata *) 0xD872)
+#define    p_reg_gpioh12_pds    0xD872
+#define reg_gpioh12_pds_pos 0
+#define reg_gpioh12_pds_len 3
+#define reg_gpioh12_pds_lsb 0
+#define xd_p_reg_gpioh11_pds    (*(volatile byte xdata *) 0xD873)
+#define    p_reg_gpioh11_pds    0xD873
+#define reg_gpioh11_pds_pos 0
+#define reg_gpioh11_pds_len 3
+#define reg_gpioh11_pds_lsb 0
+#define xd_p_reg_host_a7_pds    (*(volatile byte xdata *) 0xD874)
+#define    p_reg_host_a7_pds    0xD874
+#define reg_host_a7_pds_pos 0
+#define reg_host_a7_pds_len 3
+#define reg_host_a7_pds_lsb 0
+#define xd_p_reg_host_a8_pds    (*(volatile byte xdata *) 0xD875)
+#define    p_reg_host_a8_pds    0xD875
+#define reg_host_a8_pds_pos 0
+#define reg_host_a8_pds_len 3
+#define reg_host_a8_pds_lsb 0
+#define xd_p_reg_host_a9_pds    (*(volatile byte xdata *) 0xD876)
+#define    p_reg_host_a9_pds    0xD876
+#define reg_host_a9_pds_pos 0
+#define reg_host_a9_pds_len 3
+#define reg_host_a9_pds_lsb 0
+#define xd_p_reg_host_a10_pds   (*(volatile byte xdata *) 0xD877)
+#define    p_reg_host_a10_pds   0xD877
+#define reg_host_a10_pds_pos 0
+#define reg_host_a10_pds_len 3
+#define reg_host_a10_pds_lsb 0
+#define xd_p_reg_host_a11_pds   (*(volatile byte xdata *) 0xD878)
+#define    p_reg_host_a11_pds   0xD878
+#define reg_host_a11_pds_pos 0
+#define reg_host_a11_pds_len 3
+#define reg_host_a11_pds_lsb 0
+#define xd_p_reg_bondu0_pds (*(volatile byte xdata *) 0xD879)
+#define    p_reg_bondu0_pds 0xD879
+#define reg_bondu0_pds_pos 0
+#define reg_bondu0_pds_len 3
+#define reg_bondu0_pds_lsb 0
+#define xd_p_reg_host_b0_pds    (*(volatile byte xdata *) 0xD87A)
+#define    p_reg_host_b0_pds    0xD87A
+#define reg_host_b0_pds_pos 0
+#define reg_host_b0_pds_len 3
+#define reg_host_b0_pds_lsb 0
+#define xd_p_reg_host_b1_pds    (*(volatile byte xdata *) 0xD87B)
+#define    p_reg_host_b1_pds    0xD87B
+#define reg_host_b1_pds_pos 0
+#define reg_host_b1_pds_len 3
+#define reg_host_b1_pds_lsb 0
+#define xd_p_reg_host_b2_pds    (*(volatile byte xdata *) 0xD87C)
+#define    p_reg_host_b2_pds    0xD87C
+#define reg_host_b2_pds_pos 0
+#define reg_host_b2_pds_len 3
+#define reg_host_b2_pds_lsb 0
+#define xd_p_reg_host_b3_pds    (*(volatile byte xdata *) 0xD87D)
+#define    p_reg_host_b3_pds    0xD87D
+#define reg_host_b3_pds_pos 0
+#define reg_host_b3_pds_len 3
+#define reg_host_b3_pds_lsb 0
+#define xd_p_reg_host_b4_pds    (*(volatile byte xdata *) 0xD87E)
+#define    p_reg_host_b4_pds    0xD87E
+#define reg_host_b4_pds_pos 0
+#define reg_host_b4_pds_len 3
+#define reg_host_b4_pds_lsb 0
+#define xd_p_reg_host_b5_pds    (*(volatile byte xdata *) 0xD87F)
+#define    p_reg_host_b5_pds    0xD87F
+#define reg_host_b5_pds_pos 0
+#define reg_host_b5_pds_len 3
+#define reg_host_b5_pds_lsb 0
+#define xd_p_reg_host_b6_pds    (*(volatile byte xdata *) 0xD880)
+#define    p_reg_host_b6_pds    0xD880
+#define reg_host_b6_pds_pos 0
+#define reg_host_b6_pds_len 3
+#define reg_host_b6_pds_lsb 0
+#define xd_p_reg_host_b7_pds    (*(volatile byte xdata *) 0xD881)
+#define    p_reg_host_b7_pds    0xD881
+#define reg_host_b7_pds_pos 0
+#define reg_host_b7_pds_len 3
+#define reg_host_b7_pds_lsb 0
+#define xd_p_reg_afe_f12_pds    (*(volatile byte xdata *) 0xD882)
+#define    p_reg_afe_f12_pds    0xD882
+#define reg_afe_f12_pds_pos 0
+#define reg_afe_f12_pds_len 3
+#define reg_afe_f12_pds_lsb 0
+#define xd_p_reg_host_b8_pds    (*(volatile byte xdata *) 0xD883)
+#define    p_reg_host_b8_pds    0xD883
+#define reg_host_b8_pds_pos 0
+#define reg_host_b8_pds_len 3
+#define reg_host_b8_pds_lsb 0
+#define xd_p_reg_host_b9_pds    (*(volatile byte xdata *) 0xD884)
+#define    p_reg_host_b9_pds    0xD884
+#define reg_host_b9_pds_pos 0
+#define reg_host_b9_pds_len 3
+#define reg_host_b9_pds_lsb 0
+#define xd_p_reg_host_b10_pds   (*(volatile byte xdata *) 0xD885)
+#define    p_reg_host_b10_pds   0xD885
+#define reg_host_b10_pds_pos 0
+#define reg_host_b10_pds_len 3
+#define reg_host_b10_pds_lsb 0
+#define xd_p_reg_host_b11_pds   (*(volatile byte xdata *) 0xD886)
+#define    p_reg_host_b11_pds   0xD886
+#define reg_host_b11_pds_pos 0
+#define reg_host_b11_pds_len 3
+#define reg_host_b11_pds_lsb 0
+#define xd_p_reg_debug16_pds    (*(volatile byte xdata *) 0xD887)
+#define    p_reg_debug16_pds    0xD887
+#define reg_debug16_pds_pos 0
+#define reg_debug16_pds_len 3
+#define reg_debug16_pds_lsb 0
+#define xd_p_reg_debug15_pds    (*(volatile byte xdata *) 0xD888)
+#define    p_reg_debug15_pds    0xD888
+#define reg_debug15_pds_pos 0
+#define reg_debug15_pds_len 3
+#define reg_debug15_pds_lsb 0
+#define xd_p_reg_debug14_pds    (*(volatile byte xdata *) 0xD889)
+#define    p_reg_debug14_pds    0xD889
+#define reg_debug14_pds_pos 0
+#define reg_debug14_pds_len 3
+#define reg_debug14_pds_lsb 0
+#define xd_p_reg_debug13_pds    (*(volatile byte xdata *) 0xD88A)
+#define    p_reg_debug13_pds    0xD88A
+#define reg_debug13_pds_pos 0
+#define reg_debug13_pds_len 3
+#define reg_debug13_pds_lsb 0
+#define xd_p_reg_debug12_pds    (*(volatile byte xdata *) 0xD88B)
+#define    p_reg_debug12_pds    0xD88B
+#define reg_debug12_pds_pos 0
+#define reg_debug12_pds_len 3
+#define reg_debug12_pds_lsb 0
+#define xd_p_reg_debug11_pds    (*(volatile byte xdata *) 0xD88C)
+#define    p_reg_debug11_pds    0xD88C
+#define reg_debug11_pds_pos 0
+#define reg_debug11_pds_len 3
+#define reg_debug11_pds_lsb 0
+#define xd_p_reg_debug10_pds    (*(volatile byte xdata *) 0xD88D)
+#define    p_reg_debug10_pds    0xD88D
+#define reg_debug10_pds_pos 0
+#define reg_debug10_pds_len 3
+#define reg_debug10_pds_lsb 0
+#define xd_p_reg_debug9_pds (*(volatile byte xdata *) 0xD88E)
+#define    p_reg_debug9_pds 0xD88E
+#define reg_debug9_pds_pos 0
+#define reg_debug9_pds_len 3
+#define reg_debug9_pds_lsb 0
+#define xd_p_reg_debug8_pds (*(volatile byte xdata *) 0xD88F)
+#define    p_reg_debug8_pds 0xD88F
+#define reg_debug8_pds_pos 0
+#define reg_debug8_pds_len 3
+#define reg_debug8_pds_lsb 0
+#define xd_p_reg_debug7_pds (*(volatile byte xdata *) 0xD890)
+#define    p_reg_debug7_pds 0xD890
+#define reg_debug7_pds_pos 0
+#define reg_debug7_pds_len 3
+#define reg_debug7_pds_lsb 0
+#define xd_p_reg_debug6_pds (*(volatile byte xdata *) 0xD891)
+#define    p_reg_debug6_pds 0xD891
+#define reg_debug6_pds_pos 0
+#define reg_debug6_pds_len 3
+#define reg_debug6_pds_lsb 0
+#define xd_p_reg_debug5_pds (*(volatile byte xdata *) 0xD892)
+#define    p_reg_debug5_pds 0xD892
+#define reg_debug5_pds_pos 0
+#define reg_debug5_pds_len 3
+#define reg_debug5_pds_lsb 0
+#define xd_p_reg_debug4_pds (*(volatile byte xdata *) 0xD893)
+#define    p_reg_debug4_pds 0xD893
+#define reg_debug4_pds_pos 0
+#define reg_debug4_pds_len 3
+#define reg_debug4_pds_lsb 0
+#define xd_p_reg_clko_pds   (*(volatile byte xdata *) 0xD894)
+#define    p_reg_clko_pds   0xD894
+#define reg_clko_pds_pos 0
+#define reg_clko_pds_len 3
+#define reg_clko_pds_lsb 0
+#define xd_p_reg_gpioh6_pds (*(volatile byte xdata *) 0xD895)
+#define    p_reg_gpioh6_pds 0xD895
+#define reg_gpioh6_pds_pos 0
+#define reg_gpioh6_pds_len 3
+#define reg_gpioh6_pds_lsb 0
+#define xd_p_reg_gpioh7_pds (*(volatile byte xdata *) 0xD896)
+#define    p_reg_gpioh7_pds 0xD896
+#define reg_gpioh7_pds_pos 0
+#define reg_gpioh7_pds_len 3
+#define reg_gpioh7_pds_lsb 0
+#define xd_p_reg_gpioh8_pds (*(volatile byte xdata *) 0xD897)
+#define    p_reg_gpioh8_pds 0xD897
+#define reg_gpioh8_pds_pos 0
+#define reg_gpioh8_pds_len 3
+#define reg_gpioh8_pds_lsb 0
+#define xd_p_reg_gpioh9_pds (*(volatile byte xdata *) 0xD898)
+#define    p_reg_gpioh9_pds 0xD898
+#define reg_gpioh9_pds_pos 0
+#define reg_gpioh9_pds_len 3
+#define reg_gpioh9_pds_lsb 0
+#define xd_p_reg_gpioh10_pds    (*(volatile byte xdata *) 0xD899)
+#define    p_reg_gpioh10_pds    0xD899
+#define reg_gpioh10_pds_pos 0
+#define reg_gpioh10_pds_len 3
+#define reg_gpioh10_pds_lsb 0
+#define xd_p_reg_debug3_pds (*(volatile byte xdata *) 0xD89A)
+#define    p_reg_debug3_pds 0xD89A
+#define reg_debug3_pds_pos 0
+#define reg_debug3_pds_len 3
+#define reg_debug3_pds_lsb 0
+#define xd_p_reg_debug2_pds (*(volatile byte xdata *) 0xD89B)
+#define    p_reg_debug2_pds 0xD89B
+#define reg_debug2_pds_pos 0
+#define reg_debug2_pds_len 3
+#define reg_debug2_pds_lsb 0
+#define xd_p_reg_debug1_pds (*(volatile byte xdata *) 0xD89C)
+#define    p_reg_debug1_pds 0xD89C
+#define reg_debug1_pds_pos 0
+#define reg_debug1_pds_len 3
+#define reg_debug1_pds_lsb 0
+#define xd_p_reg_debug0_pds (*(volatile byte xdata *) 0xD89D)
+#define    p_reg_debug0_pds 0xD89D
+#define reg_debug0_pds_pos 0
+#define reg_debug0_pds_len 3
+#define reg_debug0_pds_lsb 0
+#define xd_p_reg_gpiot1_pds (*(volatile byte xdata *) 0xD89E)
+#define    p_reg_gpiot1_pds 0xD89E
+#define reg_gpiot1_pds_pos 0
+#define reg_gpiot1_pds_len 3
+#define reg_gpiot1_pds_lsb 0
+#define xd_p_reg_gpiot2_pds (*(volatile byte xdata *) 0xD89F)
+#define    p_reg_gpiot2_pds 0xD89F
+#define reg_gpiot2_pds_pos 0
+#define reg_gpiot2_pds_len 3
+#define reg_gpiot2_pds_lsb 0
+#define xd_p_reg_rfagc_pds  (*(volatile byte xdata *) 0xD8A0)
+#define    p_reg_rfagc_pds  0xD8A0
+#define reg_rfagc_pds_pos 0
+#define reg_rfagc_pds_len 3
+#define reg_rfagc_pds_lsb 0
+#define xd_p_reg_ifagc_pds  (*(volatile byte xdata *) 0xD8A1)
+#define    p_reg_ifagc_pds  0xD8A1
+#define reg_ifagc_pds_pos 0
+#define reg_ifagc_pds_len 3
+#define reg_ifagc_pds_lsb 0
+#define xd_p_reg_gpiot3_pds (*(volatile byte xdata *) 0xD8A2)
+#define    p_reg_gpiot3_pds 0xD8A2
+#define reg_gpiot3_pds_pos 0
+#define reg_gpiot3_pds_len 3
+#define reg_gpiot3_pds_lsb 0
+#define xd_p_reg_i2caddr3_pds   (*(volatile byte xdata *) 0xD8A3)
+#define    p_reg_i2caddr3_pds   0xD8A3
+#define reg_i2caddr3_pds_pos 0
+#define reg_i2caddr3_pds_len 3
+#define reg_i2caddr3_pds_lsb 0
+#define xd_p_reg_i2caddr2_pds   (*(volatile byte xdata *) 0xD8A4)
+#define    p_reg_i2caddr2_pds   0xD8A4
+#define reg_i2caddr2_pds_pos 0
+#define reg_i2caddr2_pds_len 3
+#define reg_i2caddr2_pds_lsb 0
+#define xd_p_reg_i2caddr1_pds   (*(volatile byte xdata *) 0xD8A5)
+#define    p_reg_i2caddr1_pds   0xD8A5
+#define reg_i2caddr1_pds_pos 0
+#define reg_i2caddr1_pds_len 3
+#define reg_i2caddr1_pds_lsb 0
+#define xd_p_reg_afe_sel33_pds  (*(volatile byte xdata *) 0xD8A6)
+#define    p_reg_afe_sel33_pds  0xD8A6
+#define reg_afe_sel33_pds_pos 0
+#define reg_afe_sel33_pds_len 3
+#define reg_afe_sel33_pds_lsb 0
+#define xd_p_reg_iotunscl_pds   (*(volatile byte xdata *) 0xD8A7)
+#define    p_reg_iotunscl_pds   0xD8A7
+#define reg_iotunscl_pds_pos 0
+#define reg_iotunscl_pds_len 3
+#define reg_iotunscl_pds_lsb 0
+#define xd_p_reg_iotunsda_pds   (*(volatile byte xdata *) 0xD8A8)
+#define    p_reg_iotunsda_pds   0xD8A8
+#define reg_iotunsda_pds_pos 0
+#define reg_iotunsda_pds_len 3
+#define reg_iotunsda_pds_lsb 0
+#define xd_p_reg_rxdofsm_pds    (*(volatile byte xdata *) 0xD8A9)
+#define    p_reg_rxdofsm_pds    0xD8A9
+#define reg_rxdofsm_pds_pos 0
+#define reg_rxdofsm_pds_len 3
+#define reg_rxdofsm_pds_lsb 0
+#define xd_p_reg_txdofsm_pds    (*(volatile byte xdata *) 0xD8AA)
+#define    p_reg_txdofsm_pds    0xD8AA
+#define reg_txdofsm_pds_pos 0
+#define reg_txdofsm_pds_len 3
+#define reg_txdofsm_pds_lsb 0
+#define xd_p_reg_rxdlink_pds    (*(volatile byte xdata *) 0xD8AB)
+#define    p_reg_rxdlink_pds    0xD8AB
+#define reg_rxdlink_pds_pos 0
+#define reg_rxdlink_pds_len 3
+#define reg_rxdlink_pds_lsb 0
+#define xd_p_reg_txdlink_pds    (*(volatile byte xdata *) 0xD8AC)
+#define    p_reg_txdlink_pds    0xD8AC
+#define reg_txdlink_pds_pos 0
+#define reg_txdlink_pds_len 3
+#define reg_txdlink_pds_lsb 0
+#define xd_p_reg_ck_test_pds    (*(volatile byte xdata *) 0xD8AD)
+#define    p_reg_ck_test_pds    0xD8AD
+#define reg_ck_test_pds_pos 0
+#define reg_ck_test_pds_len 3
+#define reg_ck_test_pds_lsb 0
+#define xd_r_reg_top_gpioh1_i   (*(volatile byte xdata *) 0xD8AE)
+#define    r_reg_top_gpioh1_i   0xD8AE
+#define reg_top_gpioh1_i_pos 0
+#define reg_top_gpioh1_i_len 1
+#define reg_top_gpioh1_i_lsb 0
+#define xd_p_reg_top_gpioh1_o   (*(volatile byte xdata *) 0xD8AF)
+#define    p_reg_top_gpioh1_o   0xD8AF
+#define reg_top_gpioh1_o_pos 0
+#define reg_top_gpioh1_o_len 1
+#define reg_top_gpioh1_o_lsb 0
+#define xd_p_reg_top_gpioh1_en  (*(volatile byte xdata *) 0xD8B0)
+#define    p_reg_top_gpioh1_en  0xD8B0
+#define reg_top_gpioh1_en_pos 0
+#define reg_top_gpioh1_en_len 1
+#define reg_top_gpioh1_en_lsb 0
+#define xd_p_reg_top_gpioh1_on  (*(volatile byte xdata *) 0xD8B1)
+#define    p_reg_top_gpioh1_on  0xD8B1
+#define reg_top_gpioh1_on_pos 0
+#define reg_top_gpioh1_on_len 1
+#define reg_top_gpioh1_on_lsb 0
+#define xd_r_reg_top_gpioh3_i   (*(volatile byte xdata *) 0xD8B2)
+#define    r_reg_top_gpioh3_i   0xD8B2
+#define reg_top_gpioh3_i_pos 0
+#define reg_top_gpioh3_i_len 1
+#define reg_top_gpioh3_i_lsb 0
+#define xd_p_reg_top_gpioh3_o   (*(volatile byte xdata *) 0xD8B3)
+#define    p_reg_top_gpioh3_o   0xD8B3
+#define reg_top_gpioh3_o_pos 0
+#define reg_top_gpioh3_o_len 1
+#define reg_top_gpioh3_o_lsb 0
+#define xd_p_reg_top_gpioh3_en  (*(volatile byte xdata *) 0xD8B4)
+#define    p_reg_top_gpioh3_en  0xD8B4
+#define reg_top_gpioh3_en_pos 0
+#define reg_top_gpioh3_en_len 1
+#define reg_top_gpioh3_en_lsb 0
+#define xd_p_reg_top_gpioh3_on  (*(volatile byte xdata *) 0xD8B5)
+#define    p_reg_top_gpioh3_on  0xD8B5
+#define reg_top_gpioh3_on_pos 0
+#define reg_top_gpioh3_on_len 1
+#define reg_top_gpioh3_on_lsb 0
+#define xd_r_reg_top_gpioh2_i   (*(volatile byte xdata *) 0xD8B6)
+#define    r_reg_top_gpioh2_i   0xD8B6
+#define reg_top_gpioh2_i_pos 0
+#define reg_top_gpioh2_i_len 1
+#define reg_top_gpioh2_i_lsb 0
+#define xd_p_reg_top_gpioh2_o   (*(volatile byte xdata *) 0xD8B7)
+#define    p_reg_top_gpioh2_o   0xD8B7
+#define reg_top_gpioh2_o_pos 0
+#define reg_top_gpioh2_o_len 1
+#define reg_top_gpioh2_o_lsb 0
+#define xd_p_reg_top_gpioh2_en  (*(volatile byte xdata *) 0xD8B8)
+#define    p_reg_top_gpioh2_en  0xD8B8
+#define reg_top_gpioh2_en_pos 0
+#define reg_top_gpioh2_en_len 1
+#define reg_top_gpioh2_en_lsb 0
+#define xd_p_reg_top_gpioh2_on  (*(volatile byte xdata *) 0xD8B9)
+#define    p_reg_top_gpioh2_on  0xD8B9
+#define reg_top_gpioh2_on_pos 0
+#define reg_top_gpioh2_on_len 1
+#define reg_top_gpioh2_on_lsb 0
+#define xd_r_reg_top_gpioh5_i   (*(volatile byte xdata *) 0xD8BA)
+#define    r_reg_top_gpioh5_i   0xD8BA
+#define reg_top_gpioh5_i_pos 0
+#define reg_top_gpioh5_i_len 1
+#define reg_top_gpioh5_i_lsb 0
+#define xd_p_reg_top_gpioh5_o   (*(volatile byte xdata *) 0xD8BB)
+#define    p_reg_top_gpioh5_o   0xD8BB
+#define reg_top_gpioh5_o_pos 0
+#define reg_top_gpioh5_o_len 1
+#define reg_top_gpioh5_o_lsb 0
+#define xd_p_reg_top_gpioh5_en  (*(volatile byte xdata *) 0xD8BC)
+#define    p_reg_top_gpioh5_en  0xD8BC
+#define reg_top_gpioh5_en_pos 0
+#define reg_top_gpioh5_en_len 1
+#define reg_top_gpioh5_en_lsb 0
+#define xd_p_reg_top_gpioh5_on  (*(volatile byte xdata *) 0xD8BD)
+#define    p_reg_top_gpioh5_on  0xD8BD
+#define reg_top_gpioh5_on_pos 0
+#define reg_top_gpioh5_on_len 1
+#define reg_top_gpioh5_on_lsb 0
+#define xd_r_reg_top_gpioh4_i   (*(volatile byte xdata *) 0xD8BE)
+#define    r_reg_top_gpioh4_i   0xD8BE
+#define reg_top_gpioh4_i_pos 0
+#define reg_top_gpioh4_i_len 1
+#define reg_top_gpioh4_i_lsb 0
+#define xd_p_reg_top_gpioh4_o   (*(volatile byte xdata *) 0xD8BF)
+#define    p_reg_top_gpioh4_o   0xD8BF
+#define reg_top_gpioh4_o_pos 0
+#define reg_top_gpioh4_o_len 1
+#define reg_top_gpioh4_o_lsb 0
+#define xd_p_reg_top_gpioh4_en  (*(volatile byte xdata *) 0xD8C0)
+#define    p_reg_top_gpioh4_en  0xD8C0
+#define reg_top_gpioh4_en_pos 0
+#define reg_top_gpioh4_en_len 1
+#define reg_top_gpioh4_en_lsb 0
+#define xd_p_reg_top_gpioh4_on  (*(volatile byte xdata *) 0xD8C1)
+#define    p_reg_top_gpioh4_on  0xD8C1
+#define reg_top_gpioh4_on_pos 0
+#define reg_top_gpioh4_on_len 1
+#define reg_top_gpioh4_on_lsb 0
+#define xd_r_reg_top_gpioh7_i   (*(volatile byte xdata *) 0xD8C2)
+#define    r_reg_top_gpioh7_i   0xD8C2
+#define reg_top_gpioh7_i_pos 0
+#define reg_top_gpioh7_i_len 1
+#define reg_top_gpioh7_i_lsb 0
+#define xd_p_reg_top_gpioh7_o   (*(volatile byte xdata *) 0xD8C3)
+#define    p_reg_top_gpioh7_o   0xD8C3
+#define reg_top_gpioh7_o_pos 0
+#define reg_top_gpioh7_o_len 1
+#define reg_top_gpioh7_o_lsb 0
+#define xd_p_reg_top_gpioh7_en  (*(volatile byte xdata *) 0xD8C4)
+#define    p_reg_top_gpioh7_en  0xD8C4
+#define reg_top_gpioh7_en_pos 0
+#define reg_top_gpioh7_en_len 1
+#define reg_top_gpioh7_en_lsb 0
+#define xd_p_reg_top_gpioh7_on  (*(volatile byte xdata *) 0xD8C5)
+#define    p_reg_top_gpioh7_on  0xD8C5
+#define reg_top_gpioh7_on_pos 0
+#define reg_top_gpioh7_on_len 1
+#define reg_top_gpioh7_on_lsb 0
+#define xd_r_reg_top_gpioh6_i   (*(volatile byte xdata *) 0xD8C6)
+#define    r_reg_top_gpioh6_i   0xD8C6
+#define reg_top_gpioh6_i_pos 0
+#define reg_top_gpioh6_i_len 1
+#define reg_top_gpioh6_i_lsb 0
+#define xd_p_reg_top_gpioh6_o   (*(volatile byte xdata *) 0xD8C7)
+#define    p_reg_top_gpioh6_o   0xD8C7
+#define reg_top_gpioh6_o_pos 0
+#define reg_top_gpioh6_o_len 1
+#define reg_top_gpioh6_o_lsb 0
+#define xd_p_reg_top_gpioh6_en  (*(volatile byte xdata *) 0xD8C8)
+#define    p_reg_top_gpioh6_en  0xD8C8
+#define reg_top_gpioh6_en_pos 0
+#define reg_top_gpioh6_en_len 1
+#define reg_top_gpioh6_en_lsb 0
+#define xd_p_reg_top_gpioh6_on  (*(volatile byte xdata *) 0xD8C9)
+#define    p_reg_top_gpioh6_on  0xD8C9
+#define reg_top_gpioh6_on_pos 0
+#define reg_top_gpioh6_on_len 1
+#define reg_top_gpioh6_on_lsb 0
+#define xd_r_reg_top_gpioh9_i   (*(volatile byte xdata *) 0xD8CA)
+#define    r_reg_top_gpioh9_i   0xD8CA
+#define reg_top_gpioh9_i_pos 0
+#define reg_top_gpioh9_i_len 1
+#define reg_top_gpioh9_i_lsb 0
+#define xd_p_reg_top_gpioh9_o   (*(volatile byte xdata *) 0xD8CB)
+#define    p_reg_top_gpioh9_o   0xD8CB
+#define reg_top_gpioh9_o_pos 0
+#define reg_top_gpioh9_o_len 1
+#define reg_top_gpioh9_o_lsb 0
+#define xd_p_reg_top_gpioh9_en  (*(volatile byte xdata *) 0xD8CC)
+#define    p_reg_top_gpioh9_en  0xD8CC
+#define reg_top_gpioh9_en_pos 0
+#define reg_top_gpioh9_en_len 1
+#define reg_top_gpioh9_en_lsb 0
+#define xd_p_reg_top_gpioh9_on  (*(volatile byte xdata *) 0xD8CD)
+#define    p_reg_top_gpioh9_on  0xD8CD
+#define reg_top_gpioh9_on_pos 0
+#define reg_top_gpioh9_on_len 1
+#define reg_top_gpioh9_on_lsb 0
+#define xd_r_reg_top_gpioh8_i   (*(volatile byte xdata *) 0xD8CE)
+#define    r_reg_top_gpioh8_i   0xD8CE
+#define reg_top_gpioh8_i_pos 0
+#define reg_top_gpioh8_i_len 1
+#define reg_top_gpioh8_i_lsb 0
+#define xd_p_reg_top_gpioh8_o   (*(volatile byte xdata *) 0xD8CF)
+#define    p_reg_top_gpioh8_o   0xD8CF
+#define reg_top_gpioh8_o_pos 0
+#define reg_top_gpioh8_o_len 1
+#define reg_top_gpioh8_o_lsb 0
+#define xd_p_reg_top_gpioh8_en  (*(volatile byte xdata *) 0xD8D0)
+#define    p_reg_top_gpioh8_en  0xD8D0
+#define reg_top_gpioh8_en_pos 0
+#define reg_top_gpioh8_en_len 1
+#define reg_top_gpioh8_en_lsb 0
+#define xd_p_reg_top_gpioh8_on  (*(volatile byte xdata *) 0xD8D1)
+#define    p_reg_top_gpioh8_on  0xD8D1
+#define reg_top_gpioh8_on_pos 0
+#define reg_top_gpioh8_on_len 1
+#define reg_top_gpioh8_on_lsb 0
+#define xd_r_reg_top_gpioh11_i  (*(volatile byte xdata *) 0xD8D2)
+#define    r_reg_top_gpioh11_i  0xD8D2
+#define reg_top_gpioh11_i_pos 0
+#define reg_top_gpioh11_i_len 1
+#define reg_top_gpioh11_i_lsb 0
+#define xd_p_reg_top_gpioh11_o  (*(volatile byte xdata *) 0xD8D3)
+#define    p_reg_top_gpioh11_o  0xD8D3
+#define reg_top_gpioh11_o_pos 0
+#define reg_top_gpioh11_o_len 1
+#define reg_top_gpioh11_o_lsb 0
+#define xd_p_reg_top_gpioh11_en (*(volatile byte xdata *) 0xD8D4)
+#define    p_reg_top_gpioh11_en 0xD8D4
+#define reg_top_gpioh11_en_pos 0
+#define reg_top_gpioh11_en_len 1
+#define reg_top_gpioh11_en_lsb 0
+#define xd_p_reg_top_gpioh11_on (*(volatile byte xdata *) 0xD8D5)
+#define    p_reg_top_gpioh11_on 0xD8D5
+#define reg_top_gpioh11_on_pos 0
+#define reg_top_gpioh11_on_len 1
+#define reg_top_gpioh11_on_lsb 0
+#define xd_r_reg_top_gpioh10_i  (*(volatile byte xdata *) 0xD8D6)
+#define    r_reg_top_gpioh10_i  0xD8D6
+#define reg_top_gpioh10_i_pos 0
+#define reg_top_gpioh10_i_len 1
+#define reg_top_gpioh10_i_lsb 0
+#define xd_p_reg_top_gpioh10_o  (*(volatile byte xdata *) 0xD8D7)
+#define    p_reg_top_gpioh10_o  0xD8D7
+#define reg_top_gpioh10_o_pos 0
+#define reg_top_gpioh10_o_len 1
+#define reg_top_gpioh10_o_lsb 0
+#define xd_p_reg_top_gpioh10_en (*(volatile byte xdata *) 0xD8D8)
+#define    p_reg_top_gpioh10_en 0xD8D8
+#define reg_top_gpioh10_en_pos 0
+#define reg_top_gpioh10_en_len 1
+#define reg_top_gpioh10_en_lsb 0
+#define xd_p_reg_top_gpioh10_on (*(volatile byte xdata *) 0xD8D9)
+#define    p_reg_top_gpioh10_on 0xD8D9
+#define reg_top_gpioh10_on_pos 0
+#define reg_top_gpioh10_on_len 1
+#define reg_top_gpioh10_on_lsb 0
+#define xd_r_reg_top_gpioh13_i  (*(volatile byte xdata *) 0xD8DA)
+#define    r_reg_top_gpioh13_i  0xD8DA
+#define reg_top_gpioh13_i_pos 0
+#define reg_top_gpioh13_i_len 1
+#define reg_top_gpioh13_i_lsb 0
+#define xd_p_reg_top_gpioh13_o  (*(volatile byte xdata *) 0xD8DB)
+#define    p_reg_top_gpioh13_o  0xD8DB
+#define reg_top_gpioh13_o_pos 0
+#define reg_top_gpioh13_o_len 1
+#define reg_top_gpioh13_o_lsb 0
+#define xd_p_reg_top_gpioh13_en (*(volatile byte xdata *) 0xD8DC)
+#define    p_reg_top_gpioh13_en 0xD8DC
+#define reg_top_gpioh13_en_pos 0
+#define reg_top_gpioh13_en_len 1
+#define reg_top_gpioh13_en_lsb 0
+#define xd_p_reg_top_gpioh13_on (*(volatile byte xdata *) 0xD8DD)
+#define    p_reg_top_gpioh13_on 0xD8DD
+#define reg_top_gpioh13_on_pos 0
+#define reg_top_gpioh13_on_len 1
+#define reg_top_gpioh13_on_lsb 0
+#define xd_r_reg_top_gpioh12_i  (*(volatile byte xdata *) 0xD8DE)
+#define    r_reg_top_gpioh12_i  0xD8DE
+#define reg_top_gpioh12_i_pos 0
+#define reg_top_gpioh12_i_len 1
+#define reg_top_gpioh12_i_lsb 0
+#define xd_p_reg_top_gpioh12_o  (*(volatile byte xdata *) 0xD8DF)
+#define    p_reg_top_gpioh12_o  0xD8DF
+#define reg_top_gpioh12_o_pos 0
+#define reg_top_gpioh12_o_len 1
+#define reg_top_gpioh12_o_lsb 0
+#define xd_p_reg_top_gpioh12_en (*(volatile byte xdata *) 0xD8E0)
+#define    p_reg_top_gpioh12_en 0xD8E0
+#define reg_top_gpioh12_en_pos 0
+#define reg_top_gpioh12_en_len 1
+#define reg_top_gpioh12_en_lsb 0
+#define xd_p_reg_top_gpioh12_on (*(volatile byte xdata *) 0xD8E1)
+#define    p_reg_top_gpioh12_on 0xD8E1
+#define reg_top_gpioh12_on_pos 0
+#define reg_top_gpioh12_on_len 1
+#define reg_top_gpioh12_on_lsb 0
+#define xd_r_reg_top_gpiot1_i   (*(volatile byte xdata *) 0xD8E2)
+#define    r_reg_top_gpiot1_i   0xD8E2
+#define reg_top_gpiot1_i_pos 0
+#define reg_top_gpiot1_i_len 1
+#define reg_top_gpiot1_i_lsb 0
+#define xd_p_reg_top_gpiot1_o   (*(volatile byte xdata *) 0xD8E3)
+#define    p_reg_top_gpiot1_o   0xD8E3
+#define reg_top_gpiot1_o_pos 0
+#define reg_top_gpiot1_o_len 1
+#define reg_top_gpiot1_o_lsb 0
+#define xd_p_reg_top_gpiot1_en  (*(volatile byte xdata *) 0xD8E4)
+#define    p_reg_top_gpiot1_en  0xD8E4
+#define reg_top_gpiot1_en_pos 0
+#define reg_top_gpiot1_en_len 1
+#define reg_top_gpiot1_en_lsb 0
+#define xd_p_reg_top_gpiot1_on  (*(volatile byte xdata *) 0xD8E5)
+#define    p_reg_top_gpiot1_on  0xD8E5
+#define reg_top_gpiot1_on_pos 0
+#define reg_top_gpiot1_on_len 1
+#define reg_top_gpiot1_on_lsb 0
+#define xd_r_reg_top_gpiot3_i   (*(volatile byte xdata *) 0xD8E6)
+#define    r_reg_top_gpiot3_i   0xD8E6
+#define reg_top_gpiot3_i_pos 0
+#define reg_top_gpiot3_i_len 1
+#define reg_top_gpiot3_i_lsb 0
+#define xd_p_reg_top_gpiot3_o   (*(volatile byte xdata *) 0xD8E7)
+#define    p_reg_top_gpiot3_o   0xD8E7
+#define reg_top_gpiot3_o_pos 0
+#define reg_top_gpiot3_o_len 1
+#define reg_top_gpiot3_o_lsb 0
+#define xd_p_reg_top_gpiot3_en  (*(volatile byte xdata *) 0xD8E8)
+#define    p_reg_top_gpiot3_en  0xD8E8
+#define reg_top_gpiot3_en_pos 0
+#define reg_top_gpiot3_en_len 1
+#define reg_top_gpiot3_en_lsb 0
+#define xd_p_reg_top_gpiot3_on  (*(volatile byte xdata *) 0xD8E9)
+#define    p_reg_top_gpiot3_on  0xD8E9
+#define reg_top_gpiot3_on_pos 0
+#define reg_top_gpiot3_on_len 1
+#define reg_top_gpiot3_on_lsb 0
+#define xd_r_reg_top_gpiot2_i   (*(volatile byte xdata *) 0xD8EA)
+#define    r_reg_top_gpiot2_i   0xD8EA
+#define reg_top_gpiot2_i_pos 0
+#define reg_top_gpiot2_i_len 1
+#define reg_top_gpiot2_i_lsb 0
+#define xd_p_reg_top_gpiot2_o   (*(volatile byte xdata *) 0xD8EB)
+#define    p_reg_top_gpiot2_o   0xD8EB
+#define reg_top_gpiot2_o_pos 0
+#define reg_top_gpiot2_o_len 1
+#define reg_top_gpiot2_o_lsb 0
+#define xd_p_reg_top_gpiot2_en  (*(volatile byte xdata *) 0xD8EC)
+#define    p_reg_top_gpiot2_en  0xD8EC
+#define reg_top_gpiot2_en_pos 0
+#define reg_top_gpiot2_en_len 1
+#define reg_top_gpiot2_en_lsb 0
+#define xd_p_reg_top_gpiot2_on  (*(volatile byte xdata *) 0xD8ED)
+#define    p_reg_top_gpiot2_on  0xD8ED
+#define reg_top_gpiot2_on_pos 0
+#define reg_top_gpiot2_on_len 1
+#define reg_top_gpiot2_on_lsb 0
+#define xd_p_reg_top_lock2_out  (*(volatile byte xdata *) 0xD8EE)
+#define    p_reg_top_lock2_out  0xD8EE
+#define reg_top_lock2_out_pos 0
+#define reg_top_lock2_out_len 1
+#define reg_top_lock2_out_lsb 0
+#define xd_p_reg_top_lock2_tpsd (*(volatile byte xdata *) 0xD8EF)
+#define    p_reg_top_lock2_tpsd 0xD8EF
+#define reg_top_lock2_tpsd_pos 0
+#define reg_top_lock2_tpsd_len 1
+#define reg_top_lock2_tpsd_lsb 0
+#define xd_p_reg_top_lock2_o    (*(volatile byte xdata *) 0xD8F0)
+#define    p_reg_top_lock2_o    0xD8F0
+#define reg_top_lock2_o_pos 0
+#define reg_top_lock2_o_len 1
+#define reg_top_lock2_o_lsb 0
+#define xd_p_reg_top_lock2_en   (*(volatile byte xdata *) 0xD8F1)
+#define    p_reg_top_lock2_en   0xD8F1
+#define reg_top_lock2_en_pos 0
+#define reg_top_lock2_en_len 1
+#define reg_top_lock2_en_lsb 0
+#define xd_p_reg_top_lock2_on   (*(volatile byte xdata *) 0xD8F2)
+#define    p_reg_top_lock2_on   0xD8F2
+#define reg_top_lock2_on_pos 0
+#define reg_top_lock2_on_len 1
+#define reg_top_lock2_on_lsb 0
+#define xd_p_reg_top_lock1_out  (*(volatile byte xdata *) 0xD8F3)
+#define    p_reg_top_lock1_out  0xD8F3
+#define reg_top_lock1_out_pos 0
+#define reg_top_lock1_out_len 1
+#define reg_top_lock1_out_lsb 0
+#define xd_p_reg_top_lock1_tpsd (*(volatile byte xdata *) 0xD8F4)
+#define    p_reg_top_lock1_tpsd 0xD8F4
+#define reg_top_lock1_tpsd_pos 0
+#define reg_top_lock1_tpsd_len 1
+#define reg_top_lock1_tpsd_lsb 0
+#define xd_p_reg_top_lock1_o    (*(volatile byte xdata *) 0xD8F5)
+#define    p_reg_top_lock1_o    0xD8F5
+#define reg_top_lock1_o_pos 0
+#define reg_top_lock1_o_len 1
+#define reg_top_lock1_o_lsb 0
+#define xd_p_reg_top_lock1_en   (*(volatile byte xdata *) 0xD8F6)
+#define    p_reg_top_lock1_en   0xD8F6
+#define reg_top_lock1_en_pos 0
+#define reg_top_lock1_en_len 1
+#define reg_top_lock1_en_lsb 0
+#define xd_p_reg_top_lock1_on   (*(volatile byte xdata *) 0xD8F7)
+#define    p_reg_top_lock1_on   0xD8F7
+#define reg_top_lock1_on_pos 0
+#define reg_top_lock1_on_len 1
+#define reg_top_lock1_on_lsb 0
+#define xd_p_reg_top_lock4_out  (*(volatile byte xdata *) 0xD8F8)
+#define    p_reg_top_lock4_out  0xD8F8
+#define reg_top_lock4_out_pos 0
+#define reg_top_lock4_out_len 1
+#define reg_top_lock4_out_lsb 0
+#define xd_p_reg_top_lock4_tpsd (*(volatile byte xdata *) 0xD8F9)
+#define    p_reg_top_lock4_tpsd 0xD8F9
+#define reg_top_lock4_tpsd_pos 0
+#define reg_top_lock4_tpsd_len 1
+#define reg_top_lock4_tpsd_lsb 0
+#define xd_p_reg_top_lock4_o    (*(volatile byte xdata *) 0xD8FA)
+#define    p_reg_top_lock4_o    0xD8FA
+#define reg_top_lock4_o_pos 0
+#define reg_top_lock4_o_len 1
+#define reg_top_lock4_o_lsb 0
+#define xd_p_reg_top_lock4_en   (*(volatile byte xdata *) 0xD8FB)
+#define    p_reg_top_lock4_en   0xD8FB
+#define reg_top_lock4_en_pos 0
+#define reg_top_lock4_en_len 1
+#define reg_top_lock4_en_lsb 0
+#define xd_p_reg_top_lock4_on   (*(volatile byte xdata *) 0xD8FC)
+#define    p_reg_top_lock4_on   0xD8FC
+#define reg_top_lock4_on_pos 0
+#define reg_top_lock4_on_len 1
+#define reg_top_lock4_on_lsb 0
+#define xd_p_reg_top_lock3_out  (*(volatile byte xdata *) 0xD8FD)
+#define    p_reg_top_lock3_out  0xD8FD
+#define reg_top_lock3_out_pos 0
+#define reg_top_lock3_out_len 1
+#define reg_top_lock3_out_lsb 0
+#define xd_p_reg_top_lock3_tpsd (*(volatile byte xdata *) 0xD8FE)
+#define    p_reg_top_lock3_tpsd 0xD8FE
+#define reg_top_lock3_tpsd_pos 0
+#define reg_top_lock3_tpsd_len 1
+#define reg_top_lock3_tpsd_lsb 0
+#define xd_p_reg_top_lock3_o    (*(volatile byte xdata *) 0xD8FF)
+#define    p_reg_top_lock3_o    0xD8FF
+#define reg_top_lock3_o_pos 0
+#define reg_top_lock3_o_len 1
+#define reg_top_lock3_o_lsb 0
+#define xd_p_reg_top_lock3_en   (*(volatile byte xdata *) 0xD900)
+#define    p_reg_top_lock3_en   0xD900
+#define reg_top_lock3_en_pos 0
+#define reg_top_lock3_en_len 1
+#define reg_top_lock3_en_lsb 0
+#define xd_p_reg_top_lock3_on   (*(volatile byte xdata *) 0xD901)
+#define    p_reg_top_lock3_on   0xD901
+#define reg_top_lock3_on_pos 0
+#define reg_top_lock3_on_len 1
+#define reg_top_lock3_on_lsb 0
+#define xd_p_reg_top_pwm0_en    (*(volatile byte xdata *) 0xD902)
+#define    p_reg_top_pwm0_en    0xD902
+#define reg_top_pwm0_en_pos 0
+#define reg_top_pwm0_en_len 1
+#define reg_top_pwm0_en_lsb 0
+#define xd_p_reg_top_pwm1_en    (*(volatile byte xdata *) 0xD903)
+#define    p_reg_top_pwm1_en    0xD903
+#define reg_top_pwm1_en_pos 0
+#define reg_top_pwm1_en_len 1
+#define reg_top_pwm1_en_lsb 0
+#define xd_p_reg_top_pwm2_en    (*(volatile byte xdata *) 0xD904)
+#define    p_reg_top_pwm2_en    0xD904
+#define reg_top_pwm2_en_pos 0
+#define reg_top_pwm2_en_len 1
+#define reg_top_pwm2_en_lsb 0
+#define xd_p_reg_top_pwm3_en    (*(volatile byte xdata *) 0xD905)
+#define    p_reg_top_pwm3_en    0xD905
+#define reg_top_pwm3_en_pos 0
+#define reg_top_pwm3_en_len 1
+#define reg_top_pwm3_en_lsb 0
+#define xd_p_reg_top_pwm0_gpio  (*(volatile byte xdata *) 0xD906)
+#define    p_reg_top_pwm0_gpio  0xD906
+#define reg_top_pwm0_gpio_pos 0
+#define reg_top_pwm0_gpio_len 1
+#define reg_top_pwm0_gpio_lsb 0
+#define xd_p_reg_top_pwm0_pos   (*(volatile byte xdata *) 0xD907)
+#define    p_reg_top_pwm0_pos   0xD907
+#define reg_top_pwm0_pos_pos 0
+#define reg_top_pwm0_pos_len 3
+#define reg_top_pwm0_pos_lsb 0
+#define xd_p_reg_top_pwm0_width (*(volatile byte xdata *) 0xD908)
+#define    p_reg_top_pwm0_width 0xD908
+#define reg_top_pwm0_width_pos 0
+#define reg_top_pwm0_width_len 2
+#define reg_top_pwm0_width_lsb 0
+#define xd_p_reg_top_pwm0_duration  (*(volatile byte xdata *) 0xD909)
+#define    p_reg_top_pwm0_duration  0xD909
+#define reg_top_pwm0_duration_pos 0
+#define reg_top_pwm0_duration_len 8
+#define reg_top_pwm0_duration_lsb 0
+#define xd_p_reg_top_pwm1_gpio  (*(volatile byte xdata *) 0xD90A)
+#define    p_reg_top_pwm1_gpio  0xD90A
+#define reg_top_pwm1_gpio_pos 0
+#define reg_top_pwm1_gpio_len 1
+#define reg_top_pwm1_gpio_lsb 0
+#define xd_p_reg_top_pwm1_pos   (*(volatile byte xdata *) 0xD90B)
+#define    p_reg_top_pwm1_pos   0xD90B
+#define reg_top_pwm1_pos_pos 0
+#define reg_top_pwm1_pos_len 3
+#define reg_top_pwm1_pos_lsb 0
+#define xd_p_reg_top_pwm1_width (*(volatile byte xdata *) 0xD90C)
+#define    p_reg_top_pwm1_width 0xD90C
+#define reg_top_pwm1_width_pos 0
+#define reg_top_pwm1_width_len 2
+#define reg_top_pwm1_width_lsb 0
+#define xd_p_reg_top_pwm1_duration  (*(volatile byte xdata *) 0xD90D)
+#define    p_reg_top_pwm1_duration  0xD90D
+#define reg_top_pwm1_duration_pos 0
+#define reg_top_pwm1_duration_len 8
+#define reg_top_pwm1_duration_lsb 0
+#define xd_p_reg_top_pwm2_gpio  (*(volatile byte xdata *) 0xD90E)
+#define    p_reg_top_pwm2_gpio  0xD90E
+#define reg_top_pwm2_gpio_pos 0
+#define reg_top_pwm2_gpio_len 1
+#define reg_top_pwm2_gpio_lsb 0
+#define xd_p_reg_top_pwm2_pos   (*(volatile byte xdata *) 0xD90F)
+#define    p_reg_top_pwm2_pos   0xD90F
+#define reg_top_pwm2_pos_pos 0
+#define reg_top_pwm2_pos_len 3
+#define reg_top_pwm2_pos_lsb 0
+#define xd_p_reg_top_pwm2_width (*(volatile byte xdata *) 0xD910)
+#define    p_reg_top_pwm2_width 0xD910
+#define reg_top_pwm2_width_pos 0
+#define reg_top_pwm2_width_len 2
+#define reg_top_pwm2_width_lsb 0
+#define xd_p_reg_top_pwm2_duration  (*(volatile byte xdata *) 0xD911)
+#define    p_reg_top_pwm2_duration  0xD911
+#define reg_top_pwm2_duration_pos 0
+#define reg_top_pwm2_duration_len 8
+#define reg_top_pwm2_duration_lsb 0
+#define xd_p_reg_top_pwm3_gpio  (*(volatile byte xdata *) 0xD912)
+#define    p_reg_top_pwm3_gpio  0xD912
+#define reg_top_pwm3_gpio_pos 0
+#define reg_top_pwm3_gpio_len 1
+#define reg_top_pwm3_gpio_lsb 0
+#define xd_p_reg_top_pwm3_pos   (*(volatile byte xdata *) 0xD913)
+#define    p_reg_top_pwm3_pos   0xD913
+#define reg_top_pwm3_pos_pos 0
+#define reg_top_pwm3_pos_len 3
+#define reg_top_pwm3_pos_lsb 0
+#define xd_p_reg_top_pwm3_width (*(volatile byte xdata *) 0xD914)
+#define    p_reg_top_pwm3_width 0xD914
+#define reg_top_pwm3_width_pos 0
+#define reg_top_pwm3_width_len 2
+#define reg_top_pwm3_width_lsb 0
+#define xd_p_reg_top_pwm3_duration  (*(volatile byte xdata *) 0xD915)
+#define    p_reg_top_pwm3_duration  0xD915
+#define reg_top_pwm3_duration_pos 0
+#define reg_top_pwm3_duration_len 8
+#define reg_top_pwm3_duration_lsb 0
+#define xd_p_reg_top_hosta_mpeg_par_mode    (*(volatile byte xdata *) 0xD916)
+#define    p_reg_top_hosta_mpeg_par_mode    0xD916
+#define reg_top_hosta_mpeg_par_mode_pos 0
+#define reg_top_hosta_mpeg_par_mode_len 1
+#define reg_top_hosta_mpeg_par_mode_lsb 0
+#define xd_p_reg_top_hosta_mpeg_ser_mode    (*(volatile byte xdata *) 0xD917)
+#define    p_reg_top_hosta_mpeg_ser_mode    0xD917
+#define reg_top_hosta_mpeg_ser_mode_pos 0
+#define reg_top_hosta_mpeg_ser_mode_len 1
+#define reg_top_hosta_mpeg_ser_mode_lsb 0
+#define xd_p_reg_top_hosta_mpeg_ser_do7 (*(volatile byte xdata *) 0xD918)
+#define    p_reg_top_hosta_mpeg_ser_do7 0xD918
+#define reg_top_hosta_mpeg_ser_do7_pos 0
+#define reg_top_hosta_mpeg_ser_do7_len 1
+#define reg_top_hosta_mpeg_ser_do7_lsb 0
+#define xd_p_reg_top_hosta_dca_upper    (*(volatile byte xdata *) 0xD919)
+#define    p_reg_top_hosta_dca_upper    0xD919
+#define reg_top_hosta_dca_upper_pos 0
+#define reg_top_hosta_dca_upper_len 1
+#define reg_top_hosta_dca_upper_lsb 0
+#define xd_p_reg_top_hosta_dca_lower    (*(volatile byte xdata *) 0xD91A)
+#define    p_reg_top_hosta_dca_lower    0xD91A
+#define reg_top_hosta_dca_lower_pos 0
+#define reg_top_hosta_dca_lower_len 1
+#define reg_top_hosta_dca_lower_lsb 0
+#define xd_p_reg_top_hostb_mpeg_par_mode    (*(volatile byte xdata *) 0xD91B)
+#define    p_reg_top_hostb_mpeg_par_mode    0xD91B
+#define reg_top_hostb_mpeg_par_mode_pos 0
+#define reg_top_hostb_mpeg_par_mode_len 1
+#define reg_top_hostb_mpeg_par_mode_lsb 0
+#define xd_p_reg_top_hostb_mpeg_ser_mode    (*(volatile byte xdata *) 0xD91C)
+#define    p_reg_top_hostb_mpeg_ser_mode    0xD91C
+#define reg_top_hostb_mpeg_ser_mode_pos 0
+#define reg_top_hostb_mpeg_ser_mode_len 1
+#define reg_top_hostb_mpeg_ser_mode_lsb 0
+#define xd_p_reg_top_hostb_mpeg_ser_do7 (*(volatile byte xdata *) 0xD91D)
+#define    p_reg_top_hostb_mpeg_ser_do7 0xD91D
+#define reg_top_hostb_mpeg_ser_do7_pos 0
+#define reg_top_hostb_mpeg_ser_do7_len 1
+#define reg_top_hostb_mpeg_ser_do7_lsb 0
+#define xd_p_reg_top_hostb_dca_upper    (*(volatile byte xdata *) 0xD91E)
+#define    p_reg_top_hostb_dca_upper    0xD91E
+#define reg_top_hostb_dca_upper_pos 0
+#define reg_top_hostb_dca_upper_len 1
+#define reg_top_hostb_dca_upper_lsb 0
+#define xd_p_reg_top_hostb_dca_lower    (*(volatile byte xdata *) 0xD91F)
+#define    p_reg_top_hostb_dca_lower    0xD91F
+#define reg_top_hostb_dca_lower_pos 0
+#define reg_top_hostb_dca_lower_len 1
+#define reg_top_hostb_dca_lower_lsb 0
+#define xd_p_reg_top_host_reverse   (*(volatile byte xdata *) 0xD920)
+#define    p_reg_top_host_reverse   0xD920
+#define reg_top_host_reverse_pos 0
+#define reg_top_host_reverse_len 1
+#define reg_top_host_reverse_lsb 0
+#define xd_p_reg_top_hosta_ccir (*(volatile byte xdata *) 0xD921)
+#define    p_reg_top_hosta_ccir 0xD921
+#define reg_top_hosta_ccir_pos 0
+#define reg_top_hosta_ccir_len 1
+#define reg_top_hosta_ccir_lsb 0
+#define xd_p_reg_top_hostb_ccir (*(volatile byte xdata *) 0xD922)
+#define    p_reg_top_hostb_ccir 0xD922
+#define reg_top_hostb_ccir_pos 0
+#define reg_top_hostb_ccir_len 1
+#define reg_top_hostb_ccir_lsb 0
+#define xd_p_reg_top_i2s_master_mode    (*(volatile byte xdata *) 0xD923)
+#define    p_reg_top_i2s_master_mode    0xD923
+#define reg_top_i2s_master_mode_pos 0
+#define reg_top_i2s_master_mode_len 1
+#define reg_top_i2s_master_mode_lsb 0
+#define xd_p_reg_usb_cfg_speed  (*(volatile byte xdata *) 0xDD00)
+#define    p_reg_usb_cfg_speed  0xDD00
+#define reg_usb_cfg_speed_pos 0
+#define reg_usb_cfg_speed_len 1
+#define reg_usb_cfg_speed_lsb 0
+#define xd_p_reg_usb_cfg_utmi16 (*(volatile byte xdata *) 0xDD00)
+#define    p_reg_usb_cfg_utmi16 0xDD00
+#define reg_usb_cfg_utmi16_pos 1
+#define reg_usb_cfg_utmi16_len 1
+#define reg_usb_cfg_utmi16_lsb 0
+#define xd_p_reg_usb_cfg_test   (*(volatile byte xdata *) 0xDD00)
+#define    p_reg_usb_cfg_test   0xDD00
+#define reg_usb_cfg_test_pos 3
+#define reg_usb_cfg_test_len 3
+#define reg_usb_cfg_test_lsb 0
+#define xd_p_reg_usb_port_sim_reset (*(volatile byte xdata *) 0xDD00)
+#define    p_reg_usb_port_sim_reset 0xDD00
+#define reg_usb_port_sim_reset_pos 6
+#define reg_usb_port_sim_reset_len 1
+#define reg_usb_port_sim_reset_lsb 0
+#define xd_p_reg_usb_port_run   (*(volatile byte xdata *) 0xDD00)
+#define    p_reg_usb_port_run   0xDD00
+#define reg_usb_port_run_pos 7
+#define reg_usb_port_run_len 1
+#define reg_usb_port_run_lsb 0
+#define xd_r_usb_line_state_0   (*(volatile byte xdata *) 0xDD01)
+#define    r_usb_line_state_0   0xDD01
+#define usb_line_state_0_pos 0
+#define usb_line_state_0_len 1
+#define usb_line_state_0_lsb 0
+#define xd_r_usb_line_state_1   (*(volatile byte xdata *) 0xDD01)
+#define    r_usb_line_state_1   0xDD01
+#define usb_line_state_1_pos 1
+#define usb_line_state_1_len 1
+#define usb_line_state_1_lsb 0
+#define xd_r_reg_usb_status_speed   (*(volatile byte xdata *) 0xDD01)
+#define    r_reg_usb_status_speed   0xDD01
+#define reg_usb_status_speed_pos 2
+#define reg_usb_status_speed_len 1
+#define reg_usb_status_speed_lsb 0
+#define xd_r_reg_usb_status_connect (*(volatile byte xdata *) 0xDD01)
+#define    r_reg_usb_status_connect 0xDD01
+#define reg_usb_status_connect_pos 3
+#define reg_usb_status_connect_len 1
+#define reg_usb_status_connect_lsb 0
+#define xd_r_reg_usb_rx_buf (*(volatile byte xdata *) 0xDD01)
+#define    r_reg_usb_rx_buf 0xDD01
+#define reg_usb_rx_buf_pos 4
+#define reg_usb_rx_buf_len 1
+#define reg_usb_rx_buf_lsb 0
+#define xd_r_reg_usb_port_reset (*(volatile byte xdata *) 0xDD01)
+#define    r_reg_usb_port_reset 0xDD01
+#define reg_usb_port_reset_pos 5
+#define reg_usb_port_reset_len 1
+#define reg_usb_port_reset_lsb 0
+#define xd_r_reg_usb_port_suspend   (*(volatile byte xdata *) 0xDD01)
+#define    r_reg_usb_port_suspend   0xDD01
+#define reg_usb_port_suspend_pos 6
+#define reg_usb_port_suspend_len 1
+#define reg_usb_port_suspend_lsb 0
+#define xd_p_reg_ep1_tx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep1_tx_type    0xDD07
+#define reg_ep1_tx_type_pos 2
+#define reg_ep1_tx_type_len 1
+#define reg_ep1_tx_type_lsb 0
+#define xd_p_reg_ep2_rx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep2_rx_type    0xDD07
+#define reg_ep2_rx_type_pos 3
+#define reg_ep2_rx_type_len 1
+#define reg_ep2_rx_type_lsb 0
+#define xd_p_reg_ep3_tx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep3_tx_type    0xDD07
+#define reg_ep3_tx_type_pos 4
+#define reg_ep3_tx_type_len 1
+#define reg_ep3_tx_type_lsb 0
+#define xd_p_reg_ep4_tx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep4_tx_type    0xDD07
+#define reg_ep4_tx_type_pos 5
+#define reg_ep4_tx_type_len 1
+#define reg_ep4_tx_type_lsb 0
+#define xd_p_reg_ep5_tx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep5_tx_type    0xDD07
+#define reg_ep5_tx_type_pos 6
+#define reg_ep5_tx_type_len 1
+#define reg_ep5_tx_type_lsb 0
+#define xd_p_reg_ep6_tx_type    (*(volatile byte xdata *) 0xDD07)
+#define    p_reg_ep6_tx_type    0xDD07
+#define reg_ep6_tx_type_pos 7
+#define reg_ep6_tx_type_len 1
+#define reg_ep6_tx_type_lsb 0
+#define xd_p_reg_ep0_max_pkt    (*(volatile byte xdata *) 0xDD08)
+#define    p_reg_ep0_max_pkt    0xDD08
+#define reg_ep0_max_pkt_pos 0
+#define reg_ep0_max_pkt_len 8
+#define reg_ep0_max_pkt_lsb 0
+#define xd_p_reg_ep2_max_pkt    (*(volatile byte xdata *) 0xDD0A)
+#define    p_reg_ep2_max_pkt    0xDD0A
+#define reg_ep2_max_pkt_pos 0
+#define reg_ep2_max_pkt_len 8
+#define reg_ep2_max_pkt_lsb 0
+#define xd_p_reg_ep4_max_pkt    (*(volatile byte xdata *) 0xDD0C)
+#define    p_reg_ep4_max_pkt    0xDD0C
+#define reg_ep4_max_pkt_pos 0
+#define reg_ep4_max_pkt_len 8
+#define reg_ep4_max_pkt_lsb 0
+#define xd_p_reg_ep5_max_pkt    (*(volatile byte xdata *) 0xDD0D)
+#define    p_reg_ep5_max_pkt    0xDD0D
+#define reg_ep5_max_pkt_pos 0
+#define reg_ep5_max_pkt_len 8
+#define reg_ep5_max_pkt_lsb 0
+#define xd_p_reg_ep6_max_pkt_7_0    (*(volatile byte xdata *) 0xDD0E)
+#define    p_reg_ep6_max_pkt_7_0    0xDD0E
+#define reg_ep6_max_pkt_7_0_pos 0
+#define reg_ep6_max_pkt_7_0_len 8
+#define reg_ep6_max_pkt_7_0_lsb 0
+#define xd_p_reg_ep6_max_pkt_15_8   (*(volatile byte xdata *) 0xDD0F)
+#define    p_reg_ep6_max_pkt_15_8   0xDD0F
+#define reg_ep6_max_pkt_15_8_pos 0
+#define reg_ep6_max_pkt_15_8_len 8
+#define reg_ep6_max_pkt_15_8_lsb 8
+#define xd_p_reg_usb_addr   (*(volatile byte xdata *) 0xDD10)
+#define    p_reg_usb_addr   0xDD10
+#define reg_usb_addr_pos 0
+#define reg_usb_addr_len 7
+#define reg_usb_addr_lsb 0
+#define xd_p_reg_usb_addr_now   (*(volatile byte xdata *) 0xDD10)
+#define    p_reg_usb_addr_now   0xDD10
+#define reg_usb_addr_now_pos 7
+#define reg_usb_addr_now_len 1
+#define reg_usb_addr_now_lsb 0
+#define xd_p_reg_ep0_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep0_tx_en  0xDD11
+#define reg_ep0_tx_en_pos 0
+#define reg_ep0_tx_en_len 1
+#define reg_ep0_tx_en_lsb 0
+#define xd_p_reg_ep0_rx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep0_rx_en  0xDD11
+#define reg_ep0_rx_en_pos 1
+#define reg_ep0_rx_en_len 1
+#define reg_ep0_rx_en_lsb 0
+#define xd_p_reg_ep1_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep1_tx_en  0xDD11
+#define reg_ep1_tx_en_pos 2
+#define reg_ep1_tx_en_len 1
+#define reg_ep1_tx_en_lsb 0
+#define xd_p_reg_ep2_rx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep2_rx_en  0xDD11
+#define reg_ep2_rx_en_pos 3
+#define reg_ep2_rx_en_len 1
+#define reg_ep2_rx_en_lsb 0
+#define xd_p_reg_ep3_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep3_tx_en  0xDD11
+#define reg_ep3_tx_en_pos 4
+#define reg_ep3_tx_en_len 1
+#define reg_ep3_tx_en_lsb 0
+#define xd_p_reg_ep4_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep4_tx_en  0xDD11
+#define reg_ep4_tx_en_pos 5
+#define reg_ep4_tx_en_len 1
+#define reg_ep4_tx_en_lsb 0
+#define xd_p_reg_ep5_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep5_tx_en  0xDD11
+#define reg_ep5_tx_en_pos 6
+#define reg_ep5_tx_en_len 1
+#define reg_ep5_tx_en_lsb 0
+#define xd_p_reg_ep6_tx_en  (*(volatile byte xdata *) 0xDD11)
+#define    p_reg_ep6_tx_en  0xDD11
+#define reg_ep6_tx_en_pos 7
+#define reg_ep6_tx_en_len 1
+#define reg_ep6_tx_en_lsb 0
+#define xd_p_reg_ep0_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep0_tx_stall   0xDD12
+#define reg_ep0_tx_stall_pos 0
+#define reg_ep0_tx_stall_len 1
+#define reg_ep0_tx_stall_lsb 0
+#define xd_p_reg_ep0_rx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep0_rx_stall   0xDD12
+#define reg_ep0_rx_stall_pos 1
+#define reg_ep0_rx_stall_len 1
+#define reg_ep0_rx_stall_lsb 0
+#define xd_p_reg_ep1_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep1_tx_stall   0xDD12
+#define reg_ep1_tx_stall_pos 2
+#define reg_ep1_tx_stall_len 1
+#define reg_ep1_tx_stall_lsb 0
+#define xd_p_reg_ep2_rx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep2_rx_stall   0xDD12
+#define reg_ep2_rx_stall_pos 3
+#define reg_ep2_rx_stall_len 1
+#define reg_ep2_rx_stall_lsb 0
+#define xd_p_reg_ep3_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep3_tx_stall   0xDD12
+#define reg_ep3_tx_stall_pos 4
+#define reg_ep3_tx_stall_len 1
+#define reg_ep3_tx_stall_lsb 0
+#define xd_p_reg_ep4_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep4_tx_stall   0xDD12
+#define reg_ep4_tx_stall_pos 5
+#define reg_ep4_tx_stall_len 1
+#define reg_ep4_tx_stall_lsb 0
+#define xd_p_reg_ep5_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep5_tx_stall   0xDD12
+#define reg_ep5_tx_stall_pos 6
+#define reg_ep5_tx_stall_len 1
+#define reg_ep5_tx_stall_lsb 0
+#define xd_p_reg_ep6_tx_stall   (*(volatile byte xdata *) 0xDD12)
+#define    p_reg_ep6_tx_stall   0xDD12
+#define reg_ep6_tx_stall_pos 7
+#define reg_ep6_tx_stall_len 1
+#define reg_ep6_tx_stall_lsb 0
+#define xd_p_reg_ep0_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep0_tx_nak 0xDD13
+#define reg_ep0_tx_nak_pos 0
+#define reg_ep0_tx_nak_len 1
+#define reg_ep0_tx_nak_lsb 0
+#define xd_p_reg_ep0_rx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep0_rx_nak 0xDD13
+#define reg_ep0_rx_nak_pos 1
+#define reg_ep0_rx_nak_len 1
+#define reg_ep0_rx_nak_lsb 0
+#define xd_p_reg_ep1_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep1_tx_nak 0xDD13
+#define reg_ep1_tx_nak_pos 2
+#define reg_ep1_tx_nak_len 1
+#define reg_ep1_tx_nak_lsb 0
+#define xd_p_reg_ep2_rx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep2_rx_nak 0xDD13
+#define reg_ep2_rx_nak_pos 3
+#define reg_ep2_rx_nak_len 1
+#define reg_ep2_rx_nak_lsb 0
+#define xd_p_reg_ep3_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep3_tx_nak 0xDD13
+#define reg_ep3_tx_nak_pos 4
+#define reg_ep3_tx_nak_len 1
+#define reg_ep3_tx_nak_lsb 0
+#define xd_p_reg_ep4_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep4_tx_nak 0xDD13
+#define reg_ep4_tx_nak_pos 5
+#define reg_ep4_tx_nak_len 1
+#define reg_ep4_tx_nak_lsb 0
+#define xd_p_reg_ep5_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep5_tx_nak 0xDD13
+#define reg_ep5_tx_nak_pos 6
+#define reg_ep5_tx_nak_len 1
+#define reg_ep5_tx_nak_lsb 0
+#define xd_p_reg_ep6_tx_nak (*(volatile byte xdata *) 0xDD13)
+#define    p_reg_ep6_tx_nak 0xDD13
+#define reg_ep6_tx_nak_pos 7
+#define reg_ep6_tx_nak_len 1
+#define reg_ep6_tx_nak_lsb 0
+#define xd_p_reg_ep0_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep0_tx_nak_int_en  0xDD14
+#define reg_ep0_tx_nak_int_en_pos 0
+#define reg_ep0_tx_nak_int_en_len 1
+#define reg_ep0_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep0_rx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep0_rx_nak_int_en  0xDD14
+#define reg_ep0_rx_nak_int_en_pos 1
+#define reg_ep0_rx_nak_int_en_len 1
+#define reg_ep0_rx_nak_int_en_lsb 0
+#define xd_p_reg_ep1_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep1_tx_nak_int_en  0xDD14
+#define reg_ep1_tx_nak_int_en_pos 2
+#define reg_ep1_tx_nak_int_en_len 1
+#define reg_ep1_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep2_rx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep2_rx_nak_int_en  0xDD14
+#define reg_ep2_rx_nak_int_en_pos 3
+#define reg_ep2_rx_nak_int_en_len 1
+#define reg_ep2_rx_nak_int_en_lsb 0
+#define xd_p_reg_ep3_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep3_tx_nak_int_en  0xDD14
+#define reg_ep3_tx_nak_int_en_pos 4
+#define reg_ep3_tx_nak_int_en_len 1
+#define reg_ep3_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep4_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep4_tx_nak_int_en  0xDD14
+#define reg_ep4_tx_nak_int_en_pos 5
+#define reg_ep4_tx_nak_int_en_len 1
+#define reg_ep4_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep5_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep5_tx_nak_int_en  0xDD14
+#define reg_ep5_tx_nak_int_en_pos 6
+#define reg_ep5_tx_nak_int_en_len 1
+#define reg_ep5_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep6_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
+#define    p_reg_ep6_tx_nak_int_en  0xDD14
+#define reg_ep6_tx_nak_int_en_pos 7
+#define reg_ep6_tx_nak_int_en_len 1
+#define reg_ep6_tx_nak_int_en_lsb 0
+#define xd_p_reg_ep0_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep0_tx_done_int_en 0xDD15
+#define reg_ep0_tx_done_int_en_pos 0
+#define reg_ep0_tx_done_int_en_len 1
+#define reg_ep0_tx_done_int_en_lsb 0
+#define xd_p_reg_ep0_rx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep0_rx_done_int_en 0xDD15
+#define reg_ep0_rx_done_int_en_pos 1
+#define reg_ep0_rx_done_int_en_len 1
+#define reg_ep0_rx_done_int_en_lsb 0
+#define xd_p_reg_ep1_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep1_tx_done_int_en 0xDD15
+#define reg_ep1_tx_done_int_en_pos 2
+#define reg_ep1_tx_done_int_en_len 1
+#define reg_ep1_tx_done_int_en_lsb 0
+#define xd_p_reg_ep2_rx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep2_rx_done_int_en 0xDD15
+#define reg_ep2_rx_done_int_en_pos 3
+#define reg_ep2_rx_done_int_en_len 1
+#define reg_ep2_rx_done_int_en_lsb 0
+#define xd_p_reg_ep3_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep3_tx_done_int_en 0xDD15
+#define reg_ep3_tx_done_int_en_pos 4
+#define reg_ep3_tx_done_int_en_len 1
+#define reg_ep3_tx_done_int_en_lsb 0
+#define xd_p_reg_ep4_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep4_tx_done_int_en 0xDD15
+#define reg_ep4_tx_done_int_en_pos 5
+#define reg_ep4_tx_done_int_en_len 1
+#define reg_ep4_tx_done_int_en_lsb 0
+#define xd_p_reg_ep5_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep5_tx_done_int_en 0xDD15
+#define reg_ep5_tx_done_int_en_pos 6
+#define reg_ep5_tx_done_int_en_len 1
+#define reg_ep5_tx_done_int_en_lsb 0
+#define xd_p_reg_ep6_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
+#define    p_reg_ep6_tx_done_int_en 0xDD15
+#define reg_ep6_tx_done_int_en_pos 7
+#define reg_ep6_tx_done_int_en_len 1
+#define reg_ep6_tx_done_int_en_lsb 0
+#define xd_p_reg_ep0_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep0_tx_fail_int_en 0xDD16
+#define reg_ep0_tx_fail_int_en_pos 0
+#define reg_ep0_tx_fail_int_en_len 1
+#define reg_ep0_tx_fail_int_en_lsb 0
+#define xd_p_reg_ep0_rx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep0_rx_fail_int_en 0xDD16
+#define reg_ep0_rx_fail_int_en_pos 1
+#define reg_ep0_rx_fail_int_en_len 1
+#define reg_ep0_rx_fail_int_en_lsb 0
+#define xd_p_reg_ep1_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep1_tx_fail_int_en 0xDD16
+#define reg_ep1_tx_fail_int_en_pos 2
+#define reg_ep1_tx_fail_int_en_len 1
+#define reg_ep1_tx_fail_int_en_lsb 0
+#define xd_p_reg_ep2_rx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep2_rx_fail_int_en 0xDD16
+#define reg_ep2_rx_fail_int_en_pos 3
+#define reg_ep2_rx_fail_int_en_len 1
+#define reg_ep2_rx_fail_int_en_lsb 0
+#define xd_p_reg_ep3_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep3_tx_fail_int_en 0xDD16
+#define reg_ep3_tx_fail_int_en_pos 4
+#define reg_ep3_tx_fail_int_en_len 1
+#define reg_ep3_tx_fail_int_en_lsb 0
+#define xd_p_reg_ep4_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep4_tx_fail_int_en 0xDD16
+#define reg_ep4_tx_fail_int_en_pos 5
+#define reg_ep4_tx_fail_int_en_len 1
+#define reg_ep4_tx_fail_int_en_lsb 0
+#define xd_p_reg_ep5_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep5_tx_fail_int_en 0xDD16
+#define reg_ep5_tx_fail_int_en_pos 6
+#define reg_ep5_tx_fail_int_en_len 1
+#define reg_ep5_tx_fail_int_en_lsb 0
+#define xd_p_reg_ep6_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
+#define    p_reg_ep6_tx_fail_int_en 0xDD16
+#define reg_ep6_tx_fail_int_en_pos 7
+#define reg_ep6_tx_fail_int_en_len 1
+#define reg_ep6_tx_fail_int_en_lsb 0
+#define xd_p_reg_suspend_int_en (*(volatile byte xdata *) 0xDD17)
+#define    p_reg_suspend_int_en 0xDD17
+#define reg_suspend_int_en_pos 0
+#define reg_suspend_int_en_len 1
+#define reg_suspend_int_en_lsb 0
+#define xd_p_reg_bus_reset_int_en   (*(volatile byte xdata *) 0xDD17)
+#define    p_reg_bus_reset_int_en   0xDD17
+#define reg_bus_reset_int_en_pos 1
+#define reg_bus_reset_int_en_len 1
+#define reg_bus_reset_int_en_lsb 0
+#define xd_p_reg_ep0_setup_int_en   (*(volatile byte xdata *) 0xDD17)
+#define    p_reg_ep0_setup_int_en   0xDD17
+#define reg_ep0_setup_int_en_pos 2
+#define reg_ep0_setup_int_en_len 1
+#define reg_ep0_setup_int_en_lsb 0
+#define xd_p_reg_ep0_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep0_tx_nak_int 0xDD18
+#define reg_ep0_tx_nak_int_pos 0
+#define reg_ep0_tx_nak_int_len 1
+#define reg_ep0_tx_nak_int_lsb 0
+#define xd_p_reg_ep0_rx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep0_rx_nak_int 0xDD18
+#define reg_ep0_rx_nak_int_pos 1
+#define reg_ep0_rx_nak_int_len 1
+#define reg_ep0_rx_nak_int_lsb 0
+#define xd_p_reg_ep1_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep1_tx_nak_int 0xDD18
+#define reg_ep1_tx_nak_int_pos 2
+#define reg_ep1_tx_nak_int_len 1
+#define reg_ep1_tx_nak_int_lsb 0
+#define xd_p_reg_ep2_rx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep2_rx_nak_int 0xDD18
+#define reg_ep2_rx_nak_int_pos 3
+#define reg_ep2_rx_nak_int_len 1
+#define reg_ep2_rx_nak_int_lsb 0
+#define xd_p_reg_ep3_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep3_tx_nak_int 0xDD18
+#define reg_ep3_tx_nak_int_pos 4
+#define reg_ep3_tx_nak_int_len 1
+#define reg_ep3_tx_nak_int_lsb 0
+#define xd_p_reg_ep4_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep4_tx_nak_int 0xDD18
+#define reg_ep4_tx_nak_int_pos 5
+#define reg_ep4_tx_nak_int_len 1
+#define reg_ep4_tx_nak_int_lsb 0
+#define xd_p_reg_ep5_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep5_tx_nak_int 0xDD18
+#define reg_ep5_tx_nak_int_pos 6
+#define reg_ep5_tx_nak_int_len 1
+#define reg_ep5_tx_nak_int_lsb 0
+#define xd_p_reg_ep6_tx_nak_int (*(volatile byte xdata *) 0xDD18)
+#define    p_reg_ep6_tx_nak_int 0xDD18
+#define reg_ep6_tx_nak_int_pos 7
+#define reg_ep6_tx_nak_int_len 1
+#define reg_ep6_tx_nak_int_lsb 0
+#define xd_p_reg_ep0_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep0_tx_done_int    0xDD19
+#define reg_ep0_tx_done_int_pos 0
+#define reg_ep0_tx_done_int_len 1
+#define reg_ep0_tx_done_int_lsb 0
+#define xd_p_reg_ep0_rx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep0_rx_done_int    0xDD19
+#define reg_ep0_rx_done_int_pos 1
+#define reg_ep0_rx_done_int_len 1
+#define reg_ep0_rx_done_int_lsb 0
+#define xd_p_reg_ep1_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep1_tx_done_int    0xDD19
+#define reg_ep1_tx_done_int_pos 2
+#define reg_ep1_tx_done_int_len 1
+#define reg_ep1_tx_done_int_lsb 0
+#define xd_p_reg_ep2_rx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep2_rx_done_int    0xDD19
+#define reg_ep2_rx_done_int_pos 3
+#define reg_ep2_rx_done_int_len 1
+#define reg_ep2_rx_done_int_lsb 0
+#define xd_p_reg_ep3_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep3_tx_done_int    0xDD19
+#define reg_ep3_tx_done_int_pos 4
+#define reg_ep3_tx_done_int_len 1
+#define reg_ep3_tx_done_int_lsb 0
+#define xd_p_reg_ep4_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep4_tx_done_int    0xDD19
+#define reg_ep4_tx_done_int_pos 5
+#define reg_ep4_tx_done_int_len 1
+#define reg_ep4_tx_done_int_lsb 0
+#define xd_p_reg_ep5_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep5_tx_done_int    0xDD19
+#define reg_ep5_tx_done_int_pos 6
+#define reg_ep5_tx_done_int_len 1
+#define reg_ep5_tx_done_int_lsb 0
+#define xd_p_reg_ep6_tx_done_int    (*(volatile byte xdata *) 0xDD19)
+#define    p_reg_ep6_tx_done_int    0xDD19
+#define reg_ep6_tx_done_int_pos 7
+#define reg_ep6_tx_done_int_len 1
+#define reg_ep6_tx_done_int_lsb 0
+#define xd_p_reg_ep0_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep0_tx_fail_int    0xDD1A
+#define reg_ep0_tx_fail_int_pos 0
+#define reg_ep0_tx_fail_int_len 1
+#define reg_ep0_tx_fail_int_lsb 0
+#define xd_p_reg_ep0_rx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep0_rx_fail_int    0xDD1A
+#define reg_ep0_rx_fail_int_pos 1
+#define reg_ep0_rx_fail_int_len 1
+#define reg_ep0_rx_fail_int_lsb 0
+#define xd_p_reg_ep1_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep1_tx_fail_int    0xDD1A
+#define reg_ep1_tx_fail_int_pos 2
+#define reg_ep1_tx_fail_int_len 1
+#define reg_ep1_tx_fail_int_lsb 0
+#define xd_p_reg_ep2_rx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep2_rx_fail_int    0xDD1A
+#define reg_ep2_rx_fail_int_pos 3
+#define reg_ep2_rx_fail_int_len 1
+#define reg_ep2_rx_fail_int_lsb 0
+#define xd_p_reg_ep3_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep3_tx_fail_int    0xDD1A
+#define reg_ep3_tx_fail_int_pos 4
+#define reg_ep3_tx_fail_int_len 1
+#define reg_ep3_tx_fail_int_lsb 0
+#define xd_p_reg_ep4_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep4_tx_fail_int    0xDD1A
+#define reg_ep4_tx_fail_int_pos 5
+#define reg_ep4_tx_fail_int_len 1
+#define reg_ep4_tx_fail_int_lsb 0
+#define xd_p_reg_ep5_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep5_tx_fail_int    0xDD1A
+#define reg_ep5_tx_fail_int_pos 6
+#define reg_ep5_tx_fail_int_len 1
+#define reg_ep5_tx_fail_int_lsb 0
+#define xd_p_reg_ep6_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
+#define    p_reg_ep6_tx_fail_int    0xDD1A
+#define reg_ep6_tx_fail_int_pos 7
+#define reg_ep6_tx_fail_int_len 1
+#define reg_ep6_tx_fail_int_lsb 0
+#define xd_p_reg_suspend_int    (*(volatile byte xdata *) 0xDD1B)
+#define    p_reg_suspend_int    0xDD1B
+#define reg_suspend_int_pos 0
+#define reg_suspend_int_len 1
+#define reg_suspend_int_lsb 0
+#define xd_p_reg_bus_reset_int  (*(volatile byte xdata *) 0xDD1B)
+#define    p_reg_bus_reset_int  0xDD1B
+#define reg_bus_reset_int_pos 1
+#define reg_bus_reset_int_len 1
+#define reg_bus_reset_int_lsb 0
+#define xd_p_reg_ep0_setup_int  (*(volatile byte xdata *) 0xDD1B)
+#define    p_reg_ep0_setup_int  0xDD1B
+#define reg_ep0_setup_int_pos 2
+#define reg_ep0_setup_int_len 1
+#define reg_ep0_setup_int_lsb 0
+#define xd_r_usbc_int   (*(volatile byte xdata *) 0xDD1B)
+#define    r_usbc_int   0xDD1B
+#define usbc_int_pos 3
+#define usbc_int_len 1
+#define usbc_int_lsb 0
+#define xd_r_usb_ir_int (*(volatile byte xdata *) 0xDD1B)
+#define    r_usb_ir_int 0xDD1B
+#define usb_ir_int_pos 4
+#define usb_ir_int_len 1
+#define usb_ir_int_lsb 0
+#define xd_p_reg_ep0_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep0_tx_rst 0xDD1D
+#define reg_ep0_tx_rst_pos 0
+#define reg_ep0_tx_rst_len 1
+#define reg_ep0_tx_rst_lsb 0
+#define xd_p_reg_ep0_rx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep0_rx_rst 0xDD1D
+#define reg_ep0_rx_rst_pos 1
+#define reg_ep0_rx_rst_len 1
+#define reg_ep0_rx_rst_lsb 0
+#define xd_p_reg_ep1_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep1_tx_rst 0xDD1D
+#define reg_ep1_tx_rst_pos 2
+#define reg_ep1_tx_rst_len 1
+#define reg_ep1_tx_rst_lsb 0
+#define xd_p_reg_ep2_rx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep2_rx_rst 0xDD1D
+#define reg_ep2_rx_rst_pos 3
+#define reg_ep2_rx_rst_len 1
+#define reg_ep2_rx_rst_lsb 0
+#define xd_p_reg_ep3_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep3_tx_rst 0xDD1D
+#define reg_ep3_tx_rst_pos 4
+#define reg_ep3_tx_rst_len 1
+#define reg_ep3_tx_rst_lsb 0
+#define xd_p_reg_ep4_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep4_tx_rst 0xDD1D
+#define reg_ep4_tx_rst_pos 5
+#define reg_ep4_tx_rst_len 1
+#define reg_ep4_tx_rst_lsb 0
+#define xd_p_reg_ep5_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep5_tx_rst 0xDD1D
+#define reg_ep5_tx_rst_pos 6
+#define reg_ep5_tx_rst_len 1
+#define reg_ep5_tx_rst_lsb 0
+#define xd_p_reg_ep6_tx_rst (*(volatile byte xdata *) 0xDD1D)
+#define    p_reg_ep6_tx_rst 0xDD1D
+#define reg_ep6_tx_rst_pos 7
+#define reg_ep6_tx_rst_len 1
+#define reg_ep6_tx_rst_lsb 0
+#define xd_r_reg_ep0_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep0_tx_active  0xDD1E
+#define reg_ep0_tx_active_pos 0
+#define reg_ep0_tx_active_len 1
+#define reg_ep0_tx_active_lsb 0
+#define xd_r_reg_ep0_rx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep0_rx_active  0xDD1E
+#define reg_ep0_rx_active_pos 1
+#define reg_ep0_rx_active_len 1
+#define reg_ep0_rx_active_lsb 0
+#define xd_r_reg_ep1_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep1_tx_active  0xDD1E
+#define reg_ep1_tx_active_pos 2
+#define reg_ep1_tx_active_len 1
+#define reg_ep1_tx_active_lsb 0
+#define xd_r_reg_ep2_rx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep2_rx_active  0xDD1E
+#define reg_ep2_rx_active_pos 3
+#define reg_ep2_rx_active_len 1
+#define reg_ep2_rx_active_lsb 0
+#define xd_r_reg_ep3_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep3_tx_active  0xDD1E
+#define reg_ep3_tx_active_pos 4
+#define reg_ep3_tx_active_len 1
+#define reg_ep3_tx_active_lsb 0
+#define xd_r_reg_ep4_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep4_tx_active  0xDD1E
+#define reg_ep4_tx_active_pos 5
+#define reg_ep4_tx_active_len 1
+#define reg_ep4_tx_active_lsb 0
+#define xd_r_reg_ep5_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep5_tx_active  0xDD1E
+#define reg_ep5_tx_active_pos 6
+#define reg_ep5_tx_active_len 1
+#define reg_ep5_tx_active_lsb 0
+#define xd_r_reg_ep6_tx_active  (*(volatile byte xdata *) 0xDD1E)
+#define    r_reg_ep6_tx_active  0xDD1E
+#define reg_ep6_tx_active_pos 7
+#define reg_ep6_tx_active_len 1
+#define reg_ep6_tx_active_lsb 0
+#define xd_p_reg_usb_setup_reset    (*(volatile byte xdata *) 0xDD1F)
+#define    p_reg_usb_setup_reset    0xDD1F
+#define reg_usb_setup_reset_pos 0
+#define reg_usb_setup_reset_len 1
+#define reg_usb_setup_reset_lsb 0
+#define xd_p_reg_usb_ep4_retry_new  (*(volatile byte xdata *) 0xDD1F)
+#define    p_reg_usb_ep4_retry_new  0xDD1F
+#define reg_usb_ep4_retry_new_pos 1
+#define reg_usb_ep4_retry_new_len 1
+#define reg_usb_ep4_retry_new_lsb 0
+#define xd_p_reg_usb_ep5_retry_new  (*(volatile byte xdata *) 0xDD1F)
+#define    p_reg_usb_ep5_retry_new  0xDD1F
+#define reg_usb_ep5_retry_new_pos 2
+#define reg_usb_ep5_retry_new_len 1
+#define reg_usb_ep5_retry_new_lsb 0
+#define xd_p_reg_usb_ep6_retry_new  (*(volatile byte xdata *) 0xDD1F)
+#define    p_reg_usb_ep6_retry_new  0xDD1F
+#define reg_usb_ep6_retry_new_pos 3
+#define reg_usb_ep6_retry_new_len 1
+#define reg_usb_ep6_retry_new_lsb 0
+#define xd_p_reg_usb_iso_mult_cnt   (*(volatile byte xdata *) 0xDD20)
+#define    p_reg_usb_iso_mult_cnt   0xDD20
+#define reg_usb_iso_mult_cnt_pos 0
+#define reg_usb_iso_mult_cnt_len 2
+#define reg_usb_iso_mult_cnt_lsb 0
+#define xd_p_reg_p_iso_fix_en   (*(volatile byte xdata *) 0xDD21)
+#define    p_reg_p_iso_fix_en   0xDD21
+#define reg_p_iso_fix_en_pos 0
+#define reg_p_iso_fix_en_len 1
+#define reg_p_iso_fix_en_lsb 0
+#define xd_p_reg_p_iso_fix_rst  (*(volatile byte xdata *) 0xDD22)
+#define    p_reg_p_iso_fix_rst  0xDD22
+#define reg_p_iso_fix_rst_pos 0
+#define reg_p_iso_fix_rst_len 1
+#define reg_p_iso_fix_rst_lsb 0
+#define xd_p_reg_p_read_point_7_0   (*(volatile byte xdata *) 0xDD23)
+#define    p_reg_p_read_point_7_0   0xDD23
+#define reg_p_read_point_7_0_pos 0
+#define reg_p_read_point_7_0_len 8
+#define reg_p_read_point_7_0_lsb 0
+#define xd_p_reg_p_read_point_11_8  (*(volatile byte xdata *) 0xDD24)
+#define    p_reg_p_read_point_11_8  0xDD24
+#define reg_p_read_point_11_8_pos 0
+#define reg_p_read_point_11_8_len 4
+#define reg_p_read_point_11_8_lsb 8
+#define xd_p_reg_p_dbg_ctrl (*(volatile byte xdata *) 0xDD25)
+#define    p_reg_p_dbg_ctrl 0xDD25
+#define reg_p_dbg_ctrl_pos 0
+#define reg_p_dbg_ctrl_len 3
+#define reg_p_dbg_ctrl_lsb 0
+#define xd_p_reg_p_data_swap    (*(volatile byte xdata *) 0xDD26)
+#define    p_reg_p_data_swap    0xDD26
+#define reg_p_data_swap_pos 0
+#define reg_p_data_swap_len 2
+#define reg_p_data_swap_lsb 0
+#define xd_p_reg_ep_rx_addr (*(volatile byte xdata *) 0xDD80)
+#define    p_reg_ep_rx_addr 0xDD80
+#define reg_ep_rx_addr_pos 2
+#define reg_ep_rx_addr_len 6
+#define reg_ep_rx_addr_lsb 0
+#define xd_p_reg_ep0_tx_addr    (*(volatile byte xdata *) 0xDD81)
+#define    p_reg_ep0_tx_addr    0xDD81
+#define reg_ep0_tx_addr_pos 2
+#define reg_ep0_tx_addr_len 6
+#define reg_ep0_tx_addr_lsb 0
+#define xd_p_reg_ep1_tx_addr    (*(volatile byte xdata *) 0xDD82)
+#define    p_reg_ep1_tx_addr    0xDD82
+#define reg_ep1_tx_addr_pos 2
+#define reg_ep1_tx_addr_len 6
+#define reg_ep1_tx_addr_lsb 0
+#define xd_p_reg_ep3_tx_addr    (*(volatile byte xdata *) 0xDD83)
+#define    p_reg_ep3_tx_addr    0xDD83
+#define reg_ep3_tx_addr_pos 2
+#define reg_ep3_tx_addr_len 6
+#define reg_ep3_tx_addr_lsb 0
+#define xd_p_reg_ep_rx_len  (*(volatile byte xdata *) 0xDD84)
+#define    p_reg_ep_rx_len  0xDD84
+#define reg_ep_rx_len_pos 0
+#define reg_ep_rx_len_len 8
+#define reg_ep_rx_len_lsb 0
+#define xd_p_reg_ep0_tx_len (*(volatile byte xdata *) 0xDD85)
+#define    p_reg_ep0_tx_len 0xDD85
+#define reg_ep0_tx_len_pos 0
+#define reg_ep0_tx_len_len 8
+#define reg_ep0_tx_len_lsb 0
+#define xd_p_reg_ep1_tx_len (*(volatile byte xdata *) 0xDD86)
+#define    p_reg_ep1_tx_len 0xDD86
+#define reg_ep1_tx_len_pos 0
+#define reg_ep1_tx_len_len 8
+#define reg_ep1_tx_len_lsb 0
+#define xd_p_reg_ep3_tx_len (*(volatile byte xdata *) 0xDD87)
+#define    p_reg_ep3_tx_len 0xDD87
+#define reg_ep3_tx_len_pos 0
+#define reg_ep3_tx_len_len 8
+#define reg_ep3_tx_len_lsb 0
+#define xd_p_reg_ep4_tx_len_7_0 (*(volatile byte xdata *) 0xDD88)
+#define    p_reg_ep4_tx_len_7_0 0xDD88
+#define reg_ep4_tx_len_7_0_pos 0
+#define reg_ep4_tx_len_7_0_len 8
+#define reg_ep4_tx_len_7_0_lsb 0
+#define xd_p_reg_ep4_tx_len_15_8    (*(volatile byte xdata *) 0xDD89)
+#define    p_reg_ep4_tx_len_15_8    0xDD89
+#define reg_ep4_tx_len_15_8_pos 0
+#define reg_ep4_tx_len_15_8_len 8
+#define reg_ep4_tx_len_15_8_lsb 8
+#define xd_p_reg_ep5_tx_len_7_0 (*(volatile byte xdata *) 0xDD8A)
+#define    p_reg_ep5_tx_len_7_0 0xDD8A
+#define reg_ep5_tx_len_7_0_pos 0
+#define reg_ep5_tx_len_7_0_len 8
+#define reg_ep5_tx_len_7_0_lsb 0
+#define xd_p_reg_ep5_tx_len_15_8    (*(volatile byte xdata *) 0xDD8B)
+#define    p_reg_ep5_tx_len_15_8    0xDD8B
+#define reg_ep5_tx_len_15_8_pos 0
+#define reg_ep5_tx_len_15_8_len 8
+#define reg_ep5_tx_len_15_8_lsb 8
+#define xd_p_reg_usb_reset_addr (*(volatile byte xdata *) 0xDD8C)
+#define    p_reg_usb_reset_addr 0xDD8C
+#define reg_usb_reset_addr_pos 0
+#define reg_usb_reset_addr_len 7
+#define reg_usb_reset_addr_lsb 0
+#define xd_p_reg_usb_reset  (*(volatile byte xdata *) 0xDD8C)
+#define    p_reg_usb_reset  0xDD8C
+#define reg_usb_reset_pos 7
+#define reg_usb_reset_len 1
+#define reg_usb_reset_lsb 0
+#define xd_p_reg_usb_sync_in    (*(volatile byte xdata *) 0xDD8D)
+#define    p_reg_usb_sync_in    0xDD8D
+#define reg_usb_sync_in_pos 0
+#define reg_usb_sync_in_len 1
+#define reg_usb_sync_in_lsb 0
+#define xd_p_reg_usb_sync_txready   (*(volatile byte xdata *) 0xDD8D)
+#define    p_reg_usb_sync_txready   0xDD8D
+#define reg_usb_sync_txready_pos 1
+#define reg_usb_sync_txready_len 1
+#define reg_usb_sync_txready_lsb 0
+#define xd_p_reg_utmi_phy_suspend   (*(volatile byte xdata *) 0xDD8D)
+#define    p_reg_utmi_phy_suspend   0xDD8D
+#define reg_utmi_phy_suspend_pos 2
+#define reg_utmi_phy_suspend_len 1
+#define reg_utmi_phy_suspend_lsb 0
+#define xd_p_reg_usb_min_len    (*(volatile byte xdata *) 0xDD8D)
+#define    p_reg_usb_min_len    0xDD8D
+#define reg_usb_min_len_pos 3
+#define reg_usb_min_len_len 1
+#define reg_usb_min_len_lsb 0
+#define xd_p_reg_usb_phy_clksel (*(volatile byte xdata *) 0xDD8D)
+#define    p_reg_usb_phy_clksel 0xDD8D
+#define reg_usb_phy_clksel_pos 4
+#define reg_usb_phy_clksel_len 1
+#define reg_usb_phy_clksel_lsb 0
+#define xd_p_reg_ep6_tx_len_7_0 (*(volatile byte xdata *) 0xDD8E)
+#define    p_reg_ep6_tx_len_7_0 0xDD8E
+#define reg_ep6_tx_len_7_0_pos 0
+#define reg_ep6_tx_len_7_0_len 8
+#define reg_ep6_tx_len_7_0_lsb 0
+#define xd_p_reg_ep6_tx_len_15_8    (*(volatile byte xdata *) 0xDD8F)
+#define    p_reg_ep6_tx_len_15_8    0xDD8F
+#define reg_ep6_tx_len_15_8_pos 0
+#define reg_ep6_tx_len_15_8_len 8
+#define reg_ep6_tx_len_15_8_lsb 8
+#define xd_p_reg_usb_clk_phase  (*(volatile byte xdata *) 0xDD93)
+#define    p_reg_usb_clk_phase  0xDD93
+#define reg_usb_clk_phase_pos 0
+#define reg_usb_clk_phase_len 2
+#define reg_usb_clk_phase_lsb 0
+#define xd_p_reg_usb_clk_sel    (*(volatile byte xdata *) 0xDD93)
+#define    p_reg_usb_clk_sel    0xDD93
+#define reg_usb_clk_sel_pos 4
+#define reg_usb_clk_sel_len 4
+#define reg_usb_clk_sel_lsb 0
+#define xd_p_reg_usb_fifo_ptr   (*(volatile byte xdata *) 0xDD94)
+#define    p_reg_usb_fifo_ptr   0xDD94
+#define reg_usb_fifo_ptr_pos 0
+#define reg_usb_fifo_ptr_len 3
+#define reg_usb_fifo_ptr_lsb 0
+#define xd_p_reg_usb_fifo_byte  (*(volatile byte xdata *) 0xDD94)
+#define    p_reg_usb_fifo_byte  0xDD94
+#define reg_usb_fifo_byte_pos 3
+#define reg_usb_fifo_byte_len 2
+#define reg_usb_fifo_byte_lsb 0
+#define xd_p_reg_usb_fifo_sys   (*(volatile byte xdata *) 0xDD94)
+#define    p_reg_usb_fifo_sys   0xDD94
+#define reg_usb_fifo_sys_pos 5
+#define reg_usb_fifo_sys_len 1
+#define reg_usb_fifo_sys_lsb 0
+#define xd_p_usbdma_utmi_d_ctl_7_0  (*(volatile byte xdata *) 0xDD9E)
+#define    p_usbdma_utmi_d_ctl_7_0  0xDD9E
+#define usbdma_utmi_d_ctl_7_0_pos 0
+#define usbdma_utmi_d_ctl_7_0_len 8
+#define usbdma_utmi_d_ctl_7_0_lsb 0
+#define xd_p_usbdma_utmi_d_ctl_13_8 (*(volatile byte xdata *) 0xDD9F)
+#define    p_usbdma_utmi_d_ctl_13_8 0xDD9F
+#define usbdma_utmi_d_ctl_13_8_pos 0
+#define usbdma_utmi_d_ctl_13_8_len 6
+#define usbdma_utmi_d_ctl_13_8_lsb 8
+#define xd_p_usbdma_utmi_a_ctl_7_0  (*(volatile byte xdata *) 0xDDA0)
+#define    p_usbdma_utmi_a_ctl_7_0  0xDDA0
+#define usbdma_utmi_a_ctl_7_0_pos 0
+#define usbdma_utmi_a_ctl_7_0_len 8
+#define usbdma_utmi_a_ctl_7_0_lsb 0
+#define xd_p_usbdma_utmi_a_ctl_15_8 (*(volatile byte xdata *) 0xDDA1)
+#define    p_usbdma_utmi_a_ctl_15_8 0xDDA1
+#define usbdma_utmi_a_ctl_15_8_pos 0
+#define usbdma_utmi_a_ctl_15_8_len 8
+#define usbdma_utmi_a_ctl_15_8_lsb 8
+#define xd_p_usbdma_utmi_a_ctl_23_16    (*(volatile byte xdata *) 0xDDA2)
+#define    p_usbdma_utmi_a_ctl_23_16    0xDDA2
+#define usbdma_utmi_a_ctl_23_16_pos 0
+#define usbdma_utmi_a_ctl_23_16_len 8
+#define usbdma_utmi_a_ctl_23_16_lsb 16
+#define xd_p_usbdma_utmi_a_ctl_31_24    (*(volatile byte xdata *) 0xDDA3)
+#define    p_usbdma_utmi_a_ctl_31_24    0xDDA3
+#define usbdma_utmi_a_ctl_31_24_pos 0
+#define usbdma_utmi_a_ctl_31_24_len 8
+#define usbdma_utmi_a_ctl_31_24_lsb 24
+#define xd_p_usbdma_utmi_a_ctl_39_32    (*(volatile byte xdata *) 0xDDA4)
+#define    p_usbdma_utmi_a_ctl_39_32    0xDDA4
+#define usbdma_utmi_a_ctl_39_32_pos 0
+#define usbdma_utmi_a_ctl_39_32_len 8
+#define usbdma_utmi_a_ctl_39_32_lsb 32
+#define xd_p_usbdma_utmi_a_ctl_47_40    (*(volatile byte xdata *) 0xDDA5)
+#define    p_usbdma_utmi_a_ctl_47_40    0xDDA5
+#define usbdma_utmi_a_ctl_47_40_pos 0
+#define usbdma_utmi_a_ctl_47_40_len 8
+#define usbdma_utmi_a_ctl_47_40_lsb 40
+#define xd_p_usbdma_utmi_pwrmode    (*(volatile byte xdata *) 0xDDA6)
+#define    p_usbdma_utmi_pwrmode    0xDDA6
+#define usbdma_utmi_pwrmode_pos 3
+#define usbdma_utmi_pwrmode_len 1
+#define usbdma_utmi_pwrmode_lsb 0
+#define xd_p_usbdma_utmi_test_out   (*(volatile byte xdata *) 0xDDA6)
+#define    p_usbdma_utmi_test_out   0xDDA6
+#define usbdma_utmi_test_out_pos 4
+#define usbdma_utmi_test_out_len 1
+#define usbdma_utmi_test_out_lsb 0
+#define xd_p_usbdma_utmi_vbus_int_en    (*(volatile byte xdata *) 0xDDA7)
+#define    p_usbdma_utmi_vbus_int_en    0xDDA7
+#define usbdma_utmi_vbus_int_en_pos 0
+#define usbdma_utmi_vbus_int_en_len 1
+#define usbdma_utmi_vbus_int_en_lsb 0
+#define xd_p_usbdma_utmi_vbus_int_pol   (*(volatile byte xdata *) 0xDDA7)
+#define    p_usbdma_utmi_vbus_int_pol   0xDDA7
+#define usbdma_utmi_vbus_int_pol_pos 1
+#define usbdma_utmi_vbus_int_pol_len 1
+#define usbdma_utmi_vbus_int_pol_lsb 0
+#define xd_r_usbdma_utmi_vbus_int   (*(volatile byte xdata *) 0xDDA8)
+#define    r_usbdma_utmi_vbus_int   0xDDA8
+#define usbdma_utmi_vbus_int_pos 0
+#define usbdma_utmi_vbus_int_len 1
+#define usbdma_utmi_vbus_int_lsb 0
+#define xd_r_usbdma_utmi_vbus_status    (*(volatile byte xdata *) 0xDDA8)
+#define    r_usbdma_utmi_vbus_status    0xDDA8
+#define usbdma_utmi_vbus_status_pos 1
+#define usbdma_utmi_vbus_status_len 1
+#define usbdma_utmi_vbus_status_lsb 0
+#define xd_r_usbdma_utmi_clkrdy (*(volatile byte xdata *) 0xDDA8)
+#define    r_usbdma_utmi_clkrdy 0xDDA8
+#define usbdma_utmi_clkrdy_pos 2
+#define usbdma_utmi_clkrdy_len 1
+#define usbdma_utmi_clkrdy_lsb 0
+#define xd_p_reg_p_usb_iso_ccir_rst (*(volatile byte xdata *) 0xDDA9)
+#define    p_reg_p_usb_iso_ccir_rst 0xDDA9
+#define reg_p_usb_iso_ccir_rst_pos 0
+#define reg_p_usb_iso_ccir_rst_len 1
+#define reg_p_usb_iso_ccir_rst_lsb 0
+#define xd_p_reg_p_usb_iso_ccir (*(volatile byte xdata *) 0xDDA9)
+#define    p_reg_p_usb_iso_ccir 0xDDA9
+#define reg_p_usb_iso_ccir_pos 1
+#define reg_p_usb_iso_ccir_len 1
+#define reg_p_usb_iso_ccir_lsb 0
+#define xd_p_reg_p_ccir_fix_en  (*(volatile byte xdata *) 0xDDAA)
+#define    p_reg_p_ccir_fix_en  0xDDAA
+#define reg_p_ccir_fix_en_pos 0
+#define reg_p_ccir_fix_en_len 1
+#define reg_p_ccir_fix_en_lsb 0
+#define xd_p_ir_sys_clk (*(volatile byte xdata *) 0xDF80)
+#define    p_ir_sys_clk 0xDF80
+#define ir_sys_clk_pos 0
+#define ir_sys_clk_len 8
+#define ir_sys_clk_lsb 0
+#define xd_p_ir_sample_clk  (*(volatile byte xdata *) 0xDF81)
+#define    p_ir_sample_clk  0xDF81
+#define ir_sample_clk_pos 0
+#define ir_sample_clk_len 2
+#define ir_sample_clk_lsb 0
+#define xd_p_ir_idle_polarity   (*(volatile byte xdata *) 0xDF81)
+#define    p_ir_idle_polarity   0xDF81
+#define ir_idle_polarity_pos 2
+#define ir_idle_polarity_len 1
+#define ir_idle_polarity_lsb 0
+#define xd_p_ir_fifo_ovfl   (*(volatile byte xdata *) 0xDF82)
+#define    p_ir_fifo_ovfl   0xDF82
+#define ir_fifo_ovfl_pos 0
+#define ir_fifo_ovfl_len 1
+#define ir_fifo_ovfl_lsb 0
+#define xd_r_ir_fifo_empty  (*(volatile byte xdata *) 0xDF82)
+#define    r_ir_fifo_empty  0xDF82
+#define ir_fifo_empty_pos 1
+#define ir_fifo_empty_len 1
+#define ir_fifo_empty_lsb 0
+#define xd_r_ir_fifo_cnt    (*(volatile byte xdata *) 0xDF82)
+#define    r_ir_fifo_cnt    0xDF82
+#define ir_fifo_cnt_pos 2
+#define ir_fifo_cnt_len 3
+#define ir_fifo_cnt_lsb 0
+#define xd_p_ir_fifo_rst    (*(volatile byte xdata *) 0xDF82)
+#define    p_ir_fifo_rst    0xDF82
+#define ir_fifo_rst_pos 5
+#define ir_fifo_rst_len 1
+#define ir_fifo_rst_lsb 0
+#define xd_p_reg_ir_out_th0_7_0 (*(volatile byte xdata *) 0xDF84)
+#define    p_reg_ir_out_th0_7_0 0xDF84
+#define reg_ir_out_th0_7_0_pos 0
+#define reg_ir_out_th0_7_0_len 8
+#define reg_ir_out_th0_7_0_lsb 0
+#define xd_p_reg_ir_out_th0_14_8    (*(volatile byte xdata *) 0xDF85)
+#define    p_reg_ir_out_th0_14_8    0xDF85
+#define reg_ir_out_th0_14_8_pos 0
+#define reg_ir_out_th0_14_8_len 7
+#define reg_ir_out_th0_14_8_lsb 8
+#define xd_p_reg_ir_out_th1_7_0 (*(volatile byte xdata *) 0xDF86)
+#define    p_reg_ir_out_th1_7_0 0xDF86
+#define reg_ir_out_th1_7_0_pos 0
+#define reg_ir_out_th1_7_0_len 8
+#define reg_ir_out_th1_7_0_lsb 0
+#define xd_p_reg_ir_out_th1_14_8    (*(volatile byte xdata *) 0xDF87)
+#define    p_reg_ir_out_th1_14_8    0xDF87
+#define reg_ir_out_th1_14_8_pos 0
+#define reg_ir_out_th1_14_8_len 7
+#define reg_ir_out_th1_14_8_lsb 8
+#define xd_p_reg_ir_out_th2_7_0 (*(volatile byte xdata *) 0xDF88)
+#define    p_reg_ir_out_th2_7_0 0xDF88
+#define reg_ir_out_th2_7_0_pos 0
+#define reg_ir_out_th2_7_0_len 8
+#define reg_ir_out_th2_7_0_lsb 0
+#define xd_p_reg_ir_out_th2_14_8    (*(volatile byte xdata *) 0xDF89)
+#define    p_reg_ir_out_th2_14_8    0xDF89
+#define reg_ir_out_th2_14_8_pos 0
+#define reg_ir_out_th2_14_8_len 7
+#define reg_ir_out_th2_14_8_lsb 8
+#define xd_p_reg_ir_out_th3_7_0 (*(volatile byte xdata *) 0xDF8A)
+#define    p_reg_ir_out_th3_7_0 0xDF8A
+#define reg_ir_out_th3_7_0_pos 0
+#define reg_ir_out_th3_7_0_len 8
+#define reg_ir_out_th3_7_0_lsb 0
+#define xd_p_reg_ir_out_th3_14_8    (*(volatile byte xdata *) 0xDF8B)
+#define    p_reg_ir_out_th3_14_8    0xDF8B
+#define reg_ir_out_th3_14_8_pos 0
+#define reg_ir_out_th3_14_8_len 7
+#define reg_ir_out_th3_14_8_lsb 8
+#define xd_p_reg_ir_out_th4_7_0 (*(volatile byte xdata *) 0xDF8C)
+#define    p_reg_ir_out_th4_7_0 0xDF8C
+#define reg_ir_out_th4_7_0_pos 0
+#define reg_ir_out_th4_7_0_len 8
+#define reg_ir_out_th4_7_0_lsb 0
+#define xd_p_reg_ir_out_th4_14_8    (*(volatile byte xdata *) 0xDF8D)
+#define    p_reg_ir_out_th4_14_8    0xDF8D
+#define reg_ir_out_th4_14_8_pos 0
+#define reg_ir_out_th4_14_8_len 7
+#define reg_ir_out_th4_14_8_lsb 8
+#define xd_p_reg_ir_out_th5_7_0 (*(volatile byte xdata *) 0xDF8E)
+#define    p_reg_ir_out_th5_7_0 0xDF8E
+#define reg_ir_out_th5_7_0_pos 0
+#define reg_ir_out_th5_7_0_len 8
+#define reg_ir_out_th5_7_0_lsb 0
+#define xd_p_reg_ir_out_th5_14_8    (*(volatile byte xdata *) 0xDF8F)
+#define    p_reg_ir_out_th5_14_8    0xDF8F
+#define reg_ir_out_th5_14_8_pos 0
+#define reg_ir_out_th5_14_8_len 7
+#define reg_ir_out_th5_14_8_lsb 8
+#define xd_p_reg_ir_out_th6_7_0 (*(volatile byte xdata *) 0xDF90)
+#define    p_reg_ir_out_th6_7_0 0xDF90
+#define reg_ir_out_th6_7_0_pos 0
+#define reg_ir_out_th6_7_0_len 8
+#define reg_ir_out_th6_7_0_lsb 0
+#define xd_p_reg_ir_out_th6_14_8    (*(volatile byte xdata *) 0xDF91)
+#define    p_reg_ir_out_th6_14_8    0xDF91
+#define reg_ir_out_th6_14_8_pos 0
+#define reg_ir_out_th6_14_8_len 7
+#define reg_ir_out_th6_14_8_lsb 8
+#define xd_p_reg_ir_out_th7_7_0 (*(volatile byte xdata *) 0xDF92)
+#define    p_reg_ir_out_th7_7_0 0xDF92
+#define reg_ir_out_th7_7_0_pos 0
+#define reg_ir_out_th7_7_0_len 8
+#define reg_ir_out_th7_7_0_lsb 0
+#define xd_p_reg_ir_out_th7_14_8    (*(volatile byte xdata *) 0xDF93)
+#define    p_reg_ir_out_th7_14_8    0xDF93
+#define reg_ir_out_th7_14_8_pos 0
+#define reg_ir_out_th7_14_8_len 7
+#define reg_ir_out_th7_14_8_lsb 8
+#define xd_p_reg_ir_out_th8_7_0 (*(volatile byte xdata *) 0xDF94)
+#define    p_reg_ir_out_th8_7_0 0xDF94
+#define reg_ir_out_th8_7_0_pos 0
+#define reg_ir_out_th8_7_0_len 8
+#define reg_ir_out_th8_7_0_lsb 0
+#define xd_p_reg_ir_out_th8_14_8    (*(volatile byte xdata *) 0xDF95)
+#define    p_reg_ir_out_th8_14_8    0xDF95
+#define reg_ir_out_th8_14_8_pos 0
+#define reg_ir_out_th8_14_8_len 7
+#define reg_ir_out_th8_14_8_lsb 8
+#define xd_p_reg_ir_out_th9_7_0 (*(volatile byte xdata *) 0xDF96)
+#define    p_reg_ir_out_th9_7_0 0xDF96
+#define reg_ir_out_th9_7_0_pos 0
+#define reg_ir_out_th9_7_0_len 8
+#define reg_ir_out_th9_7_0_lsb 0
+#define xd_p_reg_ir_out_th9_14_8    (*(volatile byte xdata *) 0xDF97)
+#define    p_reg_ir_out_th9_14_8    0xDF97
+#define reg_ir_out_th9_14_8_pos 0
+#define reg_ir_out_th9_14_8_len 7
+#define reg_ir_out_th9_14_8_lsb 8
+#define xd_p_reg_ir_out_th10_7_0    (*(volatile byte xdata *) 0xDF98)
+#define    p_reg_ir_out_th10_7_0    0xDF98
+#define reg_ir_out_th10_7_0_pos 0
+#define reg_ir_out_th10_7_0_len 8
+#define reg_ir_out_th10_7_0_lsb 0
+#define xd_p_reg_ir_out_th10_14_8   (*(volatile byte xdata *) 0xDF99)
+#define    p_reg_ir_out_th10_14_8   0xDF99
+#define reg_ir_out_th10_14_8_pos 0
+#define reg_ir_out_th10_14_8_len 7
+#define reg_ir_out_th10_14_8_lsb 8
+#define xd_p_reg_ir_out_th11_7_0    (*(volatile byte xdata *) 0xDF9A)
+#define    p_reg_ir_out_th11_7_0    0xDF9A
+#define reg_ir_out_th11_7_0_pos 0
+#define reg_ir_out_th11_7_0_len 8
+#define reg_ir_out_th11_7_0_lsb 0
+#define xd_p_reg_ir_out_th11_14_8   (*(volatile byte xdata *) 0xDF9B)
+#define    p_reg_ir_out_th11_14_8   0xDF9B
+#define reg_ir_out_th11_14_8_pos 0
+#define reg_ir_out_th11_14_8_len 7
+#define reg_ir_out_th11_14_8_lsb 8
+#define xd_p_reg_ir_out_th12_7_0    (*(volatile byte xdata *) 0xDF9C)
+#define    p_reg_ir_out_th12_7_0    0xDF9C
+#define reg_ir_out_th12_7_0_pos 0
+#define reg_ir_out_th12_7_0_len 8
+#define reg_ir_out_th12_7_0_lsb 0
+#define xd_p_reg_ir_out_th12_14_8   (*(volatile byte xdata *) 0xDF9D)
+#define    p_reg_ir_out_th12_14_8   0xDF9D
+#define reg_ir_out_th12_14_8_pos 0
+#define reg_ir_out_th12_14_8_len 7
+#define reg_ir_out_th12_14_8_lsb 8
+#define xd_p_reg_ir_out_th13_7_0    (*(volatile byte xdata *) 0xDF9E)
+#define    p_reg_ir_out_th13_7_0    0xDF9E
+#define reg_ir_out_th13_7_0_pos 0
+#define reg_ir_out_th13_7_0_len 8
+#define reg_ir_out_th13_7_0_lsb 0
+#define xd_p_reg_ir_out_th13_14_8   (*(volatile byte xdata *) 0xDF9F)
+#define    p_reg_ir_out_th13_14_8   0xDF9F
+#define reg_ir_out_th13_14_8_pos 0
+#define reg_ir_out_th13_14_8_len 7
+#define reg_ir_out_th13_14_8_lsb 8
+#define xd_p_reg_ir_out_th14_7_0    (*(volatile byte xdata *) 0xDFA0)
+#define    p_reg_ir_out_th14_7_0    0xDFA0
+#define reg_ir_out_th14_7_0_pos 0
+#define reg_ir_out_th14_7_0_len 8
+#define reg_ir_out_th14_7_0_lsb 0
+#define xd_p_reg_ir_out_th14_14_8   (*(volatile byte xdata *) 0xDFA1)
+#define    p_reg_ir_out_th14_14_8   0xDFA1
+#define reg_ir_out_th14_14_8_pos 0
+#define reg_ir_out_th14_14_8_len 7
+#define reg_ir_out_th14_14_8_lsb 8
+#define xd_p_reg_tuner_data_7_0 (*(volatile byte xdata *) 0xF000)
+#define    p_reg_tuner_data_7_0 0xF000
+#define reg_tuner_data_7_0_pos 0
+#define reg_tuner_data_7_0_len 8
+#define reg_tuner_data_7_0_lsb 0
+#define xd_p_reg_tuner_data_15_8    (*(volatile byte xdata *) 0xF001)
+#define    p_reg_tuner_data_15_8    0xF001
+#define reg_tuner_data_15_8_pos 0
+#define reg_tuner_data_15_8_len 8
+#define reg_tuner_data_15_8_lsb 8
+#define xd_p_reg_tuner_data_23_16   (*(volatile byte xdata *) 0xF002)
+#define    p_reg_tuner_data_23_16   0xF002
+#define reg_tuner_data_23_16_pos 0
+#define reg_tuner_data_23_16_len 8
+#define reg_tuner_data_23_16_lsb 16
+#define xd_p_reg_tuner_data_31_24   (*(volatile byte xdata *) 0xF003)
+#define    p_reg_tuner_data_31_24   0xF003
+#define reg_tuner_data_31_24_pos 0
+#define reg_tuner_data_31_24_len 8
+#define reg_tuner_data_31_24_lsb 24
+#define xd_p_reg_tuner_data_39_32   (*(volatile byte xdata *) 0xF004)
+#define    p_reg_tuner_data_39_32   0xF004
+#define reg_tuner_data_39_32_pos 0
+#define reg_tuner_data_39_32_len 8
+#define reg_tuner_data_39_32_lsb 32
+#define xd_p_reg_tuner_data_47_40   (*(volatile byte xdata *) 0xF005)
+#define    p_reg_tuner_data_47_40   0xF005
+#define reg_tuner_data_47_40_pos 0
+#define reg_tuner_data_47_40_len 8
+#define reg_tuner_data_47_40_lsb 40
+#define xd_p_reg_tuner_data_55_48   (*(volatile byte xdata *) 0xF006)
+#define    p_reg_tuner_data_55_48   0xF006
+#define reg_tuner_data_55_48_pos 0
+#define reg_tuner_data_55_48_len 8
+#define reg_tuner_data_55_48_lsb 48
+#define xd_p_reg_tuner_data_63_56   (*(volatile byte xdata *) 0xF007)
+#define    p_reg_tuner_data_63_56   0xF007
+#define reg_tuner_data_63_56_pos 0
+#define reg_tuner_data_63_56_len 8
+#define reg_tuner_data_63_56_lsb 56
+#define xd_p_reg_tuner_data_71_64   (*(volatile byte xdata *) 0xF008)
+#define    p_reg_tuner_data_71_64   0xF008
+#define reg_tuner_data_71_64_pos 0
+#define reg_tuner_data_71_64_len 8
+#define reg_tuner_data_71_64_lsb 64
+#define xd_p_reg_tuner_data_79_72   (*(volatile byte xdata *) 0xF009)
+#define    p_reg_tuner_data_79_72   0xF009
+#define reg_tuner_data_79_72_pos 0
+#define reg_tuner_data_79_72_len 8
+#define reg_tuner_data_79_72_lsb 72
+#define xd_p_reg_tuner_data_87_80   (*(volatile byte xdata *) 0xF00A)
+#define    p_reg_tuner_data_87_80   0xF00A
+#define reg_tuner_data_87_80_pos 0
+#define reg_tuner_data_87_80_len 8
+#define reg_tuner_data_87_80_lsb 80
+#define xd_p_reg_tuner_data_95_88   (*(volatile byte xdata *) 0xF00B)
+#define    p_reg_tuner_data_95_88   0xF00B
+#define reg_tuner_data_95_88_pos 0
+#define reg_tuner_data_95_88_len 8
+#define reg_tuner_data_95_88_lsb 88
+#define xd_p_reg_tuner_data_103_96  (*(volatile byte xdata *) 0xF00C)
+#define    p_reg_tuner_data_103_96  0xF00C
+#define reg_tuner_data_103_96_pos 0
+#define reg_tuner_data_103_96_len 8
+#define reg_tuner_data_103_96_lsb 96
+#define xd_p_reg_tuner_data_111_104 (*(volatile byte xdata *) 0xF00D)
+#define    p_reg_tuner_data_111_104 0xF00D
+#define reg_tuner_data_111_104_pos 0
+#define reg_tuner_data_111_104_len 8
+#define reg_tuner_data_111_104_lsb 104
+#define xd_p_reg_tuner_data_119_112 (*(volatile byte xdata *) 0xF00E)
+#define    p_reg_tuner_data_119_112 0xF00E
+#define reg_tuner_data_119_112_pos 0
+#define reg_tuner_data_119_112_len 8
+#define reg_tuner_data_119_112_lsb 112
+#define xd_p_reg_tuner_data_127_120 (*(volatile byte xdata *) 0xF00F)
+#define    p_reg_tuner_data_127_120 0xF00F
+#define reg_tuner_data_127_120_pos 0
+#define reg_tuner_data_127_120_len 8
+#define reg_tuner_data_127_120_lsb 120
+#define xd_p_reg_tuner_data_135_128 (*(volatile byte xdata *) 0xF010)
+#define    p_reg_tuner_data_135_128 0xF010
+#define reg_tuner_data_135_128_pos 0
+#define reg_tuner_data_135_128_len 8
+#define reg_tuner_data_135_128_lsb 128
+#define xd_p_reg_tuner_data_143_136 (*(volatile byte xdata *) 0xF011)
+#define    p_reg_tuner_data_143_136 0xF011
+#define reg_tuner_data_143_136_pos 0
+#define reg_tuner_data_143_136_len 8
+#define reg_tuner_data_143_136_lsb 136
+#define xd_p_reg_tuner_data_151_144 (*(volatile byte xdata *) 0xF012)
+#define    p_reg_tuner_data_151_144 0xF012
+#define reg_tuner_data_151_144_pos 0
+#define reg_tuner_data_151_144_len 8
+#define reg_tuner_data_151_144_lsb 144
+#define xd_p_reg_tuner_data_159_152 (*(volatile byte xdata *) 0xF013)
+#define    p_reg_tuner_data_159_152 0xF013
+#define reg_tuner_data_159_152_pos 0
+#define reg_tuner_data_159_152_len 8
+#define reg_tuner_data_159_152_lsb 152
+#define xd_p_reg_tuner_data_167_160 (*(volatile byte xdata *) 0xF014)
+#define    p_reg_tuner_data_167_160 0xF014
+#define reg_tuner_data_167_160_pos 0
+#define reg_tuner_data_167_160_len 8
+#define reg_tuner_data_167_160_lsb 160
+#define xd_p_reg_tuner_data_175_168 (*(volatile byte xdata *) 0xF015)
+#define    p_reg_tuner_data_175_168 0xF015
+#define reg_tuner_data_175_168_pos 0
+#define reg_tuner_data_175_168_len 8
+#define reg_tuner_data_175_168_lsb 168
+#define xd_p_reg_tuner_data_183_176 (*(volatile byte xdata *) 0xF016)
+#define    p_reg_tuner_data_183_176 0xF016
+#define reg_tuner_data_183_176_pos 0
+#define reg_tuner_data_183_176_len 8
+#define reg_tuner_data_183_176_lsb 176
+#define xd_p_reg_tuner_data_191_184 (*(volatile byte xdata *) 0xF017)
+#define    p_reg_tuner_data_191_184 0xF017
+#define reg_tuner_data_191_184_pos 0
+#define reg_tuner_data_191_184_len 8
+#define reg_tuner_data_191_184_lsb 184
+#define xd_p_reg_tuner_data_199_192 (*(volatile byte xdata *) 0xF018)
+#define    p_reg_tuner_data_199_192 0xF018
+#define reg_tuner_data_199_192_pos 0
+#define reg_tuner_data_199_192_len 8
+#define reg_tuner_data_199_192_lsb 192
+#define xd_p_reg_tuner_data_207_200 (*(volatile byte xdata *) 0xF019)
+#define    p_reg_tuner_data_207_200 0xF019
+#define reg_tuner_data_207_200_pos 0
+#define reg_tuner_data_207_200_len 8
+#define reg_tuner_data_207_200_lsb 200
+#define xd_p_reg_tuner_data_215_208 (*(volatile byte xdata *) 0xF01A)
+#define    p_reg_tuner_data_215_208 0xF01A
+#define reg_tuner_data_215_208_pos 0
+#define reg_tuner_data_215_208_len 8
+#define reg_tuner_data_215_208_lsb 208
+#define xd_p_reg_tuner_data_223_216 (*(volatile byte xdata *) 0xF01B)
+#define    p_reg_tuner_data_223_216 0xF01B
+#define reg_tuner_data_223_216_pos 0
+#define reg_tuner_data_223_216_len 8
+#define reg_tuner_data_223_216_lsb 216
+#define xd_p_reg_tuner_data_231_224 (*(volatile byte xdata *) 0xF01C)
+#define    p_reg_tuner_data_231_224 0xF01C
+#define reg_tuner_data_231_224_pos 0
+#define reg_tuner_data_231_224_len 8
+#define reg_tuner_data_231_224_lsb 224
+#define xd_p_reg_tuner_data_239_232 (*(volatile byte xdata *) 0xF01D)
+#define    p_reg_tuner_data_239_232 0xF01D
+#define reg_tuner_data_239_232_pos 0
+#define reg_tuner_data_239_232_len 8
+#define reg_tuner_data_239_232_lsb 232
+#define xd_p_reg_tuner_data_247_240 (*(volatile byte xdata *) 0xF01E)
+#define    p_reg_tuner_data_247_240 0xF01E
+#define reg_tuner_data_247_240_pos 0
+#define reg_tuner_data_247_240_len 8
+#define reg_tuner_data_247_240_lsb 240
+#define xd_p_reg_tuner_data_255_248 (*(volatile byte xdata *) 0xF01F)
+#define    p_reg_tuner_data_255_248 0xF01F
+#define reg_tuner_data_255_248_pos 0
+#define reg_tuner_data_255_248_len 8
+#define reg_tuner_data_255_248_lsb 248
+#define xd_p_reg_tuner_data_263_256 (*(volatile byte xdata *) 0xF020)
+#define    p_reg_tuner_data_263_256 0xF020
+#define reg_tuner_data_263_256_pos 0
+#define reg_tuner_data_263_256_len 8
+#define reg_tuner_data_263_256_lsb 256
+#define xd_p_reg_tuner_data_271_264 (*(volatile byte xdata *) 0xF021)
+#define    p_reg_tuner_data_271_264 0xF021
+#define reg_tuner_data_271_264_pos 0
+#define reg_tuner_data_271_264_len 8
+#define reg_tuner_data_271_264_lsb 264
+#define xd_p_reg_tuner_data_279_272 (*(volatile byte xdata *) 0xF022)
+#define    p_reg_tuner_data_279_272 0xF022
+#define reg_tuner_data_279_272_pos 0
+#define reg_tuner_data_279_272_len 8
+#define reg_tuner_data_279_272_lsb 272
+#define xd_p_reg_tuner_data_287_280 (*(volatile byte xdata *) 0xF023)
+#define    p_reg_tuner_data_287_280 0xF023
+#define reg_tuner_data_287_280_pos 0
+#define reg_tuner_data_287_280_len 8
+#define reg_tuner_data_287_280_lsb 280
+#define xd_p_reg_tuner_data_295_288 (*(volatile byte xdata *) 0xF024)
+#define    p_reg_tuner_data_295_288 0xF024
+#define reg_tuner_data_295_288_pos 0
+#define reg_tuner_data_295_288_len 8
+#define reg_tuner_data_295_288_lsb 288
+#define xd_p_reg_tuner_data_303_296 (*(volatile byte xdata *) 0xF025)
+#define    p_reg_tuner_data_303_296 0xF025
+#define reg_tuner_data_303_296_pos 0
+#define reg_tuner_data_303_296_len 8
+#define reg_tuner_data_303_296_lsb 296
+#define xd_p_reg_tuner_data_311_304 (*(volatile byte xdata *) 0xF026)
+#define    p_reg_tuner_data_311_304 0xF026
+#define reg_tuner_data_311_304_pos 0
+#define reg_tuner_data_311_304_len 8
+#define reg_tuner_data_311_304_lsb 304
+#define xd_p_reg_tuner_data_319_312 (*(volatile byte xdata *) 0xF027)
+#define    p_reg_tuner_data_319_312 0xF027
+#define reg_tuner_data_319_312_pos 0
+#define reg_tuner_data_319_312_len 8
+#define reg_tuner_data_319_312_lsb 312
+#define xd_p_reg_tuner_data_327_320 (*(volatile byte xdata *) 0xF028)
+#define    p_reg_tuner_data_327_320 0xF028
+#define reg_tuner_data_327_320_pos 0
+#define reg_tuner_data_327_320_len 8
+#define reg_tuner_data_327_320_lsb 320
+#define xd_p_reg_tuner_data_335_328 (*(volatile byte xdata *) 0xF029)
+#define    p_reg_tuner_data_335_328 0xF029
+#define reg_tuner_data_335_328_pos 0
+#define reg_tuner_data_335_328_len 8
+#define reg_tuner_data_335_328_lsb 328
+#define xd_p_reg_tuner_data_343_336 (*(volatile byte xdata *) 0xF02A)
+#define    p_reg_tuner_data_343_336 0xF02A
+#define reg_tuner_data_343_336_pos 0
+#define reg_tuner_data_343_336_len 8
+#define reg_tuner_data_343_336_lsb 336
+#define xd_p_reg_tuner_data_351_344 (*(volatile byte xdata *) 0xF02B)
+#define    p_reg_tuner_data_351_344 0xF02B
+#define reg_tuner_data_351_344_pos 0
+#define reg_tuner_data_351_344_len 8
+#define reg_tuner_data_351_344_lsb 344
+#define xd_p_reg_tuner_data_359_352 (*(volatile byte xdata *) 0xF02C)
+#define    p_reg_tuner_data_359_352 0xF02C
+#define reg_tuner_data_359_352_pos 0
+#define reg_tuner_data_359_352_len 8
+#define reg_tuner_data_359_352_lsb 352
+#define xd_p_reg_tuner_data_367_360 (*(volatile byte xdata *) 0xF02D)
+#define    p_reg_tuner_data_367_360 0xF02D
+#define reg_tuner_data_367_360_pos 0
+#define reg_tuner_data_367_360_len 8
+#define reg_tuner_data_367_360_lsb 360
+#define xd_p_reg_tuner_data_375_368 (*(volatile byte xdata *) 0xF02E)
+#define    p_reg_tuner_data_375_368 0xF02E
+#define reg_tuner_data_375_368_pos 0
+#define reg_tuner_data_375_368_len 8
+#define reg_tuner_data_375_368_lsb 368
+#define xd_p_reg_tuner_data_383_376 (*(volatile byte xdata *) 0xF02F)
+#define    p_reg_tuner_data_383_376 0xF02F
+#define reg_tuner_data_383_376_pos 0
+#define reg_tuner_data_383_376_len 8
+#define reg_tuner_data_383_376_lsb 376
+#define xd_p_reg_tuner_data_391_384 (*(volatile byte xdata *) 0xF030)
+#define    p_reg_tuner_data_391_384 0xF030
+#define reg_tuner_data_391_384_pos 0
+#define reg_tuner_data_391_384_len 8
+#define reg_tuner_data_391_384_lsb 384
+#define xd_p_reg_tuner_data_399_392 (*(volatile byte xdata *) 0xF031)
+#define    p_reg_tuner_data_399_392 0xF031
+#define reg_tuner_data_399_392_pos 0
+#define reg_tuner_data_399_392_len 8
+#define reg_tuner_data_399_392_lsb 392
+#define xd_p_reg_tuner_data_407_400 (*(volatile byte xdata *) 0xF032)
+#define    p_reg_tuner_data_407_400 0xF032
+#define reg_tuner_data_407_400_pos 0
+#define reg_tuner_data_407_400_len 8
+#define reg_tuner_data_407_400_lsb 400
+#define xd_p_reg_tuner_data_415_408 (*(volatile byte xdata *) 0xF033)
+#define    p_reg_tuner_data_415_408 0xF033
+#define reg_tuner_data_415_408_pos 0
+#define reg_tuner_data_415_408_len 8
+#define reg_tuner_data_415_408_lsb 408
+#define xd_p_reg_tuner_data_423_416 (*(volatile byte xdata *) 0xF034)
+#define    p_reg_tuner_data_423_416 0xF034
+#define reg_tuner_data_423_416_pos 0
+#define reg_tuner_data_423_416_len 8
+#define reg_tuner_data_423_416_lsb 416
+#define xd_p_reg_tuner_data_431_424 (*(volatile byte xdata *) 0xF035)
+#define    p_reg_tuner_data_431_424 0xF035
+#define reg_tuner_data_431_424_pos 0
+#define reg_tuner_data_431_424_len 8
+#define reg_tuner_data_431_424_lsb 424
+#define xd_p_reg_tuner_data_439_432 (*(volatile byte xdata *) 0xF036)
+#define    p_reg_tuner_data_439_432 0xF036
+#define reg_tuner_data_439_432_pos 0
+#define reg_tuner_data_439_432_len 8
+#define reg_tuner_data_439_432_lsb 432
+#define xd_p_reg_tuner_data_447_440 (*(volatile byte xdata *) 0xF037)
+#define    p_reg_tuner_data_447_440 0xF037
+#define reg_tuner_data_447_440_pos 0
+#define reg_tuner_data_447_440_len 8
+#define reg_tuner_data_447_440_lsb 440
+#define xd_p_reg_tuner_data_455_448 (*(volatile byte xdata *) 0xF038)
+#define    p_reg_tuner_data_455_448 0xF038
+#define reg_tuner_data_455_448_pos 0
+#define reg_tuner_data_455_448_len 8
+#define reg_tuner_data_455_448_lsb 448
+#define xd_p_reg_tuner_data_463_456 (*(volatile byte xdata *) 0xF039)
+#define    p_reg_tuner_data_463_456 0xF039
+#define reg_tuner_data_463_456_pos 0
+#define reg_tuner_data_463_456_len 8
+#define reg_tuner_data_463_456_lsb 456
+#define xd_p_reg_tuner_data_471_464 (*(volatile byte xdata *) 0xF03A)
+#define    p_reg_tuner_data_471_464 0xF03A
+#define reg_tuner_data_471_464_pos 0
+#define reg_tuner_data_471_464_len 8
+#define reg_tuner_data_471_464_lsb 464
+#define xd_p_reg_tuner_data_479_472 (*(volatile byte xdata *) 0xF03B)
+#define    p_reg_tuner_data_479_472 0xF03B
+#define reg_tuner_data_479_472_pos 0
+#define reg_tuner_data_479_472_len 8
+#define reg_tuner_data_479_472_lsb 472
+#define xd_p_reg_tuner_data_487_480 (*(volatile byte xdata *) 0xF03C)
+#define    p_reg_tuner_data_487_480 0xF03C
+#define reg_tuner_data_487_480_pos 0
+#define reg_tuner_data_487_480_len 8
+#define reg_tuner_data_487_480_lsb 480
+#define xd_p_reg_tuner_data_495_488 (*(volatile byte xdata *) 0xF03D)
+#define    p_reg_tuner_data_495_488 0xF03D
+#define reg_tuner_data_495_488_pos 0
+#define reg_tuner_data_495_488_len 8
+#define reg_tuner_data_495_488_lsb 488
+#define xd_p_reg_tuner_data_503_496 (*(volatile byte xdata *) 0xF03E)
+#define    p_reg_tuner_data_503_496 0xF03E
+#define reg_tuner_data_503_496_pos 0
+#define reg_tuner_data_503_496_len 8
+#define reg_tuner_data_503_496_lsb 496
+#define xd_p_reg_tuner_data_511_504 (*(volatile byte xdata *) 0xF03F)
+#define    p_reg_tuner_data_511_504 0xF03F
+#define reg_tuner_data_511_504_pos 0
+#define reg_tuner_data_511_504_len 8
+#define reg_tuner_data_511_504_lsb 504
+#define xd_p_reg_tuner_data_519_512 (*(volatile byte xdata *) 0xF040)
+#define    p_reg_tuner_data_519_512 0xF040
+#define reg_tuner_data_519_512_pos 0
+#define reg_tuner_data_519_512_len 8
+#define reg_tuner_data_519_512_lsb 512
+#define xd_p_reg_tuner_data_527_520 (*(volatile byte xdata *) 0xF041)
+#define    p_reg_tuner_data_527_520 0xF041
+#define reg_tuner_data_527_520_pos 0
+#define reg_tuner_data_527_520_len 8
+#define reg_tuner_data_527_520_lsb 520
+#define xd_p_reg_tuner_data_535_528 (*(volatile byte xdata *) 0xF042)
+#define    p_reg_tuner_data_535_528 0xF042
+#define reg_tuner_data_535_528_pos 0
+#define reg_tuner_data_535_528_len 8
+#define reg_tuner_data_535_528_lsb 528
+#define xd_p_reg_tuner_data_543_536 (*(volatile byte xdata *) 0xF043)
+#define    p_reg_tuner_data_543_536 0xF043
+#define reg_tuner_data_543_536_pos 0
+#define reg_tuner_data_543_536_len 8
+#define reg_tuner_data_543_536_lsb 536
+#define xd_p_reg_tuner_data_551_544 (*(volatile byte xdata *) 0xF044)
+#define    p_reg_tuner_data_551_544 0xF044
+#define reg_tuner_data_551_544_pos 0
+#define reg_tuner_data_551_544_len 8
+#define reg_tuner_data_551_544_lsb 544
+#define xd_p_reg_tuner_data_559_552 (*(volatile byte xdata *) 0xF045)
+#define    p_reg_tuner_data_559_552 0xF045
+#define reg_tuner_data_559_552_pos 0
+#define reg_tuner_data_559_552_len 8
+#define reg_tuner_data_559_552_lsb 552
+#define xd_p_reg_tuner_data_567_560 (*(volatile byte xdata *) 0xF046)
+#define    p_reg_tuner_data_567_560 0xF046
+#define reg_tuner_data_567_560_pos 0
+#define reg_tuner_data_567_560_len 8
+#define reg_tuner_data_567_560_lsb 560
+#define xd_p_reg_tuner_data_575_568 (*(volatile byte xdata *) 0xF047)
+#define    p_reg_tuner_data_575_568 0xF047
+#define reg_tuner_data_575_568_pos 0
+#define reg_tuner_data_575_568_len 8
+#define reg_tuner_data_575_568_lsb 568
+#define xd_p_reg_tuner_data_583_576 (*(volatile byte xdata *) 0xF048)
+#define    p_reg_tuner_data_583_576 0xF048
+#define reg_tuner_data_583_576_pos 0
+#define reg_tuner_data_583_576_len 8
+#define reg_tuner_data_583_576_lsb 576
+#define xd_p_reg_tuner_data_591_584 (*(volatile byte xdata *) 0xF049)
+#define    p_reg_tuner_data_591_584 0xF049
+#define reg_tuner_data_591_584_pos 0
+#define reg_tuner_data_591_584_len 8
+#define reg_tuner_data_591_584_lsb 584
+#define xd_p_reg_tuner_data_599_592 (*(volatile byte xdata *) 0xF04A)
+#define    p_reg_tuner_data_599_592 0xF04A
+#define reg_tuner_data_599_592_pos 0
+#define reg_tuner_data_599_592_len 8
+#define reg_tuner_data_599_592_lsb 592
+#define xd_p_reg_tuner_data_607_600 (*(volatile byte xdata *) 0xF04B)
+#define    p_reg_tuner_data_607_600 0xF04B
+#define reg_tuner_data_607_600_pos 0
+#define reg_tuner_data_607_600_len 8
+#define reg_tuner_data_607_600_lsb 600
+#define xd_p_reg_tuner_data_615_608 (*(volatile byte xdata *) 0xF04C)
+#define    p_reg_tuner_data_615_608 0xF04C
+#define reg_tuner_data_615_608_pos 0
+#define reg_tuner_data_615_608_len 8
+#define reg_tuner_data_615_608_lsb 608
+#define xd_p_reg_tuner_data_623_616 (*(volatile byte xdata *) 0xF04D)
+#define    p_reg_tuner_data_623_616 0xF04D
+#define reg_tuner_data_623_616_pos 0
+#define reg_tuner_data_623_616_len 8
+#define reg_tuner_data_623_616_lsb 616
+#define xd_p_reg_tuner_data_631_624 (*(volatile byte xdata *) 0xF04E)
+#define    p_reg_tuner_data_631_624 0xF04E
+#define reg_tuner_data_631_624_pos 0
+#define reg_tuner_data_631_624_len 8
+#define reg_tuner_data_631_624_lsb 624
+#define xd_p_reg_tuner_data_639_632 (*(volatile byte xdata *) 0xF04F)
+#define    p_reg_tuner_data_639_632 0xF04F
+#define reg_tuner_data_639_632_pos 0
+#define reg_tuner_data_639_632_len 8
+#define reg_tuner_data_639_632_lsb 632
+#define xd_p_reg_tuner_data_647_640 (*(volatile byte xdata *) 0xF050)
+#define    p_reg_tuner_data_647_640 0xF050
+#define reg_tuner_data_647_640_pos 0
+#define reg_tuner_data_647_640_len 8
+#define reg_tuner_data_647_640_lsb 640
+#define xd_p_reg_tuner_data_655_648 (*(volatile byte xdata *) 0xF051)
+#define    p_reg_tuner_data_655_648 0xF051
+#define reg_tuner_data_655_648_pos 0
+#define reg_tuner_data_655_648_len 8
+#define reg_tuner_data_655_648_lsb 648
+#define xd_p_reg_tuner_data_663_656 (*(volatile byte xdata *) 0xF052)
+#define    p_reg_tuner_data_663_656 0xF052
+#define reg_tuner_data_663_656_pos 0
+#define reg_tuner_data_663_656_len 8
+#define reg_tuner_data_663_656_lsb 656
+#define xd_p_reg_tuner_data_671_664 (*(volatile byte xdata *) 0xF053)
+#define    p_reg_tuner_data_671_664 0xF053
+#define reg_tuner_data_671_664_pos 0
+#define reg_tuner_data_671_664_len 8
+#define reg_tuner_data_671_664_lsb 664
+#define xd_p_reg_tuner_data_679_672 (*(volatile byte xdata *) 0xF054)
+#define    p_reg_tuner_data_679_672 0xF054
+#define reg_tuner_data_679_672_pos 0
+#define reg_tuner_data_679_672_len 8
+#define reg_tuner_data_679_672_lsb 672
+#define xd_p_reg_tuner_data_687_680 (*(volatile byte xdata *) 0xF055)
+#define    p_reg_tuner_data_687_680 0xF055
+#define reg_tuner_data_687_680_pos 0
+#define reg_tuner_data_687_680_len 8
+#define reg_tuner_data_687_680_lsb 680
+#define xd_p_reg_tuner_data_695_688 (*(volatile byte xdata *) 0xF056)
+#define    p_reg_tuner_data_695_688 0xF056
+#define reg_tuner_data_695_688_pos 0
+#define reg_tuner_data_695_688_len 8
+#define reg_tuner_data_695_688_lsb 688
+#define xd_p_reg_tuner_data_703_696 (*(volatile byte xdata *) 0xF057)
+#define    p_reg_tuner_data_703_696 0xF057
+#define reg_tuner_data_703_696_pos 0
+#define reg_tuner_data_703_696_len 8
+#define reg_tuner_data_703_696_lsb 696
+#define xd_p_reg_tuner_data_711_704 (*(volatile byte xdata *) 0xF058)
+#define    p_reg_tuner_data_711_704 0xF058
+#define reg_tuner_data_711_704_pos 0
+#define reg_tuner_data_711_704_len 8
+#define reg_tuner_data_711_704_lsb 704
+#define xd_p_reg_tuner_data_719_712 (*(volatile byte xdata *) 0xF059)
+#define    p_reg_tuner_data_719_712 0xF059
+#define reg_tuner_data_719_712_pos 0
+#define reg_tuner_data_719_712_len 8
+#define reg_tuner_data_719_712_lsb 712
+#define xd_p_reg_tuner_data_727_720 (*(volatile byte xdata *) 0xF05A)
+#define    p_reg_tuner_data_727_720 0xF05A
+#define reg_tuner_data_727_720_pos 0
+#define reg_tuner_data_727_720_len 8
+#define reg_tuner_data_727_720_lsb 720
+#define xd_p_reg_tuner_data_735_728 (*(volatile byte xdata *) 0xF05B)
+#define    p_reg_tuner_data_735_728 0xF05B
+#define reg_tuner_data_735_728_pos 0
+#define reg_tuner_data_735_728_len 8
+#define reg_tuner_data_735_728_lsb 728
+#define xd_p_reg_tuner_data_743_736 (*(volatile byte xdata *) 0xF05C)
+#define    p_reg_tuner_data_743_736 0xF05C
+#define reg_tuner_data_743_736_pos 0
+#define reg_tuner_data_743_736_len 8
+#define reg_tuner_data_743_736_lsb 736
+#define xd_p_reg_tuner_data_751_744 (*(volatile byte xdata *) 0xF05D)
+#define    p_reg_tuner_data_751_744 0xF05D
+#define reg_tuner_data_751_744_pos 0
+#define reg_tuner_data_751_744_len 8
+#define reg_tuner_data_751_744_lsb 744
+#define xd_p_reg_tuner_data_759_752 (*(volatile byte xdata *) 0xF05E)
+#define    p_reg_tuner_data_759_752 0xF05E
+#define reg_tuner_data_759_752_pos 0
+#define reg_tuner_data_759_752_len 8
+#define reg_tuner_data_759_752_lsb 752
+#define xd_p_reg_tuner_data_767_760 (*(volatile byte xdata *) 0xF05F)
+#define    p_reg_tuner_data_767_760 0xF05F
+#define reg_tuner_data_767_760_pos 0
+#define reg_tuner_data_767_760_len 8
+#define reg_tuner_data_767_760_lsb 760
+#define xd_p_reg_tuner_data_775_768 (*(volatile byte xdata *) 0xF060)
+#define    p_reg_tuner_data_775_768 0xF060
+#define reg_tuner_data_775_768_pos 0
+#define reg_tuner_data_775_768_len 8
+#define reg_tuner_data_775_768_lsb 768
+#define xd_p_reg_tuner_data_783_776 (*(volatile byte xdata *) 0xF061)
+#define    p_reg_tuner_data_783_776 0xF061
+#define reg_tuner_data_783_776_pos 0
+#define reg_tuner_data_783_776_len 8
+#define reg_tuner_data_783_776_lsb 776
+#define xd_p_reg_tuner_data_791_784 (*(volatile byte xdata *) 0xF062)
+#define    p_reg_tuner_data_791_784 0xF062
+#define reg_tuner_data_791_784_pos 0
+#define reg_tuner_data_791_784_len 8
+#define reg_tuner_data_791_784_lsb 784
+#define xd_p_reg_tuner_data_799_792 (*(volatile byte xdata *) 0xF063)
+#define    p_reg_tuner_data_799_792 0xF063
+#define reg_tuner_data_799_792_pos 0
+#define reg_tuner_data_799_792_len 8
+#define reg_tuner_data_799_792_lsb 792
+#define xd_p_reg_tuner_data_807_800 (*(volatile byte xdata *) 0xF064)
+#define    p_reg_tuner_data_807_800 0xF064
+#define reg_tuner_data_807_800_pos 0
+#define reg_tuner_data_807_800_len 8
+#define reg_tuner_data_807_800_lsb 800
+#define xd_p_reg_tuner_data_815_808 (*(volatile byte xdata *) 0xF065)
+#define    p_reg_tuner_data_815_808 0xF065
+#define reg_tuner_data_815_808_pos 0
+#define reg_tuner_data_815_808_len 8
+#define reg_tuner_data_815_808_lsb 808
+#define xd_p_reg_tuner_data_823_816 (*(volatile byte xdata *) 0xF066)
+#define    p_reg_tuner_data_823_816 0xF066
+#define reg_tuner_data_823_816_pos 0
+#define reg_tuner_data_823_816_len 8
+#define reg_tuner_data_823_816_lsb 816
+#define xd_p_reg_tuner_data_831_824 (*(volatile byte xdata *) 0xF067)
+#define    p_reg_tuner_data_831_824 0xF067
+#define reg_tuner_data_831_824_pos 0
+#define reg_tuner_data_831_824_len 8
+#define reg_tuner_data_831_824_lsb 824
+#define xd_p_reg_tuner_data_839_832 (*(volatile byte xdata *) 0xF068)
+#define    p_reg_tuner_data_839_832 0xF068
+#define reg_tuner_data_839_832_pos 0
+#define reg_tuner_data_839_832_len 8
+#define reg_tuner_data_839_832_lsb 832
+#define xd_p_reg_tuner_data_847_840 (*(volatile byte xdata *) 0xF069)
+#define    p_reg_tuner_data_847_840 0xF069
+#define reg_tuner_data_847_840_pos 0
+#define reg_tuner_data_847_840_len 8
+#define reg_tuner_data_847_840_lsb 840
+#define xd_p_reg_tuner_data_855_848 (*(volatile byte xdata *) 0xF06A)
+#define    p_reg_tuner_data_855_848 0xF06A
+#define reg_tuner_data_855_848_pos 0
+#define reg_tuner_data_855_848_len 8
+#define reg_tuner_data_855_848_lsb 848
+#define xd_p_reg_tuner_data_863_856 (*(volatile byte xdata *) 0xF06B)
+#define    p_reg_tuner_data_863_856 0xF06B
+#define reg_tuner_data_863_856_pos 0
+#define reg_tuner_data_863_856_len 8
+#define reg_tuner_data_863_856_lsb 856
+#define xd_p_reg_tuner_data_871_864 (*(volatile byte xdata *) 0xF06C)
+#define    p_reg_tuner_data_871_864 0xF06C
+#define reg_tuner_data_871_864_pos 0
+#define reg_tuner_data_871_864_len 8
+#define reg_tuner_data_871_864_lsb 864
+#define xd_p_reg_tuner_data_879_872 (*(volatile byte xdata *) 0xF06D)
+#define    p_reg_tuner_data_879_872 0xF06D
+#define reg_tuner_data_879_872_pos 0
+#define reg_tuner_data_879_872_len 8
+#define reg_tuner_data_879_872_lsb 872
+#define xd_p_reg_tuner_data_887_880 (*(volatile byte xdata *) 0xF06E)
+#define    p_reg_tuner_data_887_880 0xF06E
+#define reg_tuner_data_887_880_pos 0
+#define reg_tuner_data_887_880_len 8
+#define reg_tuner_data_887_880_lsb 880
+#define xd_p_reg_tuner_data_895_888 (*(volatile byte xdata *) 0xF06F)
+#define    p_reg_tuner_data_895_888 0xF06F
+#define reg_tuner_data_895_888_pos 0
+#define reg_tuner_data_895_888_len 8
+#define reg_tuner_data_895_888_lsb 888
+#define xd_p_reg_tuner_data_903_896 (*(volatile byte xdata *) 0xF070)
+#define    p_reg_tuner_data_903_896 0xF070
+#define reg_tuner_data_903_896_pos 0
+#define reg_tuner_data_903_896_len 8
+#define reg_tuner_data_903_896_lsb 896
+#define xd_p_reg_tuner_data_911_904 (*(volatile byte xdata *) 0xF071)
+#define    p_reg_tuner_data_911_904 0xF071
+#define reg_tuner_data_911_904_pos 0
+#define reg_tuner_data_911_904_len 8
+#define reg_tuner_data_911_904_lsb 904
+#define xd_p_reg_tuner_data_919_912 (*(volatile byte xdata *) 0xF072)
+#define    p_reg_tuner_data_919_912 0xF072
+#define reg_tuner_data_919_912_pos 0
+#define reg_tuner_data_919_912_len 8
+#define reg_tuner_data_919_912_lsb 912
+#define xd_p_reg_tuner_data_927_920 (*(volatile byte xdata *) 0xF073)
+#define    p_reg_tuner_data_927_920 0xF073
+#define reg_tuner_data_927_920_pos 0
+#define reg_tuner_data_927_920_len 8
+#define reg_tuner_data_927_920_lsb 920
+#define xd_p_reg_tuner_data_935_928 (*(volatile byte xdata *) 0xF074)
+#define    p_reg_tuner_data_935_928 0xF074
+#define reg_tuner_data_935_928_pos 0
+#define reg_tuner_data_935_928_len 8
+#define reg_tuner_data_935_928_lsb 928
+#define xd_p_reg_tuner_data_943_936 (*(volatile byte xdata *) 0xF075)
+#define    p_reg_tuner_data_943_936 0xF075
+#define reg_tuner_data_943_936_pos 0
+#define reg_tuner_data_943_936_len 8
+#define reg_tuner_data_943_936_lsb 936
+#define xd_p_reg_tuner_data_951_944 (*(volatile byte xdata *) 0xF076)
+#define    p_reg_tuner_data_951_944 0xF076
+#define reg_tuner_data_951_944_pos 0
+#define reg_tuner_data_951_944_len 8
+#define reg_tuner_data_951_944_lsb 944
+#define xd_p_reg_tuner_data_959_952 (*(volatile byte xdata *) 0xF077)
+#define    p_reg_tuner_data_959_952 0xF077
+#define reg_tuner_data_959_952_pos 0
+#define reg_tuner_data_959_952_len 8
+#define reg_tuner_data_959_952_lsb 952
+#define xd_p_reg_tuner_data_967_960 (*(volatile byte xdata *) 0xF078)
+#define    p_reg_tuner_data_967_960 0xF078
+#define reg_tuner_data_967_960_pos 0
+#define reg_tuner_data_967_960_len 8
+#define reg_tuner_data_967_960_lsb 960
+#define xd_p_reg_tuner_data_975_968 (*(volatile byte xdata *) 0xF079)
+#define    p_reg_tuner_data_975_968 0xF079
+#define reg_tuner_data_975_968_pos 0
+#define reg_tuner_data_975_968_len 8
+#define reg_tuner_data_975_968_lsb 968
+#define xd_p_reg_tuner_data_983_976 (*(volatile byte xdata *) 0xF07A)
+#define    p_reg_tuner_data_983_976 0xF07A
+#define reg_tuner_data_983_976_pos 0
+#define reg_tuner_data_983_976_len 8
+#define reg_tuner_data_983_976_lsb 976
+#define xd_p_reg_tuner_data_991_984 (*(volatile byte xdata *) 0xF07B)
+#define    p_reg_tuner_data_991_984 0xF07B
+#define reg_tuner_data_991_984_pos 0
+#define reg_tuner_data_991_984_len 8
+#define reg_tuner_data_991_984_lsb 984
+#define xd_p_reg_tuner_data_999_992 (*(volatile byte xdata *) 0xF07C)
+#define    p_reg_tuner_data_999_992 0xF07C
+#define reg_tuner_data_999_992_pos 0
+#define reg_tuner_data_999_992_len 8
+#define reg_tuner_data_999_992_lsb 992
+#define xd_p_reg_tuner_data_1007_1000   (*(volatile byte xdata *) 0xF07D)
+#define    p_reg_tuner_data_1007_1000   0xF07D
+#define reg_tuner_data_1007_1000_pos 0
+#define reg_tuner_data_1007_1000_len 8
+#define reg_tuner_data_1007_1000_lsb 1000
+#define xd_p_reg_tuner_data_1015_1008   (*(volatile byte xdata *) 0xF07E)
+#define    p_reg_tuner_data_1015_1008   0xF07E
+#define reg_tuner_data_1015_1008_pos 0
+#define reg_tuner_data_1015_1008_len 8
+#define reg_tuner_data_1015_1008_lsb 1008
+#define xd_p_reg_tuner_data_1023_1016   (*(volatile byte xdata *) 0xF07F)
+#define    p_reg_tuner_data_1023_1016   0xF07F
+#define reg_tuner_data_1023_1016_pos 0
+#define reg_tuner_data_1023_1016_len 8
+#define reg_tuner_data_1023_1016_lsb 1016
+#define xd_p_reg_tuner_data_1031_1024   (*(volatile byte xdata *) 0xF080)
+#define    p_reg_tuner_data_1031_1024   0xF080
+#define reg_tuner_data_1031_1024_pos 0
+#define reg_tuner_data_1031_1024_len 8
+#define reg_tuner_data_1031_1024_lsb 1024
+#define xd_p_reg_tuner_data_1039_1032   (*(volatile byte xdata *) 0xF081)
+#define    p_reg_tuner_data_1039_1032   0xF081
+#define reg_tuner_data_1039_1032_pos 0
+#define reg_tuner_data_1039_1032_len 8
+#define reg_tuner_data_1039_1032_lsb 1032
+#define xd_p_reg_tuner_data_1047_1040   (*(volatile byte xdata *) 0xF082)
+#define    p_reg_tuner_data_1047_1040   0xF082
+#define reg_tuner_data_1047_1040_pos 0
+#define reg_tuner_data_1047_1040_len 8
+#define reg_tuner_data_1047_1040_lsb 1040
+#define xd_p_reg_tuner_data_1055_1048   (*(volatile byte xdata *) 0xF083)
+#define    p_reg_tuner_data_1055_1048   0xF083
+#define reg_tuner_data_1055_1048_pos 0
+#define reg_tuner_data_1055_1048_len 8
+#define reg_tuner_data_1055_1048_lsb 1048
+#define xd_p_reg_tuner_data_1063_1056   (*(volatile byte xdata *) 0xF084)
+#define    p_reg_tuner_data_1063_1056   0xF084
+#define reg_tuner_data_1063_1056_pos 0
+#define reg_tuner_data_1063_1056_len 8
+#define reg_tuner_data_1063_1056_lsb 1056
+#define xd_p_reg_tuner_data_1071_1064   (*(volatile byte xdata *) 0xF085)
+#define    p_reg_tuner_data_1071_1064   0xF085
+#define reg_tuner_data_1071_1064_pos 0
+#define reg_tuner_data_1071_1064_len 8
+#define reg_tuner_data_1071_1064_lsb 1064
+#define xd_p_reg_tuner_data_1079_1072   (*(volatile byte xdata *) 0xF086)
+#define    p_reg_tuner_data_1079_1072   0xF086
+#define reg_tuner_data_1079_1072_pos 0
+#define reg_tuner_data_1079_1072_len 8
+#define reg_tuner_data_1079_1072_lsb 1072
+#define xd_p_reg_tuner_data_1087_1080   (*(volatile byte xdata *) 0xF087)
+#define    p_reg_tuner_data_1087_1080   0xF087
+#define reg_tuner_data_1087_1080_pos 0
+#define reg_tuner_data_1087_1080_len 8
+#define reg_tuner_data_1087_1080_lsb 1080
+#define xd_p_reg_tuner_data_1095_1088   (*(volatile byte xdata *) 0xF088)
+#define    p_reg_tuner_data_1095_1088   0xF088
+#define reg_tuner_data_1095_1088_pos 0
+#define reg_tuner_data_1095_1088_len 8
+#define reg_tuner_data_1095_1088_lsb 1088
+#define xd_p_reg_tuner_data_1103_1096   (*(volatile byte xdata *) 0xF089)
+#define    p_reg_tuner_data_1103_1096   0xF089
+#define reg_tuner_data_1103_1096_pos 0
+#define reg_tuner_data_1103_1096_len 8
+#define reg_tuner_data_1103_1096_lsb 1096
+#define xd_p_reg_tuner_data_1111_1104   (*(volatile byte xdata *) 0xF08A)
+#define    p_reg_tuner_data_1111_1104   0xF08A
+#define reg_tuner_data_1111_1104_pos 0
+#define reg_tuner_data_1111_1104_len 8
+#define reg_tuner_data_1111_1104_lsb 1104
+#define xd_p_reg_tuner_data_1119_1112   (*(volatile byte xdata *) 0xF08B)
+#define    p_reg_tuner_data_1119_1112   0xF08B
+#define reg_tuner_data_1119_1112_pos 0
+#define reg_tuner_data_1119_1112_len 8
+#define reg_tuner_data_1119_1112_lsb 1112
+#define xd_p_reg_tuner_data_1127_1120   (*(volatile byte xdata *) 0xF08C)
+#define    p_reg_tuner_data_1127_1120   0xF08C
+#define reg_tuner_data_1127_1120_pos 0
+#define reg_tuner_data_1127_1120_len 8
+#define reg_tuner_data_1127_1120_lsb 1120
+#define xd_p_reg_tuner_data_1135_1128   (*(volatile byte xdata *) 0xF08D)
+#define    p_reg_tuner_data_1135_1128   0xF08D
+#define reg_tuner_data_1135_1128_pos 0
+#define reg_tuner_data_1135_1128_len 8
+#define reg_tuner_data_1135_1128_lsb 1128
+#define xd_p_reg_tuner_data_1143_1136   (*(volatile byte xdata *) 0xF08E)
+#define    p_reg_tuner_data_1143_1136   0xF08E
+#define reg_tuner_data_1143_1136_pos 0
+#define reg_tuner_data_1143_1136_len 8
+#define reg_tuner_data_1143_1136_lsb 1136
+#define xd_p_reg_tuner_data_1151_1144   (*(volatile byte xdata *) 0xF08F)
+#define    p_reg_tuner_data_1151_1144   0xF08F
+#define reg_tuner_data_1151_1144_pos 0
+#define reg_tuner_data_1151_1144_len 8
+#define reg_tuner_data_1151_1144_lsb 1144
+#define xd_p_reg_tuner_data_1159_1152   (*(volatile byte xdata *) 0xF090)
+#define    p_reg_tuner_data_1159_1152   0xF090
+#define reg_tuner_data_1159_1152_pos 0
+#define reg_tuner_data_1159_1152_len 8
+#define reg_tuner_data_1159_1152_lsb 1152
+#define xd_p_reg_tuner_data_1167_1160   (*(volatile byte xdata *) 0xF091)
+#define    p_reg_tuner_data_1167_1160   0xF091
+#define reg_tuner_data_1167_1160_pos 0
+#define reg_tuner_data_1167_1160_len 8
+#define reg_tuner_data_1167_1160_lsb 1160
+#define xd_p_reg_tuner_data_1175_1168   (*(volatile byte xdata *) 0xF092)
+#define    p_reg_tuner_data_1175_1168   0xF092
+#define reg_tuner_data_1175_1168_pos 0
+#define reg_tuner_data_1175_1168_len 8
+#define reg_tuner_data_1175_1168_lsb 1168
+#define xd_p_reg_tuner_data_1183_1176   (*(volatile byte xdata *) 0xF093)
+#define    p_reg_tuner_data_1183_1176   0xF093
+#define reg_tuner_data_1183_1176_pos 0
+#define reg_tuner_data_1183_1176_len 8
+#define reg_tuner_data_1183_1176_lsb 1176
+#define xd_p_reg_tuner_data_1191_1184   (*(volatile byte xdata *) 0xF094)
+#define    p_reg_tuner_data_1191_1184   0xF094
+#define reg_tuner_data_1191_1184_pos 0
+#define reg_tuner_data_1191_1184_len 8
+#define reg_tuner_data_1191_1184_lsb 1184
+#define xd_p_reg_tuner_data_1199_1192   (*(volatile byte xdata *) 0xF095)
+#define    p_reg_tuner_data_1199_1192   0xF095
+#define reg_tuner_data_1199_1192_pos 0
+#define reg_tuner_data_1199_1192_len 8
+#define reg_tuner_data_1199_1192_lsb 1192
+#define xd_p_reg_tuner_data_1207_1200   (*(volatile byte xdata *) 0xF096)
+#define    p_reg_tuner_data_1207_1200   0xF096
+#define reg_tuner_data_1207_1200_pos 0
+#define reg_tuner_data_1207_1200_len 8
+#define reg_tuner_data_1207_1200_lsb 1200
+#define xd_p_reg_tuner_data_1215_1208   (*(volatile byte xdata *) 0xF097)
+#define    p_reg_tuner_data_1215_1208   0xF097
+#define reg_tuner_data_1215_1208_pos 0
+#define reg_tuner_data_1215_1208_len 8
+#define reg_tuner_data_1215_1208_lsb 1208
+#define xd_p_reg_tuner_data_1223_1216   (*(volatile byte xdata *) 0xF098)
+#define    p_reg_tuner_data_1223_1216   0xF098
+#define reg_tuner_data_1223_1216_pos 0
+#define reg_tuner_data_1223_1216_len 8
+#define reg_tuner_data_1223_1216_lsb 1216
+#define xd_p_reg_tuner_data_1231_1224   (*(volatile byte xdata *) 0xF099)
+#define    p_reg_tuner_data_1231_1224   0xF099
+#define reg_tuner_data_1231_1224_pos 0
+#define reg_tuner_data_1231_1224_len 8
+#define reg_tuner_data_1231_1224_lsb 1224
+#define xd_p_reg_tuner_data_1239_1232   (*(volatile byte xdata *) 0xF09A)
+#define    p_reg_tuner_data_1239_1232   0xF09A
+#define reg_tuner_data_1239_1232_pos 0
+#define reg_tuner_data_1239_1232_len 8
+#define reg_tuner_data_1239_1232_lsb 1232
+#define xd_p_reg_tuner_data_1247_1240   (*(volatile byte xdata *) 0xF09B)
+#define    p_reg_tuner_data_1247_1240   0xF09B
+#define reg_tuner_data_1247_1240_pos 0
+#define reg_tuner_data_1247_1240_len 8
+#define reg_tuner_data_1247_1240_lsb 1240
+#define xd_p_reg_tuner_data_1255_1248   (*(volatile byte xdata *) 0xF09C)
+#define    p_reg_tuner_data_1255_1248   0xF09C
+#define reg_tuner_data_1255_1248_pos 0
+#define reg_tuner_data_1255_1248_len 8
+#define reg_tuner_data_1255_1248_lsb 1248
+#define xd_p_reg_tuner_data_1263_1256   (*(volatile byte xdata *) 0xF09D)
+#define    p_reg_tuner_data_1263_1256   0xF09D
+#define reg_tuner_data_1263_1256_pos 0
+#define reg_tuner_data_1263_1256_len 8
+#define reg_tuner_data_1263_1256_lsb 1256
+#define xd_p_reg_tuner_data_1271_1264   (*(volatile byte xdata *) 0xF09E)
+#define    p_reg_tuner_data_1271_1264   0xF09E
+#define reg_tuner_data_1271_1264_pos 0
+#define reg_tuner_data_1271_1264_len 8
+#define reg_tuner_data_1271_1264_lsb 1264
+#define xd_p_reg_tuner_data_1279_1272   (*(volatile byte xdata *) 0xF09F)
+#define    p_reg_tuner_data_1279_1272   0xF09F
+#define reg_tuner_data_1279_1272_pos 0
+#define reg_tuner_data_1279_1272_len 8
+#define reg_tuner_data_1279_1272_lsb 1272
+#define xd_p_reg_tuner_data_1287_1280   (*(volatile byte xdata *) 0xF0A0)
+#define    p_reg_tuner_data_1287_1280   0xF0A0
+#define reg_tuner_data_1287_1280_pos 0
+#define reg_tuner_data_1287_1280_len 8
+#define reg_tuner_data_1287_1280_lsb 1280
+#define xd_p_reg_tuner_data_1295_1288   (*(volatile byte xdata *) 0xF0A1)
+#define    p_reg_tuner_data_1295_1288   0xF0A1
+#define reg_tuner_data_1295_1288_pos 0
+#define reg_tuner_data_1295_1288_len 8
+#define reg_tuner_data_1295_1288_lsb 1288
+#define xd_p_reg_tuner_data_1303_1296   (*(volatile byte xdata *) 0xF0A2)
+#define    p_reg_tuner_data_1303_1296   0xF0A2
+#define reg_tuner_data_1303_1296_pos 0
+#define reg_tuner_data_1303_1296_len 8
+#define reg_tuner_data_1303_1296_lsb 1296
+#define xd_p_reg_tuner_data_1311_1304   (*(volatile byte xdata *) 0xF0A3)
+#define    p_reg_tuner_data_1311_1304   0xF0A3
+#define reg_tuner_data_1311_1304_pos 0
+#define reg_tuner_data_1311_1304_len 8
+#define reg_tuner_data_1311_1304_lsb 1304
+#define xd_p_reg_tuner_data_1319_1312   (*(volatile byte xdata *) 0xF0A4)
+#define    p_reg_tuner_data_1319_1312   0xF0A4
+#define reg_tuner_data_1319_1312_pos 0
+#define reg_tuner_data_1319_1312_len 8
+#define reg_tuner_data_1319_1312_lsb 1312
+#define xd_p_reg_tuner_data_1327_1320   (*(volatile byte xdata *) 0xF0A5)
+#define    p_reg_tuner_data_1327_1320   0xF0A5
+#define reg_tuner_data_1327_1320_pos 0
+#define reg_tuner_data_1327_1320_len 8
+#define reg_tuner_data_1327_1320_lsb 1320
+#define xd_p_reg_tuner_data_1335_1328   (*(volatile byte xdata *) 0xF0A6)
+#define    p_reg_tuner_data_1335_1328   0xF0A6
+#define reg_tuner_data_1335_1328_pos 0
+#define reg_tuner_data_1335_1328_len 8
+#define reg_tuner_data_1335_1328_lsb 1328
+#define xd_p_reg_tuner_data_1343_1336   (*(volatile byte xdata *) 0xF0A7)
+#define    p_reg_tuner_data_1343_1336   0xF0A7
+#define reg_tuner_data_1343_1336_pos 0
+#define reg_tuner_data_1343_1336_len 8
+#define reg_tuner_data_1343_1336_lsb 1336
+#define xd_p_reg_tuner_data_1351_1344   (*(volatile byte xdata *) 0xF0A8)
+#define    p_reg_tuner_data_1351_1344   0xF0A8
+#define reg_tuner_data_1351_1344_pos 0
+#define reg_tuner_data_1351_1344_len 8
+#define reg_tuner_data_1351_1344_lsb 1344
+#define xd_p_reg_tuner_data_1359_1352   (*(volatile byte xdata *) 0xF0A9)
+#define    p_reg_tuner_data_1359_1352   0xF0A9
+#define reg_tuner_data_1359_1352_pos 0
+#define reg_tuner_data_1359_1352_len 8
+#define reg_tuner_data_1359_1352_lsb 1352
+#define xd_p_reg_tuner_data_1367_1360   (*(volatile byte xdata *) 0xF0AA)
+#define    p_reg_tuner_data_1367_1360   0xF0AA
+#define reg_tuner_data_1367_1360_pos 0
+#define reg_tuner_data_1367_1360_len 8
+#define reg_tuner_data_1367_1360_lsb 1360
+#define xd_p_reg_tuner_data_1375_1368   (*(volatile byte xdata *) 0xF0AB)
+#define    p_reg_tuner_data_1375_1368   0xF0AB
+#define reg_tuner_data_1375_1368_pos 0
+#define reg_tuner_data_1375_1368_len 8
+#define reg_tuner_data_1375_1368_lsb 1368
+#define xd_p_reg_tuner_data_1383_1376   (*(volatile byte xdata *) 0xF0AC)
+#define    p_reg_tuner_data_1383_1376   0xF0AC
+#define reg_tuner_data_1383_1376_pos 0
+#define reg_tuner_data_1383_1376_len 8
+#define reg_tuner_data_1383_1376_lsb 1376
+#define xd_p_reg_tuner_data_1391_1384   (*(volatile byte xdata *) 0xF0AD)
+#define    p_reg_tuner_data_1391_1384   0xF0AD
+#define reg_tuner_data_1391_1384_pos 0
+#define reg_tuner_data_1391_1384_len 8
+#define reg_tuner_data_1391_1384_lsb 1384
+#define xd_p_reg_tuner_data_1399_1392   (*(volatile byte xdata *) 0xF0AE)
+#define    p_reg_tuner_data_1399_1392   0xF0AE
+#define reg_tuner_data_1399_1392_pos 0
+#define reg_tuner_data_1399_1392_len 8
+#define reg_tuner_data_1399_1392_lsb 1392
+#define xd_p_reg_tuner_data_1407_1400   (*(volatile byte xdata *) 0xF0AF)
+#define    p_reg_tuner_data_1407_1400   0xF0AF
+#define reg_tuner_data_1407_1400_pos 0
+#define reg_tuner_data_1407_1400_len 8
+#define reg_tuner_data_1407_1400_lsb 1400
+#define xd_p_reg_tuner_data_1415_1408   (*(volatile byte xdata *) 0xF0B0)
+#define    p_reg_tuner_data_1415_1408   0xF0B0
+#define reg_tuner_data_1415_1408_pos 0
+#define reg_tuner_data_1415_1408_len 8
+#define reg_tuner_data_1415_1408_lsb 1408
+#define xd_p_reg_tuner_data_1423_1416   (*(volatile byte xdata *) 0xF0B1)
+#define    p_reg_tuner_data_1423_1416   0xF0B1
+#define reg_tuner_data_1423_1416_pos 0
+#define reg_tuner_data_1423_1416_len 8
+#define reg_tuner_data_1423_1416_lsb 1416
+#define xd_p_reg_tuner_data_1431_1424   (*(volatile byte xdata *) 0xF0B2)
+#define    p_reg_tuner_data_1431_1424   0xF0B2
+#define reg_tuner_data_1431_1424_pos 0
+#define reg_tuner_data_1431_1424_len 8
+#define reg_tuner_data_1431_1424_lsb 1424
+#define xd_p_reg_tuner_data_1439_1432   (*(volatile byte xdata *) 0xF0B3)
+#define    p_reg_tuner_data_1439_1432   0xF0B3
+#define reg_tuner_data_1439_1432_pos 0
+#define reg_tuner_data_1439_1432_len 8
+#define reg_tuner_data_1439_1432_lsb 1432
+#define xd_p_reg_tuner_data_1447_1440   (*(volatile byte xdata *) 0xF0B4)
+#define    p_reg_tuner_data_1447_1440   0xF0B4
+#define reg_tuner_data_1447_1440_pos 0
+#define reg_tuner_data_1447_1440_len 8
+#define reg_tuner_data_1447_1440_lsb 1440
+#define xd_p_reg_tuner_data_1455_1448   (*(volatile byte xdata *) 0xF0B5)
+#define    p_reg_tuner_data_1455_1448   0xF0B5
+#define reg_tuner_data_1455_1448_pos 0
+#define reg_tuner_data_1455_1448_len 8
+#define reg_tuner_data_1455_1448_lsb 1448
+#define xd_p_reg_tuner_data_1463_1456   (*(volatile byte xdata *) 0xF0B6)
+#define    p_reg_tuner_data_1463_1456   0xF0B6
+#define reg_tuner_data_1463_1456_pos 0
+#define reg_tuner_data_1463_1456_len 8
+#define reg_tuner_data_1463_1456_lsb 1456
+#define xd_p_reg_tuner_data_1471_1464   (*(volatile byte xdata *) 0xF0B7)
+#define    p_reg_tuner_data_1471_1464   0xF0B7
+#define reg_tuner_data_1471_1464_pos 0
+#define reg_tuner_data_1471_1464_len 8
+#define reg_tuner_data_1471_1464_lsb 1464
+#define xd_p_reg_tuner_data_1479_1472   (*(volatile byte xdata *) 0xF0B8)
+#define    p_reg_tuner_data_1479_1472   0xF0B8
+#define reg_tuner_data_1479_1472_pos 0
+#define reg_tuner_data_1479_1472_len 8
+#define reg_tuner_data_1479_1472_lsb 1472
+#define xd_p_reg_tuner_data_1487_1480   (*(volatile byte xdata *) 0xF0B9)
+#define    p_reg_tuner_data_1487_1480   0xF0B9
+#define reg_tuner_data_1487_1480_pos 0
+#define reg_tuner_data_1487_1480_len 8
+#define reg_tuner_data_1487_1480_lsb 1480
+#define xd_p_reg_tuner_data_1495_1488   (*(volatile byte xdata *) 0xF0BA)
+#define    p_reg_tuner_data_1495_1488   0xF0BA
+#define reg_tuner_data_1495_1488_pos 0
+#define reg_tuner_data_1495_1488_len 8
+#define reg_tuner_data_1495_1488_lsb 1488
+#define xd_p_reg_tuner_data_1503_1496   (*(volatile byte xdata *) 0xF0BB)
+#define    p_reg_tuner_data_1503_1496   0xF0BB
+#define reg_tuner_data_1503_1496_pos 0
+#define reg_tuner_data_1503_1496_len 8
+#define reg_tuner_data_1503_1496_lsb 1496
+#define xd_p_reg_tuner_data_1511_1504   (*(volatile byte xdata *) 0xF0BC)
+#define    p_reg_tuner_data_1511_1504   0xF0BC
+#define reg_tuner_data_1511_1504_pos 0
+#define reg_tuner_data_1511_1504_len 8
+#define reg_tuner_data_1511_1504_lsb 1504
+#define xd_p_reg_tuner_data_1519_1512   (*(volatile byte xdata *) 0xF0BD)
+#define    p_reg_tuner_data_1519_1512   0xF0BD
+#define reg_tuner_data_1519_1512_pos 0
+#define reg_tuner_data_1519_1512_len 8
+#define reg_tuner_data_1519_1512_lsb 1512
+#define xd_p_reg_tuner_data_1527_1520   (*(volatile byte xdata *) 0xF0BE)
+#define    p_reg_tuner_data_1527_1520   0xF0BE
+#define reg_tuner_data_1527_1520_pos 0
+#define reg_tuner_data_1527_1520_len 8
+#define reg_tuner_data_1527_1520_lsb 1520
+#define xd_p_reg_tuner_data_1535_1528   (*(volatile byte xdata *) 0xF0BF)
+#define    p_reg_tuner_data_1535_1528   0xF0BF
+#define reg_tuner_data_1535_1528_pos 0
+#define reg_tuner_data_1535_1528_len 8
+#define reg_tuner_data_1535_1528_lsb 1528
+#define xd_p_reg_tuner_data_1543_1536   (*(volatile byte xdata *) 0xF0C0)
+#define    p_reg_tuner_data_1543_1536   0xF0C0
+#define reg_tuner_data_1543_1536_pos 0
+#define reg_tuner_data_1543_1536_len 8
+#define reg_tuner_data_1543_1536_lsb 1536
+#define xd_p_reg_tuner_data_1551_1544   (*(volatile byte xdata *) 0xF0C1)
+#define    p_reg_tuner_data_1551_1544   0xF0C1
+#define reg_tuner_data_1551_1544_pos 0
+#define reg_tuner_data_1551_1544_len 8
+#define reg_tuner_data_1551_1544_lsb 1544
+#define xd_p_reg_tuner_data_1559_1552   (*(volatile byte xdata *) 0xF0C2)
+#define    p_reg_tuner_data_1559_1552   0xF0C2
+#define reg_tuner_data_1559_1552_pos 0
+#define reg_tuner_data_1559_1552_len 8
+#define reg_tuner_data_1559_1552_lsb 1552
+#define xd_p_reg_tuner_data_1567_1560   (*(volatile byte xdata *) 0xF0C3)
+#define    p_reg_tuner_data_1567_1560   0xF0C3
+#define reg_tuner_data_1567_1560_pos 0
+#define reg_tuner_data_1567_1560_len 8
+#define reg_tuner_data_1567_1560_lsb 1560
+#define xd_p_reg_tuner_data_1575_1568   (*(volatile byte xdata *) 0xF0C4)
+#define    p_reg_tuner_data_1575_1568   0xF0C4
+#define reg_tuner_data_1575_1568_pos 0
+#define reg_tuner_data_1575_1568_len 8
+#define reg_tuner_data_1575_1568_lsb 1568
+#define xd_p_reg_tuner_data_1583_1576   (*(volatile byte xdata *) 0xF0C5)
+#define    p_reg_tuner_data_1583_1576   0xF0C5
+#define reg_tuner_data_1583_1576_pos 0
+#define reg_tuner_data_1583_1576_len 8
+#define reg_tuner_data_1583_1576_lsb 1576
+#define xd_p_reg_tuner_data_1591_1584   (*(volatile byte xdata *) 0xF0C6)
+#define    p_reg_tuner_data_1591_1584   0xF0C6
+#define reg_tuner_data_1591_1584_pos 0
+#define reg_tuner_data_1591_1584_len 8
+#define reg_tuner_data_1591_1584_lsb 1584
+#define xd_p_reg_tuner_data_1599_1592   (*(volatile byte xdata *) 0xF0C7)
+#define    p_reg_tuner_data_1599_1592   0xF0C7
+#define reg_tuner_data_1599_1592_pos 0
+#define reg_tuner_data_1599_1592_len 8
+#define reg_tuner_data_1599_1592_lsb 1592
+#define xd_p_reg_tuner_data_1607_1600   (*(volatile byte xdata *) 0xF0C8)
+#define    p_reg_tuner_data_1607_1600   0xF0C8
+#define reg_tuner_data_1607_1600_pos 0
+#define reg_tuner_data_1607_1600_len 8
+#define reg_tuner_data_1607_1600_lsb 1600
+#define xd_p_reg_tuner_data_1615_1608   (*(volatile byte xdata *) 0xF0C9)
+#define    p_reg_tuner_data_1615_1608   0xF0C9
+#define reg_tuner_data_1615_1608_pos 0
+#define reg_tuner_data_1615_1608_len 8
+#define reg_tuner_data_1615_1608_lsb 1608
+#define xd_p_reg_tuner_data_1623_1616   (*(volatile byte xdata *) 0xF0CA)
+#define    p_reg_tuner_data_1623_1616   0xF0CA
+#define reg_tuner_data_1623_1616_pos 0
+#define reg_tuner_data_1623_1616_len 8
+#define reg_tuner_data_1623_1616_lsb 1616
+#define xd_p_reg_tuner_data_1631_1624   (*(volatile byte xdata *) 0xF0CB)
+#define    p_reg_tuner_data_1631_1624   0xF0CB
+#define reg_tuner_data_1631_1624_pos 0
+#define reg_tuner_data_1631_1624_len 8
+#define reg_tuner_data_1631_1624_lsb 1624
+#define xd_p_reg_tuner_data_1639_1632   (*(volatile byte xdata *) 0xF0CC)
+#define    p_reg_tuner_data_1639_1632   0xF0CC
+#define reg_tuner_data_1639_1632_pos 0
+#define reg_tuner_data_1639_1632_len 8
+#define reg_tuner_data_1639_1632_lsb 1632
+#define xd_p_reg_tuner_data_1647_1640   (*(volatile byte xdata *) 0xF0CD)
+#define    p_reg_tuner_data_1647_1640   0xF0CD
+#define reg_tuner_data_1647_1640_pos 0
+#define reg_tuner_data_1647_1640_len 8
+#define reg_tuner_data_1647_1640_lsb 1640
+#define xd_p_reg_tuner_data_1655_1648   (*(volatile byte xdata *) 0xF0CE)
+#define    p_reg_tuner_data_1655_1648   0xF0CE
+#define reg_tuner_data_1655_1648_pos 0
+#define reg_tuner_data_1655_1648_len 8
+#define reg_tuner_data_1655_1648_lsb 1648
+#define xd_p_reg_tuner_data_1663_1656   (*(volatile byte xdata *) 0xF0CF)
+#define    p_reg_tuner_data_1663_1656   0xF0CF
+#define reg_tuner_data_1663_1656_pos 0
+#define reg_tuner_data_1663_1656_len 8
+#define reg_tuner_data_1663_1656_lsb 1656
+#define xd_p_reg_tuner_data_1671_1664   (*(volatile byte xdata *) 0xF0D0)
+#define    p_reg_tuner_data_1671_1664   0xF0D0
+#define reg_tuner_data_1671_1664_pos 0
+#define reg_tuner_data_1671_1664_len 8
+#define reg_tuner_data_1671_1664_lsb 1664
+#define xd_p_reg_tuner_data_1679_1672   (*(volatile byte xdata *) 0xF0D1)
+#define    p_reg_tuner_data_1679_1672   0xF0D1
+#define reg_tuner_data_1679_1672_pos 0
+#define reg_tuner_data_1679_1672_len 8
+#define reg_tuner_data_1679_1672_lsb 1672
+#define xd_p_reg_tuner_data_1687_1680   (*(volatile byte xdata *) 0xF0D2)
+#define    p_reg_tuner_data_1687_1680   0xF0D2
+#define reg_tuner_data_1687_1680_pos 0
+#define reg_tuner_data_1687_1680_len 8
+#define reg_tuner_data_1687_1680_lsb 1680
+#define xd_p_reg_tuner_data_1695_1688   (*(volatile byte xdata *) 0xF0D3)
+#define    p_reg_tuner_data_1695_1688   0xF0D3
+#define reg_tuner_data_1695_1688_pos 0
+#define reg_tuner_data_1695_1688_len 8
+#define reg_tuner_data_1695_1688_lsb 1688
+#define xd_p_reg_tuner_data_1703_1696   (*(volatile byte xdata *) 0xF0D4)
+#define    p_reg_tuner_data_1703_1696   0xF0D4
+#define reg_tuner_data_1703_1696_pos 0
+#define reg_tuner_data_1703_1696_len 8
+#define reg_tuner_data_1703_1696_lsb 1696
+#define xd_p_reg_tuner_data_1711_1704   (*(volatile byte xdata *) 0xF0D5)
+#define    p_reg_tuner_data_1711_1704   0xF0D5
+#define reg_tuner_data_1711_1704_pos 0
+#define reg_tuner_data_1711_1704_len 8
+#define reg_tuner_data_1711_1704_lsb 1704
+#define xd_p_reg_tuner_data_1719_1712   (*(volatile byte xdata *) 0xF0D6)
+#define    p_reg_tuner_data_1719_1712   0xF0D6
+#define reg_tuner_data_1719_1712_pos 0
+#define reg_tuner_data_1719_1712_len 8
+#define reg_tuner_data_1719_1712_lsb 1712
+#define xd_p_reg_tuner_data_1727_1720   (*(volatile byte xdata *) 0xF0D7)
+#define    p_reg_tuner_data_1727_1720   0xF0D7
+#define reg_tuner_data_1727_1720_pos 0
+#define reg_tuner_data_1727_1720_len 8
+#define reg_tuner_data_1727_1720_lsb 1720
+#define xd_p_reg_tuner_data_1735_1728   (*(volatile byte xdata *) 0xF0D8)
+#define    p_reg_tuner_data_1735_1728   0xF0D8
+#define reg_tuner_data_1735_1728_pos 0
+#define reg_tuner_data_1735_1728_len 8
+#define reg_tuner_data_1735_1728_lsb 1728
+#define xd_p_reg_tuner_data_1743_1736   (*(volatile byte xdata *) 0xF0D9)
+#define    p_reg_tuner_data_1743_1736   0xF0D9
+#define reg_tuner_data_1743_1736_pos 0
+#define reg_tuner_data_1743_1736_len 8
+#define reg_tuner_data_1743_1736_lsb 1736
+#define xd_p_reg_tuner_data_1751_1744   (*(volatile byte xdata *) 0xF0DA)
+#define    p_reg_tuner_data_1751_1744   0xF0DA
+#define reg_tuner_data_1751_1744_pos 0
+#define reg_tuner_data_1751_1744_len 8
+#define reg_tuner_data_1751_1744_lsb 1744
+#define xd_p_reg_tuner_data_1759_1752   (*(volatile byte xdata *) 0xF0DB)
+#define    p_reg_tuner_data_1759_1752   0xF0DB
+#define reg_tuner_data_1759_1752_pos 0
+#define reg_tuner_data_1759_1752_len 8
+#define reg_tuner_data_1759_1752_lsb 1752
+#define xd_p_reg_tuner_data_1767_1760   (*(volatile byte xdata *) 0xF0DC)
+#define    p_reg_tuner_data_1767_1760   0xF0DC
+#define reg_tuner_data_1767_1760_pos 0
+#define reg_tuner_data_1767_1760_len 8
+#define reg_tuner_data_1767_1760_lsb 1760
+#define xd_p_reg_tuner_data_1775_1768   (*(volatile byte xdata *) 0xF0DD)
+#define    p_reg_tuner_data_1775_1768   0xF0DD
+#define reg_tuner_data_1775_1768_pos 0
+#define reg_tuner_data_1775_1768_len 8
+#define reg_tuner_data_1775_1768_lsb 1768
+#define xd_p_reg_tuner_data_1783_1776   (*(volatile byte xdata *) 0xF0DE)
+#define    p_reg_tuner_data_1783_1776   0xF0DE
+#define reg_tuner_data_1783_1776_pos 0
+#define reg_tuner_data_1783_1776_len 8
+#define reg_tuner_data_1783_1776_lsb 1776
+#define xd_p_reg_tuner_data_1791_1784   (*(volatile byte xdata *) 0xF0DF)
+#define    p_reg_tuner_data_1791_1784   0xF0DF
+#define reg_tuner_data_1791_1784_pos 0
+#define reg_tuner_data_1791_1784_len 8
+#define reg_tuner_data_1791_1784_lsb 1784
+#define xd_p_reg_tuner_data_1799_1792   (*(volatile byte xdata *) 0xF0E0)
+#define    p_reg_tuner_data_1799_1792   0xF0E0
+#define reg_tuner_data_1799_1792_pos 0
+#define reg_tuner_data_1799_1792_len 8
+#define reg_tuner_data_1799_1792_lsb 1792
+#define xd_p_reg_tuner_data_1807_1800   (*(volatile byte xdata *) 0xF0E1)
+#define    p_reg_tuner_data_1807_1800   0xF0E1
+#define reg_tuner_data_1807_1800_pos 0
+#define reg_tuner_data_1807_1800_len 8
+#define reg_tuner_data_1807_1800_lsb 1800
+#define xd_p_reg_tuner_data_1815_1808   (*(volatile byte xdata *) 0xF0E2)
+#define    p_reg_tuner_data_1815_1808   0xF0E2
+#define reg_tuner_data_1815_1808_pos 0
+#define reg_tuner_data_1815_1808_len 8
+#define reg_tuner_data_1815_1808_lsb 1808
+#define xd_p_reg_tuner_data_1823_1816   (*(volatile byte xdata *) 0xF0E3)
+#define    p_reg_tuner_data_1823_1816   0xF0E3
+#define reg_tuner_data_1823_1816_pos 0
+#define reg_tuner_data_1823_1816_len 8
+#define reg_tuner_data_1823_1816_lsb 1816
+#define xd_p_reg_tuner_data_1831_1824   (*(volatile byte xdata *) 0xF0E4)
+#define    p_reg_tuner_data_1831_1824   0xF0E4
+#define reg_tuner_data_1831_1824_pos 0
+#define reg_tuner_data_1831_1824_len 8
+#define reg_tuner_data_1831_1824_lsb 1824
+#define xd_p_reg_tuner_data_1839_1832   (*(volatile byte xdata *) 0xF0E5)
+#define    p_reg_tuner_data_1839_1832   0xF0E5
+#define reg_tuner_data_1839_1832_pos 0
+#define reg_tuner_data_1839_1832_len 8
+#define reg_tuner_data_1839_1832_lsb 1832
+#define xd_p_reg_tuner_data_1847_1840   (*(volatile byte xdata *) 0xF0E6)
+#define    p_reg_tuner_data_1847_1840   0xF0E6
+#define reg_tuner_data_1847_1840_pos 0
+#define reg_tuner_data_1847_1840_len 8
+#define reg_tuner_data_1847_1840_lsb 1840
+#define xd_p_reg_tuner_data_1855_1848   (*(volatile byte xdata *) 0xF0E7)
+#define    p_reg_tuner_data_1855_1848   0xF0E7
+#define reg_tuner_data_1855_1848_pos 0
+#define reg_tuner_data_1855_1848_len 8
+#define reg_tuner_data_1855_1848_lsb 1848
+#define xd_p_reg_tuner_data_1863_1856   (*(volatile byte xdata *) 0xF0E8)
+#define    p_reg_tuner_data_1863_1856   0xF0E8
+#define reg_tuner_data_1863_1856_pos 0
+#define reg_tuner_data_1863_1856_len 8
+#define reg_tuner_data_1863_1856_lsb 1856
+#define xd_p_reg_tuner_data_1871_1864   (*(volatile byte xdata *) 0xF0E9)
+#define    p_reg_tuner_data_1871_1864   0xF0E9
+#define reg_tuner_data_1871_1864_pos 0
+#define reg_tuner_data_1871_1864_len 8
+#define reg_tuner_data_1871_1864_lsb 1864
+#define xd_p_reg_tuner_data_1879_1872   (*(volatile byte xdata *) 0xF0EA)
+#define    p_reg_tuner_data_1879_1872   0xF0EA
+#define reg_tuner_data_1879_1872_pos 0
+#define reg_tuner_data_1879_1872_len 8
+#define reg_tuner_data_1879_1872_lsb 1872
+#define xd_p_reg_tuner_data_1887_1880   (*(volatile byte xdata *) 0xF0EB)
+#define    p_reg_tuner_data_1887_1880   0xF0EB
+#define reg_tuner_data_1887_1880_pos 0
+#define reg_tuner_data_1887_1880_len 8
+#define reg_tuner_data_1887_1880_lsb 1880
+#define xd_p_reg_tuner_data_1895_1888   (*(volatile byte xdata *) 0xF0EC)
+#define    p_reg_tuner_data_1895_1888   0xF0EC
+#define reg_tuner_data_1895_1888_pos 0
+#define reg_tuner_data_1895_1888_len 8
+#define reg_tuner_data_1895_1888_lsb 1888
+#define xd_p_reg_tuner_data_1903_1896   (*(volatile byte xdata *) 0xF0ED)
+#define    p_reg_tuner_data_1903_1896   0xF0ED
+#define reg_tuner_data_1903_1896_pos 0
+#define reg_tuner_data_1903_1896_len 8
+#define reg_tuner_data_1903_1896_lsb 1896
+#define xd_p_reg_tuner_data_1911_1904   (*(volatile byte xdata *) 0xF0EE)
+#define    p_reg_tuner_data_1911_1904   0xF0EE
+#define reg_tuner_data_1911_1904_pos 0
+#define reg_tuner_data_1911_1904_len 8
+#define reg_tuner_data_1911_1904_lsb 1904
+#define xd_p_reg_tuner_data_1919_1912   (*(volatile byte xdata *) 0xF0EF)
+#define    p_reg_tuner_data_1919_1912   0xF0EF
+#define reg_tuner_data_1919_1912_pos 0
+#define reg_tuner_data_1919_1912_len 8
+#define reg_tuner_data_1919_1912_lsb 1912
+#define xd_p_reg_tuner_data_1927_1920   (*(volatile byte xdata *) 0xF0F0)
+#define    p_reg_tuner_data_1927_1920   0xF0F0
+#define reg_tuner_data_1927_1920_pos 0
+#define reg_tuner_data_1927_1920_len 8
+#define reg_tuner_data_1927_1920_lsb 1920
+#define xd_p_reg_tuner_data_1935_1928   (*(volatile byte xdata *) 0xF0F1)
+#define    p_reg_tuner_data_1935_1928   0xF0F1
+#define reg_tuner_data_1935_1928_pos 0
+#define reg_tuner_data_1935_1928_len 8
+#define reg_tuner_data_1935_1928_lsb 1928
+#define xd_p_reg_tuner_data_1943_1936   (*(volatile byte xdata *) 0xF0F2)
+#define    p_reg_tuner_data_1943_1936   0xF0F2
+#define reg_tuner_data_1943_1936_pos 0
+#define reg_tuner_data_1943_1936_len 8
+#define reg_tuner_data_1943_1936_lsb 1936
+#define xd_p_reg_tuner_data_1951_1944   (*(volatile byte xdata *) 0xF0F3)
+#define    p_reg_tuner_data_1951_1944   0xF0F3
+#define reg_tuner_data_1951_1944_pos 0
+#define reg_tuner_data_1951_1944_len 8
+#define reg_tuner_data_1951_1944_lsb 1944
+#define xd_p_reg_tuner_data_1959_1952   (*(volatile byte xdata *) 0xF0F4)
+#define    p_reg_tuner_data_1959_1952   0xF0F4
+#define reg_tuner_data_1959_1952_pos 0
+#define reg_tuner_data_1959_1952_len 8
+#define reg_tuner_data_1959_1952_lsb 1952
+#define xd_p_reg_tuner_data_1967_1960   (*(volatile byte xdata *) 0xF0F5)
+#define    p_reg_tuner_data_1967_1960   0xF0F5
+#define reg_tuner_data_1967_1960_pos 0
+#define reg_tuner_data_1967_1960_len 8
+#define reg_tuner_data_1967_1960_lsb 1960
+#define xd_p_reg_tuner_data_1975_1968   (*(volatile byte xdata *) 0xF0F6)
+#define    p_reg_tuner_data_1975_1968   0xF0F6
+#define reg_tuner_data_1975_1968_pos 0
+#define reg_tuner_data_1975_1968_len 8
+#define reg_tuner_data_1975_1968_lsb 1968
+#define xd_p_reg_tuner_data_1983_1976   (*(volatile byte xdata *) 0xF0F7)
+#define    p_reg_tuner_data_1983_1976   0xF0F7
+#define reg_tuner_data_1983_1976_pos 0
+#define reg_tuner_data_1983_1976_len 8
+#define reg_tuner_data_1983_1976_lsb 1976
+#define xd_p_reg_tuner_data_1991_1984   (*(volatile byte xdata *) 0xF0F8)
+#define    p_reg_tuner_data_1991_1984   0xF0F8
+#define reg_tuner_data_1991_1984_pos 0
+#define reg_tuner_data_1991_1984_len 8
+#define reg_tuner_data_1991_1984_lsb 1984
+#define xd_p_reg_tuner_data_1999_1992   (*(volatile byte xdata *) 0xF0F9)
+#define    p_reg_tuner_data_1999_1992   0xF0F9
+#define reg_tuner_data_1999_1992_pos 0
+#define reg_tuner_data_1999_1992_len 8
+#define reg_tuner_data_1999_1992_lsb 1992
+#define xd_p_reg_tuner_data_2007_2000   (*(volatile byte xdata *) 0xF0FA)
+#define    p_reg_tuner_data_2007_2000   0xF0FA
+#define reg_tuner_data_2007_2000_pos 0
+#define reg_tuner_data_2007_2000_len 8
+#define reg_tuner_data_2007_2000_lsb 2000
+#define xd_p_reg_tuner_data_2015_2008   (*(volatile byte xdata *) 0xF0FB)
+#define    p_reg_tuner_data_2015_2008   0xF0FB
+#define reg_tuner_data_2015_2008_pos 0
+#define reg_tuner_data_2015_2008_len 8
+#define reg_tuner_data_2015_2008_lsb 2008
+#define xd_p_reg_tuner_data_2023_2016   (*(volatile byte xdata *) 0xF0FC)
+#define    p_reg_tuner_data_2023_2016   0xF0FC
+#define reg_tuner_data_2023_2016_pos 0
+#define reg_tuner_data_2023_2016_len 8
+#define reg_tuner_data_2023_2016_lsb 2016
+#define xd_p_reg_tuner_data_2031_2024   (*(volatile byte xdata *) 0xF0FD)
+#define    p_reg_tuner_data_2031_2024   0xF0FD
+#define reg_tuner_data_2031_2024_pos 0
+#define reg_tuner_data_2031_2024_len 8
+#define reg_tuner_data_2031_2024_lsb 2024
+#define xd_p_reg_tuner_data_2039_2032   (*(volatile byte xdata *) 0xF0FE)
+#define    p_reg_tuner_data_2039_2032   0xF0FE
+#define reg_tuner_data_2039_2032_pos 0
+#define reg_tuner_data_2039_2032_len 8
+#define reg_tuner_data_2039_2032_lsb 2032
+#define xd_p_reg_tuner_data_2047_2040   (*(volatile byte xdata *) 0xF0FF)
+#define    p_reg_tuner_data_2047_2040   0xF0FF
+#define reg_tuner_data_2047_2040_pos 0
+#define reg_tuner_data_2047_2040_len 8
+#define reg_tuner_data_2047_2040_lsb 2040
+#define xd_p_reg_tuner_master_rd_wr (*(volatile byte xdata *) 0xF100)
+#define    p_reg_tuner_master_rd_wr 0xF100
+#define reg_tuner_master_rd_wr_pos 0
+#define reg_tuner_master_rd_wr_len 1
+#define reg_tuner_master_rd_wr_lsb 0
+#define xd_p_reg_tuner_master_length    (*(volatile byte xdata *) 0xF101)
+#define    p_reg_tuner_master_length    0xF101
+#define reg_tuner_master_length_pos 0
+#define reg_tuner_master_length_len 8
+#define reg_tuner_master_length_lsb 0
+#define xd_p_reg_tuner_cmd_exe  (*(volatile byte xdata *) 0xF102)
+#define    p_reg_tuner_cmd_exe  0xF102
+#define reg_tuner_cmd_exe_pos 0
+#define reg_tuner_cmd_exe_len 1
+#define reg_tuner_cmd_exe_lsb 0
+#define xd_p_reg_tuner_wdat_done    (*(volatile byte xdata *) 0xF102)
+#define    p_reg_tuner_wdat_done    0xF102
+#define reg_tuner_wdat_done_pos 1
+#define reg_tuner_wdat_done_len 1
+#define reg_tuner_wdat_done_lsb 0
+#define xd_p_reg_tuner_wdat_fail    (*(volatile byte xdata *) 0xF102)
+#define    p_reg_tuner_wdat_fail    0xF102
+#define reg_tuner_wdat_fail_pos 2
+#define reg_tuner_wdat_fail_len 1
+#define reg_tuner_wdat_fail_lsb 0
+#define xd_p_reg_tuner_ofsm_i2cm_rdat_rdy   (*(volatile byte xdata *) 0xF102)
+#define    p_reg_tuner_ofsm_i2cm_rdat_rdy   0xF102
+#define reg_tuner_ofsm_i2cm_rdat_rdy_pos 3
+#define reg_tuner_ofsm_i2cm_rdat_rdy_len 1
+#define reg_tuner_ofsm_i2cm_rdat_rdy_lsb 0
+#define xd_p_reg_tuner_current_state    (*(volatile byte xdata *) 0xF102)
+#define    p_reg_tuner_current_state    0xF102
+#define reg_tuner_current_state_pos 4
+#define reg_tuner_current_state_len 3
+#define reg_tuner_current_state_lsb 0
+#define xd_p_reg_one_cycle_counter_tuner    (*(volatile byte xdata *) 0xF103)
+#define    p_reg_one_cycle_counter_tuner    0xF103
+#define reg_one_cycle_counter_tuner_pos 0
+#define reg_one_cycle_counter_tuner_len 8
+#define reg_one_cycle_counter_tuner_lsb 0
+#define xd_p_reg_msb_lsb    (*(volatile byte xdata *) 0xF104)
+#define    p_reg_msb_lsb    0xF104
+#define reg_msb_lsb_pos 0
+#define reg_msb_lsb_len 1
+#define reg_msb_lsb_lsb 0
+#define xd_p_reg_ofdm_rst   (*(volatile byte xdata *) 0xF104)
+#define    p_reg_ofdm_rst   0xF104
+#define xd_p_reg_sel_thirdi2c   (*(volatile byte xdata *) 0xF104)
+#define    p_reg_sel_thirdi2c   0xF104
+#define reg_sel_thirdi2c_pos 2
+#define reg_sel_thirdi2c_len 1
+#define reg_sel_thirdi2c_lsb 0
+#define xd_p_reg_sel_tuner  (*(volatile byte xdata *) 0xF104)
+#define    p_reg_sel_tuner  0xF104
+#define xd_p_reg_ofdm_rst_en    (*(volatile byte xdata *) 0xF104)
+#define    p_reg_ofdm_rst_en    0xF104
+#define xd_p_reg_sdio_cccr_v    (*(volatile byte xdata *) 0xF140)
+#define    p_reg_sdio_cccr_v    0xF140
+#define reg_sdio_cccr_v_pos 0
+#define reg_sdio_cccr_v_len 4
+#define reg_sdio_cccr_v_lsb 0
+#define xd_p_reg_sdio_sdio_v    (*(volatile byte xdata *) 0xF140)
+#define    p_reg_sdio_sdio_v    0xF140
+#define reg_sdio_sdio_v_pos 4
+#define reg_sdio_sdio_v_len 4
+#define reg_sdio_sdio_v_lsb 0
+#define xd_p_reg_sdioc_sd_v (*(volatile byte xdata *) 0xF141)
+#define    p_reg_sdioc_sd_v 0xF141
+#define reg_sdioc_sd_v_pos 0
+#define reg_sdioc_sd_v_len 4
+#define reg_sdioc_sd_v_lsb 0
+#define xd_p_reg_sdioc_ior1 (*(volatile byte xdata *) 0xF143)
+#define    p_reg_sdioc_ior1 0xF143
+#define reg_sdioc_ior1_pos 1
+#define reg_sdioc_ior1_len 1
+#define reg_sdioc_ior1_lsb 0
+#define xd_p_reg_sdioc_int1 (*(volatile byte xdata *) 0xF145)
+#define    p_reg_sdioc_int1 0xF145
+#define reg_sdioc_int1_pos 1
+#define reg_sdioc_int1_len 1
+#define reg_sdioc_int1_lsb 0
+#define xd_p_reg_sdioc_scsi (*(volatile byte xdata *) 0xF147)
+#define    p_reg_sdioc_scsi 0xF147
+#define reg_sdioc_scsi_pos 6
+#define reg_sdioc_scsi_len 1
+#define reg_sdioc_scsi_lsb 0
+#define xd_p_reg_sdioc_sdc  (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_sdc  0xF148
+#define reg_sdioc_sdc_pos 0
+#define reg_sdioc_sdc_len 1
+#define reg_sdioc_sdc_lsb 0
+#define xd_p_reg_sdioc_smb  (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_smb  0xF148
+#define reg_sdioc_smb_pos 1
+#define reg_sdioc_smb_len 1
+#define reg_sdioc_smb_lsb 0
+#define xd_p_reg_sdioc_srw  (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_srw  0xF148
+#define reg_sdioc_srw_pos 2
+#define reg_sdioc_srw_len 1
+#define reg_sdioc_srw_lsb 0
+#define xd_p_reg_sdioc_sbs  (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_sbs  0xF148
+#define reg_sdioc_sbs_pos 3
+#define reg_sdioc_sbs_len 1
+#define reg_sdioc_sbs_lsb 0
+#define xd_p_reg_sdioc_s4mi (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_s4mi 0xF148
+#define reg_sdioc_s4mi_pos 4
+#define reg_sdioc_s4mi_len 1
+#define reg_sdioc_s4mi_lsb 0
+#define xd_p_reg_sdioc_lsc  (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_lsc  0xF148
+#define reg_sdioc_lsc_pos 6
+#define reg_sdioc_lsc_len 1
+#define reg_sdioc_lsc_lsb 0
+#define xd_p_reg_sdioc_4bls (*(volatile byte xdata *) 0xF148)
+#define    p_reg_sdioc_4bls 0xF148
+#define reg_sdioc_4bls_pos 7
+#define reg_sdioc_4bls_len 1
+#define reg_sdioc_4bls_lsb 0
+#define xd_p_reg_sdioc_cis_7_0  (*(volatile byte xdata *) 0xF149)
+#define    p_reg_sdioc_cis_7_0  0xF149
+#define reg_sdioc_cis_7_0_pos 0
+#define reg_sdioc_cis_7_0_len 8
+#define reg_sdioc_cis_7_0_lsb 0
+#define xd_p_reg_sdioc_cis_15_8 (*(volatile byte xdata *) 0xF14A)
+#define    p_reg_sdioc_cis_15_8 0xF14A
+#define reg_sdioc_cis_15_8_pos 0
+#define reg_sdioc_cis_15_8_len 8
+#define reg_sdioc_cis_15_8_lsb 8
+#define xd_p_reg_sdioc_cis_23_16    (*(volatile byte xdata *) 0xF14B)
+#define    p_reg_sdioc_cis_23_16    0xF14B
+#define reg_sdioc_cis_23_16_pos 0
+#define reg_sdioc_cis_23_16_len 8
+#define reg_sdioc_cis_23_16_lsb 16
+#define xd_p_reg_sdioc_fs   (*(volatile byte xdata *) 0xF14D)
+#define    p_reg_sdioc_fs   0xF14D
+#define reg_sdioc_fs_pos 0
+#define reg_sdioc_fs_len 4
+#define reg_sdioc_fs_lsb 0
+#define xd_p_reg_sdioc_df   (*(volatile byte xdata *) 0xF14D)
+#define    p_reg_sdioc_df   0xF14D
+#define reg_sdioc_df_pos 7
+#define reg_sdioc_df_len 1
+#define reg_sdioc_df_lsb 0
+#define xd_p_reg_sdioc_ex1  (*(volatile byte xdata *) 0xF14E)
+#define    p_reg_sdioc_ex1  0xF14E
+#define reg_sdioc_ex1_pos 1
+#define reg_sdioc_ex1_len 1
+#define reg_sdioc_ex1_lsb 0
+#define xd_p_reg_sdioc_rf1  (*(volatile byte xdata *) 0xF14F)
+#define    p_reg_sdioc_rf1  0xF14F
+#define reg_sdioc_rf1_pos 1
+#define reg_sdioc_rf1_len 1
+#define reg_sdioc_rf1_lsb 0
+#define xd_p_reg_sdioc_smpc (*(volatile byte xdata *) 0xF152)
+#define    p_reg_sdioc_smpc 0xF152
+#define reg_sdioc_smpc_pos 0
+#define reg_sdioc_smpc_len 1
+#define reg_sdioc_smpc_lsb 0
+#define xd_p_reg_sdioc_f1_code  (*(volatile byte xdata *) 0xF160)
+#define    p_reg_sdioc_f1_code  0xF160
+#define reg_sdioc_f1_code_pos 0
+#define reg_sdioc_f1_code_len 4
+#define reg_sdioc_f1_code_lsb 0
+#define xd_p_reg_sdioc_scsa (*(volatile byte xdata *) 0xF160)
+#define    p_reg_sdioc_scsa 0xF160
+#define reg_sdioc_scsa_pos 6
+#define reg_sdioc_scsa_len 1
+#define reg_sdioc_scsa_lsb 0
+#define xd_p_reg_sdioc_csa_en   (*(volatile byte xdata *) 0xF160)
+#define    p_reg_sdioc_csa_en   0xF160
+#define reg_sdioc_csa_en_pos 7
+#define reg_sdioc_csa_en_len 1
+#define reg_sdioc_csa_en_lsb 0
+#define xd_p_reg_sdioc_f1_ext_code  (*(volatile byte xdata *) 0xF161)
+#define    p_reg_sdioc_f1_ext_code  0xF161
+#define reg_sdioc_f1_ext_code_pos 0
+#define reg_sdioc_f1_ext_code_len 8
+#define reg_sdioc_f1_ext_code_lsb 0
+#define xd_p_reg_sdioc_sps  (*(volatile byte xdata *) 0xF162)
+#define    p_reg_sdioc_sps  0xF162
+#define reg_sdioc_sps_pos 0
+#define reg_sdioc_sps_len 1
+#define reg_sdioc_sps_lsb 0
+#define xd_p_reg_sdioc_func1_cis_ptr_7_0    (*(volatile byte xdata *) 0xF169)
+#define    p_reg_sdioc_func1_cis_ptr_7_0    0xF169
+#define reg_sdioc_func1_cis_ptr_7_0_pos 0
+#define reg_sdioc_func1_cis_ptr_7_0_len 8
+#define reg_sdioc_func1_cis_ptr_7_0_lsb 0
+#define xd_p_reg_sdioc_func1_cis_ptr_15_8   (*(volatile byte xdata *) 0xF16A)
+#define    p_reg_sdioc_func1_cis_ptr_15_8   0xF16A
+#define reg_sdioc_func1_cis_ptr_15_8_pos 0
+#define reg_sdioc_func1_cis_ptr_15_8_len 8
+#define reg_sdioc_func1_cis_ptr_15_8_lsb 8
+#define xd_p_reg_sdioc_func1_cis_ptr_23_16  (*(volatile byte xdata *) 0xF16B)
+#define    p_reg_sdioc_func1_cis_ptr_23_16  0xF16B
+#define reg_sdioc_func1_cis_ptr_23_16_pos 0
+#define reg_sdioc_func1_cis_ptr_23_16_len 8
+#define reg_sdioc_func1_cis_ptr_23_16_lsb 16
+#define xd_p_reg_sdio_FUNCID0_0 (*(volatile byte xdata *) 0xF180)
+#define    p_reg_sdio_FUNCID0_0 0xF180
+#define reg_sdio_FUNCID0_0_pos 0
+#define reg_sdio_FUNCID0_0_len 8
+#define reg_sdio_FUNCID0_0_lsb 0
+#define xd_p_reg_sdio_FUNCID0_1 (*(volatile byte xdata *) 0xF181)
+#define    p_reg_sdio_FUNCID0_1 0xF181
+#define reg_sdio_FUNCID0_1_pos 0
+#define reg_sdio_FUNCID0_1_len 8
+#define reg_sdio_FUNCID0_1_lsb 0
+#define xd_p_reg_sdio_FUNCID0_2 (*(volatile byte xdata *) 0xF182)
+#define    p_reg_sdio_FUNCID0_2 0xF182
+#define reg_sdio_FUNCID0_2_pos 0
+#define reg_sdio_FUNCID0_2_len 8
+#define reg_sdio_FUNCID0_2_lsb 0
+#define xd_p_reg_sdio_FUNCID0_3 (*(volatile byte xdata *) 0xF183)
+#define    p_reg_sdio_FUNCID0_3 0xF183
+#define reg_sdio_FUNCID0_3_pos 0
+#define reg_sdio_FUNCID0_3_len 8
+#define reg_sdio_FUNCID0_3_lsb 0
+#define xd_p_reg_sdio_MANFID0_0 (*(volatile byte xdata *) 0xF184)
+#define    p_reg_sdio_MANFID0_0 0xF184
+#define reg_sdio_MANFID0_0_pos 0
+#define reg_sdio_MANFID0_0_len 8
+#define reg_sdio_MANFID0_0_lsb 0
+#define xd_p_reg_sdio_MANFID0_1 (*(volatile byte xdata *) 0xF185)
+#define    p_reg_sdio_MANFID0_1 0xF185
+#define reg_sdio_MANFID0_1_pos 0
+#define reg_sdio_MANFID0_1_len 8
+#define reg_sdio_MANFID0_1_lsb 0
+#define xd_p_reg_sdio_MANFID0_2_7_0 (*(volatile byte xdata *) 0xF186)
+#define    p_reg_sdio_MANFID0_2_7_0 0xF186
+#define reg_sdio_MANFID0_2_7_0_pos 0
+#define reg_sdio_MANFID0_2_7_0_len 8
+#define reg_sdio_MANFID0_2_7_0_lsb 0
+#define xd_p_reg_sdio_MANFID0_2_15_8    (*(volatile byte xdata *) 0xF187)
+#define    p_reg_sdio_MANFID0_2_15_8    0xF187
+#define reg_sdio_MANFID0_2_15_8_pos 0
+#define reg_sdio_MANFID0_2_15_8_len 8
+#define reg_sdio_MANFID0_2_15_8_lsb 8
+#define xd_p_reg_sdio_MANFID0_4_7_0 (*(volatile byte xdata *) 0xF188)
+#define    p_reg_sdio_MANFID0_4_7_0 0xF188
+#define reg_sdio_MANFID0_4_7_0_pos 0
+#define reg_sdio_MANFID0_4_7_0_len 8
+#define reg_sdio_MANFID0_4_7_0_lsb 0
+#define xd_p_reg_sdio_MANFID0_4_15_8    (*(volatile byte xdata *) 0xF189)
+#define    p_reg_sdio_MANFID0_4_15_8    0xF189
+#define reg_sdio_MANFID0_4_15_8_pos 0
+#define reg_sdio_MANFID0_4_15_8_len 8
+#define reg_sdio_MANFID0_4_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE0_0  (*(volatile byte xdata *) 0xF18A)
+#define    p_reg_sdio_FUNCE0_0  0xF18A
+#define reg_sdio_FUNCE0_0_pos 0
+#define reg_sdio_FUNCE0_0_len 8
+#define reg_sdio_FUNCE0_0_lsb 0
+#define xd_p_reg_sdio_FUNCE0_1  (*(volatile byte xdata *) 0xF18B)
+#define    p_reg_sdio_FUNCE0_1  0xF18B
+#define reg_sdio_FUNCE0_1_pos 0
+#define reg_sdio_FUNCE0_1_len 8
+#define reg_sdio_FUNCE0_1_lsb 0
+#define xd_p_reg_sdio_FUNCE0_2  (*(volatile byte xdata *) 0xF18C)
+#define    p_reg_sdio_FUNCE0_2  0xF18C
+#define reg_sdio_FUNCE0_2_pos 0
+#define reg_sdio_FUNCE0_2_len 8
+#define reg_sdio_FUNCE0_2_lsb 0
+#define xd_p_reg_sdio_FUNCE0_3_7_0  (*(volatile byte xdata *) 0xF18D)
+#define    p_reg_sdio_FUNCE0_3_7_0  0xF18D
+#define reg_sdio_FUNCE0_3_7_0_pos 0
+#define reg_sdio_FUNCE0_3_7_0_len 8
+#define reg_sdio_FUNCE0_3_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE0_3_15_8 (*(volatile byte xdata *) 0xF18E)
+#define    p_reg_sdio_FUNCE0_3_15_8 0xF18E
+#define reg_sdio_FUNCE0_3_15_8_pos 0
+#define reg_sdio_FUNCE0_3_15_8_len 8
+#define reg_sdio_FUNCE0_3_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE0_5  (*(volatile byte xdata *) 0xF18F)
+#define    p_reg_sdio_FUNCE0_5  0xF18F
+#define reg_sdio_FUNCE0_5_pos 0
+#define reg_sdio_FUNCE0_5_len 8
+#define reg_sdio_FUNCE0_5_lsb 0
+#define xd_p_reg_sdio_VERS_10_0 (*(volatile byte xdata *) 0xF190)
+#define    p_reg_sdio_VERS_10_0 0xF190
+#define reg_sdio_VERS_10_0_pos 0
+#define reg_sdio_VERS_10_0_len 8
+#define reg_sdio_VERS_10_0_lsb 0
+#define xd_p_reg_sdio_VERS_10_1 (*(volatile byte xdata *) 0xF191)
+#define    p_reg_sdio_VERS_10_1 0xF191
+#define reg_sdio_VERS_10_1_pos 0
+#define reg_sdio_VERS_10_1_len 8
+#define reg_sdio_VERS_10_1_lsb 0
+#define xd_p_reg_sdio_VERS_10_2 (*(volatile byte xdata *) 0xF192)
+#define    p_reg_sdio_VERS_10_2 0xF192
+#define reg_sdio_VERS_10_2_pos 0
+#define reg_sdio_VERS_10_2_len 8
+#define reg_sdio_VERS_10_2_lsb 0
+#define xd_p_reg_sdio_VERS_10_3 (*(volatile byte xdata *) 0xF193)
+#define    p_reg_sdio_VERS_10_3 0xF193
+#define reg_sdio_VERS_10_3_pos 0
+#define reg_sdio_VERS_10_3_len 8
+#define reg_sdio_VERS_10_3_lsb 0
+#define xd_p_reg_sdio_VERS_10_4 (*(volatile byte xdata *) 0xF194)
+#define    p_reg_sdio_VERS_10_4 0xF194
+#define reg_sdio_VERS_10_4_pos 0
+#define reg_sdio_VERS_10_4_len 8
+#define reg_sdio_VERS_10_4_lsb 0
+#define xd_p_reg_sdio_VERS_10_5 (*(volatile byte xdata *) 0xF195)
+#define    p_reg_sdio_VERS_10_5 0xF195
+#define reg_sdio_VERS_10_5_pos 0
+#define reg_sdio_VERS_10_5_len 8
+#define reg_sdio_VERS_10_5_lsb 0
+#define xd_p_reg_sdio_VERS_10_6 (*(volatile byte xdata *) 0xF196)
+#define    p_reg_sdio_VERS_10_6 0xF196
+#define reg_sdio_VERS_10_6_pos 0
+#define reg_sdio_VERS_10_6_len 8
+#define reg_sdio_VERS_10_6_lsb 0
+#define xd_p_reg_sdio_VERS_10_7 (*(volatile byte xdata *) 0xF197)
+#define    p_reg_sdio_VERS_10_7 0xF197
+#define reg_sdio_VERS_10_7_pos 0
+#define reg_sdio_VERS_10_7_len 8
+#define reg_sdio_VERS_10_7_lsb 0
+#define xd_p_reg_sdio_VERS_10_8 (*(volatile byte xdata *) 0xF198)
+#define    p_reg_sdio_VERS_10_8 0xF198
+#define reg_sdio_VERS_10_8_pos 0
+#define reg_sdio_VERS_10_8_len 8
+#define reg_sdio_VERS_10_8_lsb 0
+#define xd_p_reg_sdio_VERS_10_9 (*(volatile byte xdata *) 0xF199)
+#define    p_reg_sdio_VERS_10_9 0xF199
+#define reg_sdio_VERS_10_9_pos 0
+#define reg_sdio_VERS_10_9_len 8
+#define reg_sdio_VERS_10_9_lsb 0
+#define xd_p_reg_sdio_VERS_10_A (*(volatile byte xdata *) 0xF19A)
+#define    p_reg_sdio_VERS_10_A 0xF19A
+#define reg_sdio_VERS_10_A_pos 0
+#define reg_sdio_VERS_10_A_len 8
+#define reg_sdio_VERS_10_A_lsb 0
+#define xd_p_reg_sdio_VERS_10_B (*(volatile byte xdata *) 0xF19B)
+#define    p_reg_sdio_VERS_10_B 0xF19B
+#define reg_sdio_VERS_10_B_pos 0
+#define reg_sdio_VERS_10_B_len 8
+#define reg_sdio_VERS_10_B_lsb 0
+#define xd_p_reg_sdio_VERS_10_C (*(volatile byte xdata *) 0xF19C)
+#define    p_reg_sdio_VERS_10_C 0xF19C
+#define reg_sdio_VERS_10_C_pos 0
+#define reg_sdio_VERS_10_C_len 8
+#define reg_sdio_VERS_10_C_lsb 0
+#define xd_p_reg_sdio_VERS_10_D (*(volatile byte xdata *) 0xF19D)
+#define    p_reg_sdio_VERS_10_D 0xF19D
+#define reg_sdio_VERS_10_D_pos 0
+#define reg_sdio_VERS_10_D_len 8
+#define reg_sdio_VERS_10_D_lsb 0
+#define xd_p_reg_sdio_VERS_10_E (*(volatile byte xdata *) 0xF19E)
+#define    p_reg_sdio_VERS_10_E 0xF19E
+#define reg_sdio_VERS_10_E_pos 0
+#define reg_sdio_VERS_10_E_len 8
+#define reg_sdio_VERS_10_E_lsb 0
+#define xd_p_reg_sdio_VERS_10_F (*(volatile byte xdata *) 0xF19F)
+#define    p_reg_sdio_VERS_10_F 0xF19F
+#define reg_sdio_VERS_10_F_pos 0
+#define reg_sdio_VERS_10_F_len 8
+#define reg_sdio_VERS_10_F_lsb 0
+#define xd_p_reg_sdio_VERS_10_10    (*(volatile byte xdata *) 0xF1A0)
+#define    p_reg_sdio_VERS_10_10    0xF1A0
+#define reg_sdio_VERS_10_10_pos 0
+#define reg_sdio_VERS_10_10_len 8
+#define reg_sdio_VERS_10_10_lsb 0
+#define xd_p_reg_sdio_VERS_10_11    (*(volatile byte xdata *) 0xF1A1)
+#define    p_reg_sdio_VERS_10_11    0xF1A1
+#define reg_sdio_VERS_10_11_pos 0
+#define reg_sdio_VERS_10_11_len 8
+#define reg_sdio_VERS_10_11_lsb 0
+#define xd_p_reg_sdio_VERS_10_12    (*(volatile byte xdata *) 0xF1A2)
+#define    p_reg_sdio_VERS_10_12    0xF1A2
+#define reg_sdio_VERS_10_12_pos 0
+#define reg_sdio_VERS_10_12_len 8
+#define reg_sdio_VERS_10_12_lsb 0
+#define xd_p_reg_sdio_VERS_10_13    (*(volatile byte xdata *) 0xF1A3)
+#define    p_reg_sdio_VERS_10_13    0xF1A3
+#define reg_sdio_VERS_10_13_pos 0
+#define reg_sdio_VERS_10_13_len 8
+#define reg_sdio_VERS_10_13_lsb 0
+#define xd_p_reg_sdio_VERS_10_14    (*(volatile byte xdata *) 0xF1A4)
+#define    p_reg_sdio_VERS_10_14    0xF1A4
+#define reg_sdio_VERS_10_14_pos 0
+#define reg_sdio_VERS_10_14_len 8
+#define reg_sdio_VERS_10_14_lsb 0
+#define xd_p_reg_sdio_VERS_10_15    (*(volatile byte xdata *) 0xF1A5)
+#define    p_reg_sdio_VERS_10_15    0xF1A5
+#define reg_sdio_VERS_10_15_pos 0
+#define reg_sdio_VERS_10_15_len 8
+#define reg_sdio_VERS_10_15_lsb 0
+#define xd_p_reg_sdio_VERS_10_16    (*(volatile byte xdata *) 0xF1A6)
+#define    p_reg_sdio_VERS_10_16    0xF1A6
+#define reg_sdio_VERS_10_16_pos 0
+#define reg_sdio_VERS_10_16_len 8
+#define reg_sdio_VERS_10_16_lsb 0
+#define xd_p_reg_sdio_VERS_10_17    (*(volatile byte xdata *) 0xF1A7)
+#define    p_reg_sdio_VERS_10_17    0xF1A7
+#define reg_sdio_VERS_10_17_pos 0
+#define reg_sdio_VERS_10_17_len 8
+#define reg_sdio_VERS_10_17_lsb 0
+#define xd_p_reg_sdio_VERS_10_18    (*(volatile byte xdata *) 0xF1A8)
+#define    p_reg_sdio_VERS_10_18    0xF1A8
+#define reg_sdio_VERS_10_18_pos 0
+#define reg_sdio_VERS_10_18_len 8
+#define reg_sdio_VERS_10_18_lsb 0
+#define xd_p_reg_sdio_VERS_10_19    (*(volatile byte xdata *) 0xF1A9)
+#define    p_reg_sdio_VERS_10_19    0xF1A9
+#define reg_sdio_VERS_10_19_pos 0
+#define reg_sdio_VERS_10_19_len 8
+#define reg_sdio_VERS_10_19_lsb 0
+#define xd_p_reg_sdio_VERS_10_1A    (*(volatile byte xdata *) 0xF1AA)
+#define    p_reg_sdio_VERS_10_1A    0xF1AA
+#define reg_sdio_VERS_10_1A_pos 0
+#define reg_sdio_VERS_10_1A_len 8
+#define reg_sdio_VERS_10_1A_lsb 0
+#define xd_p_reg_sdio_VERS_10_1B    (*(volatile byte xdata *) 0xF1AB)
+#define    p_reg_sdio_VERS_10_1B    0xF1AB
+#define reg_sdio_VERS_10_1B_pos 0
+#define reg_sdio_VERS_10_1B_len 8
+#define reg_sdio_VERS_10_1B_lsb 0
+#define xd_p_reg_sdio_VERS_10_1C    (*(volatile byte xdata *) 0xF1AC)
+#define    p_reg_sdio_VERS_10_1C    0xF1AC
+#define reg_sdio_VERS_10_1C_pos 0
+#define reg_sdio_VERS_10_1C_len 8
+#define reg_sdio_VERS_10_1C_lsb 0
+#define xd_p_reg_sdio_VERS_10_1D    (*(volatile byte xdata *) 0xF1AD)
+#define    p_reg_sdio_VERS_10_1D    0xF1AD
+#define reg_sdio_VERS_10_1D_pos 0
+#define reg_sdio_VERS_10_1D_len 8
+#define reg_sdio_VERS_10_1D_lsb 0
+#define xd_p_reg_sdio_VERS_10_1E    (*(volatile byte xdata *) 0xF1AE)
+#define    p_reg_sdio_VERS_10_1E    0xF1AE
+#define reg_sdio_VERS_10_1E_pos 0
+#define reg_sdio_VERS_10_1E_len 8
+#define reg_sdio_VERS_10_1E_lsb 0
+#define xd_p_reg_sdio_VERS_10_1F    (*(volatile byte xdata *) 0xF1AF)
+#define    p_reg_sdio_VERS_10_1F    0xF1AF
+#define reg_sdio_VERS_10_1F_pos 0
+#define reg_sdio_VERS_10_1F_len 8
+#define reg_sdio_VERS_10_1F_lsb 0
+#define xd_p_reg_sdio_VERS_10_20    (*(volatile byte xdata *) 0xF1B0)
+#define    p_reg_sdio_VERS_10_20    0xF1B0
+#define reg_sdio_VERS_10_20_pos 0
+#define reg_sdio_VERS_10_20_len 8
+#define reg_sdio_VERS_10_20_lsb 0
+#define xd_p_reg_sdio_VERS_10_21    (*(volatile byte xdata *) 0xF1B1)
+#define    p_reg_sdio_VERS_10_21    0xF1B1
+#define reg_sdio_VERS_10_21_pos 0
+#define reg_sdio_VERS_10_21_len 8
+#define reg_sdio_VERS_10_21_lsb 0
+#define xd_p_reg_sdio_VERS_10_22    (*(volatile byte xdata *) 0xF1B2)
+#define    p_reg_sdio_VERS_10_22    0xF1B2
+#define reg_sdio_VERS_10_22_pos 0
+#define reg_sdio_VERS_10_22_len 8
+#define reg_sdio_VERS_10_22_lsb 0
+#define xd_p_reg_sdio_VERS_10_23    (*(volatile byte xdata *) 0xF1B3)
+#define    p_reg_sdio_VERS_10_23    0xF1B3
+#define reg_sdio_VERS_10_23_pos 0
+#define reg_sdio_VERS_10_23_len 8
+#define reg_sdio_VERS_10_23_lsb 0
+#define xd_p_reg_sdio_VERS_10_24    (*(volatile byte xdata *) 0xF1B4)
+#define    p_reg_sdio_VERS_10_24    0xF1B4
+#define reg_sdio_VERS_10_24_pos 0
+#define reg_sdio_VERS_10_24_len 8
+#define reg_sdio_VERS_10_24_lsb 0
+#define xd_p_reg_sdio_VERS_10_25    (*(volatile byte xdata *) 0xF1B5)
+#define    p_reg_sdio_VERS_10_25    0xF1B5
+#define reg_sdio_VERS_10_25_pos 0
+#define reg_sdio_VERS_10_25_len 8
+#define reg_sdio_VERS_10_25_lsb 0
+#define xd_p_reg_sdio_VERS_10_26    (*(volatile byte xdata *) 0xF1B6)
+#define    p_reg_sdio_VERS_10_26    0xF1B6
+#define reg_sdio_VERS_10_26_pos 0
+#define reg_sdio_VERS_10_26_len 8
+#define reg_sdio_VERS_10_26_lsb 0
+#define xd_p_reg_sdio_VERS_10_27    (*(volatile byte xdata *) 0xF1B7)
+#define    p_reg_sdio_VERS_10_27    0xF1B7
+#define reg_sdio_VERS_10_27_pos 0
+#define reg_sdio_VERS_10_27_len 8
+#define reg_sdio_VERS_10_27_lsb 0
+#define xd_p_reg_sdio_END0  (*(volatile byte xdata *) 0xF1B8)
+#define    p_reg_sdio_END0  0xF1B8
+#define reg_sdio_END0_pos 0
+#define reg_sdio_END0_len 8
+#define reg_sdio_END0_lsb 0
+#define xd_p_reg_sdio_FUNCID1_0 (*(volatile byte xdata *) 0xF1C0)
+#define    p_reg_sdio_FUNCID1_0 0xF1C0
+#define reg_sdio_FUNCID1_0_pos 0
+#define reg_sdio_FUNCID1_0_len 8
+#define reg_sdio_FUNCID1_0_lsb 0
+#define xd_p_reg_sdio_FUNCID1_1 (*(volatile byte xdata *) 0xF1C1)
+#define    p_reg_sdio_FUNCID1_1 0xF1C1
+#define reg_sdio_FUNCID1_1_pos 0
+#define reg_sdio_FUNCID1_1_len 8
+#define reg_sdio_FUNCID1_1_lsb 0
+#define xd_p_reg_sdio_FUNCID1_2 (*(volatile byte xdata *) 0xF1C2)
+#define    p_reg_sdio_FUNCID1_2 0xF1C2
+#define reg_sdio_FUNCID1_2_pos 0
+#define reg_sdio_FUNCID1_2_len 8
+#define reg_sdio_FUNCID1_2_lsb 0
+#define xd_p_reg_sdio_FUNCID1_3 (*(volatile byte xdata *) 0xF1C3)
+#define    p_reg_sdio_FUNCID1_3 0xF1C3
+#define reg_sdio_FUNCID1_3_pos 0
+#define reg_sdio_FUNCID1_3_len 8
+#define reg_sdio_FUNCID1_3_lsb 0
+#define xd_p_reg_sdio_FUNCE1_0  (*(volatile byte xdata *) 0xF1C4)
+#define    p_reg_sdio_FUNCE1_0  0xF1C4
+#define reg_sdio_FUNCE1_0_pos 0
+#define reg_sdio_FUNCE1_0_len 8
+#define reg_sdio_FUNCE1_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_1  (*(volatile byte xdata *) 0xF1C5)
+#define    p_reg_sdio_FUNCE1_1  0xF1C5
+#define reg_sdio_FUNCE1_1_pos 0
+#define reg_sdio_FUNCE1_1_len 8
+#define reg_sdio_FUNCE1_1_lsb 0
+#define xd_p_reg_sdio_FUNCE1_2  (*(volatile byte xdata *) 0xF1C6)
+#define    p_reg_sdio_FUNCE1_2  0xF1C6
+#define reg_sdio_FUNCE1_2_pos 0
+#define reg_sdio_FUNCE1_2_len 8
+#define reg_sdio_FUNCE1_2_lsb 0
+#define xd_p_reg_sdio_FUNCE1_3  (*(volatile byte xdata *) 0xF1C7)
+#define    p_reg_sdio_FUNCE1_3  0xF1C7
+#define reg_sdio_FUNCE1_3_pos 0
+#define reg_sdio_FUNCE1_3_len 8
+#define reg_sdio_FUNCE1_3_lsb 0
+#define xd_p_reg_sdio_FUNCE1_4  (*(volatile byte xdata *) 0xF1C8)
+#define    p_reg_sdio_FUNCE1_4  0xF1C8
+#define reg_sdio_FUNCE1_4_pos 0
+#define reg_sdio_FUNCE1_4_len 8
+#define reg_sdio_FUNCE1_4_lsb 0
+#define xd_p_reg_sdio_FUNCE1_5_7_0  (*(volatile byte xdata *) 0xF1C9)
+#define    p_reg_sdio_FUNCE1_5_7_0  0xF1C9
+#define reg_sdio_FUNCE1_5_7_0_pos 0
+#define reg_sdio_FUNCE1_5_7_0_len 8
+#define reg_sdio_FUNCE1_5_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_5_15_8 (*(volatile byte xdata *) 0xF1CA)
+#define    p_reg_sdio_FUNCE1_5_15_8 0xF1CA
+#define reg_sdio_FUNCE1_5_15_8_pos 0
+#define reg_sdio_FUNCE1_5_15_8_len 8
+#define reg_sdio_FUNCE1_5_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_5_23_16    (*(volatile byte xdata *) 0xF1CB)
+#define    p_reg_sdio_FUNCE1_5_23_16    0xF1CB
+#define reg_sdio_FUNCE1_5_23_16_pos 0
+#define reg_sdio_FUNCE1_5_23_16_len 8
+#define reg_sdio_FUNCE1_5_23_16_lsb 16
+#define xd_p_reg_sdio_FUNCE1_5_31_24    (*(volatile byte xdata *) 0xF1CC)
+#define    p_reg_sdio_FUNCE1_5_31_24    0xF1CC
+#define reg_sdio_FUNCE1_5_31_24_pos 0
+#define reg_sdio_FUNCE1_5_31_24_len 8
+#define reg_sdio_FUNCE1_5_31_24_lsb 24
+#define xd_p_reg_sdio_FUNCE1_9_7_0  (*(volatile byte xdata *) 0xF1CD)
+#define    p_reg_sdio_FUNCE1_9_7_0  0xF1CD
+#define reg_sdio_FUNCE1_9_7_0_pos 0
+#define reg_sdio_FUNCE1_9_7_0_len 8
+#define reg_sdio_FUNCE1_9_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_9_15_8 (*(volatile byte xdata *) 0xF1CE)
+#define    p_reg_sdio_FUNCE1_9_15_8 0xF1CE
+#define reg_sdio_FUNCE1_9_15_8_pos 0
+#define reg_sdio_FUNCE1_9_15_8_len 8
+#define reg_sdio_FUNCE1_9_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_9_23_16    (*(volatile byte xdata *) 0xF1CF)
+#define    p_reg_sdio_FUNCE1_9_23_16    0xF1CF
+#define reg_sdio_FUNCE1_9_23_16_pos 0
+#define reg_sdio_FUNCE1_9_23_16_len 8
+#define reg_sdio_FUNCE1_9_23_16_lsb 16
+#define xd_p_reg_sdio_FUNCE1_9_31_24    (*(volatile byte xdata *) 0xF1D0)
+#define    p_reg_sdio_FUNCE1_9_31_24    0xF1D0
+#define reg_sdio_FUNCE1_9_31_24_pos 0
+#define reg_sdio_FUNCE1_9_31_24_len 8
+#define reg_sdio_FUNCE1_9_31_24_lsb 24
+#define xd_p_reg_sdio_FUNCE1_D  (*(volatile byte xdata *) 0xF1D1)
+#define    p_reg_sdio_FUNCE1_D  0xF1D1
+#define reg_sdio_FUNCE1_D_pos 0
+#define reg_sdio_FUNCE1_D_len 8
+#define reg_sdio_FUNCE1_D_lsb 0
+#define xd_p_reg_sdio_FUNCE1_E_7_0  (*(volatile byte xdata *) 0xF1D2)
+#define    p_reg_sdio_FUNCE1_E_7_0  0xF1D2
+#define reg_sdio_FUNCE1_E_7_0_pos 0
+#define reg_sdio_FUNCE1_E_7_0_len 8
+#define reg_sdio_FUNCE1_E_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_E_15_8 (*(volatile byte xdata *) 0xF1D3)
+#define    p_reg_sdio_FUNCE1_E_15_8 0xF1D3
+#define reg_sdio_FUNCE1_E_15_8_pos 0
+#define reg_sdio_FUNCE1_E_15_8_len 8
+#define reg_sdio_FUNCE1_E_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_10_7_0 (*(volatile byte xdata *) 0xF1D4)
+#define    p_reg_sdio_FUNCE1_10_7_0 0xF1D4
+#define reg_sdio_FUNCE1_10_7_0_pos 0
+#define reg_sdio_FUNCE1_10_7_0_len 8
+#define reg_sdio_FUNCE1_10_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_10_15_8    (*(volatile byte xdata *) 0xF1D5)
+#define    p_reg_sdio_FUNCE1_10_15_8    0xF1D5
+#define reg_sdio_FUNCE1_10_15_8_pos 0
+#define reg_sdio_FUNCE1_10_15_8_len 8
+#define reg_sdio_FUNCE1_10_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_10_23_16   (*(volatile byte xdata *) 0xF1D6)
+#define    p_reg_sdio_FUNCE1_10_23_16   0xF1D6
+#define reg_sdio_FUNCE1_10_23_16_pos 0
+#define reg_sdio_FUNCE1_10_23_16_len 8
+#define reg_sdio_FUNCE1_10_23_16_lsb 16
+#define xd_p_reg_sdio_FUNCE1_10_31_24   (*(volatile byte xdata *) 0xF1D7)
+#define    p_reg_sdio_FUNCE1_10_31_24   0xF1D7
+#define reg_sdio_FUNCE1_10_31_24_pos 0
+#define reg_sdio_FUNCE1_10_31_24_len 8
+#define reg_sdio_FUNCE1_10_31_24_lsb 24
+#define xd_p_reg_sdio_FUNCE1_14 (*(volatile byte xdata *) 0xF1D8)
+#define    p_reg_sdio_FUNCE1_14 0xF1D8
+#define reg_sdio_FUNCE1_14_pos 0
+#define reg_sdio_FUNCE1_14_len 8
+#define reg_sdio_FUNCE1_14_lsb 0
+#define xd_p_reg_sdio_FUNCE1_15 (*(volatile byte xdata *) 0xF1D9)
+#define    p_reg_sdio_FUNCE1_15 0xF1D9
+#define reg_sdio_FUNCE1_15_pos 0
+#define reg_sdio_FUNCE1_15_len 8
+#define reg_sdio_FUNCE1_15_lsb 0
+#define xd_p_reg_sdio_FUNCE1_16 (*(volatile byte xdata *) 0xF1DA)
+#define    p_reg_sdio_FUNCE1_16 0xF1DA
+#define reg_sdio_FUNCE1_16_pos 0
+#define reg_sdio_FUNCE1_16_len 8
+#define reg_sdio_FUNCE1_16_lsb 0
+#define xd_p_reg_sdio_FUNCE1_17 (*(volatile byte xdata *) 0xF1DB)
+#define    p_reg_sdio_FUNCE1_17 0xF1DB
+#define reg_sdio_FUNCE1_17_pos 0
+#define reg_sdio_FUNCE1_17_len 8
+#define reg_sdio_FUNCE1_17_lsb 0
+#define xd_p_reg_sdio_FUNCE1_18 (*(volatile byte xdata *) 0xF1DC)
+#define    p_reg_sdio_FUNCE1_18 0xF1DC
+#define reg_sdio_FUNCE1_18_pos 0
+#define reg_sdio_FUNCE1_18_len 8
+#define reg_sdio_FUNCE1_18_lsb 0
+#define xd_p_reg_sdio_FUNCE1_19 (*(volatile byte xdata *) 0xF1DD)
+#define    p_reg_sdio_FUNCE1_19 0xF1DD
+#define reg_sdio_FUNCE1_19_pos 0
+#define reg_sdio_FUNCE1_19_len 8
+#define reg_sdio_FUNCE1_19_lsb 0
+#define xd_p_reg_sdio_FUNCE1_1A_7_0 (*(volatile byte xdata *) 0xF1DE)
+#define    p_reg_sdio_FUNCE1_1A_7_0 0xF1DE
+#define reg_sdio_FUNCE1_1A_7_0_pos 0
+#define reg_sdio_FUNCE1_1A_7_0_len 8
+#define reg_sdio_FUNCE1_1A_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_1A_15_8    (*(volatile byte xdata *) 0xF1DF)
+#define    p_reg_sdio_FUNCE1_1A_15_8    0xF1DF
+#define reg_sdio_FUNCE1_1A_15_8_pos 0
+#define reg_sdio_FUNCE1_1A_15_8_len 8
+#define reg_sdio_FUNCE1_1A_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_1C_7_0 (*(volatile byte xdata *) 0xF1E0)
+#define    p_reg_sdio_FUNCE1_1C_7_0 0xF1E0
+#define reg_sdio_FUNCE1_1C_7_0_pos 0
+#define reg_sdio_FUNCE1_1C_7_0_len 8
+#define reg_sdio_FUNCE1_1C_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_1C_15_8    (*(volatile byte xdata *) 0xF1E1)
+#define    p_reg_sdio_FUNCE1_1C_15_8    0xF1E1
+#define reg_sdio_FUNCE1_1C_15_8_pos 0
+#define reg_sdio_FUNCE1_1C_15_8_len 8
+#define reg_sdio_FUNCE1_1C_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_1E_7_0 (*(volatile byte xdata *) 0xF1E2)
+#define    p_reg_sdio_FUNCE1_1E_7_0 0xF1E2
+#define reg_sdio_FUNCE1_1E_7_0_pos 0
+#define reg_sdio_FUNCE1_1E_7_0_len 8
+#define reg_sdio_FUNCE1_1E_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_1E_15_8    (*(volatile byte xdata *) 0xF1E3)
+#define    p_reg_sdio_FUNCE1_1E_15_8    0xF1E3
+#define reg_sdio_FUNCE1_1E_15_8_pos 0
+#define reg_sdio_FUNCE1_1E_15_8_len 8
+#define reg_sdio_FUNCE1_1E_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_20_7_0 (*(volatile byte xdata *) 0xF1E4)
+#define    p_reg_sdio_FUNCE1_20_7_0 0xF1E4
+#define reg_sdio_FUNCE1_20_7_0_pos 0
+#define reg_sdio_FUNCE1_20_7_0_len 8
+#define reg_sdio_FUNCE1_20_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_20_15_8    (*(volatile byte xdata *) 0xF1E5)
+#define    p_reg_sdio_FUNCE1_20_15_8    0xF1E5
+#define reg_sdio_FUNCE1_20_15_8_pos 0
+#define reg_sdio_FUNCE1_20_15_8_len 8
+#define reg_sdio_FUNCE1_20_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_22_7_0 (*(volatile byte xdata *) 0xF1E6)
+#define    p_reg_sdio_FUNCE1_22_7_0 0xF1E6
+#define reg_sdio_FUNCE1_22_7_0_pos 0
+#define reg_sdio_FUNCE1_22_7_0_len 8
+#define reg_sdio_FUNCE1_22_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_22_15_8    (*(volatile byte xdata *) 0xF1E7)
+#define    p_reg_sdio_FUNCE1_22_15_8    0xF1E7
+#define reg_sdio_FUNCE1_22_15_8_pos 0
+#define reg_sdio_FUNCE1_22_15_8_len 8
+#define reg_sdio_FUNCE1_22_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_24_7_0 (*(volatile byte xdata *) 0xF1E8)
+#define    p_reg_sdio_FUNCE1_24_7_0 0xF1E8
+#define reg_sdio_FUNCE1_24_7_0_pos 0
+#define reg_sdio_FUNCE1_24_7_0_len 8
+#define reg_sdio_FUNCE1_24_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_24_15_8    (*(volatile byte xdata *) 0xF1E9)
+#define    p_reg_sdio_FUNCE1_24_15_8    0xF1E9
+#define reg_sdio_FUNCE1_24_15_8_pos 0
+#define reg_sdio_FUNCE1_24_15_8_len 8
+#define reg_sdio_FUNCE1_24_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_26_7_0 (*(volatile byte xdata *) 0xF1EA)
+#define    p_reg_sdio_FUNCE1_26_7_0 0xF1EA
+#define reg_sdio_FUNCE1_26_7_0_pos 0
+#define reg_sdio_FUNCE1_26_7_0_len 8
+#define reg_sdio_FUNCE1_26_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_26_15_8    (*(volatile byte xdata *) 0xF1EB)
+#define    p_reg_sdio_FUNCE1_26_15_8    0xF1EB
+#define reg_sdio_FUNCE1_26_15_8_pos 0
+#define reg_sdio_FUNCE1_26_15_8_len 8
+#define reg_sdio_FUNCE1_26_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_28_7_0 (*(volatile byte xdata *) 0xF1EC)
+#define    p_reg_sdio_FUNCE1_28_7_0 0xF1EC
+#define reg_sdio_FUNCE1_28_7_0_pos 0
+#define reg_sdio_FUNCE1_28_7_0_len 8
+#define reg_sdio_FUNCE1_28_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_28_15_8    (*(volatile byte xdata *) 0xF1ED)
+#define    p_reg_sdio_FUNCE1_28_15_8    0xF1ED
+#define reg_sdio_FUNCE1_28_15_8_pos 0
+#define reg_sdio_FUNCE1_28_15_8_len 8
+#define reg_sdio_FUNCE1_28_15_8_lsb 8
+#define xd_p_reg_sdio_FUNCE1_2A_7_0 (*(volatile byte xdata *) 0xF1EE)
+#define    p_reg_sdio_FUNCE1_2A_7_0 0xF1EE
+#define reg_sdio_FUNCE1_2A_7_0_pos 0
+#define reg_sdio_FUNCE1_2A_7_0_len 8
+#define reg_sdio_FUNCE1_2A_7_0_lsb 0
+#define xd_p_reg_sdio_FUNCE1_2A_15_8    (*(volatile byte xdata *) 0xF1EF)
+#define    p_reg_sdio_FUNCE1_2A_15_8    0xF1EF
+#define reg_sdio_FUNCE1_2A_15_8_pos 0
+#define reg_sdio_FUNCE1_2A_15_8_len 8
+#define reg_sdio_FUNCE1_2A_15_8_lsb 8
+#define xd_p_reg_sdio_END1  (*(volatile byte xdata *) 0xF1F0)
+#define    p_reg_sdio_END1  0xF1F0
+#define reg_sdio_END1_pos 0
+#define reg_sdio_END1_len 8
+#define reg_sdio_END1_lsb 0
+#define xd_r_sdioc_tx_fifo_empty    (*(volatile byte xdata *) 0xF210)
+#define    r_sdioc_tx_fifo_empty    0xF210
+#define sdioc_tx_fifo_empty_pos 0
+#define sdioc_tx_fifo_empty_len 1
+#define sdioc_tx_fifo_empty_lsb 0
+#define xd_p_reg_sdio_53ra  (*(volatile byte xdata *) 0xF210)
+#define    p_reg_sdio_53ra  0xF210
+#define reg_sdio_53ra_pos 1
+#define reg_sdio_53ra_len 1
+#define reg_sdio_53ra_lsb 0
+#define xd_p_reg_sdioc_rd_wait_dly  (*(volatile byte xdata *) 0xF210)
+#define    p_reg_sdioc_rd_wait_dly  0xF210
+#define reg_sdioc_rd_wait_dly_pos 4
+#define reg_sdioc_rd_wait_dly_len 2
+#define reg_sdioc_rd_wait_dly_lsb 0
+#define xd_p_reg_write_mbx_complete (*(volatile byte xdata *) 0xF211)
+#define    p_reg_write_mbx_complete 0xF211
+#define reg_write_mbx_complete_pos 0
+#define reg_write_mbx_complete_len 1
+#define reg_write_mbx_complete_lsb 0
+#define xd_p_reg_sdioc_sw_err   (*(volatile byte xdata *) 0xF211)
+#define    p_reg_sdioc_sw_err   0xF211
+#define reg_sdioc_sw_err_pos 1
+#define reg_sdioc_sw_err_len 1
+#define reg_sdioc_sw_err_lsb 0
+#define xd_p_reg_sdioc_tran_dat_dly (*(volatile byte xdata *) 0xF211)
+#define    p_reg_sdioc_tran_dat_dly 0xF211
+#define reg_sdioc_tran_dat_dly_pos 4
+#define reg_sdioc_tran_dat_dly_len 3
+#define reg_sdioc_tran_dat_dly_lsb 0
+#define xd_p_reg_sdioc_external_int_en  (*(volatile byte xdata *) 0xF212)
+#define    p_reg_sdioc_external_int_en  0xF212
+#define reg_sdioc_external_int_en_pos 1
+#define reg_sdioc_external_int_en_len 1
+#define reg_sdioc_external_int_en_lsb 0
+#define xd_r_reg_sdioc_external_int (*(volatile byte xdata *) 0xF212)
+#define    r_reg_sdioc_external_int 0xF212
+#define reg_sdioc_external_int_pos 2
+#define reg_sdioc_external_int_len 1
+#define reg_sdioc_external_int_lsb 0
+#define xd_p_reg_auto_clrWB_en  (*(volatile byte xdata *) 0xF213)
+#define    p_reg_auto_clrWB_en  0xF213
+#define reg_auto_clrWB_en_pos 0
+#define reg_auto_clrWB_en_len 1
+#define reg_auto_clrWB_en_lsb 0
+#define xd_p_reg_sdioc_crc_s_dly    (*(volatile byte xdata *) 0xF213)
+#define    p_reg_sdioc_crc_s_dly    0xF213
+#define reg_sdioc_crc_s_dly_pos 1
+#define reg_sdioc_crc_s_dly_len 1
+#define reg_sdioc_crc_s_dly_lsb 0
+#define xd_p_reg_sdioc_neg_out_sel  (*(volatile byte xdata *) 0xF213)
+#define    p_reg_sdioc_neg_out_sel  0xF213
+#define reg_sdioc_neg_out_sel_pos 2
+#define reg_sdioc_neg_out_sel_len 1
+#define reg_sdioc_neg_out_sel_lsb 0
+#define xd_p_reg_sdioc_tx_fifo_rst  (*(volatile byte xdata *) 0xF213)
+#define    p_reg_sdioc_tx_fifo_rst  0xF213
+#define reg_sdioc_tx_fifo_rst_pos 4
+#define reg_sdioc_tx_fifo_rst_len 1
+#define reg_sdioc_tx_fifo_rst_lsb 0
+#define xd_p_reg_sdioc_rx_fifo_rst  (*(volatile byte xdata *) 0xF213)
+#define    p_reg_sdioc_rx_fifo_rst  0xF213
+#define reg_sdioc_rx_fifo_rst_pos 5
+#define reg_sdioc_rx_fifo_rst_len 1
+#define reg_sdioc_rx_fifo_rst_lsb 0
+#define xd_p_reg_sdioc_auto_rst_sm_en   (*(volatile byte xdata *) 0xF213)
+#define    p_reg_sdioc_auto_rst_sm_en   0xF213
+#define reg_sdioc_auto_rst_sm_en_pos 6
+#define reg_sdioc_auto_rst_sm_en_len 1
+#define reg_sdioc_auto_rst_sm_en_lsb 0
+#define xd_p_sdio_link_clr_Wbusy_en (*(volatile byte xdata *) 0xF214)
+#define    p_sdio_link_clr_Wbusy_en 0xF214
+#define sdio_link_clr_Wbusy_en_pos 0
+#define sdio_link_clr_Wbusy_en_len 1
+#define sdio_link_clr_Wbusy_en_lsb 0
+#define xd_p_sdio_link_clr_Wbusy    (*(volatile byte xdata *) 0xF214)
+#define    p_sdio_link_clr_Wbusy    0xF214
+#define sdio_link_clr_Wbusy_pos 1
+#define sdio_link_clr_Wbusy_len 1
+#define sdio_link_clr_Wbusy_lsb 0
+#define xd_p_reg_sdioc_dbg_sel  (*(volatile byte xdata *) 0xF214)
+#define    p_reg_sdioc_dbg_sel  0xF214
+#define reg_sdioc_dbg_sel_pos 4
+#define reg_sdioc_dbg_sel_len 4
+#define reg_sdioc_dbg_sel_lsb 0
+#define xd_p_reg_sdioc_skip_ocr (*(volatile byte xdata *) 0xF215)
+#define    p_reg_sdioc_skip_ocr 0xF215
+#define reg_sdioc_skip_ocr_pos 0
+#define reg_sdioc_skip_ocr_len 1
+#define reg_sdioc_skip_ocr_lsb 0
+#define xd_p_reg_sdioc_spi_ns   (*(volatile byte xdata *) 0xF215)
+#define    p_reg_sdioc_spi_ns   0xF215
+#define reg_sdioc_spi_ns_pos 1
+#define reg_sdioc_spi_ns_len 1
+#define reg_sdioc_spi_ns_lsb 0
+#define xd_r_sdio_spi_mode  (*(volatile byte xdata *) 0xF215)
+#define    r_sdio_spi_mode  0xF215
+#define sdio_spi_mode_pos 7
+#define sdio_spi_mode_len 1
+#define sdio_spi_mode_lsb 0
+#define xd_r_link_ofsm_mailbox_int  (*(volatile byte xdata *) 0xF402)
+#define    r_link_ofsm_mailbox_int  0xF402
+#define link_ofsm_mailbox_int_pos 4
+#define link_ofsm_mailbox_int_len 1
+#define link_ofsm_mailbox_int_lsb 0
+#define xd_r_link_ofsm_dvbt_int (*(volatile byte xdata *) 0xF403)
+#define    r_link_ofsm_dvbt_int 0xF403
+#define link_ofsm_dvbt_int_pos 2
+#define link_ofsm_dvbt_int_len 1
+#define link_ofsm_dvbt_int_lsb 0
+#define xd_p_reg_dvbt_intsts    (*(volatile byte xdata *) 0xF404)
+#define    p_reg_dvbt_intsts    0xF404
+#define reg_dvbt_intsts_pos 2
+#define reg_dvbt_intsts_len 1
+#define reg_dvbt_intsts_lsb 0
+#define xd_p_reg_link_mailbox_int   (*(volatile byte xdata *) 0xF405)
+#define    p_reg_link_mailbox_int   0xF405
+#define reg_link_mailbox_int_pos 5
+#define reg_link_mailbox_int_len 1
+#define reg_link_mailbox_int_lsb 0
+#define xd_p_reg_mailbox_wptr_rst   (*(volatile byte xdata *) 0xF408)
+#define    p_reg_mailbox_wptr_rst   0xF408
+#define reg_mailbox_wptr_rst_pos 0
+#define reg_mailbox_wptr_rst_len 1
+#define reg_mailbox_wptr_rst_lsb 0
+#define xd_p_reg_link_mailbox_wptr  (*(volatile byte xdata *) 0xF409)
+#define    p_reg_link_mailbox_wptr  0xF409
+#define reg_link_mailbox_wptr_pos 0
+#define reg_link_mailbox_wptr_len 8
+#define reg_link_mailbox_wptr_lsb 0
+#define xd_p_reg_link_mailbox_wend  (*(volatile byte xdata *) 0xF410)
+#define    p_reg_link_mailbox_wend  0xF410
+#define reg_link_mailbox_wend_pos 0
+#define reg_link_mailbox_wend_len 1
+#define reg_link_mailbox_wend_lsb 0
+#define xd_p_reg_rd_data_sel    (*(volatile byte xdata *) 0xF411)
+#define    p_reg_rd_data_sel    0xF411
+#define reg_rd_data_sel_pos 0
+#define reg_rd_data_sel_len 2
+#define reg_rd_data_sel_lsb 0
+#define xd_p_reg_fifo_rd_length_7_0 (*(volatile byte xdata *) 0xF412)
+#define    p_reg_fifo_rd_length_7_0 0xF412
+#define reg_fifo_rd_length_7_0_pos 0
+#define reg_fifo_rd_length_7_0_len 8
+#define reg_fifo_rd_length_7_0_lsb 0
+#define xd_p_reg_fifo_rd_length_15_8    (*(volatile byte xdata *) 0xF413)
+#define    p_reg_fifo_rd_length_15_8    0xF413
+#define reg_fifo_rd_length_15_8_pos 0
+#define reg_fifo_rd_length_15_8_len 8
+#define reg_fifo_rd_length_15_8_lsb 8
+#define xd_p_reg_fifo_rd_length_17_16   (*(volatile byte xdata *) 0xF414)
+#define    p_reg_fifo_rd_length_17_16   0xF414
+#define reg_fifo_rd_length_17_16_pos 0
+#define reg_fifo_rd_length_17_16_len 2
+#define reg_fifo_rd_length_17_16_lsb 16
+#define xd_p_reg_rst_fifo_rptr  (*(volatile byte xdata *) 0xF414)
+#define    p_reg_rst_fifo_rptr  0xF414
+#define reg_rst_fifo_rptr_pos 6
+#define reg_rst_fifo_rptr_len 1
+#define reg_rst_fifo_rptr_lsb 0
+#define xd_p_reg_force_sel  (*(volatile byte xdata *) 0xF414)
+#define    p_reg_force_sel  0xF414
+#define reg_force_sel_pos 7
+#define reg_force_sel_len 1
+#define reg_force_sel_lsb 0
+#define xd_p_reg_fifo_rptr_7_0  (*(volatile byte xdata *) 0xF415)
+#define    p_reg_fifo_rptr_7_0  0xF415
+#define reg_fifo_rptr_7_0_pos 0
+#define reg_fifo_rptr_7_0_len 8
+#define reg_fifo_rptr_7_0_lsb 0
+#define xd_p_reg_fifo_rptr_15_8 (*(volatile byte xdata *) 0xF416)
+#define    p_reg_fifo_rptr_15_8 0xF416
+#define reg_fifo_rptr_15_8_pos 0
+#define reg_fifo_rptr_15_8_len 8
+#define reg_fifo_rptr_15_8_lsb 8
+#define xd_p_reg_fifo_rptr_17_16    (*(volatile byte xdata *) 0xF417)
+#define    p_reg_fifo_rptr_17_16    0xF417
+#define reg_fifo_rptr_17_16_pos 0
+#define reg_fifo_rptr_17_16_len 2
+#define reg_fifo_rptr_17_16_lsb 16
+#define xd_p_reg_max_package_size_7_0   (*(volatile byte xdata *) 0xF418)
+#define    p_reg_max_package_size_7_0   0xF418
+#define reg_max_package_size_7_0_pos 0
+#define reg_max_package_size_7_0_len 8
+#define reg_max_package_size_7_0_lsb 0
+#define xd_p_reg_max_package_size_11_8  (*(volatile byte xdata *) 0xF419)
+#define    p_reg_max_package_size_11_8  0xF419
+#define reg_max_package_size_11_8_pos 0
+#define reg_max_package_size_11_8_len 4
+#define reg_max_package_size_11_8_lsb 8
+#define xd_p_reg_dvbt_en    (*(volatile byte xdata *) 0xF41A)
+#define    p_reg_dvbt_en    0xF41A
+#define reg_dvbt_en_pos 0
+#define reg_dvbt_en_len 1
+#define reg_dvbt_en_lsb 0
+#define xd_p_reg_dvbt_bufsize   (*(volatile byte xdata *) 0xF41A)
+#define    p_reg_dvbt_bufsize   0xF41A
+#define reg_dvbt_bufsize_pos 1
+#define reg_dvbt_bufsize_len 1
+#define reg_dvbt_bufsize_lsb 0
+#define xd_p_reg_dvbt_path  (*(volatile byte xdata *) 0xF41A)
+#define    p_reg_dvbt_path  0xF41A
+#define reg_dvbt_path_pos 2
+#define reg_dvbt_path_len 1
+#define reg_dvbt_path_lsb 0
+#define xd_p_reg_dvbt_r5    (*(volatile byte xdata *) 0xF41A)
+#define    p_reg_dvbt_r5    0xF41A
+#define reg_dvbt_r5_pos 3
+#define reg_dvbt_r5_len 1
+#define reg_dvbt_r5_lsb 0
+#define xd_p_reg_mailbox_inten  (*(volatile byte xdata *) 0xF41E)
+#define    p_reg_mailbox_inten  0xF41E
+#define reg_mailbox_inten_pos 4
+#define reg_mailbox_inten_len 1
+#define reg_mailbox_inten_lsb 0
+#define xd_p_reg_dvbt_inten (*(volatile byte xdata *) 0xF41F)
+#define    p_reg_dvbt_inten 0xF41F
+#define reg_dvbt_inten_pos 2
+#define reg_dvbt_inten_len 1
+#define reg_dvbt_inten_lsb 0
+#define xd_r_link_ofsm_ip_length_7_0    (*(volatile byte xdata *) 0xF447)
+#define    r_link_ofsm_ip_length_7_0    0xF447
+#define link_ofsm_ip_length_7_0_pos 0
+#define link_ofsm_ip_length_7_0_len 8
+#define link_ofsm_ip_length_7_0_lsb 0
+#define xd_r_link_ofsm_ip_length_11_8   (*(volatile byte xdata *) 0xF448)
+#define    r_link_ofsm_ip_length_11_8   0xF448
+#define link_ofsm_ip_length_11_8_pos 0
+#define link_ofsm_ip_length_11_8_len 4
+#define link_ofsm_ip_length_11_8_lsb 8
+#define xd_r_link_ofsm_ip_valid (*(volatile byte xdata *) 0xF448)
+#define    r_link_ofsm_ip_valid 0xF448
+#define link_ofsm_ip_valid_pos 7
+#define link_ofsm_ip_valid_len 1
+#define link_ofsm_ip_valid_lsb 0
+#define xd_p_reg_spi_master (*(volatile byte xdata *) 0xF600)
+#define    p_reg_spi_master 0xF600
+#define reg_spi_master_pos 0
+#define reg_spi_master_len 1
+#define reg_spi_master_lsb 0
+#define xd_p_reg_spi_bit    (*(volatile byte xdata *) 0xF601)
+#define    p_reg_spi_bit    0xF601
+#define reg_spi_bit_pos 0
+#define reg_spi_bit_len 2
+#define reg_spi_bit_lsb 0
+#define xd_p_reg_spi_cs (*(volatile byte xdata *) 0xF602)
+#define    p_reg_spi_cs 0xF602
+#define reg_spi_cs_pos 0
+#define reg_spi_cs_len 1
+#define reg_spi_cs_lsb 0
+#define xd_p_reg_spi_polarity   (*(volatile byte xdata *) 0xF602)
+#define    p_reg_spi_polarity   0xF602
+#define reg_spi_polarity_pos 1
+#define reg_spi_polarity_len 1
+#define reg_spi_polarity_lsb 0
+#define xd_p_reg_spi_phase  (*(volatile byte xdata *) 0xF602)
+#define    p_reg_spi_phase  0xF602
+#define reg_spi_phase_pos 2
+#define reg_spi_phase_len 1
+#define reg_spi_phase_lsb 0
+#define xd_p_reg_spi_1st_byte   (*(volatile byte xdata *) 0xF603)
+#define    p_reg_spi_1st_byte   0xF603
+#define reg_spi_1st_byte_pos 0
+#define reg_spi_1st_byte_len 4
+#define reg_spi_1st_byte_lsb 0
+#define xd_p_reg_spi_clk_div    (*(volatile byte xdata *) 0xF603)
+#define    p_reg_spi_clk_div    0xF603
+#define reg_spi_clk_div_pos 4
+#define reg_spi_clk_div_len 4
+#define reg_spi_clk_div_lsb 0
+#define xd_p_reg_spi_rst    (*(volatile byte xdata *) 0xF604)
+#define    p_reg_spi_rst    0xF604
+#define reg_spi_rst_pos 0
+#define reg_spi_rst_len 1
+#define reg_spi_rst_lsb 0
+#define xd_r_reg_spi_tx_done    (*(volatile byte xdata *) 0xF604)
+#define    r_reg_spi_tx_done    0xF604
+#define reg_spi_tx_done_pos 1
+#define reg_spi_tx_done_len 1
+#define reg_spi_tx_done_lsb 0
+#define xd_r_reg_spi_rx_done    (*(volatile byte xdata *) 0xF604)
+#define    r_reg_spi_rx_done    0xF604
+#define reg_spi_rx_done_pos 2
+#define reg_spi_rx_done_len 1
+#define reg_spi_rx_done_lsb 0
+#define xd_p_reg_spi_dbg_sel    (*(volatile byte xdata *) 0xF604)
+#define    p_reg_spi_dbg_sel    0xF604
+#define reg_spi_dbg_sel_pos 3
+#define reg_spi_dbg_sel_len 1
+#define reg_spi_dbg_sel_lsb 0
+#define xd_r_reg_spi_crc_err    (*(volatile byte xdata *) 0xF604)
+#define    r_reg_spi_crc_err    0xF604
+#define reg_spi_crc_err_pos 4
+#define reg_spi_crc_err_len 4
+#define reg_spi_crc_err_lsb 0
+#define xd_r_link_ofsm_usb20_mode   (*(volatile byte xdata *) 0xF613)
+#define    r_link_ofsm_usb20_mode   0xF613
+#define link_ofsm_usb20_mode_pos 0
+#define link_ofsm_usb20_mode_len 1
+#define link_ofsm_usb20_mode_lsb 0
+#define xd_r_link_ofsm_strap_usb20_mode (*(volatile byte xdata *) 0xF613)
+#define    r_link_ofsm_strap_usb20_mode 0xF613
+#define link_ofsm_strap_usb20_mode_pos 1
+#define link_ofsm_strap_usb20_mode_len 1
+#define link_ofsm_strap_usb20_mode_lsb 0
+#define xd_p_reg_link_stick_mem_end_7_0 (*(volatile byte xdata *) 0xF618)
+#define    p_reg_link_stick_mem_end_7_0 0xF618
+#define reg_link_stick_mem_end_7_0_pos 0
+#define reg_link_stick_mem_end_7_0_len 8
+#define reg_link_stick_mem_end_7_0_lsb 0
+#define xd_p_reg_link_stick_mem_end_15_8    (*(volatile byte xdata *) 0xF619)
+#define    p_reg_link_stick_mem_end_15_8    0xF619
+#define reg_link_stick_mem_end_15_8_pos 0
+#define reg_link_stick_mem_end_15_8_len 8
+#define reg_link_stick_mem_end_15_8_lsb 8
+#define xd_p_reg_ofdm_auto_write_addr_l (*(volatile byte xdata *) 0xF61A)
+#define    p_reg_ofdm_auto_write_addr_l 0xF61A
+#define reg_ofdm_auto_write_addr_l_pos 0
+#define reg_ofdm_auto_write_addr_l_len 8
+#define reg_ofdm_auto_write_addr_l_lsb 0
+#define xd_p_reg_ofdm_auto_write_addr_h (*(volatile byte xdata *) 0xF61B)
+#define    p_reg_ofdm_auto_write_addr_h 0xF61B
+#define reg_ofdm_auto_write_addr_h_pos 0
+#define reg_ofdm_auto_write_addr_h_len 8
+#define reg_ofdm_auto_write_addr_h_lsb 0
+#define xd_p_reg_link_auto_write_addr_l (*(volatile byte xdata *) 0xF61C)
+#define    p_reg_link_auto_write_addr_l 0xF61C
+#define reg_link_auto_write_addr_l_pos 0
+#define reg_link_auto_write_addr_l_len 8
+#define reg_link_auto_write_addr_l_lsb 0
+#define xd_p_reg_link_auto_write_addr_h (*(volatile byte xdata *) 0xF61D)
+#define    p_reg_link_auto_write_addr_h 0xF61D
+#define reg_link_auto_write_addr_h_pos 0
+#define reg_link_auto_write_addr_h_len 8
+#define reg_link_auto_write_addr_h_lsb 0
+#define xd_p_reg_mailbox_auto_write_addr    (*(volatile byte xdata *) 0xF61E)
+#define    p_reg_mailbox_auto_write_addr    0xF61E
+#define reg_mailbox_auto_write_addr_pos 0
+#define reg_mailbox_auto_write_addr_len 8
+#define reg_mailbox_auto_write_addr_lsb 0
+#define xd_p_reg_usbmem_auto_write_addr (*(volatile byte xdata *) 0xF61F)
+#define    p_reg_usbmem_auto_write_addr 0xF61F
+#define reg_usbmem_auto_write_addr_pos 0
+#define reg_usbmem_auto_write_addr_len 8
+#define reg_usbmem_auto_write_addr_lsb 0
+#define xd_p_reg_mailbox_auto_read_addr (*(volatile byte xdata *) 0xF620)
+#define    p_reg_mailbox_auto_read_addr 0xF620
+#define reg_mailbox_auto_read_addr_pos 0
+#define reg_mailbox_auto_read_addr_len 8
+#define reg_mailbox_auto_read_addr_lsb 0
+#define xd_p_reg_usbmem_auto_read_addr  (*(volatile byte xdata *) 0xF621)
+#define    p_reg_usbmem_auto_read_addr  0xF621
+#define reg_usbmem_auto_read_addr_pos 0
+#define reg_usbmem_auto_read_addr_len 8
+#define reg_usbmem_auto_read_addr_lsb 0
+#define xd_p_reg_auto_write_ofdm    (*(volatile byte xdata *) 0xF622)
+#define    p_reg_auto_write_ofdm    0xF622
+#define reg_auto_write_ofdm_pos 0
+#define reg_auto_write_ofdm_len 1
+#define reg_auto_write_ofdm_lsb 0
+#define xd_p_reg_auto_write_link    (*(volatile byte xdata *) 0xF622)
+#define    p_reg_auto_write_link    0xF622
+#define reg_auto_write_link_pos 1
+#define reg_auto_write_link_len 1
+#define reg_auto_write_link_lsb 0
+#define xd_p_reg_auto_write_mailbox (*(volatile byte xdata *) 0xF622)
+#define    p_reg_auto_write_mailbox 0xF622
+#define reg_auto_write_mailbox_pos 2
+#define reg_auto_write_mailbox_len 1
+#define reg_auto_write_mailbox_lsb 0
+#define xd_p_reg_auto_write_usbmem  (*(volatile byte xdata *) 0xF622)
+#define    p_reg_auto_write_usbmem  0xF622
+#define reg_auto_write_usbmem_pos 3
+#define reg_auto_write_usbmem_len 1
+#define reg_auto_write_usbmem_lsb 0
+#define xd_p_reg_auto_write_i2cm    (*(volatile byte xdata *) 0xF622)
+#define    p_reg_auto_write_i2cm    0xF622
+#define reg_auto_write_i2cm_pos 4
+#define reg_auto_write_i2cm_len 1
+#define reg_auto_write_i2cm_lsb 0
+#define xd_p_reg_auto_read_mailbox  (*(volatile byte xdata *) 0xF623)
+#define    p_reg_auto_read_mailbox  0xF623
+#define reg_auto_read_mailbox_pos 0
+#define reg_auto_read_mailbox_len 1
+#define reg_auto_read_mailbox_lsb 0
+#define xd_p_reg_auto_read_rom  (*(volatile byte xdata *) 0xF623)
+#define    p_reg_auto_read_rom  0xF623
+#define reg_auto_read_rom_pos 1
+#define reg_auto_read_rom_len 1
+#define reg_auto_read_rom_lsb 0
+#define xd_p_reg_auto_sum_l (*(volatile byte xdata *) 0xF624)
+#define    p_reg_auto_sum_l 0xF624
+#define reg_auto_sum_l_pos 0
+#define reg_auto_sum_l_len 8
+#define reg_auto_sum_l_lsb 0
+#define xd_p_reg_auto_sum_h (*(volatile byte xdata *) 0xF625)
+#define    p_reg_auto_sum_h 0xF625
+#define reg_auto_sum_h_pos 0
+#define reg_auto_sum_h_len 8
+#define reg_auto_sum_h_lsb 0
+#define xd_p_reg_auto_sum_to_h  (*(volatile byte xdata *) 0xF626)
+#define    p_reg_auto_sum_to_h  0xF626
+#define reg_auto_sum_to_h_pos 0
+#define reg_auto_sum_to_h_len 1
+#define reg_auto_sum_to_h_lsb 0
+#define xd_p_reg_auto_sum_en    (*(volatile byte xdata *) 0xF627)
+#define    p_reg_auto_sum_en    0xF627
+#define reg_auto_sum_en_pos 0
+#define reg_auto_sum_en_len 1
+#define reg_auto_sum_en_lsb 0
+#define xd_p_reg_rom_remap_begin_7_0    (*(volatile byte xdata *) 0xF628)
+#define    p_reg_rom_remap_begin_7_0    0xF628
+#define reg_rom_remap_begin_7_0_pos 0
+#define reg_rom_remap_begin_7_0_len 8
+#define reg_rom_remap_begin_7_0_lsb 0
+#define xd_p_reg_rom_remap_begin_15_8   (*(volatile byte xdata *) 0xF629)
+#define    p_reg_rom_remap_begin_15_8   0xF629
+#define reg_rom_remap_begin_15_8_pos 0
+#define reg_rom_remap_begin_15_8_len 8
+#define reg_rom_remap_begin_15_8_lsb 8
+#define xd_p_reg_rom_remap_end_7_0  (*(volatile byte xdata *) 0xF62A)
+#define    p_reg_rom_remap_end_7_0  0xF62A
+#define reg_rom_remap_end_7_0_pos 0
+#define reg_rom_remap_end_7_0_len 8
+#define reg_rom_remap_end_7_0_lsb 0
+#define xd_p_reg_rom_remap_end_15_8 (*(volatile byte xdata *) 0xF62B)
+#define    p_reg_rom_remap_end_15_8 0xF62B
+#define reg_rom_remap_end_15_8_pos 0
+#define reg_rom_remap_end_15_8_len 8
+#define reg_rom_remap_end_15_8_lsb 8
+#define xd_p_reg_rom_remap_delta_7_0    (*(volatile byte xdata *) 0xF62C)
+#define    p_reg_rom_remap_delta_7_0    0xF62C
+#define reg_rom_remap_delta_7_0_pos 0
+#define reg_rom_remap_delta_7_0_len 8
+#define reg_rom_remap_delta_7_0_lsb 0
+#define xd_p_reg_rom_remap_delta_15_8   (*(volatile byte xdata *) 0xF62D)
+#define    p_reg_rom_remap_delta_15_8   0xF62D
+#define reg_rom_remap_delta_15_8_pos 0
+#define reg_rom_remap_delta_15_8_len 8
+#define reg_rom_remap_delta_15_8_lsb 8
+#define xd_p_reg_rom_remap_en   (*(volatile byte xdata *) 0xF62E)
+#define    p_reg_rom_remap_en   0xF62E
+#define reg_rom_remap_en_pos 0
+#define reg_rom_remap_en_len 1
+#define reg_rom_remap_en_lsb 0
+#define xd_p_reg_rom_remap_ofdm (*(volatile byte xdata *) 0xF62E)
+#define    p_reg_rom_remap_ofdm 0xF62E
+#define reg_rom_remap_ofdm_pos 1
+#define reg_rom_remap_ofdm_len 1
+#define reg_rom_remap_ofdm_lsb 0
+#define xd_p_reg_link_cpu_reset (*(volatile byte xdata *) 0xF62F)
+#define    p_reg_link_cpu_reset 0xF62F
+#define reg_link_cpu_reset_pos 0
+#define reg_link_cpu_reset_len 1
+#define reg_link_cpu_reset_lsb 0
+#define xd_p_reg_i2cm_auto_write_addr   (*(volatile byte xdata *) 0xF630)
+#define    p_reg_i2cm_auto_write_addr   0xF630
+#define reg_i2cm_auto_write_addr_pos 0
+#define reg_i2cm_auto_write_addr_len 8
+#define reg_i2cm_auto_write_addr_lsb 0
+#define xd_p_reg_link_bank_float_en (*(volatile byte xdata *) 0xF631)
+#define    p_reg_link_bank_float_en 0xF631
+#define reg_link_bank_float_en_pos 0
+#define reg_link_bank_float_en_len 1
+#define reg_link_bank_float_en_lsb 0
+#define xd_p_reg_link_bank_float_start  (*(volatile byte xdata *) 0xF632)
+#define    p_reg_link_bank_float_start  0xF632
+#define reg_link_bank_float_start_pos 0
+#define reg_link_bank_float_start_len 8
+#define reg_link_bank_float_start_lsb 0
+#define xd_p_reg_link_bank_float_stop   (*(volatile byte xdata *) 0xF633)
+#define    p_reg_link_bank_float_stop   0xF633
+#define reg_link_bank_float_stop_pos 0
+#define reg_link_bank_float_stop_len 8
+#define reg_link_bank_float_stop_lsb 0
+#define xd_p_reg_rom_auto_read_addr_7_0 (*(volatile byte xdata *) 0xF638)
+#define    p_reg_rom_auto_read_addr_7_0 0xF638
+#define reg_rom_auto_read_addr_7_0_pos 0
+#define reg_rom_auto_read_addr_7_0_len 8
+#define reg_rom_auto_read_addr_7_0_lsb 0
+#define xd_p_reg_rom_auto_read_addr_15_8    (*(volatile byte xdata *) 0xF639)
+#define    p_reg_rom_auto_read_addr_15_8    0xF639
+#define reg_rom_auto_read_addr_15_8_pos 0
+#define reg_rom_auto_read_addr_15_8_len 8
+#define reg_rom_auto_read_addr_15_8_lsb 8
+#define xd_p_reg_link_ofsm_dummy_7_0    (*(volatile byte xdata *) 0xF640)
+#define    p_reg_link_ofsm_dummy_7_0    0xF640
+#define reg_link_ofsm_dummy_7_0_pos 0
+#define reg_link_ofsm_dummy_7_0_len 8
+#define reg_link_ofsm_dummy_7_0_lsb 0
+#define xd_p_reg_link_ofsm_dummy_15_8   (*(volatile byte xdata *) 0xF641)
+#define    p_reg_link_ofsm_dummy_15_8   0xF641
+#define reg_link_ofsm_dummy_15_8_pos 0
+#define reg_link_ofsm_dummy_15_8_len 8
+#define reg_link_ofsm_dummy_15_8_lsb 8
+#define xd_p_reg_link_ofsm_dummy_23_16  (*(volatile byte xdata *) 0xF642)
+#define    p_reg_link_ofsm_dummy_23_16  0xF642
+#define reg_link_ofsm_dummy_23_16_pos 0
+#define reg_link_ofsm_dummy_23_16_len 8
+#define reg_link_ofsm_dummy_23_16_lsb 16
+#define xd_p_reg_link_ofsm_dummy_31_24  (*(volatile byte xdata *) 0xF643)
+#define    p_reg_link_ofsm_dummy_31_24  0xF643
+#define reg_link_ofsm_dummy_31_24_pos 0
+#define reg_link_ofsm_dummy_31_24_len 8
+#define reg_link_ofsm_dummy_31_24_lsb 24
+#define xd_p_reg_link_ofsm_dummy_39_32  (*(volatile byte xdata *) 0xF644)
+#define    p_reg_link_ofsm_dummy_39_32  0xF644
+#define reg_link_ofsm_dummy_39_32_pos 0
+#define reg_link_ofsm_dummy_39_32_len 8
+#define reg_link_ofsm_dummy_39_32_lsb 32
+#define xd_p_reg_link_ofsm_dummy_47_40  (*(volatile byte xdata *) 0xF645)
+#define    p_reg_link_ofsm_dummy_47_40  0xF645
+#define reg_link_ofsm_dummy_47_40_pos 0
+#define reg_link_ofsm_dummy_47_40_len 8
+#define reg_link_ofsm_dummy_47_40_lsb 40
+#define xd_p_reg_link_ofsm_dummy_55_48  (*(volatile byte xdata *) 0xF646)
+#define    p_reg_link_ofsm_dummy_55_48  0xF646
+#define reg_link_ofsm_dummy_55_48_pos 0
+#define reg_link_ofsm_dummy_55_48_len 8
+#define reg_link_ofsm_dummy_55_48_lsb 48
+#define xd_p_reg_link_ofsm_dummy_63_56  (*(volatile byte xdata *) 0xF647)
+#define    p_reg_link_ofsm_dummy_63_56  0xF647
+#define reg_link_ofsm_dummy_63_56_pos 0
+#define reg_link_ofsm_dummy_63_56_len 8
+#define reg_link_ofsm_dummy_63_56_lsb 56
+#define xd_p_reg_link_ofsm_dummy_71_64  (*(volatile byte xdata *) 0xF648)
+#define    p_reg_link_ofsm_dummy_71_64  0xF648
+#define reg_link_ofsm_dummy_71_64_pos 0
+#define reg_link_ofsm_dummy_71_64_len 8
+#define reg_link_ofsm_dummy_71_64_lsb 64
+#define xd_p_reg_link_ofsm_dummy_79_72  (*(volatile byte xdata *) 0xF649)
+#define    p_reg_link_ofsm_dummy_79_72  0xF649
+#define reg_link_ofsm_dummy_79_72_pos 0
+#define reg_link_ofsm_dummy_79_72_len 8
+#define reg_link_ofsm_dummy_79_72_lsb 72
+#define xd_p_reg_sdio_mode  (*(volatile byte xdata *) 0xF66F)
+#define    p_reg_sdio_mode  0xF66F
+#define reg_sdio_mode_pos 0
+#define reg_sdio_mode_len 1
+#define reg_sdio_mode_lsb 0
+#define xd_p_reg_lnk2ofdm_data_7_0  (*(volatile byte xdata *) 0xF6A0)
+#define    p_reg_lnk2ofdm_data_7_0  0xF6A0
+#define reg_lnk2ofdm_data_7_0_pos 0
+#define reg_lnk2ofdm_data_7_0_len 8
+#define reg_lnk2ofdm_data_7_0_lsb 0
+#define xd_p_reg_lnk2ofdm_data_15_8 (*(volatile byte xdata *) 0xF6A1)
+#define    p_reg_lnk2ofdm_data_15_8 0xF6A1
+#define reg_lnk2ofdm_data_15_8_pos 0
+#define reg_lnk2ofdm_data_15_8_len 8
+#define reg_lnk2ofdm_data_15_8_lsb 8
+#define xd_p_reg_lnk2ofdm_data_23_16    (*(volatile byte xdata *) 0xF6A2)
+#define    p_reg_lnk2ofdm_data_23_16    0xF6A2
+#define reg_lnk2ofdm_data_23_16_pos 0
+#define reg_lnk2ofdm_data_23_16_len 8
+#define reg_lnk2ofdm_data_23_16_lsb 16
+#define xd_p_reg_lnk2ofdm_data_31_24    (*(volatile byte xdata *) 0xF6A3)
+#define    p_reg_lnk2ofdm_data_31_24    0xF6A3
+#define reg_lnk2ofdm_data_31_24_pos 0
+#define reg_lnk2ofdm_data_31_24_len 8
+#define reg_lnk2ofdm_data_31_24_lsb 24
+#define xd_p_reg_lnk2ofdm_data_39_32    (*(volatile byte xdata *) 0xF6A4)
+#define    p_reg_lnk2ofdm_data_39_32    0xF6A4
+#define reg_lnk2ofdm_data_39_32_pos 0
+#define reg_lnk2ofdm_data_39_32_len 8
+#define reg_lnk2ofdm_data_39_32_lsb 32
+#define xd_p_reg_lnk2ofdm_data_47_40    (*(volatile byte xdata *) 0xF6A5)
+#define    p_reg_lnk2ofdm_data_47_40    0xF6A5
+#define reg_lnk2ofdm_data_47_40_pos 0
+#define reg_lnk2ofdm_data_47_40_len 8
+#define reg_lnk2ofdm_data_47_40_lsb 40
+#define xd_p_reg_lnk2ofdm_data_55_48    (*(volatile byte xdata *) 0xF6A6)
+#define    p_reg_lnk2ofdm_data_55_48    0xF6A6
+#define reg_lnk2ofdm_data_55_48_pos 0
+#define reg_lnk2ofdm_data_55_48_len 8
+#define reg_lnk2ofdm_data_55_48_lsb 48
+#define xd_p_reg_lnk2ofdm_data_63_56    (*(volatile byte xdata *) 0xF6A7)
+#define    p_reg_lnk2ofdm_data_63_56    0xF6A7
+#define reg_lnk2ofdm_data_63_56_pos 0
+#define reg_lnk2ofdm_data_63_56_len 8
+#define reg_lnk2ofdm_data_63_56_lsb 56
+#define xd_p_reg_ofdmtolnk_data_7_0 (*(volatile byte xdata *) 0xF6A8)
+#define    p_reg_ofdmtolnk_data_7_0 0xF6A8
+#define reg_ofdmtolnk_data_7_0_pos 0
+#define reg_ofdmtolnk_data_7_0_len 8
+#define reg_ofdmtolnk_data_7_0_lsb 0
+#define xd_p_reg_ofdmtolnk_data_15_8    (*(volatile byte xdata *) 0xF6A9)
+#define    p_reg_ofdmtolnk_data_15_8    0xF6A9
+#define reg_ofdmtolnk_data_15_8_pos 0
+#define reg_ofdmtolnk_data_15_8_len 8
+#define reg_ofdmtolnk_data_15_8_lsb 8
+#define xd_p_reg_ofdmtolnk_data_23_16   (*(volatile byte xdata *) 0xF6AA)
+#define    p_reg_ofdmtolnk_data_23_16   0xF6AA
+#define reg_ofdmtolnk_data_23_16_pos 0
+#define reg_ofdmtolnk_data_23_16_len 8
+#define reg_ofdmtolnk_data_23_16_lsb 16
+#define xd_p_reg_ofdmtolnk_data_31_24   (*(volatile byte xdata *) 0xF6AB)
+#define    p_reg_ofdmtolnk_data_31_24   0xF6AB
+#define reg_ofdmtolnk_data_31_24_pos 0
+#define reg_ofdmtolnk_data_31_24_len 8
+#define reg_ofdmtolnk_data_31_24_lsb 24
+#define xd_p_reg_ofdmtolnk_data_39_32   (*(volatile byte xdata *) 0xF6AC)
+#define    p_reg_ofdmtolnk_data_39_32   0xF6AC
+#define reg_ofdmtolnk_data_39_32_pos 0
+#define reg_ofdmtolnk_data_39_32_len 8
+#define reg_ofdmtolnk_data_39_32_lsb 32
+#define xd_p_reg_ofdmtolnk_data_47_40   (*(volatile byte xdata *) 0xF6AD)
+#define    p_reg_ofdmtolnk_data_47_40   0xF6AD
+#define reg_ofdmtolnk_data_47_40_pos 0
+#define reg_ofdmtolnk_data_47_40_len 8
+#define reg_ofdmtolnk_data_47_40_lsb 40
+#define xd_p_reg_ofdmtolnk_data_55_48   (*(volatile byte xdata *) 0xF6AE)
+#define    p_reg_ofdmtolnk_data_55_48   0xF6AE
+#define reg_ofdmtolnk_data_55_48_pos 0
+#define reg_ofdmtolnk_data_55_48_len 8
+#define reg_ofdmtolnk_data_55_48_lsb 48
+#define xd_p_reg_ofdmtolnk_data_63_56   (*(volatile byte xdata *) 0xF6AF)
+#define    p_reg_ofdmtolnk_data_63_56   0xF6AF
+#define reg_ofdmtolnk_data_63_56_pos 0
+#define reg_ofdmtolnk_data_63_56_len 8
+#define reg_ofdmtolnk_data_63_56_lsb 56
+#define xd_p_reg_mon51_flag (*(volatile byte xdata *) 0xF6B0)
+#define    p_reg_mon51_flag 0xF6B0
+#define reg_mon51_flag_pos 0
+#define reg_mon51_flag_len 1
+#define reg_mon51_flag_lsb 0
+#define xd_p_reg_force_mon51    (*(volatile byte xdata *) 0xF6B1)
+#define    p_reg_force_mon51    0xF6B1
+#define reg_force_mon51_pos 0
+#define reg_force_mon51_len 1
+#define reg_force_mon51_lsb 0
+#define xd_p_reg_which_cpu  (*(volatile byte xdata *) 0xF6B2)
+#define    p_reg_which_cpu  0xF6B2
+#define reg_which_cpu_pos 0
+#define reg_which_cpu_len 1
+#define reg_which_cpu_lsb 0
+#define xd_p_reg_program_ofdm_code_ready    (*(volatile byte xdata *) 0xF6B3)
+#define    p_reg_program_ofdm_code_ready    0xF6B3
+#define reg_program_ofdm_code_ready_pos 0
+#define reg_program_ofdm_code_ready_len 1
+#define reg_program_ofdm_code_ready_lsb 0
+#define xd_p_reg_link_wr_ofdm_en    (*(volatile byte xdata *) 0xF6B3)
+#define    p_reg_link_wr_ofdm_en    0xF6B3
+#define reg_link_wr_ofdm_en_pos 1
+#define reg_link_wr_ofdm_en_len 1
+#define reg_link_wr_ofdm_en_lsb 0
+#define xd_p_reg_i2c_mode   (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_i2c_mode   0xF6B4
+#define reg_i2c_mode_pos 0
+#define reg_i2c_mode_len 1
+#define reg_i2c_mode_lsb 0
+#define xd_p_reg_sw_reset_sdio  (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_sw_reset_sdio  0xF6B4
+#define reg_sw_reset_sdio_pos 1
+#define reg_sw_reset_sdio_len 1
+#define reg_sw_reset_sdio_lsb 0
+#define xd_p_reg_debug_mpefec_sel   (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_debug_mpefec_sel   0xF6B4
+#define reg_debug_mpefec_sel_pos 2
+#define reg_debug_mpefec_sel_len 1
+#define reg_debug_mpefec_sel_lsb 0
+#define xd_p_reg_lnk_dynamic_clk    (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_lnk_dynamic_clk    0xF6B4
+#define reg_lnk_dynamic_clk_pos 3
+#define reg_lnk_dynamic_clk_len 1
+#define reg_lnk_dynamic_clk_lsb 0
+#define xd_p_reg_lnk_free_clk   (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_lnk_free_clk   0xF6B4
+#define reg_lnk_free_clk_pos 4
+#define reg_lnk_free_clk_len 1
+#define reg_lnk_free_clk_lsb 0
+#define xd_p_reg_i2c_sample_rate_up_en  (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_i2c_sample_rate_up_en  0xF6B4
+#define reg_i2c_sample_rate_up_en_pos 5
+#define reg_i2c_sample_rate_up_en_len 1
+#define reg_i2c_sample_rate_up_en_lsb 0
+#define xd_p_reg_i2c_start_patch    (*(volatile byte xdata *) 0xF6B4)
+#define    p_reg_i2c_start_patch    0xF6B4
+#define reg_i2c_start_patch_pos 6
+#define reg_i2c_start_patch_len 1
+#define reg_i2c_start_patch_lsb 0
+#define xd_p_reg_link_i2cs_msb  (*(volatile byte xdata *) 0xF6B5)
+#define    p_reg_link_i2cs_msb  0xF6B5
+#define reg_link_i2cs_msb_pos 1
+#define reg_link_i2cs_msb_len 1
+#define reg_link_i2cs_msb_lsb 0
+#define xd_p_reg_link_ofsm_dbg_en   (*(volatile byte xdata *) 0xF6B5)
+#define    p_reg_link_ofsm_dbg_en   0xF6B5
+#define reg_link_ofsm_dbg_en_pos 4
+#define reg_link_ofsm_dbg_en_len 1
+#define reg_link_ofsm_dbg_en_lsb 0
+#define xd_p_reg_link_i2c_dbg_sel   (*(volatile byte xdata *) 0xF6B5)
+#define    p_reg_link_i2c_dbg_sel   0xF6B5
+#define reg_link_i2c_dbg_sel_pos 5
+#define reg_link_i2c_dbg_sel_len 1
+#define reg_link_i2c_dbg_sel_lsb 0
+#define xd_p_reg_fast_slow_train    (*(volatile byte xdata *) 0xF6DD)
+#define    p_reg_fast_slow_train    0xF6DD
+#define xd_p_reg_lnk2ofdm_int   (*(volatile byte xdata *) 0xF6DE)
+#define    p_reg_lnk2ofdm_int   0xF6DE
+#define reg_lnk2ofdm_int_pos 0
+#define reg_lnk2ofdm_int_len 1
+#define reg_lnk2ofdm_int_lsb 0
+#define xd_p_reg_ofdm2lnk_int   (*(volatile byte xdata *) 0xF6DF)
+#define    p_reg_ofdm2lnk_int   0xF6DF
+#define reg_ofdm2lnk_int_pos 0
+#define reg_ofdm2lnk_int_len 1
+#define reg_ofdm2lnk_int_lsb 0
+#define xd_p_reg_load_ofdm_reg  (*(volatile byte xdata *) 0xF6E4)
+#define    p_reg_load_ofdm_reg  0xF6E4
+#define xd_p_link_ofsm_cmd_reg  (*(volatile byte xdata *) 0xF6EA)
+#define    p_link_ofsm_cmd_reg  0xF6EA
+#define link_ofsm_cmd_reg_pos 0
+#define link_ofsm_cmd_reg_len 8
+#define link_ofsm_cmd_reg_lsb 0
+#define xd_p_link_ofsm_addr_reg_h   (*(volatile byte xdata *) 0xF6EB)
+#define    p_link_ofsm_addr_reg_h   0xF6EB
+#define link_ofsm_addr_reg_h_pos 0
+#define link_ofsm_addr_reg_h_len 8
+#define link_ofsm_addr_reg_h_lsb 0
+#define xd_p_link_ofsm_addr_reg_l   (*(volatile byte xdata *) 0xF6EC)
+#define    p_link_ofsm_addr_reg_l   0xF6EC
+#define link_ofsm_addr_reg_l_pos 0
+#define link_ofsm_addr_reg_l_len 8
+#define link_ofsm_addr_reg_l_lsb 0
+#define xd_p_link_ofsm_data_reg_0   (*(volatile byte xdata *) 0xF6ED)
+#define    p_link_ofsm_data_reg_0   0xF6ED
+#define link_ofsm_data_reg_0_pos 0
+#define link_ofsm_data_reg_0_len 8
+#define link_ofsm_data_reg_0_lsb 0
+#define xd_p_link_ofsm_data_reg_1   (*(volatile byte xdata *) 0xF6EE)
+#define    p_link_ofsm_data_reg_1   0xF6EE
+#define link_ofsm_data_reg_1_pos 0
+#define link_ofsm_data_reg_1_len 8
+#define link_ofsm_data_reg_1_lsb 0
+#define xd_p_link_ofsm_data_reg_2   (*(volatile byte xdata *) 0xF6EF)
+#define    p_link_ofsm_data_reg_2   0xF6EF
+#define link_ofsm_data_reg_2_pos 0
+#define link_ofsm_data_reg_2_len 8
+#define link_ofsm_data_reg_2_lsb 0
+#define xd_p_link_ofsm_data_reg_3   (*(volatile byte xdata *) 0xF6F0)
+#define    p_link_ofsm_data_reg_3   0xF6F0
+#define link_ofsm_data_reg_3_pos 0
+#define link_ofsm_data_reg_3_len 8
+#define link_ofsm_data_reg_3_lsb 0
+#define xd_p_link_ofsm_data_reg_4   (*(volatile byte xdata *) 0xF6F1)
+#define    p_link_ofsm_data_reg_4   0xF6F1
+#define link_ofsm_data_reg_4_pos 0
+#define link_ofsm_data_reg_4_len 8
+#define link_ofsm_data_reg_4_lsb 0
+#define xd_p_link_ofsm_data_reg_5   (*(volatile byte xdata *) 0xF6F2)
+#define    p_link_ofsm_data_reg_5   0xF6F2
+#define link_ofsm_data_reg_5_pos 0
+#define link_ofsm_data_reg_5_len 8
+#define link_ofsm_data_reg_5_lsb 0
+#define xd_p_link_ofsm_data_reg_6   (*(volatile byte xdata *) 0xF6F3)
+#define    p_link_ofsm_data_reg_6   0xF6F3
+#define link_ofsm_data_reg_6_pos 0
+#define link_ofsm_data_reg_6_len 8
+#define link_ofsm_data_reg_6_lsb 0
+#define xd_p_link_ofsm_data_reg_7   (*(volatile byte xdata *) 0xF6F4)
+#define    p_link_ofsm_data_reg_7   0xF6F4
+#define link_ofsm_data_reg_7_pos 0
+#define link_ofsm_data_reg_7_len 8
+#define link_ofsm_data_reg_7_lsb 0
+#define xd_p_link_ofsm_data_reg_8   (*(volatile byte xdata *) 0xF6F5)
+#define    p_link_ofsm_data_reg_8   0xF6F5
+#define link_ofsm_data_reg_8_pos 0
+#define link_ofsm_data_reg_8_len 8
+#define link_ofsm_data_reg_8_lsb 0
+#define xd_p_link_ofsm_data_reg_9   (*(volatile byte xdata *) 0xF6F6)
+#define    p_link_ofsm_data_reg_9   0xF6F6
+#define link_ofsm_data_reg_9_pos 0
+#define link_ofsm_data_reg_9_len 8
+#define link_ofsm_data_reg_9_lsb 0
+#define xd_p_link_ofsm_data_reg_10  (*(volatile byte xdata *) 0xF6F7)
+#define    p_link_ofsm_data_reg_10  0xF6F7
+#define link_ofsm_data_reg_10_pos 0
+#define link_ofsm_data_reg_10_len 8
+#define link_ofsm_data_reg_10_lsb 0
+#define xd_p_link_ofsm_data_reg_11  (*(volatile byte xdata *) 0xF6F8)
+#define    p_link_ofsm_data_reg_11  0xF6F8
+#define link_ofsm_data_reg_11_pos 0
+#define link_ofsm_data_reg_11_len 8
+#define link_ofsm_data_reg_11_lsb 0
+#define xd_p_link_ofsm_data_reg_12  (*(volatile byte xdata *) 0xF6F9)
+#define    p_link_ofsm_data_reg_12  0xF6F9
+#define link_ofsm_data_reg_12_pos 0
+#define link_ofsm_data_reg_12_len 8
+#define link_ofsm_data_reg_12_lsb 0
+#define xd_p_link_ofsm_data_reg_13  (*(volatile byte xdata *) 0xF6FA)
+#define    p_link_ofsm_data_reg_13  0xF6FA
+#define link_ofsm_data_reg_13_pos 0
+#define link_ofsm_data_reg_13_len 8
+#define link_ofsm_data_reg_13_lsb 0
+#define xd_p_link_ofsm_data_reg_14  (*(volatile byte xdata *) 0xF6FB)
+#define    p_link_ofsm_data_reg_14  0xF6FB
+#define link_ofsm_data_reg_14_pos 0
+#define link_ofsm_data_reg_14_len 8
+#define link_ofsm_data_reg_14_lsb 0
+#define xd_p_link_ofsm_data_reg_15  (*(volatile byte xdata *) 0xF6FC)
+#define    p_link_ofsm_data_reg_15  0xF6FC
+#define link_ofsm_data_reg_15_pos 0
+#define link_ofsm_data_reg_15_len 8
+#define link_ofsm_data_reg_15_lsb 0
+#define xd_p_reg_debug_mux  (*(volatile byte xdata *) 0xF6FE)
+#define    p_reg_debug_mux  0xF6FE
+#define reg_debug_mux_pos 3
+#define reg_debug_mux_len 1
+#define reg_debug_mux_lsb 0
+#define xd_p_reg_top_gpioon0    (*(volatile byte xdata *) 0xF6FF)
+#define    p_reg_top_gpioon0    0xF6FF
+#define reg_top_gpioon0_pos 0
+#define reg_top_gpioon0_len 1
+#define reg_top_gpioon0_lsb 0
+#define xd_p_reg_p_dmb_phy_is_dvb   (*(volatile byte xdata *) 0xDC31)
+#define    p_reg_p_dmb_phy_is_dvb   0xDC31
+#define reg_p_dmb_phy_is_dvb_pos 0
+#define reg_p_dmb_phy_is_dvb_len 1
+#define reg_p_dmb_phy_is_dvb_lsb 0
+#define xd_p_reg_p_dmb_xt_reset (*(volatile byte xdata *) 0xDC32)
+#define    p_reg_p_dmb_xt_reset 0xDC32
+#define reg_p_dmb_xt_reset_pos 0
+#define reg_p_dmb_xt_reset_len 1
+#define reg_p_dmb_xt_reset_lsb 0
+#define xd_p_reg_p_dmb_sw_reset (*(volatile byte xdata *) 0xDC33)
+#define    p_reg_p_dmb_sw_reset 0xDC33
+#define reg_p_dmb_sw_reset_pos 0
+#define reg_p_dmb_sw_reset_len 1
+#define reg_p_dmb_sw_reset_lsb 0
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_standard.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_standard.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_standard.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_standard.c	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,4668 @@
+#include "a867_standard.h"
+//#include <math.h>
+#include "a867_cmd.h"
+#include "a867_user.h"
+#include "a867_af903x.h"
+
+// turn on/off debug in this file
+#define DEBUG_STANDARD	0
+
+#if !DEBUG_STANDARD
+	#undef deb_info
+	#define deb_info(fmt, args...) do {} while(0)
+#endif
+
+#include "a867_firmware.h"
+
+#define Standard_MAX_BIT                8
+#define Standard_MAX_CLOCK              12
+#define Standard_MAX_BAND               3
+
+
+const Byte Standard_bitMask[Standard_MAX_BIT] = {
+    0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF
+};
+
+const ClockTable Standard_clockTable[Standard_MAX_CLOCK] =
+{
+    {   20480,      20480000    },      /** FPGA     */
+    {   16384,      20480000    },      /** 16.38MHz */
+    {   20480,      20480000    },      /** 20.48MHz */
+    {   36000,      20250000    },      /** 36.00MHz */
+    {   30000,      20156250    },      /** 30.00MHz */
+    {   26000,      20583333    },      /** 26.00MHz */
+    {   28000,      20416667    },      /** 28.00MHz */
+    {   32000,      20500000    },      /** 32.00MHz */
+    {   34000,      20187500    },      /** 34.00MHz */
+    {   24000,      20500000    },      /** 24.00MHz */
+    {   22000,      20625000    },      /** 22.00MHz */
+    {   12000,      20250000    }       /** 12.00MHz */
+};
+
+const BandTable Standard_bandTable[Standard_MAX_BAND] =
+{
+    {    174000,     230000     },      /** VHF    */
+    {    350000,     900000     },      /** UHF    */
+    {   1670000,    1680000     }       /** L-BAND */
+};
+
+#if User_USE_DRIVER
+Dword Standard_getDriver (
+    IN  Demodulator*    demodulator,
+    OUT Handle*         handle
+) {
+    Dword error = Error_NO_ERROR;
+    TCHAR registry1[100] = TEXT("\\Drivers\\SDCARD\\ClientDrivers\\Custom\\MANF-0296-CARDID-5347-FUNC-1");
+    TCHAR registry2[100] = TEXT("\\Drivers\\SDCARD\\ClientDrivers\\Custom\\MANF-03BE-CARDID-0001-FUNC-1");
+    TCHAR name[256];
+    TCHAR shortBuffer[32];
+    DWORD len = 16;
+    DWORD i;
+    HKEY hKey, hSubKey;
+    DWORD size;
+
+    /** Open the HKLM\Drivers\Active key in registry */
+    if (RegOpenKeyEx(HKEY_LOCAL_MACHINE, TEXT("Drivers\\Active"), 0, 0, &hKey) == ERROR_SUCCESS) {
+        /** Get subkeys count */
+        if (RegQueryInfoKey(hKey, NULL, NULL, NULL, &i, NULL, NULL, NULL, NULL, NULL, NULL, NULL) == ERROR_SUCCESS) {
+            /** Browse subkeys in reverse order (pluggable cards are not at the beginning of the list !) */
+            while (i) {
+                i--;
+                /** Select the subkey */
+                size = sizeof(shortBuffer);
+                if (RegEnumKeyEx(hKey, i, shortBuffer, &size, NULL, NULL, NULL, NULL) == ERROR_SUCCESS) {
+                    /** Open the subkey */
+                    shortBuffer[sizeof(shortBuffer)-1] = '\0';
+                    _stprintf(name, TEXT("Drivers\\Active\\%s"), shortBuffer);
+                    if (RegOpenKeyEx(HKEY_LOCAL_MACHINE, name, 0, 0, &hSubKey) == ERROR_SUCCESS) {
+                        size = sizeof(name);
+                        if (RegQueryValueEx(hSubKey, TEXT("Key"), NULL, NULL, (LPBYTE) name, &size) == ERROR_SUCCESS) {
+                            if ((_tcsncmp(name, registry1, _tcsclen(registry1)) == 0) || (_tcsncmp(name, registry2, _tcsclen(registry2)) == 0)) {
+                                /** This is the good PnPID, now get the serial com in the "Name" value */
+                                size = len;
+                                if (RegQueryValueEx(hSubKey, TEXT("Name"), NULL, NULL, (LPBYTE) name, &size) == ERROR_SUCCESS) {
+                                    /** Found ! */
+                                    RegCloseKey(hSubKey);
+                                    RegCloseKey(hKey);
+                                    /** OK */
+                                    goto exit;
+                                }
+                            }
+                        }
+
+                    /** Close the subkey */
+                    RegCloseKey(hSubKey);
+                    }
+                }
+            }
+        }
+    }
+    /** Close the key */
+    RegCloseKey(hKey);
+
+exit :
+    *handle = CreateFile (name, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
+
+    return (error);
+}
+#endif
+
+
+Dword Standard_writeRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            value
+) {
+    Dword ret;
+//    deb_info("Enter %s -\n", __FUNCTION__);
+    ret = (Standard_writeRegisters (demodulator, chip, processor, registerAddress, 1, &value));
+    if(ret) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, ret);
+    }
+    return ret;
+		  
+}
+
+
+Dword Standard_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    WriteRegistersRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.processor = processor;
+        request.registerAddress = registerAddress;
+        request.bufferLength = bufferLength;
+        User_memoryCopy (demodulator, request.buffer, buffer, bufferLength);
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_WRITEREGISTERS,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+//    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        if (registerAddress > 0x000000FF) {
+            registerAddressLength = 2;
+        } else {
+            registerAddressLength = 1;
+        }
+    } else {
+            registerAddressLength = 2;
+    }
+    if (ganymede->cmdDescription->writeRegisters != NULL) {
+        error = ganymede->cmdDescription->writeRegisters (demodulator, chip, processor, registerAddress, registerAddressLength, bufferLength, buffer);
+    }
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+) {
+    Dword error = Error_NO_ERROR;
+    Byte valueSetsAddressLength;
+    Ganymede* ganymede;
+
+//    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        valueSetsAddressLength = 2;
+    } else {
+        valueSetsAddressLength = 2;
+    }
+    if (ganymede->cmdDescription->writeScatterRegisters != NULL) {
+        error = ganymede->cmdDescription->writeScatterRegisters (demodulator, chip, processor, valueSetsAddressLength, valueSetsLength, valueSets);
+    }
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->cmdDescription->writeTunerRegisters != NULL) {
+        error = ganymede->cmdDescription->writeTunerRegisters (demodulator, chip, ganymede->tunerDescription->tunerAddress, registerAddress, ganymede->tunerDescription->registerAddressLength, bufferLength, buffer);
+    }
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_writeGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    Byte writeBuffer[256];
+    Byte i;
+    Ganymede* ganymede;
+    Dword error;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    writeBuffer[0] = bufferLength;
+    writeBuffer[1] = interfaceIndex;
+    writeBuffer[2] = slaveAddress;
+
+    for (i = 0; i < bufferLength; i++) {
+        writeBuffer[3 + i] = buffer[i];
+    }
+    error = (Standard_sendCommand (demodulator, Command_GENERIC_WRITE, chip, Processor_LINK, bufferLength + 3, writeBuffer, 0, NULL));
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return error;
+}
+
+
+Dword Standard_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    WriteEepromValuesRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.registerAddress = registerAddress;
+        request.bufferLength = bufferLength;
+        User_memoryCopy (demodulator, request.buffer, buffer, bufferLength);
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_WRITEEEPROMVALUES,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte eepromAddress;
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Read EEPROM address. */
+    /*error = ganymede->cmdDescription.readRegisters (demodulator, chip, Processor_LINK, 0xBFF0, 1, &eepromAddress);
+    if (error) goto exit;
+    */
+    eepromAddress = 0x01;
+
+    /** Read EEPROM valid length of register. */
+    /*error = ganymede->cmdDescription.readRegisters (demodulator, chip, Processor_LINK, 0xBFF1, 1, &registerAddressLength);
+    if (error) goto exit;
+    */
+    registerAddressLength = 0x01;
+
+    if (ganymede->cmdDescription->writeEepromValues != NULL) {
+        error = ganymede->cmdDescription->writeEepromValues (demodulator, chip, eepromAddress, registerAddress, registerAddressLength, bufferLength, buffer);
+    }
+
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_writeRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    WriteRegisterBitsRequest request;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.processor = processor;
+        request.registerAddress = registerAddress;
+        request.position = position;
+        request.length = length;
+        request.value = value;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_WRITEREGISTERBITS,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        if (registerAddress > 0x000000FF) {
+            registerAddressLength = 2;
+        } else {
+            registerAddressLength = 1;
+        }
+    } else {
+        registerAddressLength = 2;
+    }
+    if (length == 8) {
+        if (ganymede->cmdDescription->writeRegisters != NULL) {
+            error = ganymede->cmdDescription->writeRegisters (demodulator, chip, processor, registerAddress, registerAddressLength, 1, &value);
+        }
+    } else {
+        if (ganymede->cmdDescription->modifyRegister != NULL) {
+            error = ganymede->cmdDescription->modifyRegister (demodulator, chip, processor, registerAddress, registerAddressLength, position, length, value);
+        }
+    }
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_readRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    OUT Byte*           value
+) {
+    Dword error;
+//    deb_info("Enter %s -\n", __FUNCTION__);
+
+    error = (Standard_readRegisters (demodulator, chip, processor, registerAddress, 1, value));
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return error;
+}
+
+
+Dword Standard_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    ReadRegistersRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.processor = processor;
+        request.registerAddress = registerAddress;
+        request.bufferLength = bufferLength;
+        request.buffer = buffer;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_READREGISTERS,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+//    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        if (registerAddress > 0x000000FF) {
+            registerAddressLength = 2;
+        } else {
+            registerAddressLength = 1;
+        }
+    } else {
+        registerAddressLength = 2;
+    }
+    if (ganymede->cmdDescription->readRegisters != NULL) {
+        error = ganymede->cmdDescription->readRegisters (demodulator, chip, processor, registerAddress, registerAddressLength, bufferLength, buffer);
+    }
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+) {
+    Dword error = Error_NO_ERROR;
+    Byte valueSetsAddressLength;
+    Ganymede* ganymede;
+
+//    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        valueSetsAddressLength = 2;
+    } else {
+        valueSetsAddressLength = 2;
+    }
+
+    if (ganymede->cmdDescription->readScatterRegisters != NULL) {
+        error = ganymede->cmdDescription->readScatterRegisters (demodulator, chip, processor, valueSetsAddressLength, valueSetsLength, valueSets);
+    }
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_readTunerRegisters (
+	IN  Demodulator*    demodulator,
+	IN  Byte            chip,
+	IN  Word            registerAddress,
+	IN  Byte            bufferLength,
+	IN  Byte*           buffer
+) {
+	Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+	DWORD number;
+	BOOL result;
+	ReadTunerRegistersRequest request;
+	Ganymede* ganymede;
+
+	ganymede = (Ganymede*) demodulator;
+
+	if (ganymede->driver != NULL) {
+		request.chip = chip;
+		request.registerAddress = registerAddress;
+		request.bufferLength = bufferLength;
+		request.buffer = buffer;
+		result = DeviceIoControl (
+					ganymede->driver,
+					IOCTL_AFA_DEMOD_READTUNERREGISTERS,
+					&request,
+					sizeof (request),
+					NULL,
+					0,
+					&number,
+					NULL
+		);
+		error = request.error;
+	} else {
+		error = Error_DRIVER_INVALID;
+	}
+#else
+	Ganymede* ganymede;
+
+	deb_info("Enter %s -\n", __FUNCTION__);
+	ganymede = (Ganymede*) demodulator;
+
+	if (ganymede->cmdDescription->readTunerRegisters != NULL) {
+
+	if (registerAddress == 0xffff && ganymede->tunerDescription->registerAddressLength == 1)
+	{
+		error = ganymede->cmdDescription->readTunerRegisters (demodulator, chip, 
+		ganymede->tunerDescription->tunerAddress, registerAddress, 0, bufferLength, buffer);
+	}
+	else
+	{
+		error = ganymede->cmdDescription->readTunerRegisters (demodulator, chip, 
+		ganymede->tunerDescription->tunerAddress, registerAddress, 
+		ganymede->tunerDescription->registerAddressLength, bufferLength, buffer);
+	}
+    }
+#endif
+
+	if(error) 
+	{
+		deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+	}
+	return (error);
+}
+
+
+Dword Standard_readGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+) {
+    Byte writeBuffer[3];
+    Ganymede* ganymede;
+    Dword error;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    writeBuffer[0] = bufferLength;
+    writeBuffer[1] = interfaceIndex;
+    writeBuffer[2] = slaveAddress;
+
+    error = (Standard_sendCommand (demodulator, Command_GENERIC_READ, chip, Processor_LINK, 3, writeBuffer, bufferLength, buffer));
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return error;
+}
+
+
+Dword Standard_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    ReadEepromValuesRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.registerAddress = registerAddress;
+        request.bufferLength = bufferLength;
+        request.buffer = buffer;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_READEEPROMVALUES,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte eepromAddress;
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Read EEPROM address. */
+    /*error = ganymede->cmdDescription.readRegisters (demodulator, chip, Processor_LINK, 0xBFF0, 1, &eepromAddress);
+    if (error) goto exit;
+    */
+    eepromAddress = 0x01;
+
+    /** Read EEPROM valid length of register. */
+    /*error = ganymede->cmdDescription.readRegisters (demodulator, chip, Processor_LINK, 0xBFF1, 1, &registerAddressLength);
+    if (error) goto exit;
+    */
+    registerAddressLength = 0x01;
+
+    if (ganymede->cmdDescription->readEepromValues != NULL) {
+        error = ganymede->cmdDescription->readEepromValues (demodulator, chip, eepromAddress, registerAddress, registerAddressLength, bufferLength, buffer);
+    }
+
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_readRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    OUT Byte*           value
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    ReadRegisterBitsRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.processor = processor;
+        request.registerAddress = registerAddress;
+        request.position = position;
+        request.length = length;
+        request.value = value;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_READREGISTERBITS,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte temp = 0;
+    Byte registerAddressLength;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (processor == Processor_LINK) {
+        if (registerAddress > 0x000000FF) {
+            registerAddressLength = 2;
+        } else {
+            registerAddressLength = 1;
+        }
+    } else {
+        registerAddressLength = 2;
+    }
+    if (ganymede->cmdDescription->readRegisters != NULL) {
+        error = ganymede->cmdDescription->readRegisters (demodulator, chip, processor, registerAddress, registerAddressLength, 1, &temp);
+    }
+    if (error) goto exit;
+
+    if (length == 8) {
+        *value = temp;
+    } else {
+        temp = REG_GET (temp, position, length);
+        *value = temp;
+    }
+
+#endif
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_sendCommand (
+    IN  Demodulator*    demodulator,
+    OUT Word            command,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->cmdDescription->sendCommand != NULL) {
+        error = ganymede->cmdDescription->sendCommand (demodulator, command, chip, processor, writeBufferLength, writeBuffer, readBufferLength, readBuffer);
+    }
+#endif
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getHardwareVersion (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          version
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte hwVer0;
+    Byte hwVer1;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_readRegister (demodulator, 0, Processor_OFDM, 0xFFF0, &hwVer0);
+    if (error) goto exit;
+    error = Standard_readRegister (demodulator, 0, Processor_OFDM, 0xFFF1, &hwVer1);
+    if (error) goto exit;
+
+    /** HW Version = HWVer + Top_Ver */
+    *version = (Dword) (hwVer1 << 8) + (Dword) hwVer0;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getFirmwareVersion (
+    IN  Demodulator*    demodulator,
+    IN  Processor       processor,
+    OUT Dword*          version
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetFirmwareVersionRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.processor = processor;
+        request.version = version;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETFIRMWAREVERSION,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte writeBuffer[1];
+    Byte readBuffer[4];
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if ((ganymede->busId == Bus_I2M) || (ganymede->busId == Bus_I2U)) {
+        *version = 0xFFFFFFFF;
+        goto exit;
+    }
+
+    writeBuffer[0] = 1;
+    error = Standard_sendCommand (demodulator, Command_QUERYINFO, 0, processor, 1, writeBuffer, 4, readBuffer);
+    if (error) goto exit;
+
+    *version = (Dword) (((Dword) readBuffer[0] << 24) + ((Dword) readBuffer[1] << 16) + ((Dword) readBuffer[2] << 8) + (Dword) readBuffer[3]);
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getPostVitBer (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Dword*          postErrorCount,  /** 24 bits */
+    OUT Dword*          postBitCount,    /** 16 bits */
+    OUT Word*           abortCount
+) {
+    Dword error = Error_NO_ERROR;
+    Dword errorCount;
+    Dword bitCount;
+    Byte buffer[7];
+    Word abort;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    *postErrorCount = 0;
+    *postBitCount  = 0;
+
+    error = Standard_readRegisters (demodulator, chip, Processor_OFDM, rsd_abort_packet_cnt_7_0, r_rsd_packet_unit_15_8 - rsd_abort_packet_cnt_7_0 + 1, buffer);
+    if (error) goto exit;
+
+    abort = ((Word) buffer[rsd_abort_packet_cnt_15_8 - rsd_abort_packet_cnt_7_0] << 8) + buffer[rsd_abort_packet_cnt_7_0 - rsd_abort_packet_cnt_7_0];
+    errorCount = ((Dword) buffer[rsd_bit_err_cnt_23_16 - rsd_abort_packet_cnt_7_0] << 16) + ((Dword) buffer[rsd_bit_err_cnt_15_8 - rsd_abort_packet_cnt_7_0] << 8) + buffer[rsd_bit_err_cnt_7_0 - rsd_abort_packet_cnt_7_0];
+    bitCount = ((Dword) buffer[r_rsd_packet_unit_15_8 - rsd_abort_packet_cnt_7_0] << 8) + buffer[r_rsd_packet_unit_7_0 - rsd_abort_packet_cnt_7_0];
+    if (bitCount == 0) {
+        /*error = Error_RSD_PKT_CNT_0;*/
+        *postErrorCount = 1;
+        *postBitCount = 2;
+        *abortCount = 1000;
+        goto exit;
+    }
+
+    *abortCount = abort;
+    bitCount = bitCount - (Dword)abort;
+    if (bitCount == 0) {
+        *postErrorCount = 1;
+        *postBitCount  = 2;
+    } else {
+        *postErrorCount = errorCount - (Dword) abort * 8 * 8;
+        *postBitCount  = bitCount * 204 * 8;
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_resetPostVitErrorCount (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+) {
+    Dword error = Error_NO_ERROR;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    /** Reset counter for next time we get post Viterbi BER */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_reg_rsd_ber_rdy, reg_rsd_ber_rdy_pos, reg_rsd_ber_rdy_len, 1);
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_wordToInt (
+    IN  Demodulator*    demodulator,
+    short*              value,
+    Word                input
+) {
+    Dword error = Error_NO_ERROR;
+    short volt;
+    //Dword dwUpVoltX100 = 330;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    input = input & 0x03FF;
+
+    if (input >= 512) {
+        volt = (short) input - (short) 0x400ul;
+    } else {
+        volt = (short) input;
+    }
+
+    *value = volt;
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getRfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           rfAgc
+) {
+    Dword   error = Error_NO_ERROR;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+#if User_USE_DRIVER
+#else
+    /** get rf_agc_control */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, r_reg_aagc_rf_gain, reg_aagc_rf_gain_pos, reg_aagc_rf_gain_len, rfAgc);
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getIfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           ifAgc
+) {
+    Dword error = Error_NO_ERROR;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+#if User_USE_DRIVER
+#else
+    /** get if_agc_control */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, r_reg_aagc_if_gain, reg_aagc_if_gain_pos, reg_aagc_if_gain_len, ifAgc);
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Word            registerHi,
+    IN  Word            registerLo,
+    IN  Byte            position,
+    IN  Byte            length,
+    OUT Word            *value
+) {
+    Dword error = Error_NO_ERROR;
+    Byte temp0;
+    Byte temp1;
+    deb_info("Enter %s -\n", __FUNCTION__);
+
+    error = Standard_readRegister (demodulator, 0, Processor_OFDM, registerLo, &temp0);
+    if (error) goto exit;
+    error = Standard_readRegisterBits (demodulator, 0, Processor_OFDM, registerHi, position, length, &temp1);
+    if (error) goto exit;
+
+    *value = (Word) (temp1 << 8) + (Word) temp0;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Word            registerHi,
+    IN  Word            registerLo,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Word            value
+) {
+    Dword error = Error_NO_ERROR;
+    Byte temp0;
+    Byte temp1;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    temp0 = (Byte) (value & 0x00FF);
+    temp1 = (Byte) ((value & 0x0300) >> 8);
+
+    error = Standard_writeRegister (demodulator, 0, Processor_OFDM, registerLo, temp0);
+    if (error) goto exit;
+    error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, registerHi, position, length, temp1);
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_resetAgc (
+    IN  Demodulator*    demodulator
+) {
+    Dword error = Error_NO_ERROR;
+    //Byte temp = 0;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_aagc_top_th_dis, reg_aagc_top_th_dis_pos, reg_aagc_top_th_dis_len, 0x00);
+    if (error) goto exit;
+    error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_aagc_top_reload, reg_aagc_top_reload_pos, reg_aagc_top_reload_len, 0x01);
+    if (error) goto exit;
+    error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_agc_rst, reg_agc_rst_pos, reg_agc_rst_len, 0x01);
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getSignalQuality (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           quality
+) {
+    Dword error = Error_NO_ERROR;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_readRegister (demodulator, chip, Processor_OFDM, signal_quality, quality);
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getSignalStrength (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           strength
+) {
+    Dword error = Error_NO_ERROR;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_readRegister (demodulator, chip, Processor_OFDM, signal_strength, strength);
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getSignalStrengthDbm (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Long            rfpullUpVolt_X10,     /** RF pull up voltage multiplied by 10 */
+    IN  Long            ifpullUpVolt_X10,     /** IF pull up voltage multiplied by 10 */
+    OUT Long*           strengthDbm           /** DBm                                 */
+)
+{
+    Dword error = Error_NO_ERROR;
+    Byte temp;
+    deb_info("Enter %s -\n", __FUNCTION__);
+
+    if ((rfpullUpVolt_X10 == 0) || (ifpullUpVolt_X10 == 0)) {
+        error = Error_INV_PULLUP_VOLT;
+        goto exit;
+    }
+
+    error = Standard_readRegister (demodulator, chip, Processor_OFDM, est_rf_level_dbm, &temp);
+    if (error) goto exit;
+
+    *strengthDbm = (Long) (temp * -1);
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_divider (
+    IN  Demodulator*    demodulator,
+    IN  Dword           a,
+    IN  Dword           b,
+    IN  Dword           x
+) {
+    Dword answer = 0;
+    Dword c = 0;
+    Dword i = 0;
+
+    if (a > b) {
+        c = a / b;
+        a = a - c * b;
+    }
+
+    for (i = 0; i < x; i++) {
+        if (a >= b) {
+            answer += 1;
+            a-=b;
+        }
+        a <<= 1;
+        answer <<= 1;
+    }
+
+    answer = (c << (Long) x) + answer;
+
+    return (answer);
+}
+
+
+Dword Standard_computeCrystal (
+    IN  Demodulator*    demodulator,
+    IN  Long            crystalFrequency,   /** Crystal frequency (Hz) */
+    OUT Dword*          crystal
+) {
+    Dword   error = Error_NO_ERROR;
+    deb_info("Enter %s -\n", __FUNCTION__);
+
+    *crystal = (Long) Standard_divider (demodulator, (Dword) crystalFrequency, 1000000ul, 19ul);
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_computeAdc (
+    IN  Demodulator*    demodulator,
+    IN  Long            adcFrequency,       /** ADC frequency (Hz) */
+    OUT Dword*          adc
+)
+{
+    Dword   error = Error_NO_ERROR;
+    deb_info("Enter %s -\n", __FUNCTION__);
+
+    *adc = (Long) Standard_divider (demodulator, (Dword) adcFrequency, 1000000ul, 19ul);
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_computeFcw (
+    IN  Demodulator*    demodulator,
+    IN  Long            adcFrequency,       /** ADC frequency (Hz)    */
+    IN  Long            ifFrequency,        /** IF frequency (Hz)     */
+    IN  Bool            inversion,          /** RF spectrum inversion */
+    OUT Dword*          fcw
+) {
+    Dword error = Error_NO_ERROR;
+    Long ifFreq;
+    Long adcFreq;
+    Long adcFreqHalf;
+    Long adcFreqSample;
+    Long invBfs;
+    Long controlWord;
+    Byte adcMultiplier;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    adcFreq = adcFrequency;
+    ifFreq = ifFrequency;
+    adcFreqHalf = adcFreq / 2;
+
+    if (inversion == True)
+        ifFreq = -1 * ifFreq;
+
+    adcFreqSample = ifFreq;
+
+    if (adcFreqSample >= 0)
+        invBfs = 1;
+    else {
+        invBfs = -1;
+        adcFreqSample = adcFreqSample * -1;
+    }
+
+    while (adcFreqSample > adcFreqHalf)
+        adcFreqSample = adcFreqSample - adcFreq;
+
+    /** Sample, spectrum at positive frequency */
+    if(adcFreqSample >= 0)
+        invBfs = invBfs * -1;
+    else {
+        invBfs = invBfs * 1;
+        adcFreqSample = adcFreqSample * (-1);       /** Absolute value */
+    }
+
+    controlWord = (Long) Standard_divider (demodulator, (Dword) adcFreqSample, (Dword) adcFreq, 23ul);
+
+    if (invBfs == -1) {
+        controlWord *= -1;
+    }
+
+    /** Get ADC multiplier */
+    error = Standard_readRegister (demodulator, 0, Processor_OFDM, adcx2, &adcMultiplier);
+    if (error) goto exit;
+
+    if (adcMultiplier == 1) {
+        controlWord /= 2;
+    }
+
+    *fcw = controlWord & 0x7FFFFF;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_selectBandwidth (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,          /** KHz              */
+    IN  Dword           adcFrequency        /** Hz, ex: 20480000 */
+) {
+    Dword error = Error_NO_ERROR;
+    Dword coeff1_2048Nu;
+    Dword coeff1_4096Nu;
+    Dword coeff1_8191Nu;
+    Dword coeff1_8192Nu;
+    Dword coeff1_8193Nu;
+    Dword coeff2_2k;
+    Dword coeff2_4k;
+    Dword coeff2_8k;
+    Word bfsfcw_fftindex_ratio;
+    Word fftindex_bfsfcw_ratio;
+
+    Byte temp0;
+    Byte temp1;
+    Byte temp2;
+    Byte temp3;
+    Byte buffer[36];
+    Byte bw;
+    Byte adcMultiplier;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    if (bandwidth == 5000)
+        bw = 3;
+    else if (bandwidth == 6000)
+        bw = 0;
+    else if (bandwidth == 7000)
+        bw = 1;
+    else if (bandwidth == 8000)
+        bw = 2;
+    else {
+        error = Error_INVALID_BW;
+        goto exit;
+    }
+
+    ganymede = (Ganymede*) demodulator;
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_bw, reg_bw_pos, reg_bw_len, bw);
+    if (error) goto exit;
+
+    /** Program CFOE */
+    if (adcFrequency == 20156250) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x02449b5c;
+            coeff1_4096Nu = 0x01224dae;
+            coeff1_8191Nu = 0x00912b60;
+            coeff1_8192Nu = 0x009126d7;
+            coeff1_8193Nu = 0x0091224e;
+            coeff2_2k = 0x01224dae;
+            coeff2_4k = 0x009126d7;
+            coeff2_8k = 0x0048936b;
+            bfsfcw_fftindex_ratio = 0x0387;
+            fftindex_bfsfcw_ratio = 0x0122;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02b8ba6e;
+            coeff1_4096Nu = 0x015c5d37;
+            coeff1_8191Nu = 0x00ae340d;
+            coeff1_8192Nu = 0x00ae2e9b;
+            coeff1_8193Nu = 0x00ae292a;
+            coeff2_2k = 0x015c5d37;
+            coeff2_4k = 0x00ae2e9b;
+            coeff2_8k = 0x0057174e;
+            bfsfcw_fftindex_ratio = 0x02f1;
+            fftindex_bfsfcw_ratio = 0x015c;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x032cd980;
+            coeff1_4096Nu = 0x01966cc0;
+            coeff1_8191Nu = 0x00cb3cba;
+            coeff1_8192Nu = 0x00cb3660;
+            coeff1_8193Nu = 0x00cb3007;
+            coeff2_2k = 0x01966cc0;
+            coeff2_4k = 0x00cb3660;
+            coeff2_8k = 0x00659b30;
+            bfsfcw_fftindex_ratio = 0x0285;
+            fftindex_bfsfcw_ratio = 0x0196;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x03a0f893;
+            coeff1_4096Nu = 0x01d07c49;
+            coeff1_8191Nu = 0x00e84567;
+            coeff1_8192Nu = 0x00e83e25;
+            coeff1_8193Nu = 0x00e836e3;
+            coeff2_2k = 0x01d07c49;
+            coeff2_4k = 0x00e83e25;
+            coeff2_8k = 0x00741f12;
+            bfsfcw_fftindex_ratio = 0x0234;
+            fftindex_bfsfcw_ratio = 0x01d0;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20187500) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x0243b546;
+            coeff1_4096Nu = 0x0121daa3;
+            coeff1_8191Nu = 0x0090f1d9;
+            coeff1_8192Nu = 0x0090ed51;
+            coeff1_8193Nu = 0x0090e8ca;
+            coeff2_2k = 0x0121daa3;
+            coeff2_4k = 0x0090ed51;
+            coeff2_8k = 0x004876a9;
+            bfsfcw_fftindex_ratio = 0x0388;
+            fftindex_bfsfcw_ratio = 0x0122;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02b7a654;
+            coeff1_4096Nu = 0x015bd32a;
+            coeff1_8191Nu = 0x00adef04;
+            coeff1_8192Nu = 0x00ade995;
+            coeff1_8193Nu = 0x00ade426;
+            coeff2_2k = 0x015bd32a;
+            coeff2_4k = 0x00ade995;
+            coeff2_8k = 0x0056f4ca;
+            bfsfcw_fftindex_ratio = 0x02f2;
+            fftindex_bfsfcw_ratio = 0x015c;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x032b9761;
+            coeff1_4096Nu = 0x0195cbb1;
+            coeff1_8191Nu = 0x00caec30;
+            coeff1_8192Nu = 0x00cae5d8;
+            coeff1_8193Nu = 0x00cadf81;
+            coeff2_2k = 0x0195cbb1;
+            coeff2_4k = 0x00cae5d8;
+            coeff2_8k = 0x006572ec;
+            bfsfcw_fftindex_ratio = 0x0286;
+            fftindex_bfsfcw_ratio = 0x0196;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x039f886f;
+            coeff1_4096Nu = 0x01cfc438;
+            coeff1_8191Nu = 0x00e7e95b;
+            coeff1_8192Nu = 0x00e7e21c;
+            coeff1_8193Nu = 0x00e7dadd;
+            coeff2_2k = 0x01cfc438;
+            coeff2_4k = 0x00e7e21c;
+            coeff2_8k = 0x0073f10e;
+            bfsfcw_fftindex_ratio = 0x0235;
+            fftindex_bfsfcw_ratio = 0x01d0;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20250000) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x0241eb3b;
+            coeff1_4096Nu = 0x0120f59e;
+            coeff1_8191Nu = 0x00907f53;
+            coeff1_8192Nu = 0x00907acf;
+            coeff1_8193Nu = 0x0090764b;
+            coeff2_2k = 0x0120f59e;
+            coeff2_4k = 0x00907acf;
+            coeff2_8k = 0x00483d67;
+            bfsfcw_fftindex_ratio = 0x038b;
+            fftindex_bfsfcw_ratio = 0x0121;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02b580ad;
+            coeff1_4096Nu = 0x015ac057;
+            coeff1_8191Nu = 0x00ad6597;
+            coeff1_8192Nu = 0x00ad602b;
+            coeff1_8193Nu = 0x00ad5ac1;
+            coeff2_2k = 0x015ac057;
+            coeff2_4k = 0x00ad602b;
+            coeff2_8k = 0x0056b016;
+            bfsfcw_fftindex_ratio = 0x02f4;
+            fftindex_bfsfcw_ratio = 0x015b;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x03291620;
+            coeff1_4096Nu = 0x01948b10;
+            coeff1_8191Nu = 0x00ca4bda;
+            coeff1_8192Nu = 0x00ca4588;
+            coeff1_8193Nu = 0x00ca3f36;
+            coeff2_2k = 0x01948b10;
+            coeff2_4k = 0x00ca4588;
+            coeff2_8k = 0x006522c4;
+            bfsfcw_fftindex_ratio = 0x0288;
+            fftindex_bfsfcw_ratio = 0x0195;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x039cab92;
+            coeff1_4096Nu = 0x01ce55c9;
+            coeff1_8191Nu = 0x00e7321e;
+            coeff1_8192Nu = 0x00e72ae4;
+            coeff1_8193Nu = 0x00e723ab;
+            coeff2_2k = 0x01ce55c9;
+            coeff2_4k = 0x00e72ae4;
+            coeff2_8k = 0x00739572;
+            bfsfcw_fftindex_ratio = 0x0237;
+            fftindex_bfsfcw_ratio = 0x01ce;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20583333) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x02402402;
+            coeff1_4096Nu = 0x01201201;
+            coeff1_8191Nu = 0x00900d81;
+            coeff1_8192Nu = 0x00900901;
+            coeff1_8193Nu = 0x00900480;
+            coeff2_2k = 0x01201201;
+            coeff2_4k = 0x00900901;
+            coeff2_8k = 0x00480480;
+            bfsfcw_fftindex_ratio = 0x038e;
+            fftindex_bfsfcw_ratio = 0x0120;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02b35e69;
+            coeff1_4096Nu = 0x0159af35;
+            coeff1_8191Nu = 0x00acdd01;
+            coeff1_8192Nu = 0x00acd79a;
+            coeff1_8193Nu = 0x00acd234;
+            coeff2_2k = 0x0159af35;
+            coeff2_4k = 0x00acd79a;
+            coeff2_8k = 0x00566bcd;
+            bfsfcw_fftindex_ratio = 0x02f6;
+            fftindex_bfsfcw_ratio = 0x015a;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x032698d0;
+            coeff1_4096Nu = 0x01934c68;
+            coeff1_8191Nu = 0x00c9ac81;
+            coeff1_8192Nu = 0x00c9a634;
+            coeff1_8193Nu = 0x00c99fe7;
+            coeff2_2k = 0x01934c68;
+            coeff2_4k = 0x00c9a634;
+            coeff2_8k = 0x0064d31a;
+            bfsfcw_fftindex_ratio = 0x028a;
+            fftindex_bfsfcw_ratio = 0x0193;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x0399d337;
+            coeff1_4096Nu = 0x01cce99b;
+            coeff1_8191Nu = 0x00e67c02;
+            coeff1_8192Nu = 0x00e674ce;
+            coeff1_8193Nu = 0x00e66d9a;
+            coeff2_2k = 0x01cce99b;
+            coeff2_4k = 0x00e674ce;
+            coeff2_8k = 0x00733a67;
+            bfsfcw_fftindex_ratio = 0x0239;
+            fftindex_bfsfcw_ratio = 0x01cd;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20416667) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x023d337f;
+            coeff1_4096Nu = 0x011e99c0;
+            coeff1_8191Nu = 0x008f515a;
+            coeff1_8192Nu = 0x008f4ce0;
+            coeff1_8193Nu = 0x008f4865;
+            coeff2_2k = 0x011e99c0;
+            coeff2_4k = 0x008f4ce0;
+            coeff2_8k = 0x0047a670;
+            bfsfcw_fftindex_ratio = 0x0393;
+            fftindex_bfsfcw_ratio = 0x011f;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02afd765;
+            coeff1_4096Nu = 0x0157ebb3;
+            coeff1_8191Nu = 0x00abfb39;
+            coeff1_8192Nu = 0x00abf5d9;
+            coeff1_8193Nu = 0x00abf07a;
+            coeff2_2k = 0x0157ebb3;
+            coeff2_4k = 0x00abf5d9;
+            coeff2_8k = 0x0055faed;
+            bfsfcw_fftindex_ratio = 0x02fa;
+            fftindex_bfsfcw_ratio = 0x0158;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x03227b4b;
+            coeff1_4096Nu = 0x01913da6;
+            coeff1_8191Nu = 0x00c8a518;
+            coeff1_8192Nu = 0x00c89ed3;
+            coeff1_8193Nu = 0x00c8988e;
+            coeff2_2k = 0x01913da6;
+            coeff2_4k = 0x00c89ed3;
+            coeff2_8k = 0x00644f69;
+            bfsfcw_fftindex_ratio = 0x028d;
+            fftindex_bfsfcw_ratio = 0x0191;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x03951f32;
+            coeff1_4096Nu = 0x01ca8f99;
+            coeff1_8191Nu = 0x00e54ef7;
+            coeff1_8192Nu = 0x00e547cc;
+            coeff1_8193Nu = 0x00e540a2;
+            coeff2_2k = 0x01ca8f99;
+            coeff2_4k = 0x00e547cc;
+            coeff2_8k = 0x0072a3e6;
+            bfsfcw_fftindex_ratio = 0x023c;
+            fftindex_bfsfcw_ratio = 0x01cb;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20480000) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x023b6db7;
+            coeff1_4096Nu = 0x011db6db;
+            coeff1_8191Nu = 0x008edfe5;
+            coeff1_8192Nu = 0x008edb6e;
+            coeff1_8193Nu = 0x008ed6f7;
+            coeff2_2k = 0x011db6db;
+            coeff2_4k = 0x008edb6e;
+            coeff2_8k = 0x00476db7;
+            bfsfcw_fftindex_ratio = 0x0396;
+            fftindex_bfsfcw_ratio = 0x011e;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02adb6db;
+            coeff1_4096Nu = 0x0156db6e;
+            coeff1_8191Nu = 0x00ab7312;
+            coeff1_8192Nu = 0x00ab6db7;
+            coeff1_8193Nu = 0x00ab685c;
+            coeff2_2k = 0x0156db6e;
+            coeff2_4k = 0x00ab6db7;
+            coeff2_8k = 0x0055b6db;
+            bfsfcw_fftindex_ratio = 0x02fd;
+            fftindex_bfsfcw_ratio = 0x0157;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x03200000;
+            coeff1_4096Nu = 0x01900000;
+            coeff1_8191Nu = 0x00c80640;
+            coeff1_8192Nu = 0x00c80000;
+            coeff1_8193Nu = 0x00c7f9c0;
+            coeff2_2k = 0x01900000;
+            coeff2_4k = 0x00c80000;
+            coeff2_8k = 0x00640000;
+            bfsfcw_fftindex_ratio = 0x028f;
+            fftindex_bfsfcw_ratio = 0x0190;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x03924925;
+            coeff1_4096Nu = 0x01c92492;
+            coeff1_8191Nu = 0x00e4996e;
+            coeff1_8192Nu = 0x00e49249;
+            coeff1_8193Nu = 0x00e48b25;
+            coeff2_2k = 0x01c92492;
+            coeff2_4k = 0x00e49249;
+            coeff2_8k = 0x00724925;
+            bfsfcw_fftindex_ratio = 0x023d;
+            fftindex_bfsfcw_ratio = 0x01c9;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20500000) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x023adeff;
+            coeff1_4096Nu = 0x011d6f80;
+            coeff1_8191Nu = 0x008ebc36;
+            coeff1_8192Nu = 0x008eb7c0;
+            coeff1_8193Nu = 0x008eb34a;
+            coeff2_2k = 0x011d6f80;
+            coeff2_4k = 0x008eb7c0;
+            coeff2_8k = 0x00475be0;
+            bfsfcw_fftindex_ratio = 0x0396;
+            fftindex_bfsfcw_ratio = 0x011d;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02ad0b99;
+            coeff1_4096Nu = 0x015685cc;
+            coeff1_8191Nu = 0x00ab4840;
+            coeff1_8192Nu = 0x00ab42e6;
+            coeff1_8193Nu = 0x00ab3d8c;
+            coeff2_2k = 0x015685cc;
+            coeff2_4k = 0x00ab42e6;
+            coeff2_8k = 0x0055a173;
+            bfsfcw_fftindex_ratio = 0x02fd;
+            fftindex_bfsfcw_ratio = 0x0157;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x031f3832;
+            coeff1_4096Nu = 0x018f9c19;
+            coeff1_8191Nu = 0x00c7d44b;
+            coeff1_8192Nu = 0x00c7ce0c;
+            coeff1_8193Nu = 0x00c7c7ce;
+            coeff2_2k = 0x018f9c19;
+            coeff2_4k = 0x00c7ce0c;
+            coeff2_8k = 0x0063e706;
+            bfsfcw_fftindex_ratio = 0x0290;
+            fftindex_bfsfcw_ratio = 0x0190;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x039164cb;
+            coeff1_4096Nu = 0x01c8b266;
+            coeff1_8191Nu = 0x00e46056;
+            coeff1_8192Nu = 0x00e45933;
+            coeff1_8193Nu = 0x00e45210;
+            coeff2_2k = 0x01c8b266;
+            coeff2_4k = 0x00e45933;
+            coeff2_8k = 0x00722c99;
+            bfsfcw_fftindex_ratio = 0x023e;
+            fftindex_bfsfcw_ratio = 0x01c9;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else if (adcFrequency == 20625000) {
+        if (bandwidth == 5000) {
+            coeff1_2048Nu = 0x02376948;
+            coeff1_4096Nu = 0x011bb4a4;
+            coeff1_8191Nu = 0x008ddec1;
+            coeff1_8192Nu = 0x008dda52;
+            coeff1_8193Nu = 0x008dd5e3;
+            coeff2_2k = 0x011bb4a4;
+            coeff2_4k = 0x008dda52;
+            coeff2_8k = 0x0046ed29;
+            bfsfcw_fftindex_ratio = 0x039c;
+            fftindex_bfsfcw_ratio = 0x011c;
+        } else if (bandwidth == 6000) {
+            coeff1_2048Nu = 0x02a8e4bd;
+            coeff1_4096Nu = 0x0154725e;
+            coeff1_8191Nu = 0x00aa3e81;
+            coeff1_8192Nu = 0x00aa392f;
+            coeff1_8193Nu = 0x00aa33de;
+            coeff2_2k = 0x0154725e;
+            coeff2_4k = 0x00aa392f;
+            coeff2_8k = 0x00551c98;
+            bfsfcw_fftindex_ratio = 0x0302;
+            fftindex_bfsfcw_ratio = 0x0154;
+        } else if (bandwidth == 7000) {
+            coeff1_2048Nu = 0x031a6032;
+            coeff1_4096Nu = 0x018d3019;
+            coeff1_8191Nu = 0x00c69e41;
+            coeff1_8192Nu = 0x00c6980c;
+            coeff1_8193Nu = 0x00c691d8;
+            coeff2_2k = 0x018d3019;
+            coeff2_4k = 0x00c6980c;
+            coeff2_8k = 0x00634c06;
+            bfsfcw_fftindex_ratio = 0x0294;
+            fftindex_bfsfcw_ratio = 0x018d;
+        } else if (bandwidth == 8000) {
+            coeff1_2048Nu = 0x038bdba6;
+            coeff1_4096Nu = 0x01c5edd3;
+            coeff1_8191Nu = 0x00e2fe02;
+            coeff1_8192Nu = 0x00e2f6ea;
+            coeff1_8193Nu = 0x00e2efd2;
+            coeff2_2k = 0x01c5edd3;
+            coeff2_4k = 0x00e2f6ea;
+            coeff2_8k = 0x00717b75;
+            bfsfcw_fftindex_ratio = 0x0242;
+            fftindex_bfsfcw_ratio = 0x01c6;
+        } else {
+            error = Error_INVALID_BW;
+            goto exit;
+        }
+    } else {
+        error = Error_INVALID_XTAL_FREQ;
+        goto exit;
+    }
+
+
+    /** Get ADC multiplier */
+    error = Standard_readRegister (demodulator, 0, Processor_OFDM, adcx2, &adcMultiplier);
+    if (error) goto exit;
+
+    if (adcMultiplier == 1) {
+        coeff1_2048Nu /= 2;
+        coeff1_4096Nu /= 2;
+        coeff1_8191Nu /= 2;
+        coeff1_8192Nu /= 2;
+        coeff1_8193Nu /= 2 ;
+        coeff2_2k /= 2;
+        coeff2_4k /= 2;
+        coeff2_8k /= 2;
+    }
+
+    /** Write coeff1_2048Nu */
+    /** Get Byte0 */
+    temp0 = (Byte) (coeff1_2048Nu & 0x000000FF);
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff1_2048Nu & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff1_2048Nu & 0x00FF0000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff1_2048Nu & 0x03000000) >> 24);
+
+    /** Gig endian to make 8051 happy */
+    buffer[cfoe_NS_2048_coeff1_25_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_2048_coeff1_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_2048_coeff1_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_2048_coeff1_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff2_2k */
+    /** Get Byte0 */
+    temp0 = (Byte) ((coeff2_2k & 0x000000FF));
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff2_2k & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff2_2k & 0x00FF0000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff2_2k & 0x01000000) >> 24);
+
+    /** Gig endian to make 8051 happy */
+    buffer[cfoe_NS_2k_coeff2_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_2k_coeff2_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_2k_coeff2_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_2k_coeff2_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff1_8191Nu */
+    /** Get Byte0 */
+    temp0 = (Byte) ((coeff1_8191Nu & 0x000000FF));
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff1_8191Nu & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff1_8191Nu & 0x00FFC000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff1_8191Nu & 0x03000000) >> 24);
+
+    /** Big endian to make 8051 happy */
+    buffer[cfoe_NS_8191_coeff1_25_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_8191_coeff1_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_8191_coeff1_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_8191_coeff1_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff1_8192Nu */
+    /** Get Byte0 */
+    temp0  = (Byte) (coeff1_8192Nu & 0x000000FF);
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff1_8192Nu & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff1_8192Nu & 0x00FFC000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff1_8192Nu & 0x03000000) >> 24);
+
+    /** Gig endian to make 8051 happy */
+    buffer[cfoe_NS_8192_coeff1_25_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_8192_coeff1_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_8192_coeff1_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_8192_coeff1_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff1_8193Nu */
+    /** Get Byte0 */
+    temp0 = (Byte) ((coeff1_8193Nu & 0x000000FF));
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff1_8193Nu & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff1_8193Nu & 0x00FFC000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff1_8193Nu & 0x03000000) >> 24);
+
+    /** Big endian to make 8051 happy */
+    buffer[cfoe_NS_8193_coeff1_25_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_8193_coeff1_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_8193_coeff1_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_8193_coeff1_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff2_8k */
+    /** Get Byte0 */
+    temp0 = (Byte) ((coeff2_8k & 0x000000FF));
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff2_8k & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff2_8k & 0x00FF0000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff2_8k & 0x01000000) >> 24);
+
+    /** Big endian to make 8051 happy */
+    buffer[cfoe_NS_8k_coeff2_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_8k_coeff2_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_8k_coeff2_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_8k_coeff2_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff1_4096Nu */
+    /** Get Byte0 */
+    temp0 = (Byte) (coeff1_4096Nu & 0x000000FF);
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff1_4096Nu & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff1_4096Nu & 0x00FF0000) >> 16);
+    /** Get Byte3[1:0] */
+    /** Bit[7:2] will be written soon and so don't have to care them */
+    temp3 = (Byte) ((coeff1_4096Nu & 0x03000000) >> 24);
+
+    /** Big endian to make 8051 happy */
+    buffer[cfoe_NS_4096_coeff1_25_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_4096_coeff1_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_4096_coeff1_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_4096_coeff1_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Write coeff2_4k */
+    /** Get Byte0 */
+    temp0 = (Byte) ((coeff2_4k & 0x000000FF));
+    /** Get Byte1 */
+    temp1 = (Byte) ((coeff2_4k & 0x0000FF00) >> 8);
+    /** Get Byte2 */
+    temp2 = (Byte) ((coeff2_4k & 0x00FF0000) >> 16);
+    /** Get Byte3 */
+    temp3 = (Byte) ((coeff2_4k & 0x01000000) >> 24);
+
+    /** Big endian to make 8051 happy */
+    buffer[cfoe_NS_4k_coeff2_24 - cfoe_NS_2048_coeff1_25_24] = temp3;
+    buffer[cfoe_NS_4k_coeff2_23_16 - cfoe_NS_2048_coeff1_25_24] = temp2;
+    buffer[cfoe_NS_4k_coeff2_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[cfoe_NS_4k_coeff2_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Get Byte0 */
+    temp0 = (Byte) (bfsfcw_fftindex_ratio & 0x00FF);
+    /** Get Byte1 */
+    temp1 = (Byte) ((bfsfcw_fftindex_ratio & 0xFF00) >> 8);
+
+    /** Big endian to make 8051 happy */
+    buffer[bfsfcw_fftindex_ratio_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[bfsfcw_fftindex_ratio_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    /** Get Byte0 */
+    temp0 = (Byte) (fftindex_bfsfcw_ratio & 0x00FF);
+    /** Get Byte1 */
+    temp1 = (Byte) ((fftindex_bfsfcw_ratio & 0xFF00) >> 8);
+
+    /** Big endian to make 8051 happy */
+    buffer[fftindex_bfsfcw_ratio_15_8 - cfoe_NS_2048_coeff1_25_24] = temp1;
+    buffer[fftindex_bfsfcw_ratio_7_0 - cfoe_NS_2048_coeff1_25_24] = temp0;
+
+    error = Standard_writeRegisters (demodulator, chip, Processor_OFDM, cfoe_NS_2048_coeff1_25_24, 36, buffer);
+    if (error) goto exit;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Byte*           firmwareCodes,
+    IN  Segment*        firmwareSegments,
+    IN  Byte*           firmwarePartitions
+) {
+    Dword error = Error_NO_ERROR;
+    Dword beginPartition;
+    Dword endPartition;
+    Dword version;
+    Dword firmwareLength;
+    Byte* firmwareCodesPointer;
+    Word command;
+    Dword i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Set I2C master clock speed. */
+    error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_one_cycle_counter_tuner, User_I2C_SPEED);
+    if (error) goto exit;
+
+    firmwareCodesPointer = firmwareCodes;
+    beginPartition = 0;
+    endPartition = firmwarePartitions[0];
+
+    for (i = beginPartition; i < endPartition; i++) {
+        firmwareLength = firmwareSegments[i].segmentLength;
+        if (firmwareSegments[i].segmentType == 0) {
+            /** Dwonload firmware */
+            error = Standard_sendCommand (demodulator, Command_FW_DOWNLOAD_BEGIN, 0, Processor_LINK, 0, NULL, 0, NULL);
+            if (error) goto exit;
+            if (ganymede->cmdDescription->loadFirmware != NULL) {
+                error = ganymede->cmdDescription->loadFirmware (demodulator, firmwareLength, firmwareCodesPointer);
+            }
+            if (error) goto exit;
+            error = Standard_sendCommand (demodulator, Command_FW_DOWNLOAD_END, 0, Processor_LINK, 0, NULL, 0, NULL);
+            if (error) goto exit;
+        } else if (firmwareSegments[i].segmentType == 1) {
+            /** Copy firmware */
+            error = Standard_sendCommand (demodulator, Command_SCATTER_WRITE, 0, Processor_LINK, firmwareLength, firmwareCodesPointer, 0, NULL);
+            if (error) goto exit;
+        } else {
+            /** Direct write firmware */
+            command = (Word) (firmwareCodesPointer[0] << 8) + (Word) firmwareCodesPointer[1];
+            error = Standard_sendCommand (demodulator, command, 0, Processor_LINK, firmwareLength - 2, firmwareCodesPointer + 2, 0, NULL);
+            if (error) goto exit;
+        }
+        firmwareCodesPointer += firmwareLength;
+    }
+
+    /** Boot */
+    error = Standard_sendCommand (demodulator, Command_BOOT, 0, Processor_LINK, 0, NULL, 0, NULL);
+    if (error) goto exit;
+
+    User_delay (demodulator, 10);
+
+    /** Check if firmware is running */
+    version = 0;
+    error = Standard_getFirmwareVersion (demodulator, Processor_LINK, &version);
+    if (error) goto exit;
+    if (version == 0)
+        error = Error_BOOT_FAIL;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_loadScript (
+    IN  Demodulator*    demodulator,
+    IN  StreamType      streamType,
+    IN  Word*           scriptSets,
+    IN  ValueSet*       scripts,
+    IN  Word*           tunerScriptSets,
+    IN  ValueSet*       tunerScripts
+) {
+    Dword error = Error_NO_ERROR;
+    Word beginScript;
+    Word endScript;
+    //Byte adcType = 0;
+    Byte i;
+    Word j;
+	Byte value;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+
+    if ((scriptSets[0] != 0) && (scripts != NULL))
+    {
+        beginScript = 0;
+        endScript = scriptSets[0];
+
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            /** Load OFSM init script */
+            for (j = beginScript; j < endScript; j++) {
+                error = Standard_writeRegister (demodulator, i, Processor_OFDM, scripts[j].address, scripts[j].value);
+                if (error) goto exit;
+            }
+        }
+    }
+
+	/** Detect difference between A and B */
+	error = Standard_readRegister (demodulator, 0, Processor_LINK, 0x384F, &value);
+	if (error) goto exit;
+
+    if ((tunerScriptSets[0] != 0) && (tunerScripts != NULL))
+    {
+        if (tunerScriptSets[1] != 0 && value == 0xFF)
+        {
+            beginScript = tunerScriptSets[0];
+            endScript = tunerScriptSets[0] + tunerScriptSets[1];
+		} else {
+            beginScript = 0;
+            endScript = tunerScriptSets[0];
+        }
+
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            /** Load tuner init script */
+            for (j = beginScript; j < endScript; j++) {
+                error = Standard_writeRegister (demodulator, i, Processor_OFDM, tunerScripts[j].address, tunerScripts[j].value);
+                if (error) goto exit;
+            }
+        }
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_loadIrTable (
+    IN  Demodulator*    demodulator,
+    IN  Word            tableLength,
+    IN  Byte*           table
+) {
+    Dword error = Error_NO_ERROR;
+    Byte baseHigh;
+    Byte baseLow;
+    Word registerBase;
+    Word i;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_readRegister (demodulator, 0, Processor_LINK, 0x417F, &baseHigh);
+    if (error) goto exit;
+    error = Standard_readRegister (demodulator, 0, Processor_LINK, 0x4180, &baseLow);
+    if (error) goto exit;
+
+    registerBase = (Word) (baseHigh << 8) + (Word) baseLow;
+
+    if (registerBase) {
+        for (i = 0; i < tableLength; i++) {
+            error = Standard_writeRegister (demodulator, 0, Processor_LINK, registerBase + i, table[i]);
+            if (error) goto exit;
+        }
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_initialize (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chipNumber,
+    IN  Word            sawBandwidth,
+    IN  StreamType      streamType,
+    IN  Architecture    architecture
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    InitializeRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    ganymede->driver = NULL;
+    error = Standard_getDriver (demodulator, &ganymede->driver);
+
+    if (ganymede->driver != NULL) {
+        request.chipNumber = chipNumber;
+        request.sawBandwidth = sawBandwidth;
+        request.streamType = streamType;
+        request.architecture = architecture;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_INITIALIZE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Dword crystal = 0;
+    Dword adc = 0;
+    Dword fcw = 0;
+    Byte buffer[4];
+	Dword version = 0;
+    Word* tunerScriptSets = NULL;
+    ValueSet* tunerScripts = NULL;
+
+
+    Byte i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    ganymede->chipNumber = chipNumber;
+    ganymede->options = 0x0000;
+    ganymede->fcw = 0x00000000;
+    ganymede->frequency[0] = 642000;
+	ganymede->frequency[1] = 642000;
+    ganymede->initialized = False;
+
+    if (ganymede->busId == 0xFFFF) {
+        goto exit;
+    }
+
+
+    if (ganymede->tunerDescription->tunerId == 0xFFFF) {
+        goto exit;
+    }
+
+	error = Standard_getFirmwareVersion (demodulator, Processor_LINK, &version);
+	if (error) goto exit;
+	if (version != 0) {
+		ganymede->booted = True;
+	} else {
+		ganymede->booted = False;
+	}
+
+
+
+
+    ganymede->firmwareCodes = Firmware_codes;
+    ganymede->firmwareSegments = Firmware_segments;
+#if 1 //j017,set to 1  //j014+s 
+    ganymede->firmwarePartitions = Firmware_partitions;
+#else
+    ganymede->firmwarePartitions = Firmware_new_partitions;
+#endif //j014+e
+    ganymede->scriptSets = Firmware_scriptSets;
+    ganymede->scripts = Firmware_scripts;
+
+    /** Set up by default tunerDescription */ /** release1remove */
+    tunerScriptSets = ganymede->tunerDescription->tunerScriptSets;
+    tunerScripts = ganymede->tunerDescription->tunerScript;
+
+
+    error = Standard_readRegisterBits (demodulator, 0, Processor_LINK, r_io_mux_pwron_clk_strap, io_mux_pwron_clk_strap_pos, io_mux_pwron_clk_strap_len, &i);
+    if (error) goto exit;
+
+    ganymede->crystalFrequency = Standard_clockTable[i].crystalFrequency;
+    ganymede->adcFrequency = Standard_clockTable[i].adcFrequency;
+
+    ganymede->dataReady = False;
+
+    /** Write secondary I2C address to device */
+    /** it is needed to write i2c address prior to fw-downloading */
+    if (ganymede->chipNumber > 1) {
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, 0x417F, ((PDEVICE_CONTEXT)demodulator->userData)->Map.I2C_SLAVE_ADDR);
+        if (error) goto exit;
+    } else {
+        error = Standard_writeRegister (demodulator, 0, Processor_LINK, 0x417F, 0x00);
+        if (error) goto exit;
+    }
+
+    if (ganymede->firmwareCodes != NULL) {
+        if (ganymede->booted == False) {
+            error = Standard_loadFirmware (demodulator, ganymede->firmwareCodes, ganymede->firmwareSegments, ganymede->firmwarePartitions);
+            if (error) goto exit;
+            ganymede->booted = True;
+        }
+    }
+
+    /** Detect the HostA or HostB */
+    error = Standard_readRegisterBits (demodulator, 0, Processor_LINK, r_io_mux_pwron_hosta, io_mux_pwron_hosta_pos, io_mux_pwron_hosta_len, &ganymede->hostInterface[0]);
+    if (error) goto exit;
+
+
+    /** Tell firmware the type of tuner. */
+    for (i = 0; i < ganymede->chipNumber; i++) {
+		error = Standard_writeRegister (demodulator, i, Processor_LINK, p_reg_link_ofsm_dummy_15_8, (Byte) ganymede->tunerDescription->tunerId);
+        if (error) goto exit;
+
+        /** Set read-update bit to 1 for constellation */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_feq_read_update, reg_feq_read_update_pos, reg_feq_read_update_len, 1);
+        if (error) goto exit;
+
+        /** Enable FEC Monitor */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_fec_vtb_rsd_mon_en, fec_vtb_rsd_mon_en_pos, fec_vtb_rsd_mon_en_len, 1);
+        if (error) goto exit;
+    }
+
+    /** Compute ADC and load them to device */
+    error = Standard_computeCrystal (demodulator, (Long) ganymede->crystalFrequency * 1000, &crystal);
+    if (error) goto exit;
+
+    buffer[0] = (Byte) (crystal & 0x000000FF);
+    buffer[1] = (Byte) ((crystal & 0x0000FF00) >> 8);
+    buffer[2] = (Byte) ((crystal & 0x00FF0000) >> 16);
+    buffer[3] = (Byte) ((crystal & 0xFF000000) >> 24);
+    for (i = 0; i < ganymede->chipNumber; i++) {
+        error = Standard_writeRegisters (demodulator, i, Processor_OFDM, crystal_clk_7_0, 4, buffer);
+        if (error) goto exit;
+    }
+
+    /** Compute ADC and load them to device */
+    error = Standard_computeAdc (demodulator, (Long) ganymede->adcFrequency, &adc);
+    if (error) goto exit;
+
+    buffer[0] = (Byte) (adc & 0x000000FF);
+    buffer[1] = (Byte) ((adc & 0x0000FF00) >> 8);
+    buffer[2] = (Byte) ((adc & 0x00FF0000) >> 16);
+    for (i = 0; i < ganymede->chipNumber; i++) {
+        error = Standard_writeRegisters (demodulator, i, Processor_OFDM, p_reg_f_adc_7_0, 3, buffer);
+        if (error) goto exit;
+    }
+
+    /** Compute FCW and load them to device */
+    error = Standard_computeFcw (demodulator, (Long) ganymede->adcFrequency, (Long) ganymede->tunerDescription->ifFrequency, ganymede->tunerDescription->inversion, &fcw);
+    if (error) goto exit;
+    ganymede->fcw = fcw;
+
+    buffer[0] = (Byte) (fcw & 0x000000FF);
+    buffer[1] = (Byte) ((fcw & 0x0000FF00) >> 8);
+    buffer[2] = (Byte) ((fcw & 0x007F0000) >> 16);
+    for (i = 0; i < ganymede->chipNumber; i++) {
+        error = Standard_writeRegisters (demodulator, i, Processor_OFDM, bfs_fcw_7_0, bfs_fcw_22_16 - bfs_fcw_7_0 + 1, buffer);    
+        if (error) goto exit;
+    }
+
+    /** Set the desired stream type */
+    error = Standard_setStreamType (demodulator, streamType);
+    if (error) goto exit;
+
+    /** Set the desired architecture type */
+    error = Standard_setArchitecture (demodulator, architecture);
+    if (error) goto exit;
+
+    if (ganymede->scripts != NULL) {
+        error = Standard_loadScript (demodulator, streamType, ganymede->scriptSets, ganymede->scripts, tunerScriptSets, tunerScripts);
+        if (error) goto exit;
+    }
+
+    if (ganymede->tunerDescription->openTuner != NULL) {
+        if ((ganymede->busId != Bus_I2M) && (ganymede->busId != Bus_I2U)) {
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = ganymede->tunerDescription->openTuner (demodulator, i);
+                if (error) goto exit;
+            }
+        }
+    }
+
+#if User_USE_INTERRUPT
+    if (ganymede->busId == Bus_SDIO) {
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_sdioc_external_int_en, reg_sdioc_external_int_en_pos, reg_sdioc_external_int_en_len, 1);
+        if (error) goto exit;
+    }
+#endif
+
+	for (i = 0; i< ganymede->chipNumber; i++) {
+
+		/** Set H/W MPEG2 locked detection **/
+		error = Standard_writeRegister (demodulator, i, Processor_LINK, p_reg_top_lock3_out, 1);
+		if (error) goto exit;
+
+		/** Set registers for driving power 0xD830 **/
+		error = Standard_writeRegister (demodulator, i, Processor_LINK, p_reg_top_padmiscdr2, 1);
+		if (error) goto exit;
+
+		/** Set registers for driving power 0xD831 **/
+		error = Standard_writeRegister (demodulator, i, Processor_LINK, p_reg_top_padmiscdr4, 0);
+		if (error) goto exit;
+
+		/** Set registers for driving power 0xD832 **/
+		error = Standard_writeRegister (demodulator, i, Processor_LINK, p_reg_top_padmiscdr8, 0);
+		if (error) goto exit;
+	}
+
+    ganymede->initialized = True;
+
+#endif
+exit:
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_finalize (
+    IN  Demodulator*    demodulator
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    FinalizeRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_FINALIZE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->tunerDescription->closeTuner != NULL) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            error = ganymede->tunerDescription->closeTuner (demodulator, i);
+        }
+    }
+
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isAgcLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    *locked = False;
+
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, p_agc_lock, agc_lock_pos, agc_lock_len, &temp);
+    if (error) goto exit;
+    if (temp) *locked = True;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isCfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    *locked = False;
+
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, r_reg_cfoe_divg_flag, reg_cfoe_divg_flag_pos, reg_cfoe_divg_flag_len, &temp);
+    if (error) goto exit;
+    if (!temp) *locked = True;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isSfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    *locked = False;
+
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, r_reg_sfoe_divg_flag, reg_sfoe_divg_flag_pos, reg_sfoe_divg_flag_len, &temp);
+    if (error) goto exit;
+    if (!temp) *locked = True;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isTpsLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    *locked = False;
+
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, p_fd_tpsd_lock, fd_tpsd_lock_pos, fd_tpsd_lock_len, &temp);
+    if (error) goto exit;
+    if (temp) *locked = True;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isMpeg2Locked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    *locked = False;
+
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, r_mp2if_sync_byte_locked, mp2if_sync_byte_locked_pos, mp2if_sync_byte_locked_len, &temp);
+    if (error) goto exit;
+    if (temp) *locked = True;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_isLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+) {
+    Dword error = Error_NO_ERROR;
+
+    Word emptyLoop = 0;
+    Word tpsLoop = 0;
+    Word mpeg2Loop = 0;
+    Byte channels[2];
+    Byte begin;
+    Byte end;
+    Byte i;
+    Byte emptyChannel = 1;
+    Byte tpsLocked = 0;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    IsLockedRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.locked = locked;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_ISLOCKED,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    
+    *locked = False;
+
+    if (ganymede->architecture == Architecture_DCA) {
+        begin = 0;
+        end = ganymede->chipNumber;
+    } else {
+        begin = chip;
+        end = begin + 1;
+    }
+
+    for (i = begin; i < end; i++) {
+        ganymede->statistic[i].signalPresented = False;
+        ganymede->statistic[i].signalLocked = False;
+        ganymede->statistic[i].signalQuality = 0;
+        ganymede->statistic[i].signalStrength = 0;
+    }
+
+    channels[0] = 2;
+    channels[1] = 2;
+    while (emptyLoop < 40) {
+        for (i = begin; i < end; i++) {
+            error = Standard_readRegister (demodulator, i, Processor_OFDM, empty_channel_status, &channels[i]);
+            if (error) goto exit;
+        }
+        if ((channels[0] == 1) || (channels[1] == 1)) {
+            emptyChannel = 0;
+            break;
+        }
+        if ((channels[0] == 2) && (channels[1] == 2)) {
+            emptyChannel = 1;
+            goto exit;
+        }
+        User_delay (demodulator, 25);
+        emptyLoop++;
+    }
+
+    if (emptyChannel == 1) goto exit;
+
+    while (tpsLoop < 50) {
+        for (i = begin; i < end; i++) {
+            /** Empty channel */
+            error = Standard_isTpsLocked (demodulator, i, &ganymede->statistic[i].signalPresented);
+            if (error) goto exit;
+            if (ganymede->statistic[i].signalPresented == True) {
+                tpsLocked = 1;
+                break;
+            }
+        }
+
+        if (tpsLocked == 1) break;
+
+        User_delay (demodulator, 25);
+        tpsLoop++;
+    }
+
+    if (tpsLocked == 0) goto exit;
+
+    while (mpeg2Loop < 40) {
+        if (ganymede->architecture == Architecture_DCA) {
+            error = Standard_isMpeg2Locked (demodulator, 0, &ganymede->statistic[0].signalLocked);
+            if (error) goto exit;
+            if (ganymede->statistic[0].signalLocked == True) {
+                for (i = begin; i < end; i++) {
+                    ganymede->statistic[i].signalQuality = 80;
+                    ganymede->statistic[i].signalStrength = 80;
+                }
+                *locked = True;
+                break;
+            }
+        } else {
+            error = Standard_isMpeg2Locked (demodulator, chip, &ganymede->statistic[chip].signalLocked);
+            if (error) goto exit;
+            if (ganymede->statistic[chip].signalLocked == True) {
+                ganymede->statistic[chip].signalQuality = 80;
+                ganymede->statistic[chip].signalStrength = 80;
+                *locked = True;
+                break;
+            }
+        }
+        User_delay (demodulator, 25);
+        mpeg2Loop++;
+    }
+    for (i = begin; i < end; i++) {
+        ganymede->statistic[i].signalQuality = 0;
+        ganymede->statistic[i].signalStrength = 20;
+    }
+
+exit:
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setPriority (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Priority        priority
+)
+{
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte pri;
+    Byte cr;
+    Byte valuew_7_0 = 0;
+    Byte valuew_10_8 = 0;
+    Byte nfvaluew_7_0 = 0;
+    Byte nfvaluew_10_8 = 0;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    if (priority == Priority_HIGH) {
+        pri = 1;
+        /** Get code rate here */
+        error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_hpcr, reg_tpsd_hpcr_pos, reg_tpsd_hpcr_len, &cr);
+        if (error) goto exit;
+    } else {
+        pri = 0;
+        /** Get code rate here */
+        error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_lpcr, reg_tpsd_lpcr_pos, reg_tpsd_lpcr_len, &cr);
+        if (error) goto exit;
+    }
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_dec_pri, reg_dec_pri_pos, reg_dec_pri_len, pri);
+    if (error) goto exit;
+
+    /** Set sbx quantizer */
+    switch (cr) {
+        case 0 :
+            valuew_7_0 = 0x20;
+            valuew_10_8 = 0x03;
+            nfvaluew_7_0 = 0x00;
+            nfvaluew_10_8 = 0x01;
+            break;
+        case 1 :
+            valuew_7_0 = 0x5E;
+            valuew_10_8 = 0x01;
+            nfvaluew_7_0 = 0x80;
+            nfvaluew_10_8 = 0x00;
+            break;
+        case 2 :
+            valuew_7_0 = 0x2C;
+            valuew_10_8 = 0x01;
+            nfvaluew_7_0 = 0x55;
+            nfvaluew_10_8 = 0x00;
+            break;
+        case 3 :
+            valuew_7_0 = 0xFA;
+            valuew_10_8 = 0x00;
+            nfvaluew_7_0 = 0x40;
+            nfvaluew_10_8 = 0x00;
+            break;
+        case 4 :
+            valuew_7_0 = 0xC8;
+            valuew_10_8 = 0x00;
+            nfvaluew_7_0 = 0x33;
+            nfvaluew_10_8 = 0x00;
+            break;
+    }
+
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_qnt_valuew_7_0, valuew_7_0);
+    if (error) goto exit;
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_qnt_valuew_10_8, valuew_10_8);
+    if (error) goto exit;
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_qnt_nfvaluew_7_0, nfvaluew_7_0);
+    if (error) goto exit;
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_qnt_nfvaluew_10_8, nfvaluew_10_8);
+    if (error) goto exit;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_reset (
+    IN  Demodulator*    demodulator
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte value;
+    Byte i;
+    Byte j;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    for (i = 0; i < ganymede->chipNumber; i++) {
+
+        /** Enable OFDM reset */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, I2C_reg_ofdm_rst_en, reg_ofdm_rst_en_pos, reg_ofdm_rst_en_len, 0x01);
+        if (error) goto exit;
+
+        /** Start reset mechanism */
+        value = 0x00;
+        error = Standard_writeRegisters (demodulator, i, Processor_OFDM, RESET_STATE, 1, &value);
+        if (error) goto exit;
+
+        /** Clear ofdm reset */
+        for (j = 0; j < 150; j++) {
+            error = Standard_readRegisterBits (demodulator, i, Processor_OFDM, I2C_reg_ofdm_rst, reg_ofdm_rst_pos, reg_ofdm_rst_len, &value);
+            if (error) goto exit;
+            if (value) break;
+            User_delay (demodulator, 10);
+        }
+
+        if (j == 150) {
+            error = Error_RESET_TIMEOUT;
+            goto exit;
+        }
+
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, I2C_reg_ofdm_rst, reg_ofdm_rst_pos, reg_ofdm_rst_len, 0);
+        if (error) goto exit;
+
+        /** Disable OFDM reset */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, I2C_reg_ofdm_rst_en, reg_ofdm_rst_en_pos, reg_ofdm_rst_en_len, 0x00);
+        if (error) goto exit;
+    }
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_programFcw (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Long            shift,          /** Hz */
+    IN  Dword           adcFrequency    /** Hz */
+)
+{
+    Dword error = Error_NO_ERROR;
+    Dword fcw;
+    Long fcwShift;
+    Byte temp0;
+    Byte temp1;
+    Byte temp2;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get shift freq */
+    fcwShift = (shift * 8 * 1024 + (Long) adcFrequency / (2 * 1024)) / (Long) adcFrequency * 1024;
+
+    fcw  = (Dword) ((Long) ganymede->fcw + fcwShift);
+
+    temp0 = (Byte) (fcw  & 0x000000FF);
+    temp1 = (Byte) ((fcw & 0x0000FF00) >> 8);
+    temp2 = (Byte) ((fcw & 0x007F0000) >> 16);
+
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_bfs_fcw_7_0, temp0);
+    if (error) goto exit;
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_bfs_fcw_15_8, temp1);
+    if (error) goto exit;
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_reg_bfs_fcw_22_16, temp2);
+    if (error) goto exit;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    OUT ChannelModulation*      channelModulation
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetChannelModulationRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.channelModulation = channelModulation;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETCHANNELMODULATION,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte temp;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get constellation type */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_const, reg_tpsd_const_pos, reg_tpsd_const_len, &temp);
+    if (error) goto exit;
+    channelModulation->constellation = (Constellation) temp;
+
+    /** Get TPS hierachy and alpha value */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_hier, reg_tpsd_hier_pos, reg_tpsd_hier_len, &temp);
+    if (error) goto exit;
+    channelModulation->hierarchy = (Hierarchy)temp;
+
+    /** Get high/low priority */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_dec_pri, reg_dec_pri_pos, reg_dec_pri_len, &temp);
+    if (error) goto exit;
+    if (temp)
+        channelModulation->priority = Priority_HIGH;
+    else
+        channelModulation->priority = Priority_LOW;
+
+    /** Get high code rate */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_hpcr, reg_tpsd_hpcr_pos, reg_tpsd_hpcr_len, &temp);
+    if (error) goto exit;
+    channelModulation->highCodeRate = (CodeRate) temp;
+
+    /** Get low code rate */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_lpcr, reg_tpsd_lpcr_pos, reg_tpsd_lpcr_len, &temp);
+    if (error) goto exit;
+    channelModulation->lowCodeRate  = (CodeRate) temp;
+
+    /** Get guard interval */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_gi, reg_tpsd_gi_pos, reg_tpsd_gi_len, &temp);
+    if (error) goto exit;
+    channelModulation->interval = (Interval) temp;
+
+    /** Get FFT mode */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_txmod, reg_tpsd_txmod_pos, reg_tpsd_txmod_len, &temp);
+    if (error) goto exit;
+    channelModulation->transmissionMode = (TransmissionModes) temp;
+
+    /** Get bandwidth */
+    error = Standard_readRegisterBits (demodulator, chip, Processor_OFDM, g_reg_bw, reg_bw_pos, reg_bw_len, &temp);
+    if (error) goto exit;
+    channelModulation->bandwidth = (Bandwidth) temp;
+
+    /** Get frequency */
+    channelModulation->frequency = ganymede->frequency[chip];
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    IN  ChannelModulation*      channelModulation
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Byte temp;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Set constellation type */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_const, reg_tpsd_const_pos, reg_tpsd_const_len, (Byte) channelModulation->constellation);
+    if (error) goto exit;
+
+    /** Set TPS hierachy and alpha value */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_hier, reg_tpsd_hier_pos, reg_tpsd_hier_len, (Byte) channelModulation->hierarchy);
+    if (error) goto exit;
+
+    /** Set high/low priority */
+    if (channelModulation->priority == Priority_HIGH)
+        temp = 1;
+    else
+        temp = 0;
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_dec_pri, reg_dec_pri_pos, reg_dec_pri_len, temp);
+    if (error) goto exit;
+
+    /** Set high code rate */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_hpcr, reg_tpsd_hpcr_pos, reg_tpsd_hpcr_len, (Byte) channelModulation->highCodeRate);
+    if (error) goto exit;
+
+    /** Set low code rate */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_lpcr, reg_tpsd_lpcr_pos, reg_tpsd_lpcr_len, (Byte) channelModulation->lowCodeRate);
+    if (error) goto exit;
+
+    /** Set guard interval */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_gi, reg_tpsd_gi_pos, reg_tpsd_gi_len, (Byte) channelModulation->interval);
+    if (error) goto exit;
+
+    /** Set FFT mode */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_tpsd_txmod, reg_tpsd_txmod_pos, reg_tpsd_txmod_len, (Byte) channelModulation->transmissionMode);
+    if (error) goto exit;
+
+    /** Set bandwidth */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, g_reg_bw, reg_bw_pos, reg_bw_len, (Byte) channelModulation->bandwidth);
+    if (error) goto exit;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+Dword Standard_setFrequency (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Dword           frequency
+) {
+    Dword error = Error_NO_ERROR;
+    Byte band;
+    Byte i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Clear easy mode flag first */
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, Training_Mode, 0x00);
+    if (error) goto exit;
+
+    /** Clear empty_channel_status lock flag */
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, empty_channel_status, 0x00);
+    if (error) goto exit;
+
+    /** Clear MPEG2 lock flag */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, r_mp2if_sync_byte_locked, mp2if_sync_byte_locked_pos, mp2if_sync_byte_locked_len, 0x00);
+    if (error) goto exit;
+
+    /** Determine frequency band */
+    band = 0xFF;
+    for (i = 0; i < Standard_MAX_BAND; i++) {
+        if ((frequency >= Standard_bandTable[i].minimum) && (frequency <= Standard_bandTable[i].maximum)) {
+            band = i;
+            break;
+        }
+    }
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, FreBand, band);
+    if (error) goto exit;
+
+    if (ganymede->tunerDescription->setTuner != NULL) {
+        if ((ganymede->busId != Bus_I2M) && (ganymede->busId != Bus_I2U)) {
+            error = ganymede->tunerDescription->setTuner (demodulator, chip, ganymede->bandwidth[chip], frequency);
+            if (error) goto exit;
+        }
+    }
+
+    /** Trigger ofsm */
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, trigger_ofsm, 0);
+    if (error) goto exit;
+
+    ganymede->frequency[chip] = frequency;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setFrequencyForRetrain (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    IN  Dword                   frequency,
+    IN  Word                    bandwidth,
+    IN  ChannelModulation*      channelModulation
+)
+{
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Clear MPEG2 lock flag first */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, r_mp2if_sync_byte_locked, mp2if_sync_byte_locked_pos, mp2if_sync_byte_locked_len, 0);
+    if (error) goto exit;
+
+    /** Set frequency for all chips */
+    if (ganymede->tunerDescription->setTuner != NULL) {
+        error = ganymede->tunerDescription->setTuner (demodulator, chip, bandwidth, frequency);
+        if (error) goto exit;
+    }
+
+    /** Trigger ofsm */
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, trigger_ofsm, 0);
+    if (error) goto exit;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_maskDcaOutput (
+    IN  Demodulator*    demodulator
+) {
+    Dword error = Error_NO_ERROR;
+    Byte i;
+    Bool dcaValid = False;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if ((ganymede->chipNumber > 1) && (ganymede->architecture == Architecture_DCA))
+        dcaValid = True;
+
+    if (dcaValid == True) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_dca_upper_out_en, reg_dca_upper_out_en_pos, reg_dca_upper_out_en_len, 0);
+            if (error) goto exit;
+        }
+        User_delay (demodulator, 5);
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_acquireChannel (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,
+    IN  Dword           frequency
+) {
+    Dword error = Error_NO_ERROR;
+
+    Byte begin;
+    Byte end;
+    Byte i;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    AcquireChannelRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.frequency = frequency;
+        request.bandwidth = bandwidth;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_ACQUIRECHANNEL,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Ganymede* ganymede;
+    deb_info("Enter %s , bw=%d, freq=%d\n", __FUNCTION__, bandwidth, frequency);
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->architecture == Architecture_DCA) {
+        begin = 0;
+        end = ganymede->chipNumber;
+    } else {
+        begin = chip;
+        end = begin + 1;
+    }
+
+    for (i = begin; i < end; i++) {
+        error = Standard_selectBandwidth (demodulator, i, bandwidth, ganymede->adcFrequency);
+        if (error) goto exit;
+		ganymede->bandwidth[i] = bandwidth;
+    }
+
+    error = Standard_maskDcaOutput (demodulator);
+    if (error) goto exit;
+
+    /** Set frequency */
+    for (i = begin; i < end; i++) {
+        error = Standard_setFrequency (demodulator, i, frequency);
+        if (error) goto exit;
+    }
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setStreamType (
+    IN  Demodulator*    demodulator,
+    IN  StreamType      streamType
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    SetStreamTypeRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.streamType = streamType;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_SETSTREAMTYPE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    //Dword warning = Error_NO_ERROR;
+    Ganymede* ganymede;
+    Byte i;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Enable DVB-T interrupt if next stream type is StreamType_DVBT_DATAGRAM */
+    if (streamType == StreamType_DVBT_DATAGRAM) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_inten, reg_dvbt_inten_pos, reg_dvbt_inten_len, 1);
+            if (error) goto exit;
+            if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_mpeg_full_speed, reg_mpeg_full_speed_pos, reg_mpeg_full_speed_len, 0);
+                if (error) goto exit;
+            } else {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_mpeg_full_speed, reg_mpeg_full_speed_pos, reg_mpeg_full_speed_len, 1);
+                if (error) goto exit;
+            }
+        }
+    }
+
+    /** Enable DVB-T mode */
+    for (i = 0; i < ganymede->chipNumber; i++) {
+        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_en, reg_dvbt_en_pos, reg_dvbt_en_len, 1);
+        if (error) goto exit;
+    }
+
+    /** Enter sub mode */
+    switch (streamType) {
+
+	case StreamType_NONE : 
+		goto exit;
+		break;
+
+        case StreamType_DVBT_DATAGRAM :
+            if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+                error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 0);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_par_mode, mp2if_mpeg_par_mode_pos, mp2if_mpeg_par_mode_len, 0);
+                if (error) goto exit;
+                /** Fix current leakage */
+                if (ganymede->chipNumber > 1) {
+                    if (ganymede->hostInterface[0]) {
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_par_mode, reg_top_hostb_mpeg_par_mode_pos, reg_top_hostb_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    } else {
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    }
+                } else {
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_par_mode, reg_top_hostb_mpeg_par_mode_pos, reg_top_hostb_mpeg_par_mode_len, 1);
+                    if (error) goto exit;
+                }
+            } else {
+                error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 0);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_par_mode, mp2if_mpeg_par_mode_pos, mp2if_mpeg_par_mode_len, 0);
+                if (error) goto exit;
+
+                /** Fix current leakage */
+                if (ganymede->chipNumber > 1) {
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_par_mode, reg_top_hostb_mpeg_par_mode_pos, reg_top_hostb_mpeg_par_mode_len, 0);
+                    if (error) goto exit;
+                } else {
+                    if (ganymede->hostInterface[0]) {
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hostb_mpeg_par_mode, reg_top_hostb_mpeg_par_mode_pos, reg_top_hostb_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    } else {
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    }
+                }
+            }
+            break;
+        case StreamType_DVBT_PARALLEL :
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 0);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_mp2if_mpeg_par_mode, mp2if_mpeg_par_mode_pos, mp2if_mpeg_par_mode_len, 1);
+                if (error) goto exit;
+
+                if (i == 0) {
+                    if (ganymede->hostInterface[0]) {
+                        /** HostA interface is enabled */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    } else {
+                        /** HostB interface is enabled */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hostb_mpeg_par_mode, reg_top_hostb_mpeg_par_mode_pos, reg_top_hostb_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    }
+                } else {
+                    /** HostA interface is enabled */
+                    error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                    if (error) goto exit;
+                }
+            }
+            break;
+        case StreamType_DVBT_SERIAL :
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 1);
+                if (error) goto exit;
+
+                if (i == 0) {
+                    if (ganymede->hostInterface[0]) {
+                        /** HostA interface is enabled */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 1);
+                        if (error) goto exit;
+                    } else {
+                        /** HostB interface is enabled */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 1);
+                        if (error) goto exit;
+                    }
+                } else {
+                    /** HostA interface is enabled */
+                    error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 1);
+                    if (error) goto exit;
+                }
+            }
+            break;
+    }
+    error = User_mpegConfig (demodulator);
+
+    ganymede->streamType = streamType;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setArchitecture (
+    IN  Demodulator*    demodulator,
+    IN  Architecture    architecture
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    SetArchitectureRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.architecture = architecture;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_SETARCHITECTURE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Word frameSize;
+    Byte packetSize;
+    Byte buffer[2];
+    Byte standAlone[2];
+    Byte upperChip[2];
+    Byte upperHost[2];
+    Byte lowerChip[2];
+    Byte lowerHost[2];
+    Byte dcaEnable[2];
+    Byte phaseLatch[2];
+    Byte fpgaLatch[2];
+    Byte i;
+    Bool pipValid = False;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    if (architecture == Architecture_DCA) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            standAlone[i] = 0;
+            upperChip[i] = 0;
+            upperHost[i] = 0;
+            lowerChip[i] = 0;
+            lowerHost[i] = 0;
+            dcaEnable[i] = 1;
+            phaseLatch[i] = 0;
+            fpgaLatch[i] = 0;
+        }
+        if (ganymede->chipNumber == 1) {
+            standAlone[0] = 1;
+            dcaEnable[0] = 0;
+        } else {
+            upperChip[ganymede->chipNumber - 1] = 1;
+            upperHost[0] = 1;
+            lowerChip[0] = 1;
+            lowerHost[ganymede->chipNumber - 1] = 1;
+            phaseLatch[0] = 1;
+            phaseLatch[ganymede->chipNumber - 1] = 1;
+            fpgaLatch[0] = 0x66;
+            fpgaLatch[ganymede->chipNumber - 1] = 0x66;
+        }
+    } else {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            standAlone[i] = 1;
+            upperChip[i] = 0;
+            upperHost[i] = 0;
+            lowerChip[i] = 0;
+            lowerHost[i] = 0;
+            dcaEnable[i] = 0;
+            phaseLatch[i] = 0;
+            fpgaLatch[i] = 0;
+        }
+    }
+
+    if (ganymede->initialized == True) {
+        error = Standard_maskDcaOutput (demodulator);
+        if (error) goto exit;
+    }
+
+    /** Set upper chip first in order to avoid I/O conflict */
+    for (i = ganymede->chipNumber; i > 0; i--) {
+        /** Set dca_upper_chip */
+        error = Standard_writeRegisterBits (demodulator, i - 1, Processor_OFDM, p_reg_dca_upper_chip, reg_dca_upper_chip_pos, reg_dca_upper_chip_len, upperChip[i - 1]);
+        if (error) goto exit;
+        if (i == 1) {
+            if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+                if (ganymede->hostInterface[0]) {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_upper, reg_top_hosta_dca_upper_pos, reg_top_hosta_dca_upper_len, upperHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_upper, reg_top_hostb_dca_upper_pos, reg_top_hostb_dca_upper_len, 0);
+                    if (error) goto exit;
+                } else {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_upper, reg_top_hostb_dca_upper_pos, reg_top_hostb_dca_upper_len, upperHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_upper, reg_top_hosta_dca_upper_pos, reg_top_hosta_dca_upper_len, 0);
+                    if (error) goto exit;
+                }
+            } else {
+                if (ganymede->hostInterface[0]) {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_upper, reg_top_hostb_dca_upper_pos, reg_top_hostb_dca_upper_len, upperHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_upper, reg_top_hosta_dca_upper_pos, reg_top_hosta_dca_upper_len, 0);
+                    if (error) goto exit;
+                } else {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_upper, reg_top_hosta_dca_upper_pos, reg_top_hosta_dca_upper_len, upperHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_upper, reg_top_hostb_dca_upper_pos, reg_top_hostb_dca_upper_len, 0);
+                    if (error) goto exit;
+                }
+            }
+        } else {
+            error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_upper, reg_top_hostb_dca_upper_pos, reg_top_hostb_dca_upper_len, upperHost[i - 1]);
+            if (error) goto exit;
+            error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_upper, reg_top_hosta_dca_upper_pos, reg_top_hosta_dca_upper_len, 0);
+            if (error) goto exit;
+        }
+
+        /** Set dca_lower_chip */
+        error = Standard_writeRegisterBits (demodulator, i - 1, Processor_OFDM, p_reg_dca_lower_chip, reg_dca_lower_chip_pos, reg_dca_lower_chip_len, lowerChip[i - 1]);
+        if (error) goto exit;
+        if (i == 1) {
+            if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+                if (ganymede->hostInterface[0]) {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_lower, reg_top_hosta_dca_lower_pos, reg_top_hosta_dca_lower_len, lowerHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_lower, reg_top_hostb_dca_lower_pos, reg_top_hostb_dca_lower_len, 0);
+                    if (error) goto exit;
+                } else {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_lower, reg_top_hostb_dca_lower_pos, reg_top_hostb_dca_lower_len, lowerHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_lower, reg_top_hosta_dca_lower_pos, reg_top_hosta_dca_lower_len, 0);
+                    if (error) goto exit;
+                }
+            } else {
+                if (ganymede->hostInterface[0]) {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_lower, reg_top_hostb_dca_lower_pos, reg_top_hostb_dca_lower_len, lowerHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_lower, reg_top_hosta_dca_lower_pos, reg_top_hosta_dca_lower_len, 0);
+                    if (error) goto exit;
+                } else {
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_lower, reg_top_hosta_dca_lower_pos, reg_top_hosta_dca_lower_len, lowerHost[i - 1]);
+                    if (error) goto exit;
+                    error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_lower, reg_top_hostb_dca_lower_pos, reg_top_hostb_dca_lower_len, 0);
+                    if (error) goto exit;
+                }
+            }
+        } else {
+            error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hostb_dca_lower, reg_top_hostb_dca_lower_pos, reg_top_hostb_dca_lower_len, lowerHost[i - 1]);
+            if (error) goto exit;
+            error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_top_hosta_dca_lower, reg_top_hosta_dca_lower_pos, reg_top_hosta_dca_lower_len, 0);
+            if (error) goto exit;
+        }
+
+        /** Set phase latch */
+        error = Standard_writeRegisterBits (demodulator, i - 1, Processor_OFDM, p_reg_dca_platch, reg_dca_platch_pos, reg_dca_platch_len, phaseLatch[i - 1]);
+        if (error) goto exit;
+
+        /** Set fpga latch */
+        error = Standard_writeRegisterBits (demodulator, i - 1, Processor_OFDM, p_reg_dca_fpga_latch, reg_dca_fpga_latch_pos, reg_dca_fpga_latch_len, fpgaLatch[i - 1]);
+        if (error) goto exit;
+    }
+
+    for (i = 0; i < ganymede->chipNumber; i++) {
+        /** Set stand alone */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_dca_stand_alone, reg_dca_stand_alone_pos, reg_dca_stand_alone_len, standAlone[i]);
+        if (error) goto exit;
+
+        /** Set DCA enable */
+        error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_dca_en, reg_dca_en_pos, reg_dca_en_len, dcaEnable[i]);
+        if (error) goto exit;
+    }
+
+    if (ganymede->initialized == True) {
+        for (i = 0; i < ganymede->chipNumber; i++) {
+            error = Standard_writeRegister (demodulator, i, Processor_OFDM, trigger_ofsm, 0);
+            if (error) goto exit;
+        }
+    }
+
+
+    if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+        frameSize = User_USB20_FRAME_SIZE_DW;
+        packetSize = (Byte) (User_USB20_MAX_PACKET_SIZE / 4);
+
+        if (ganymede->busId == Bus_USB11) {
+            frameSize   = User_USB11_FRAME_SIZE_DW;
+            packetSize = (Byte) (User_USB11_MAX_PACKET_SIZE / 4);
+        }
+
+        if ((ganymede->chipNumber > 1) && (architecture == Architecture_PIP))
+            pipValid = True;
+#if 0 //j011+s
+        /** Reset EP4 */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2_sw_rst, reg_mp2_sw_rst_pos, reg_mp2_sw_rst_len, 1);
+        if (error) goto exit;
+#endif //j011+e
+
+        /** Reset EP5 */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if2_sw_rst, reg_mp2if2_sw_rst_pos, reg_mp2if2_sw_rst_len, 1);
+        if (error) goto exit;
+
+        /** Disable EP4 */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep4_tx_en, reg_ep4_tx_en_pos, reg_ep4_tx_en_len, 0);
+        if (error) goto exit;
+
+        /** Disable EP5 */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep5_tx_en, reg_ep5_tx_en_pos, reg_ep5_tx_en_len, 0);
+        if (error) goto exit;
+
+        /** Disable EP4 NAK */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep4_tx_nak, reg_ep4_tx_nak_pos, reg_ep4_tx_nak_len, 0);
+        if (error) goto exit;
+
+        /** Disable EP5 NAK */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep5_tx_nak, reg_ep5_tx_nak_pos, reg_ep5_tx_nak_len, 0);
+        if (error) goto exit;
+
+        /** Enable EP4 */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep4_tx_en, reg_ep4_tx_en_pos, reg_ep4_tx_en_len, 1);
+        if (error) goto exit;
+
+        /** Set EP4 transfer length */
+        buffer[p_reg_ep4_tx_len_7_0 - p_reg_ep4_tx_len_7_0] = (Byte) frameSize;
+        buffer[p_reg_ep4_tx_len_15_8 - p_reg_ep4_tx_len_7_0] = (Byte) (frameSize >> 8);
+        error = Standard_writeRegisters (demodulator, 0, Processor_LINK, p_reg_ep4_tx_len_7_0, 2, buffer);
+
+        /** Set EP4 packet size */
+        error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_ep4_max_pkt, packetSize);
+        if (error) goto exit;
+
+        if (pipValid == True) {
+            /** Enable EP5 */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_LINK, p_reg_ep5_tx_en, reg_ep5_tx_en_pos, reg_ep5_tx_en_len, 1);
+            if (error) goto exit;
+
+            /** Set EP5 transfer length */
+            buffer[p_reg_ep5_tx_len_7_0 - p_reg_ep5_tx_len_7_0] = (Byte) frameSize;
+            buffer[p_reg_ep5_tx_len_15_8 - p_reg_ep5_tx_len_7_0] = (Byte) (frameSize >> 8);
+            error = Standard_writeRegisters (demodulator, 0, Processor_LINK, p_reg_ep5_tx_len_7_0, 2, buffer);
+
+            /** Set EP5 packet size */
+            error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_ep5_max_pkt, packetSize);
+            if (error) goto exit;
+        }
+
+
+        /** Disable 15 SER/PAR mode */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 0);
+        if (error) goto exit;
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_mp2if_mpeg_par_mode, mp2if_mpeg_par_mode_pos, mp2if_mpeg_par_mode_len, 0);
+        if (error) goto exit;
+
+        if (pipValid == True) {
+            /** Enable mp2if2 */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if2_en, reg_mp2if2_en_pos, reg_mp2if2_en_len, 1);
+            if (error) goto exit;
+
+            for (i = 1; i < ganymede->chipNumber; i++) {
+                /** Enable serial mode */
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 1);
+                if (error) goto exit;
+
+                /** Enable HostB serial */
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 1);
+                if (error) goto exit;
+            }
+
+            /** Enable tsis */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_tsis_en, reg_tsis_en_pos, reg_tsis_en_len, 1);
+            if (error) goto exit;
+        } else {
+            /** Disable mp2if2 */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if2_en, reg_mp2if2_en_pos, reg_mp2if2_en_len, 0);
+            if (error) goto exit;
+
+            for (i = 1; i < ganymede->chipNumber; i++) {
+                /** Disable serial mode */
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_mp2if_mpeg_ser_mode, mp2if_mpeg_ser_mode_pos, mp2if_mpeg_ser_mode_len, 0);
+                if (error) goto exit;
+
+                /** Disable HostB serial */
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hostb_mpeg_ser_mode, reg_top_hostb_mpeg_ser_mode_pos, reg_top_hostb_mpeg_ser_mode_len, 0);
+                if (error) goto exit;
+            }
+
+            /** Disable tsis */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_tsis_en, reg_tsis_en_pos, reg_tsis_en_len, 0);
+            if (error) goto exit;
+        }
+
+        /** Negate EP4 reset */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2_sw_rst, reg_mp2_sw_rst_pos, reg_mp2_sw_rst_len, 0);
+        if (error) goto exit;
+
+        /** Negate EP5 reset */
+        error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if2_sw_rst, reg_mp2if2_sw_rst_pos, reg_mp2if2_sw_rst_len, 0);
+        if (error) goto exit;
+
+        if (pipValid == True) {
+            /** Split 15 PSB to 1K + 1K and enable flow control */
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if2_half_psb, reg_mp2if2_half_psb_pos, reg_mp2if2_half_psb_len, 0);
+            if (error) goto exit;
+            error = Standard_writeRegisterBits (demodulator, 0, Processor_OFDM, p_reg_mp2if_stop_en, reg_mp2if_stop_en_pos, reg_mp2if_stop_en_len, 1);
+            if (error) goto exit;
+
+            for (i = 1; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_mpeg_full_speed, reg_mpeg_full_speed_pos, reg_mpeg_full_speed_len, 0);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_mp2if_stop_en, reg_mp2if_stop_en_pos, reg_mp2if_stop_en_len, 0);
+                if (error) goto exit;
+            }
+        }
+    }
+
+    ganymede->architecture = architecture;
+
+exit:
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            superFrameCount,
+    IN  Word            packetUnit
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    SetStatisticRangeRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.superFrameCount = superFrameCount;
+        request.packetUnit = packetUnit;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_SETSTATISTICRANGE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte temp0;
+    Byte temp1;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    /** Set super frame count */
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, qnt_vbc_sframe_num, superFrameCount);
+    if (error) goto exit;
+
+    /** Set packet unit. */
+    temp0 = (Byte) packetUnit;
+    temp1 = (Byte) (packetUnit >> 8);
+    error = Standard_writeRegisters (demodulator, chip, Processor_OFDM, rsd_packet_unit_7_0, 1, &temp0);
+    if (error) goto exit;
+    error = Standard_writeRegisters (demodulator, chip, Processor_OFDM, rsd_packet_unit_15_8, 1, &temp1);
+    if (error) goto exit;
+
+exit:
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte*           frameCount,
+    IN  Word*           packetUnit
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetStatisticRangeRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.superFrameCount = superFrameCount;
+        request.packetUnit = packetUnit;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETSTATISTICRANGE,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte temp0;
+    Byte temp1;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    /** Get super frame count */
+    error = Standard_readRegister (demodulator, chip, Processor_OFDM, qnt_vbc_sframe_num, frameCount);
+    if (error) goto exit;
+
+    /** Get packet unit. */
+    error = Standard_readRegisters (demodulator, chip, Processor_OFDM, r_rsd_packet_unit_7_0, 1, &temp0);
+    if (error) goto exit;
+    error = Standard_readRegisters (demodulator, chip, Processor_OFDM, r_rsd_packet_unit_15_8, 1, &temp1);
+    if (error) goto exit;
+    *packetUnit = (Word) (temp1 << 8) + (Word) temp0;
+
+exit:
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getStatistic (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Statistic*      statistic
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetStatisticRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.statistic = statistic;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETSTATISTIC,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Ganymede* ganymede;
+    Byte quality;
+    Byte strength;
+    Byte buffer[2];
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get statistic by stream type */
+    error = Standard_readRegisters (demodulator, chip, Processor_OFDM, tpsd_lock, mpeg_lock - tpsd_lock + 1, buffer);
+    if (error) goto exit;
+
+    if (buffer[tpsd_lock - tpsd_lock])
+        ganymede->statistic[chip].signalPresented = True;
+    else
+        ganymede->statistic[chip].signalPresented = False;
+
+    if (buffer[mpeg_lock - tpsd_lock])
+        ganymede->statistic[chip].signalLocked = True;
+    else
+        ganymede->statistic[chip].signalLocked = False;
+
+    error = Standard_getSignalQuality (demodulator, chip, &quality);
+    if (error) goto exit;
+
+    ganymede->statistic[chip].signalQuality = quality;
+
+    error = Standard_getSignalStrength (demodulator, chip, &strength);
+    if (error) goto exit;
+
+    ganymede->statistic[chip].signalStrength = strength;
+
+    *statistic = ganymede->statistic[chip];
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getInterrupts (
+    IN  Demodulator*    demodulator,
+    OUT Interrupts*     interrupts
+) {
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+    Byte value = 0;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get interrupts by stream type */
+
+
+    *interrupts = Interrupt_NONE;
+
+    /** Read the interrupts register to determine the type of interrupts. */
+    error = Standard_readRegister (demodulator, 0, Processor_LINK, r_link_ofsm_dvbt_int, &value);
+    if (error) goto exit;
+
+    if (value & 0x04) {
+        ganymede->dataReady = True;
+        *interrupts |= Interrupt_DVBT;
+    }
+
+exit:
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_clearInterrupt (
+    IN  Demodulator*    demodulator,
+    IN  Interrupt       interrupt
+) {
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+    Byte value = 0;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Clear interrupt by stream type */
+
+    //error = ganymede->dvbtStandardDescription.clearInterrupt (demodulator, interrupt);
+    value = (Byte) interrupt;
+
+    /** Clear the specific interrupt. */
+    error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_dvbt_intsts, value);
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getDataLength (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          dataLength,
+    OUT Bool*           valid           /** used in DVBH mode */
+) {
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get data length by stream type */
+    switch (ganymede->burstSize) {
+        case BurstSize_1024 :
+            *dataLength = 1024;
+            break;
+        case BurstSize_2048 :
+            *dataLength = 2048;
+            break;
+        case BurstSize_4096 :
+            *dataLength = 4096;
+            break;
+    }
+    *valid = True;
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get data by stream type */
+
+    //error = ganymede->dvbtStandardDescription.getData (demodulator, bufferLength, buffer);
+
+    if (bufferLength == 0) {
+        error = Error_INVALID_DATA_LENGTH;
+        goto exit;
+    }
+
+
+    /** IP datagram is locate in a special register 0xF00000 */
+    error = ganymede->cmdDescription->receiveData (demodulator, 0xF00000, bufferLength, buffer);
+    if (error) goto exit;
+
+    ganymede->dataReady = False;
+
+exit:
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+/** combine Standard_getLength and Standard_getData */
+Dword Standard_getDatagram (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    GetDatagramRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.bufferLength = bufferLength;
+        request.buffer = buffer;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_GETDATAGRAM,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Ganymede* ganymede;
+    Dword length = 0;
+    Byte value;
+    // Bool ready = False;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Get datagram by stream type */
+
+    //error = ganymede->dvbtStandardDescription.getDatagram (demodulator, bufferLength, buffer);
+
+#if User_USE_INTERRUPT
+#else
+
+    error = Standard_readRegisterBits (demodulator, 0, Processor_LINK, r_link_ofsm_ip_valid, link_ofsm_ip_valid_pos, link_ofsm_ip_valid_len, &value);
+    if (error) goto exit;
+
+    if (value) {
+        ganymede->dataReady = True;
+    }
+    if (ganymede->dataReady == False) {
+        *bufferLength = 0;
+        error = Error_NOT_READY;
+        goto exit;
+    }
+#endif
+    switch (ganymede->burstSize) {
+        case BurstSize_1024 :
+            length = 1024;
+            break;
+        case BurstSize_2048 :
+            length = 2048;
+            break;
+        case BurstSize_4096 :
+            length = 4096;
+            break;
+    }
+    if (*bufferLength >= length) {
+        //error = Dvbt_getData (demodulator, length, (Byte*) buffer);
+        //if (error) goto exit;
+
+        if (bufferLength == 0) {
+            error = Error_INVALID_DATA_LENGTH;
+            goto exit;
+        }
+
+
+        /** IP datagram is locate in a special register 0xF00000 */
+        error = ganymede->cmdDescription->receiveData (demodulator, 0xF00000, length, buffer);
+        if (error) goto exit;
+
+        *bufferLength = length;
+
+        ganymede->dataReady = False;
+
+        *bufferLength = length;
+    } else {
+        error = Error_BUFFER_INSUFFICIENT;
+    }
+
+
+exit:
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+/** get ir raw code (4 bytes) */
+Dword Standard_getIrCode (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          code
+)  {
+    Dword error = Error_NO_ERROR;
+    Byte readBuffer[4];
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    error = Standard_sendCommand (demodulator, Command_IR_GET, 0, Processor_LINK, 0, NULL, 4, readBuffer);
+    if (error) goto exit;
+
+    *code = (Dword) ((readBuffer[0] << 24) + (readBuffer[1] << 16) + (readBuffer[2] << 8) + readBuffer[3]);
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_reboot (
+    IN  Demodulator*    demodulator
+)  {
+    Dword error = Error_NO_ERROR;
+    Dword version;
+    Byte i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    error = Standard_getFirmwareVersion (demodulator, Processor_LINK, &version);
+    if (error) goto exit;
+    if (version == 0xFFFFFFFF) goto exit;       /** I2M and I2U */
+    if (version != 0) {
+        for (i = ganymede->chipNumber; i > 0; i--) {
+            error = ganymede->cmdDescription->reboot (demodulator, i - 1);
+            if (error) goto exit;
+            User_delay (demodulator, 1);
+        }
+
+        User_delay (demodulator, 10);
+
+        version = 1;
+        for (i = 0; i < 30; i++) {
+            error = Standard_getFirmwareVersion (demodulator, Processor_LINK, &version);
+            if (error == Error_NO_ERROR) break;
+            User_delay (demodulator, 10);
+        }
+        if (error) goto exit;
+        if (version != 0)
+            error = Error_REBOOT_FAIL;
+    }
+    for (i = ganymede->chipNumber; i > 0; i--) {
+        error = Standard_writeRegisterBits (demodulator, i - 1, Processor_LINK, p_reg_p_dmb_sw_reset, reg_p_dmb_sw_reset_pos, reg_p_dmb_sw_reset_len, 1);
+        if (error) goto exit;
+    }
+
+    ganymede->booted = False;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_controlPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    ControlPowerSavingRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.control = control;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_CONTROLPOWERSAVING,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte temp;
+    Byte begin;
+    Byte end;
+    Byte i;
+    Byte j;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s control=%d-\n", __FUNCTION__, control);
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->architecture == Architecture_DCA) {
+        begin = 0;
+        end = ganymede->chipNumber;
+    } else {
+        begin = chip;
+        end = begin + 1;
+    }
+
+    if (control) {
+        /** Power up case */
+        if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+            for (i = begin; i < end; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_afe_mem0, 3, 1, 0);
+                if (error) goto exit;
+                error = Standard_writeRegister (demodulator, i, Processor_OFDM, suspend_flag, 0);
+                if (error) goto exit;
+				error = Standard_writeRegister (demodulator, i, Processor_OFDM, trigger_ofsm, 0);
+				if (error) goto exit;
+
+            }
+        } else {  /** TS, SPI, and SDIO case */
+            /** not implemented yet */
+        }
+
+        /** Fixed current leakage */
+        switch (ganymede->busId) {
+            case Bus_SPI :
+            case Bus_SDIO :
+            case Bus_USB :
+            case Bus_USB11 :
+                if (ganymede->chipNumber > 1) {
+                    for (i = 1; i < ganymede->chipNumber; i++) {
+                        /** Disable HostA parallel */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 0);
+                        if (error) goto exit;
+                    }
+                }
+                break;
+        }
+    } else {
+        /** Power down case */
+        if ((ganymede->busId == Bus_USB) || (ganymede->busId == Bus_USB11)) {
+            for (i = begin; i < end; i++) {
+                error = Standard_writeRegister (demodulator, i, Processor_OFDM, suspend_flag, 1);
+                if (error) goto exit;
+                error = Standard_writeRegister (demodulator, i, Processor_OFDM, trigger_ofsm, 0);
+                if (error) goto exit;
+
+                for (j = 0; j < 150; j++) {
+                    error = Standard_readRegister (demodulator, i, Processor_OFDM, suspend_flag, &temp);
+                    if (error) goto exit;
+                    if (!temp) break;
+                    User_delay (demodulator, 10);
+                }
+                error = Standard_writeRegisterBits (demodulator, i, Processor_OFDM, p_reg_afe_mem0, 3, 1, 1);
+                if (error) goto exit;
+            }
+        } else {  /** TS SPI SDIO */
+            /** not implemented yet */
+        }
+
+        /** Fixed current leakage */
+        switch (ganymede->busId) {
+            case Bus_SPI :
+            case Bus_SDIO :
+            case Bus_USB :
+            case Bus_USB11 :
+                if (ganymede->chipNumber > 1) {
+                    for (i = 1; i < ganymede->chipNumber; i++) {
+                        /** Enable HostA parallel */
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_ser_mode, reg_top_hosta_mpeg_ser_mode_pos, reg_top_hosta_mpeg_ser_mode_len, 0);
+                        if (error) goto exit;
+                        error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_top_hosta_mpeg_par_mode, reg_top_hosta_mpeg_par_mode_pos, reg_top_hosta_mpeg_par_mode_len, 1);
+                        if (error) goto exit;
+                    }
+                }
+                break;
+        }
+    }
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_controlTunerPowerSaving (
+    IN  Demodulator*    demodulator,
+	IN  Byte            control
+) {
+	Dword error = Error_NO_ERROR;
+
+    deb_info("Enter %s control=%d-\n", __FUNCTION__, control);
+	if (control) {
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_en, 1);
+		if (error) goto exit;
+
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_on, 1);
+		if (error) goto exit;
+
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_o, 1);
+		if (error) goto exit;
+	} else {
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_en, 1);
+		if (error) goto exit;
+
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_on, 1);
+		if (error) goto exit;
+
+		error = Standard_writeRegister (demodulator, 0, Processor_LINK, p_reg_top_gpioh7_o, 0);
+		if (error) goto exit;
+	}
+
+exit:
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+	return (error);
+}
+
+
+Dword Standard_runCode (
+    IN  Demodulator*    demodulator,
+    IN  Word            code
+) {
+    Dword error = Error_NO_ERROR;
+    Byte writeBuffer[2];
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    writeBuffer[0] = (Byte) (code >> 8);
+    writeBuffer[1] = (Byte) code;
+    error = Standard_sendCommand (demodulator, Command_RUN_CODE, 0, Processor_LINK, 2, writeBuffer, 0, NULL);
+    if (error) goto exit;
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_controlPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    ControlPidFilterRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.control = control;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_CONTROLPIDFILTER,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_en, mp2if_pid_en_pos, mp2if_pid_en_len, control);
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_resetPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+#else
+    Ganymede* ganymede;
+    deb_info("Enter %s -\n", __FUNCTION__);
+
+    ganymede = (Ganymede*) demodulator;
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_rst, mp2if_pid_rst_pos, mp2if_pid_rst_len, 1);
+    if (error) goto exit;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+Dword Standard_addPidToFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            index,
+    IN  Pid             pid
+) {
+    Dword error = Error_NO_ERROR;
+
+#if User_USE_DRIVER
+    DWORD number;
+    BOOL result;
+    AddPidRequest request;
+    Ganymede* ganymede;
+
+    ganymede = (Ganymede*) demodulator;
+
+    if (ganymede->driver != NULL) {
+        request.chip = chip;
+        request.pid = pid;
+        result = DeviceIoControl (
+                    ganymede->driver,
+                    IOCTL_AFA_DEMOD_ADDPID,
+                    &request,
+                    sizeof (request),
+                    NULL,
+                    0,
+                    &number,
+                    NULL
+        );
+        error = request.error;
+    } else {
+        error = Error_DRIVER_INVALID;
+    }
+#else
+    Byte writeBuffer[2];
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+    /** Enable pid filter */
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_en, mp2if_pid_en_pos, mp2if_pid_en_len, 1);
+    if (error) goto exit;
+
+    writeBuffer[0] = (Byte) pid.value;
+    writeBuffer[1] = (Byte) (pid.value >> 8);
+
+    error = Standard_writeRegisters (demodulator, chip, Processor_OFDM, p_mp2if_pid_dat_l, 2, writeBuffer);
+    if (error) goto exit;
+
+    error = Standard_writeRegisterBits (demodulator, chip, Processor_OFDM, p_mp2if_pid_index_en, mp2if_pid_index_en_pos, mp2if_pid_index_en_len, 1);
+    if (error) goto exit;
+
+    error = Standard_writeRegister (demodulator, chip, Processor_OFDM, p_mp2if_pid_index, index);
+    if (error) goto exit;
+
+exit :
+#endif
+
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_setBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize       burstSize
+) {
+    Dword error = Error_NO_ERROR;
+    Byte i;
+    Ganymede* ganymede;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    ganymede = (Ganymede*) demodulator;
+
+
+    if (burstSize == BurstSize_4096) {
+        error = Error_NOT_SUPPORT;
+        goto exit;
+    }
+
+
+    switch (burstSize) {
+        case BurstSize_1024 :
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_path, reg_dvbt_path_pos, reg_dvbt_path_len, 1);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_bufsize, reg_dvbt_bufsize_pos, reg_dvbt_bufsize_len, 1);
+                if (error) goto exit;
+            }
+            ganymede->burstSize = BurstSize_1024;
+            break;
+        case BurstSize_2048 :
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_path, reg_dvbt_path_pos, reg_dvbt_path_len, 1);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_bufsize, reg_dvbt_bufsize_pos, reg_dvbt_bufsize_len, 0);
+                if (error) goto exit;
+            }
+            ganymede->burstSize = BurstSize_2048;
+
+            break;
+        case BurstSize_4096 :
+            for (i = 0; i < ganymede->chipNumber; i++) {
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_path, reg_dvbt_path_pos, reg_dvbt_path_len, 0);
+                if (error) goto exit;
+                error = Standard_writeRegisterBits (demodulator, i, Processor_LINK, p_reg_dvbt_bufsize, reg_dvbt_bufsize_pos, reg_dvbt_bufsize_len, 1);
+                if (error) goto exit;
+            }
+            ganymede->burstSize = BurstSize_4096;
+            break;
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
+
+
+Dword Standard_getBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize*      burstSize
+) {
+    Dword error = Error_NO_ERROR;
+    Byte path;
+    Byte size;
+
+    deb_info("Enter %s -\n", __FUNCTION__);
+    error = Standard_readRegisterBits (demodulator, 0, Processor_LINK, p_reg_dvbt_path, reg_dvbt_path_pos, reg_dvbt_path_len, &path);
+    if (error) goto exit;
+    error = Standard_readRegisterBits (demodulator, 0, Processor_LINK, p_reg_dvbt_bufsize, reg_dvbt_bufsize_pos, reg_dvbt_bufsize_len, &size);
+    if (error) goto exit;
+
+    if (path) {
+        if (size) {
+            *burstSize = BurstSize_1024;
+        } else {
+            *burstSize = BurstSize_2048;
+        }
+    } else {
+        if (size) {
+            *burstSize = BurstSize_4096;
+        } else {
+            *burstSize = BurstSize_2048;
+        }
+    }
+
+exit :
+    if(error) {
+	deb_info("%s error, ret=0x%x\n", __FUNCTION__, error);
+    }
+    return (error);
+}
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_standard.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_standard.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_standard.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_standard.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,1142 @@
+#ifndef __STANDARD_H__
+#define __STANDARD_H__
+
+
+#include "a867_type.h"
+#include "a867_user.h"
+#include "a867_error.h"
+#include "a867_register.h"
+#include "a867_variable.h"
+#include "a867_version.h"
+
+#if User_USE_DRIVER
+#include <tchar.h>
+#include "iocontrol.h"
+#endif
+
+
+/**
+ * Write one byte (8 bits) to a specific register in demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be written.
+ * @param value the value to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            value
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the start address of the registers to be written.
+ * @param bufferLength the number of registers to be written.
+ * @param buffer a byte array which is used to store values to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a collection of values to discontiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param valueSetsLength the number of values to be written.
+ * @param valueSets a ValueSet array which is used to store values to be
+ *        written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in slave device.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the registers to be read.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous registers in slave device
+ * through specified interface (1, 2, 3).
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param interfaceIndex the index of interface. The possible values are
+ *        1~3.
+ * @param slaveAddress the I2c address of slave device.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Write a sequence of bytes to the contiguous cells in the EEPROM.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5 (firmware will detect EEPROM address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the cells to be written.
+ * @param bufferLength the number of cells to be written.
+ * @param buffer a byte array which is used to store values to be written.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Modify bits in the specific register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be written.
+ * @param position the start position of bits to be modified (0 means the
+ *        LSB of the specifyed register).
+ * @param length the length of bits.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_writeRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+);
+
+
+/**
+ * Read one byte (8 bits) from a specific register in demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param value the pointer used to store the value read from demodulator
+ *        register.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readRegister (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    OUT Byte*           value
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Read a collection of values to discontiguous registers from demodulator.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param valueSetsLength the number of values to be read.
+ * @param valueSets a ValueSet array which is used to store values to be
+ *        read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readScatterRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in tuner.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the registers to be read.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readTunerRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous registers in slave device
+ * through specified interface (1, 2, 3).
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 6 (one more byte to specify tuner address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param interfaceIndex the index of interface. The possible values are
+ *        1~3.
+ * @param slaveAddress the I2c address of slave device.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readGenericRegisters (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            interfaceIndex,
+    IN  Byte            slaveAddress,
+    IN  Byte            bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Read a sequence of bytes from the contiguous cells in the EEPROM.
+ * The maximum burst size is restricted by the capacity of bus. If bus
+ * could transfer N bytes in one cycle, then the maximum value of
+ * bufferLength would be N - 5 (firmware will detect EEPROM address).
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param registerAddress the start address of the cells to be read.
+ * @param registerAddressLength the valid bytes of registerAddress.
+ * @param bufferLength the number of cells to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readEepromValues (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            registerAddress,
+    IN  Byte            bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Read bits of the specified register.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param registerAddress the address of the register to be read.
+ * @param position the start position of bits to be read (0 means the
+ *        LSB of the specifyed register).
+ * @param length the length of bits.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_readRegisterBits (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            position,
+    IN  Byte            length,
+    OUT Byte*           value
+);
+
+
+/**
+ * Send the command to device.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param command the command to be send.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param processor The processor of specified register. Because each chip
+ *        has two processor so user have to specify the processor. The
+ *        possible values are Processor_LINK and Processor_OFDM.
+ * @param writeBufferLength the number of registers to be write.
+ * @param writeBuffer a byte array which is used to store values to be write.
+ * @param readBufferLength the number of registers to be read.
+ * @param readBuffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_sendCommand (
+    IN  Demodulator*    demodulator,
+    OUT Word            command,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ * Get the version of hardware.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param version the version of hardware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getHardwareVersion (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          version
+);
+
+
+/**
+ * Get the version of firmware.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param version the version of firmware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getFirmwareVersion (
+    IN  Demodulator*    demodulator,
+    IN  Processor       processor,
+    OUT Dword*          version
+);
+
+
+/**
+ * Get RF AGC gain.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param rfAgc the value of RF AGC.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getRfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           rfAgc
+);
+
+
+/**
+ * Get IF AGC gain.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param ifAgc the value of IF AGC.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getIfAgcGain (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           ifAgc
+);
+
+
+/**
+ * Load the IR table for USB device.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param tableLength The length of IR table.
+ * @param table The content of IR table.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_loadIrTable (
+    IN  Demodulator*    demodulator,
+    IN  Word            tableLength,
+    IN  Byte*           table
+);
+
+
+/**
+ * Program the bandwidth related parameters to demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param bandwidth DVB channel bandwidth in MHz. The possible values
+ *        are 5, 6, 7, and 8 (MHz).
+ * @param adcFrequency The value of desire internal ADC frequency (Hz).
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_selectBandwidth (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,          /** KHz                 */
+    IN  Dword           adcFrequency        /** Hz, ex: 20480000    */
+);
+
+
+/**
+ * Mask DCA output.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_maskDcaOutput (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Load firmware to device
+ *
+ * @param demodulator the handle of demodulator.
+ * @streamType current stream type (useless for Ganymede).
+ * @firmwareCodes pointer to fw binary.
+ * @firmwareSegments pointer to fw segments.
+ * @firmwarePartitions pointer to fw partition (useless for Ganymede).
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_loadFirmware (
+    IN  Demodulator*    demodulator,
+    IN  Byte*           firmwareCodes,
+    IN  Segment*        firmwareSegments,
+    IN  Byte*           firmwarePartitions
+);
+
+/**
+ * First, download firmware from host to demodulator. Actually, firmware is
+ * put in firmware.h as a part of source code. Therefore, in order to
+ * update firmware the host have to re-compile the source code.
+ * Second, setting all parameters which will be need at the beginning.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chipNumber The total number of demodulators.
+ * @param sawBandwidth SAW filter bandwidth in MHz. The possible values
+ *        are 6000, 7000, and 8000 (KHz).
+ * @param streamType The format of output stream.
+ * @param architecture the architecture of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_initialize (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chipNumber,
+    IN  Word            sawBandwidth,
+    IN  StreamType      streamType,
+    IN  Architecture    architecture
+);
+
+
+/**
+ * Power off the demodulators.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_finalize (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isAgcLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isCfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isSfoeLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isTpsLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isMpeg2Locked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param locked the result of frequency tuning. True if there is
+ *        demodulator can lock signal, False otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_isLocked (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Bool*           locked
+);
+
+
+/**
+ * Set priorty of modulation.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param priority modulation priority.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_setPriority (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Priority        priority
+);
+
+
+/**
+ * Reset demodulator.
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_reset (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Get channel modulation related information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param channelModulation The modulation of channel.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ */
+Dword Standard_getChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    OUT ChannelModulation*      channelModulation
+);
+
+
+/**
+ * Set channel modulation related information.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param channelModulation The modulation of channel.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ */
+Dword Standard_setChannelModulation (
+    IN  Demodulator*            demodulator,
+    IN  Byte                    chip,
+    IN  ChannelModulation*      channelModulation
+);
+
+
+/**
+ * Set frequency.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param frequency The desired frequency.
+ * @return Error_NO_ERROR: successful, other non-zero error code otherwise.
+ */
+Dword Standard_setFrequency (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Dword           frequency
+);
+
+
+/**
+ * Specify the bandwidth of channel and tune the channel to the specific
+ * frequency. Afterwards, host could use output parameter dvbH to determine
+ * if there is a DVB-H signal.
+ * In DVB-T mode, after calling this function the output parameter dvbH
+ * should return False and host could use output parameter "locked" to check
+ * if the channel has correct TS output.
+ * In DVB-H mode, after calling this function the output parameter dvbH should
+ * return True and host could start get platform thereafter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param bandwidth The channel bandwidth.
+ *        DVB-T: 5000, 6000, 7000, and 8000 (KHz).
+ *        DVB-H: 5000, 6000, 7000, and 8000 (KHz).
+ *        T-DMB: 5000, 6000, 7000, and 8000 (KHz).
+ *        FM: 100, and 200 (KHz).
+ * @param frequency the channel frequency in KHz.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_acquireChannel (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,
+    IN  Dword           frequency
+);
+
+
+
+/**
+ * Set the output stream type of chip. Because the device could output in
+ * many stream type, therefore host have to choose one type before receive
+ * data.
+ *
+ * Note: Please refer to the example of Standard_acquireChannel when host want
+ *       to detect the available channels.
+ * Note: After host know all the available channels, and want to change to
+ *       specific channel, host have to choose output mode before receive
+ *       data. Please refer the example of Standard_setStreamType.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param streamType the possible values are
+ *        DVB-H:    StreamType_DVBH_DATAGRAM
+ *                  StreamType_DVBH_DATABURST
+ *        DVB-T:    StreamType_DVBT_DATAGRAM
+ *                  StreamType_DVBT_PARALLEL
+ *                  StreamType_DVBT_SERIAL
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_setStreamType (
+    IN  Demodulator*    demodulator,
+    IN  StreamType      streamType
+);
+
+
+/**
+ * Set the architecture of chip. When two of our device are using, they could
+ * be operated in Diversity Combine Architecture (DCA) or (PIP). Therefore,
+ * host could decide which mode to be operated.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param architecture the possible values are
+ *        Architecture_DCA
+ *        Architecture_PIP
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_setArchitecture (
+    IN  Demodulator*    demodulator,
+    IN  Architecture    architecture
+);
+
+
+/**
+ * Set the counting range for Post-Viterbi and Post-Viterbi.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param postErrorCount the number of super frame for Pre-Viterbi.
+ * @param postBitCount the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getPostVitBer (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Dword*          postErrorCount, /** 24 bits */
+    OUT Dword*          postBitCount,   /** 16 bits */
+    OUT Word*           abortCount
+);
+
+
+/**
+ * Get siganl quality.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param quality The value of signal quality.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getSignalQuality (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           quality
+);
+
+
+/**
+ * Get siganl strength.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param strength The value of signal strength.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getSignalStrength (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Byte*           strength
+);
+
+
+/**
+ * Get signal strength in dbm
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param rfpullUpVolt_X10 the pullup voltag of RF multiply 10.
+ * @param ifpullUpVolt_X10 the pullup voltag of IF multiply 10.
+ * @param strengthDbm The value of signal strength in DBm.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getSignalStrengthDbm (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Long            rfpullUpVolt_X10,     /** RF pull up voltage multiplied by 10   */
+    IN  Long            ifpullUpVolt_X10,     /** IF pull up voltage multiplied by 10   */
+    OUT Long*           strengthDbm           /** DBm                                   */
+);
+
+
+/**
+ * Set the counting range for Pre-Viterbi and Post-Viterbi.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7. NOTE: When the architecture is set to Architecture_DCA
+ *        this parameter is regard as don't care.
+ * @param frameCount the number of super frame for Pre-Viterbi.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_setStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            superFrameCount,
+    IN  Word            packetUnit
+);
+
+
+/**
+ * Get the counting range for Pre-Viterbi and Post-Viterbi.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param frameCount the number of super frame for Pre-Viterbi.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getStatisticRange (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte*           frameCount,
+    IN  Word*           packetUnit
+);
+
+
+/**
+ * Get the statistic values of demodulator, it includes Pre-Viterbi BER,
+ * Post-Viterbi BER, Abort Count, Signal Presented Flag, Signal Locked Flag,
+ * Signal Quality, Signal Strength, Delta-T for DVB-H time slicing.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param statistic the structure that store all statistic values.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getStatistic (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    OUT Statistic*      statistic
+);
+
+
+/**
+ * Get interrupt status.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param interrupts the type of interrupts.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getInterrupts (
+    IN  Demodulator*    demodulator,
+    OUT Interrupts*     interrupts
+);
+
+
+/**
+ * Clear interrupt status.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param interrupt interrupt name.
+ * @param packetUnit the number of packet unit for Post-Viterbi.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_clearInterrupt (
+    IN  Demodulator*    demodulator,
+    IN  Interrupt       interrupt
+);
+
+
+/**
+ * Get data length.
+ * In DVB-T mode, data length should always equals 2K,
+ * In DVB-H mode, data length would be the length of IP datagram.
+ * NOTE: data can't be transfer via I2C bus, in order to transfer data
+ * host must provide SPI bus.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param dataLength the length of data.
+ * @param valid True if the data length is valid.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getDataLength (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          dataLength,
+    OUT Bool*           valid
+);
+
+
+/**
+ * Get DVB-T data.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength the length of buffer.
+ * @param buffer buffer used to get Data.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_getData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Get datagram from device.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength the number of registers to be read.
+ * @param buffer a byte array which is used to store values to be read.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_BUFFER_INSUFFICIENT: if buffer is too small.
+ */
+Dword Standard_getDatagram (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param code the value of IR raw code, the size should be 4 or 6,
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_getIrCode (
+    IN  Demodulator*    demodulator,
+    OUT Dword*          code
+);
+
+
+/**
+ * Return to boot code
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_reboot (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param contorl 1: Power up, 0: Power down;
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_controlPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param contorl 1: Power up, 0: Power down;
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_controlTunerPowerSaving (
+    IN  Demodulator*    demodulator,
+    IN  Byte            control
+);
+
+
+/**
+ *
+ * @param demodulator the handle of demodulator.
+ * @param code the address of function pointer in firmware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_runCode (
+    IN  Demodulator*    demodulator,
+    IN  Word            code
+);
+
+
+/**
+ * Control PID fileter
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param contorl 0: Disable, 1: Enable.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @example <pre>
+ * </pre>
+ */
+Dword Standard_controlPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            control
+);
+
+
+/**
+ * Reset PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_resetPidFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ * Add PID to PID filter.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param chip The index of demodulator. The possible values are
+ *        0~7.
+ * @param pid the PID that will be add to PID filter.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+Dword Standard_addPidToFilter (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            index,
+    IN  Pid             pid
+);
+
+
+/**
+ * Set datagram burst size.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param burstSize the burst size.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_NOT_SUPPORT: if the burst size is not support.
+ */
+Dword Standard_setBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize       burstSize
+);
+
+
+/**
+ * Get datagram burst size.
+ *
+ * @param demodulator the handle of demodulator.
+ * @param burstSize the burst size.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ * @return Error_NOT_SUPPORT: if the burst size is not support.
+ */
+Dword Standard_getBurstSize (
+    IN  Demodulator*    demodulator,
+    IN  BurstSize*      burstSize
+);
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_type.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_type.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_type.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_type.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,968 @@
+#ifndef __TYPE_H__
+#define __TYPE_H__
+
+#include <linux/module.h>
+#include "a867_userdef.h"// for Linux
+
+
+//#define IN
+//#define OUT
+//#define INOUT
+
+//j010+s
+#define TS_PACKET_COUNT 44
+//j010+e
+
+
+/**
+ * The type of handle.
+ */
+typedef void* Handle;
+
+
+/**
+ * The type defination of 8-bits unsigned type.
+ */
+typedef unsigned char Byte;
+
+
+/**
+ * The type defination of 16-bits unsigned type.
+ */
+typedef unsigned short Word;
+
+
+/**
+ * The type defination of 32-bits unsigned type.
+ */
+typedef unsigned int Dword;
+
+
+/**
+ * The type defination of 16-bits signed type.
+ */
+typedef short Short;
+
+
+/**
+ * The type defination of 32-bits signed type.
+ */
+typedef int Long;
+
+
+
+#include "a867_inttype.h"        /** release1remove */
+
+/**
+ * The type defination of Bool
+ */
+typedef enum {
+    False = 0,
+    True = 1
+} Bool;
+
+
+/**
+ * The type defination of Segment
+ */
+typedef struct {
+    Byte segmentType;           /** 0:Firmware download 1:Rom copy 2:Direct command */
+    Dword segmentLength;
+} Segment;
+
+
+/**
+ * The type defination of Bandwidth.
+ */
+typedef enum {
+    Bandwidth_6M = 0,           /** Signal bandwidth is 6MHz */
+    Bandwidth_7M,               /** Signal bandwidth is 7MHz */
+    Bandwidth_8M,               /** Signal bandwidth is 8MHz */
+    Bandwidth_5M                /** Signal bandwidth is 5MHz */
+} Bandwidth;
+
+
+/**
+ * The type defination of TransmissionMode.
+ */
+typedef enum {
+    TransmissionMode_2K = 0,    /** OFDM frame consists of 2048 different carriers (2K FFT mode) */
+    TransmissionMode_8K = 1,    /** OFDM frame consists of 8192 different carriers (8K FFT mode) */
+    TransmissionMode_4K = 2     /** OFDM frame consists of 4096 different carriers (4K FFT mode) */
+} TransmissionModes;
+
+
+/**
+ * The type defination of Constellation.
+ */
+typedef enum {
+    Constellation_QPSK = 0,     /** Signal uses QPSK constellation  */
+    Constellation_16QAM,        /** Signal uses 16QAM constellation */
+    Constellation_64QAM         /** Signal uses 64QAM constellation */
+} Constellation;
+
+
+/**
+ * The type defination of Interval.
+ */
+typedef enum {
+    Interval_1_OVER_32 = 0,     /** Guard interval is 1/32 of symbol length */
+    Interval_1_OVER_16,         /** Guard interval is 1/16 of symbol length */
+    Interval_1_OVER_8,          /** Guard interval is 1/8 of symbol length  */
+    Interval_1_OVER_4           /** Guard interval is 1/4 of symbol length  */
+} Interval;
+
+
+/**
+ * The type defination of Priority.
+ */
+typedef enum {
+    Priority_HIGH = 0,          /** DVB-T and DVB-H - identifies high-priority stream */
+    Priority_LOW                /** DVB-T and DVB-H - identifies low-priority stream  */
+} Priority;
+
+
+/**
+ * The type defination of CodeRate.
+ */
+typedef enum {
+    CodeRate_1_OVER_2 = 0,      /** Signal uses FEC coding ratio of 1/2 */
+    CodeRate_2_OVER_3,          /** Signal uses FEC coding ratio of 2/3 */
+    CodeRate_3_OVER_4,          /** Signal uses FEC coding ratio of 3/4 */
+    CodeRate_5_OVER_6,          /** Signal uses FEC coding ratio of 5/6 */
+    CodeRate_7_OVER_8,          /** Signal uses FEC coding ratio of 7/8 */
+    CodeRate_NONE               /** None, NXT doesn't have this one     */
+} CodeRate;
+
+
+/**
+ * TPS Hierarchy and Alpha value.
+ */
+typedef enum {
+    Hierarchy_NONE = 0,         /** Signal is non-hierarchical        */
+    Hierarchy_ALPHA_1,          /** Signalling format uses alpha of 1 */
+    Hierarchy_ALPHA_2,          /** Signalling format uses alpha of 2 */
+    Hierarchy_ALPHA_4           /** Signalling format uses alpha of 4 */
+} Hierarchy;
+
+
+/**
+ * The defination of SubchannelType.
+ */
+typedef enum {
+    SubchannelType_AUDIO = 0,           /** Signal in subchannel is audio format          */
+    SubchannelType_VIDEO = 1,           /** Signal in subchannel is video format          */
+    SubchannelType_PACKET = 3,          /** Signal in subchannel is packet format         */
+    SubchannelType_ENHANCEPACKET = 4    /** Signal in subchannel is enhance packet format */
+} SubchannelType;
+
+
+/**
+ * The defination of ProtectionLevel.
+ */
+typedef enum {
+    ProtectionLevel_NONE = 0x00,    /** The protection level of subchannel is none     */
+    ProtectionLevel_PL1 = 0x01,     /** The protection level of subchannel is level 1  */
+    ProtectionLevel_PL2 = 0x02,     /** The protection level of subchannel is level 2  */
+    ProtectionLevel_PL3 = 0x03,     /** The protection level of subchannel is level 3  */
+    ProtectionLevel_PL4 = 0x04,     /** The protection level of subchannel is level 4  */
+    ProtectionLevel_PL5 = 0x05,     /** The protection level of subchannel is level 5  */
+    ProtectionLevel_PL1A = 0x1A,    /** The protection level of subchannel is level 1A */
+    ProtectionLevel_PL2A = 0x2A,    /** The protection level of subchannel is level 2A */
+    ProtectionLevel_PL3A = 0x3A,    /** The protection level of subchannel is level 3A */
+    ProtectionLevel_PL4A = 0x4A,    /** The protection level of subchannel is level 4A */
+    ProtectionLevel_PL1B = 0x1B,    /** The protection level of subchannel is level 1B */
+    ProtectionLevel_PL2B = 0x2B,    /** The protection level of subchannel is level 2B */
+    ProtectionLevel_PL3B = 0x3B,    /** The protection level of subchannel is level 3B */
+    ProtectionLevel_PL4B = 0x4B     /** The protection level of subchannel is level 4B */
+} ProtectionLevel;
+
+
+/**
+ * The defination of ChannelInformation.
+ */
+typedef struct {
+    Dword frequency;                    /** Channel frequency in KHz.                                */
+    TransmissionModes transmissionMode; /** Number of carriers used for OFDM signal                  */
+    Constellation constellation;        /** Constellation scheme (FFT mode) in use                   */
+    Interval interval;                  /** Fraction of symbol length used as guard (Guard Interval) */
+    Priority priority;                  /** The priority of stream                                   */
+    CodeRate highCodeRate;              /** FEC coding ratio of high-priority stream                 */
+    CodeRate lowCodeRate;               /** FEC coding ratio of low-priority stream                  */
+    Hierarchy hierarchy;                /** Hierarchy levels of OFDM signal                          */
+    Bandwidth bandwidth;
+} ChannelModulation;
+
+
+/**
+ * The defination of SubchannelModulation. This structure is used to
+ * represent subchannel modulation when device is operate in T-DMB/DAB mode.
+ *
+ */
+typedef struct {
+    Byte subchannelId;                  /** The ID of subchannel.                                                 */
+    Word subchannelSize;                /** The size of subchannel.                                               */
+    Word bitRate;                       /** The bit rate of subchannel.                                           */
+    Byte transmissionMode;              /** The transmission mode of subchannel, possible values are: 1, 2, 3, 4. */
+    ProtectionLevel protectionLevel;    /** The protection level of subchannel.                                   */
+    SubchannelType subchannelType;      /** The type of subchannel                                                */
+    Byte conditionalAccess;             /** If a conditional access exist                                         */
+    Byte tiiPrimary;                    /** TII primary                                                           */
+    Byte tiiCombination;                /** TII combination                                                       */
+} SubchannelModulation;
+
+
+/**
+ * The type defination of IpVersion.
+ */
+typedef enum {
+    IpVersion_IPV4 = 0,         /** The IP version if IPv4 */
+    IpVersion_IPV6 = 1          /** The IP version if IPv6 */
+} IpVersion;
+
+
+/**
+ * The type defination of Ip.
+ */
+typedef struct {
+    IpVersion version;          /** The version of IP. See the defination of IpVersion.                                               */
+    Priority priority;          /** The priority of IP. See the defination of Priority.                                               */
+    Bool cache;                 /** True: IP datagram will be cached in device's buffer. Fasle: IP datagram will be transfer to host. */
+    Byte address[16];           /** The byte array to store IP address.                                                               */
+} Ip;
+
+
+/**
+ * The type defination of Platform.
+ * Mostly used is in DVB-H standard
+ */
+typedef struct {
+    Dword platformId;           /** The ID of platform.                                    */
+    char iso639LanguageCode[3]; /** The ISO 639 language code for platform name.           */
+    Byte platformNameLength;    /** The length of platform name.                           */
+    char platformName[32];      /** The char array to store platform name.                 */
+    Word bandwidth;             /** The operating channel bandwith of this platform.       */
+    Dword frequency;            /** The operating channel frequency of this platform.      */
+    Byte* information;          /** The extra information about this platform.             */
+    Word informationLength;     /** The length of information.                             */
+    Bool hasInformation;        /** The flag to indicate if there exist extra information. */
+    IpVersion ipVersion;        /** The IP version of this platform.                       */
+} Platform;
+
+
+/**
+ * The type defination of Label.
+ */
+typedef struct {
+    Byte charSet;
+    Word charFlag;
+    Byte string[16];
+} Label;
+
+
+/**
+ * The type defination of Ensemble.
+ */
+typedef struct {
+    Word ensembleId;
+    Label ensembleLabel;
+    Byte totalServices;
+} Ensemble;
+
+
+/**
+ * The type defination of Service.
+ * Mostly used is in T-DMB standard
+ */
+typedef struct {
+    Byte serviceType;       /** Service Type(P/D): 0x00: Program, 0x80: Data */
+    Dword serviceId;
+    Dword frequency;
+    Label serviceLabel;
+    Byte totalComponents;
+} Service;
+
+
+/**
+ * The type defination of Service Component.
+ */
+typedef struct {
+    Byte serviceType;           /** Service Type(P/D): 0x00: Program, 0x80: Data         */
+    Dword serviceId;            /** Service ID                                           */
+    Word componentId;           /** Stream audio/data is subchid, packet mode is SCId    */
+    Byte componentIdService;    /** Component ID within Service                          */
+    Label componentLabel;       /** The label of component. See the defination of Label. */
+    Byte language;              /** Language code                                        */
+    Byte primary;               /** Primary/Secondary                                    */
+    Byte conditionalAccess;     /** Conditional Access flag                              */
+    Byte componentType;         /** Component Type (A/D)                                 */
+    Byte transmissionId;        /** Transmission Mechanism ID                            */
+} Component;
+
+
+/**
+ * The type defination of Target.
+ */
+typedef enum {
+    SectionType_MPE = 0,        /** Stands for MPE data.                                         */
+    SectionType_SIPSI,          /** Stands for SI/PSI table, but don't have to specify table ID. */
+    SectionType_TABLE           /** Stands for SI/PSI table.                                     */
+} SectionType;
+
+
+/**
+ * The type defination of FrameRow.
+ */
+typedef enum {
+    FrameRow_256 = 0,           /** There should be 256 rows for each column in MPE-FEC frame.  */
+    FrameRow_512,               /** There should be 512 rows for each column in MPE-FEC frame.  */
+    FrameRow_768,               /** There should be 768 rows for each column in MPE-FEC frame.  */
+    FrameRow_1024               /** There should be 1024 rows for each column in MPE-FEC frame. */
+} FrameRow;
+
+
+/**
+ * The type defination of Pid.
+ *
+ * In DVB-T mode, only value is valid. In DVB-H mode,
+ * as sectionType = SectionType_SIPSI: only value is valid.
+ * as sectionType = SectionType_TABLE: both value and table is valid.
+ * as sectionType = SectionType_MPE: except table all other fields is valid.
+ */
+typedef struct {
+    Byte table;                 /** The table ID. Which is used to filter specific SI/PSI table.                                  */
+    Byte duration;              /** The maximum burst duration. It can be specify to 0xFF if user don't know the exact value.     */
+    FrameRow frameRow;          /** The frame row of MPE-FEC. It means the exact number of rows for each column in MPE-FEC frame. */
+    SectionType sectionType;    /** The section type of pid. See the defination of SectionType.                                   */
+    Priority priority;          /** The priority of MPE data. Only valid when sectionType is set to SectionType_MPE.              */
+    IpVersion version;          /** The IP version of MPE data. Only valid when sectionType is set to SectionType_MPE.            */
+    Bool cache;                 /** True: MPE data will be cached in device's buffer. Fasle: MPE will be transfer to host.        */
+    Word value;                 /** The 13 bits Packet ID.                                                                        */
+} Pid;
+
+
+/**
+ * The type defination of ValueSet.
+ */
+typedef struct {
+    Dword address;      /** The address of target register */
+    Byte value;         /** The value of target register   */
+} ValueSet;
+
+
+/**
+ * The type defination of Datetime.
+ */
+typedef struct {
+    Dword mjd;              /** The mjd of datetime           */
+    Byte configuration;     /** The configuration of datetime */
+    Byte hours;             /** The hours of datetime         */
+    Byte minutes;           /** The minutes of datetime       */
+    Byte seconds;           /** The seconds of datetime       */
+    Word milliseconds;      /** The milli seconds of datetime */
+} Datetime;
+
+
+/**
+ * The type defination of Interrupts.
+ */
+typedef Word Interrupts;
+
+
+/**
+ * The type defination of Interrupt.
+ */
+typedef enum {
+    Interrupt_NONE      = 0x0000,   /** No interrupt. */
+    Interrupt_SIPSI     = 0x0001,
+    Interrupt_DVBH      = 0x0002,
+    Interrupt_DVBT      = 0x0004,
+    Interrupt_PLATFORM  = 0x0008,
+    Interrupt_VERSION   = 0x0010,
+    Interrupt_FREQUENCY = 0x0020,
+    Interrupt_SOFTWARE1 = 0x0040,
+    Interrupt_SOFTWARE2 = 0x0080,
+    Interrupt_FIC       = 0x0100,
+    Interrupt_MSC       = 0x0200,
+    Interrupt_MCISI     = 0x0400
+} Interrupt;
+
+
+/**
+ * The type defination of Multiplier.
+ */
+typedef enum {
+    Multiplier_1X = 0,
+    Multiplier_2X
+} Multiplier;
+
+
+/**
+ * The type defination of StreamType.
+ */
+typedef enum {
+    StreamType_NONE = 0,        /** Invalid (Null) StreamType                */
+    StreamType_DVBT_DATAGRAM,   /** DVB-T mode, store data in device buffer  */
+    StreamType_DVBT_PARALLEL,   /** DVB-T mode, output via paralle interface */
+    StreamType_DVBT_SERIAL,     /** DVB-T mode, output via serial interface  */
+} StreamType;
+
+
+/**
+ * The type defination of StreamType.
+ */
+typedef enum {
+    Architecture_NONE = 0,      /** Inavalid (Null) Architecture.                                    */
+    Architecture_DCA,           /** Diversity combine architecture. Only valid when chip number > 1. */
+    Architecture_PIP            /** Picture in picture. Only valid when chip number > 1.             */
+} Architecture;
+
+
+/**
+ * The type defination of ClockTable.
+ */
+typedef struct {
+    Dword crystalFrequency;     /** The frequency of crystal. */
+    Dword adcFrequency;         /** The frequency of ADC.     */
+} ClockTable;
+
+
+/**
+ * The type defination of BandTable.
+ */
+typedef struct {
+    Dword minimum;          /** The minimum frequency of this band */
+    Dword maximum;          /** The maximum frequency of this band */
+} BandTable;
+
+
+/**
+ * The type defination of MeanTable.
+ */
+typedef struct {
+    Dword mean;
+    Dword errorCount;
+} MeanTable;
+
+
+/**
+ * The type defination of Polarity.
+ */
+typedef enum {
+    Polarity_NORMAL = 0,
+    Polarity_INVERSE
+} Polarity;
+
+
+/**
+ * The type defination of Processor.
+ */
+typedef enum {
+    Processor_LINK = 0,
+    Processor_OFDM = 8
+} Processor;
+
+
+/**
+ * The type defination of BurstSize.
+ */
+typedef enum {
+    BurstSize_1024 = 0,
+    BurstSize_2048,
+    BurstSize_4096
+} BurstSize;
+
+
+/**
+ * The type defination of Demodulator.
+ */
+typedef struct {
+    Handle userData;
+    Handle driver;
+} Demodulator;
+
+
+#include "a867_user.h"
+
+
+/**
+ * The type defination of Statistic.
+ */
+typedef struct {
+    Bool signalPresented;       /** Signal is presented.                                                                         */
+    Bool signalLocked;          /** Signal is locked.                                                                            */
+    Byte signalQuality;         /** Signal quality, from 0 (poor) to 100 (good).                                                 */
+    Byte signalStrength;        /** Signal strength from 0 (weak) to 100 (strong).                                               */
+    Byte frameErrorRatio;       /** Frame Error Ratio (error ratio before MPE-FEC), from 0 (no error) to 100 (all error).        */
+    Byte mpefecFrameErrorRatio; /** MPE-FEC Frame Error Ratio (error ratio after MPE-FEC). from 0 (no error) to 100 (all error). */
+} Statistic;
+
+
+/**
+ * General demodulator register-write function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be written.
+ * @param bufferLength number, 1-8, of registers to be written.
+ * @param buffer buffer used to store values to be written to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*WriteRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+/**
+ * General demodulator register-read function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*WriteScatterRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    IN  ValueSet*       valueSets
+);
+
+
+/**
+ * General tuner register-write function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be written.
+ * @param bufferLength number, 1-8, of registers to be written.
+ * @param buffer buffer used to store values to be written to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*WriteTunerRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+/**
+ * General write EEPROM function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be written.
+ * @param buffer buffer used to store values to be written to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*WriteEepromValues) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            writeBufferLength,
+    IN  Byte*           writeBuffer
+);
+
+
+/**
+ * General demodulator register-read function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ReadRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ * General demodulator register-read function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ReadScatterRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Byte            valueSetsAddressLength,
+    IN  Byte            valueSetsLength,
+    OUT ValueSet*       valueSets
+);
+
+
+/**
+ * General tuner register-read function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ReadTunerRegisters) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            tunerAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    IN  Byte*           readBuffer
+);
+
+
+/**
+ * General read EEPROM function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ReadEepromValues) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Byte            eepromAddress,
+    IN  Word            registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ * General demodulator register-read function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ModifyRegister) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           registerAddress,
+    IN  Byte            registerAddressLength,
+    IN  Byte            position,
+    IN  Byte            length,
+    IN  Byte            value
+);
+
+
+/**
+ * General load firmware function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param length The length of firmware.
+ * @param firmware The byte array of firmware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*LoadFirmware) (
+    IN  Demodulator*    demodulator,
+    IN  Dword           firmwareLength,
+    IN  Byte*           firmware
+);
+
+
+/**
+ * General reboot function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param length The length of firmware.
+ * @param firmware The byte array of firmware.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*Reboot) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ * Find and Get bus handle used to control bus
+ *
+ * @param demodulator the handle of demodulator.
+ * @param handle The bus handle.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*GetBus) (
+    IN  Demodulator*    demodulator,
+    OUT Handle*         handle
+);
+
+
+/**
+ * Find and Get bus handle used to control bus
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength The length to transmit.
+ * @param buffer The buffer which we store the data to send.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*BusTx) (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Find and Get bus handle used to control bus
+ *
+ * @param demodulator the handle of demodulator.
+ * @param bufferLength The length to transmit.
+ * @param buffer The buffer which we store the data to send.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*BusRx) (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Find and Get bus handle used to control bus
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress The starting address of memory to get.
+ * @param readBufferLength The length of buffer to receive data.
+ * @param readBuffer The buffer use to store received data
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*BusRxData) (
+    IN  Demodulator*    demodulator,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+/**
+ * General send command function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param command The command which you wan.
+ * @param valueLength value length.
+ * @param valueBuffer value buffer.
+ * @param referenceLength reference length.
+ * @param referenceBuffer reference buffer.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*SendCommand) (
+    IN  Demodulator*    demodulator,
+    IN  Word            command,
+    IN  Byte            chip,
+    IN  Processor       processor,
+    IN  Dword           writeBufferLength,
+    IN  Byte*           writeBuffer,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ * General read EEPROM function
+ *
+ * @param demodulator the handle of demodulator.
+ * @param registerAddress address of register to be read.
+ * @param bufferLength number, 1-8, of registers to be read.
+ * @param buffer buffer used to store values to be read to specified
+ *        registers.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*ReceiveData) (
+    IN  Demodulator*    demodulator,
+    IN  Dword           registerAddress,
+    IN  Dword           readBufferLength,
+    OUT Byte*           readBuffer
+);
+
+
+/**
+ * The type defination of BusDescription
+ */
+typedef struct {
+    GetBus              getBus;
+    BusTx               busTx;
+    BusRx               busRx;
+    BusRxData           busRxData;
+} BusDescription;
+
+
+/**
+ * The type defination of BusDescription
+ */
+typedef struct {
+    Dword                   mailBoxSize;
+    BusDescription*         busDescription;
+    WriteRegisters          writeRegisters;
+    WriteScatterRegisters   writeScatterRegisters;
+    WriteTunerRegisters     writeTunerRegisters;
+    WriteEepromValues       writeEepromValues;
+    ReadRegisters           readRegisters;
+    ReadScatterRegisters    readScatterRegisters;
+    ReadTunerRegisters      readTunerRegisters;
+    ReadEepromValues        readEepromValues;
+    ModifyRegister          modifyRegister;
+    LoadFirmware            loadFirmware;
+    Reboot                  reboot;
+    SendCommand             sendCommand;
+    ReceiveData             receiveData;
+} CmdDescription;
+
+
+/**
+ * General tuner opening function
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*OpenTuner) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ * General tuner closing function
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*CloseTuner) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip
+);
+
+
+/**
+ * General tuner setting function
+ *
+ * @param demodulator the handle of demodulator.
+ * @return Error_NO_ERROR: successful, non-zero error code otherwise.
+ */
+typedef Dword (*SetTuner) (
+    IN  Demodulator*    demodulator,
+    IN  Byte            chip,
+    IN  Word            bandwidth,
+    IN  Dword           frequency
+);
+
+
+/**
+ * The type defination of TunerDescription
+ */
+typedef struct {
+    OpenTuner       openTuner;
+    CloseTuner      closeTuner;
+    SetTuner        setTuner;
+    ValueSet*       tunerScript;
+    Word*           tunerScriptSets;
+    Byte            tunerAddress;
+    Byte            registerAddressLength;
+    Dword           ifFrequency;
+    Bool            inversion;
+    Word			tunerId;
+} TunerDescription;
+
+
+/**
+ * The data structure of DefaultDemodulator
+ */
+typedef struct {
+    /** Basic structure */
+    Handle userData;
+    Handle driver;
+    Dword options;
+    Word busId;
+    CmdDescription* cmdDescription;
+    Word tunerId;
+    TunerDescription *tunerDescription;
+} DefaultDemodulator;
+
+
+/**
+ * The data structure of Ganymede
+ */
+typedef struct {
+    /** Basic structure */
+    Handle userData;
+    Handle driver;
+    Dword options;
+    Word busId;
+    CmdDescription* cmdDescription;
+    TunerDescription *tunerDescription;
+    Byte* firmwareCodes;
+    Segment* firmwareSegments;
+    Byte* firmwarePartitions;
+    Word* scriptSets;
+    ValueSet* scripts;
+    Word* tunerScriptSets;
+    ValueSet* tunerScripts;
+    Byte chipNumber;
+    Dword crystalFrequency;
+    Dword adcFrequency;
+    StreamType streamType;
+    Architecture architecture;
+    Word bandwidth[2];
+    Dword frequency[2];
+    Dword fcw;
+    Statistic statistic[2];
+    ChannelStatistic channelStatistic[2];   /** release1remove */
+    Byte hostInterface[2];
+    Bool booted;
+    Bool initialized;
+
+    /** DVB-T structure */
+    Bool dataReady;
+    BurstSize burstSize;
+
+    Byte GPIO8Value[2];
+} Ganymede;
+
+
+extern const Byte Standard_bitMask[8];
+#define REG_MASK(pos, len)                (Standard_bitMask[len-1] << pos)
+#define REG_CLEAR(temp, pos, len)         (temp & (~REG_MASK(pos, len)))
+#define REG_CREATE(val, temp, pos, len)   ((val << pos) | (REG_CLEAR(temp, pos, len)))
+#define REG_GET(value, pos, len)          ((value & REG_MASK(pos, len)) >> pos)
+#define LOWBYTE(w)      ((Byte)((w) & 0xff))
+#define HIGHBYTE(w)     ((Byte)((w >> 8) & 0xff))
+
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb2impl.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb2impl.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb2impl.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb2impl.c	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,171 @@
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)  
+#include <linux/autoconf.h>
+#else
+#include <generated/autoconf.h>
+#endif
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kref.h>
+#include <linux/usb.h>
+#include <asm/uaccess.h>
+#include <linux/device.h>
+#include <linux/string.h>
+#include <linux/firmware.h>
+#include <linux/delay.h>
+#include <linux/vmalloc.h>
+
+#include "a867_usb2impl.h"
+#include "a867_af903x.h"
+
+#ifdef UNDER_CE
+
+Handle Usb2_handle = NULL;
+
+
+Dword Usb2_getDriver (
+	IN  Demodulator*	demodulator,
+	OUT Handle*			handle
+) {
+	return (Error_NO_ERROR);
+}
+
+
+Dword Usb2_writeControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	IN  Byte*			buffer
+) {
+	return (Error_NO_ERROR);
+}
+
+
+Dword Usb2_readControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+) {
+	return (Error_NO_ERROR);
+}
+
+
+Dword Usb2_readDataBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+) {
+	return (Error_NO_ERROR);
+}
+
+#else
+
+#ifndef _WIN32_WINNT
+#define _WIN32_WINNT 0x0500
+#endif
+
+Handle Usb2_handle = 0;
+/*
+bool (__cdecl *Usb2_initialize) (
+);
+void (__cdecl *Usb2_finalize) (
+);
+bool (__cdecl *Usb2_writeControl) (
+	Byte*		poutBuf,
+	unsigned long		WriteLen,
+	unsigned long*		pnBytesWrite
+); 
+bool (__cdecl *Usb2_readControl) (
+	Byte*		pinBuf,
+	unsigned long		ReadLen,
+	unsigned long*		pnBytesRead
+);
+bool (__cdecl *Usb2_readData) (
+	BYTE*		pinBuf,
+	ULONG		ReadLen
+);
+*/
+
+Dword Usb2_getDriver (
+	IN  Demodulator*	demodulator,
+	OUT Handle*			handle
+) {
+	Dword error = Error_NO_ERROR;
+/*
+	HINSTANCE instance = NULL;
+
+    instance = LoadLibrary ("AF15BDAEX.dll");
+    Usb2_initialize = (bool (__cdecl *) (
+			)) GetProcAddress (instance, "af15_init");
+    Usb2_finalize = (void (__cdecl *) (
+			)) GetProcAddress (instance, "af15_exit");
+	Usb2_writeControl = (bool (__cdecl *) (
+					BYTE*		poutBuf,
+					ULONG		WriteLen,
+					ULONG*		pnBytesWrite
+			)) GetProcAddress (instance, "af15_WriteBulkData");
+    Usb2_readControl = (bool (__cdecl *) (
+					BYTE*		pinBuf,
+					ULONG		ReadLen,
+					ULONG*		pnBytesRead
+			)) GetProcAddress (instance, "af15_ReadBulkData");
+    Usb2_readData = (bool (__cdecl *) (
+					BYTE*		pinBuf,
+					ULONG		ReadLen
+			)) GetProcAddress (instance, "af15_GetTsData");
+
+	if (!Usb2_initialize ())
+		error = Error_DRIVER_INVALID;
+			
+	*handle = (Handle) instance;
+*/
+	return (error);
+}
+
+
+Dword Usb2_writeControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	IN  Byte*			buffer
+) {
+//    Ganymede *pGanymede = (Ganymede *)demodulator;
+    Dword     ret,act_len;
+	    		ret = usb_bulk_msg(usb_get_dev(udevs),
+			usb_sndbulkpipe(usb_get_dev(udevs), 0x02),
+			buffer,
+			bufferLength,
+			&act_len,
+			1000);
+    
+	return (Error_NO_ERROR);
+}
+
+
+Dword Usb2_readControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+) {
+//    Ganymede *pGanymede = (Ganymede *)demodulator;
+	Dword     ret, nBytesRead;
+   ret = usb_bulk_msg(usb_get_dev(udevs),
+				usb_rcvbulkpipe(usb_get_dev(udevs),129),
+				buffer,
+				255,
+				&nBytesRead,
+				1000);
+    
+	return (Error_NO_ERROR);
+}
+
+
+Dword Usb2_readDataBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+) {
+	return (Error_NO_ERROR);
+}
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb2impl.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb2impl.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb2impl.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb2impl.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,38 @@
+#ifndef __USB2IMPL_H__
+#define __USB2IMPL_H__
+
+
+#include "a867_type.h"
+#include "a867_error.h"
+#include "a867_user.h"
+#include "a867_cmd.h"
+
+
+Dword Usb2_getDriver (
+	IN  Demodulator*	demodulator,
+	OUT Handle*			handle
+);
+
+
+Dword Usb2_writeControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	IN  Byte*			buffer
+);
+
+
+Dword Usb2_readControlBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+);
+
+
+Dword Usb2_readDataBus (
+	IN  Demodulator*	demodulator,
+	IN  Dword			bufferLength,
+	OUT Byte*			buffer
+);
+
+#endif
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb-urb.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb-urb.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_usb-urb.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_usb-urb.c	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,247 @@
+/* usb-urb.c is part of the DVB USB library.
+ *
+ * Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@desy.de)
+ * see dvb-usb-init.c for copyright information.
+ *
+ * This file keeps functions for initializing and handling the
+ * BULK and ISOC USB data transfers in a generic way.
+ * Can be used for DVB-only and also, that's the plan, for
+ * Hybrid USB devices (analog and DVB).
+ */
+#include "dvb-usb-common.h"
+
+/* URB stuff for streaming */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static void usb_urb_complete(struct urb *urb, struct pt_regs *ptregs)
+#else
+static void usb_urb_complete(struct urb *urb)
+#endif
+{
+	struct usb_data_stream *stream = urb->context;
+	int ptype = usb_pipetype(urb->pipe);
+	int i;
+	u8 *b;
+
+	deb_uxfer("'%s' urb completed. status: %d, length: %d/%d, pack_num: %d, errors: %d\n",
+		ptype == PIPE_ISOCHRONOUS ? "isoc" : "bulk",
+		urb->status,urb->actual_length,urb->transfer_buffer_length,
+		urb->number_of_packets,urb->error_count);
+
+	switch (urb->status) {
+		case 0:         /* success */
+		case -ETIMEDOUT:    /* NAK */
+			break;
+		case -ECONNRESET:   /* kill */
+		case -ENOENT:
+		case -ESHUTDOWN:
+			return;
+		default:        /* error */
+			deb_ts("urb completition error %d.\n", urb->status);
+			break;
+	}
+
+	b = (u8 *) urb->transfer_buffer;
+	switch (ptype) {
+		case PIPE_ISOCHRONOUS:
+			for (i = 0; i < urb->number_of_packets; i++) {
+
+				if (urb->iso_frame_desc[i].status != 0)
+					deb_ts("iso frame descriptor has an error: %d\n",urb->iso_frame_desc[i].status);
+				else if (urb->iso_frame_desc[i].actual_length > 0)
+					stream->complete(stream, b + urb->iso_frame_desc[i].offset, urb->iso_frame_desc[i].actual_length);
+
+				urb->iso_frame_desc[i].status = 0;
+				urb->iso_frame_desc[i].actual_length = 0;
+			}
+			debug_dump(b,20,deb_uxfer);
+			break;
+		case PIPE_BULK:
+			if (urb->actual_length > 0)
+				stream->complete(stream, b, urb->actual_length);
+			break;
+		default:
+			err("unkown endpoint type in completition handler.");
+			return;
+	}
+	usb_submit_urb(urb,GFP_ATOMIC);
+}
+
+int usb_urb_kill(struct usb_data_stream *stream)
+{
+	int i;
+	for (i = 0; i < stream->urbs_submitted; i++) {
+		deb_ts("killing URB no. %d.\n",i);
+
+		/* stop the URB */
+		usb_kill_urb(stream->urb_list[i]);
+	}
+	stream->urbs_submitted = 0;
+	return 0;
+}
+
+int usb_urb_submit(struct usb_data_stream *stream)
+{
+	int i,ret;
+	for (i = 0; i < stream->urbs_initialized; i++) {
+		deb_ts("submitting URB no. %d\n",i);
+		if ((ret = usb_submit_urb(stream->urb_list[i],GFP_ATOMIC))) {
+			err("could not submit URB no. %d - get them all back",i);
+			usb_urb_kill(stream);
+			return ret;
+		}
+		stream->urbs_submitted++;
+	}
+	return 0;
+}
+
+static int usb_free_stream_buffers(struct usb_data_stream *stream)
+{
+	if (stream->state & USB_STATE_URB_BUF) {
+		while (stream->buf_num) {
+			stream->buf_num--;
+			deb_mem("freeing buffer %d\n",stream->buf_num);
+			usb_buffer_free(stream->udev, stream->buf_size,
+					stream->buf_list[stream->buf_num], stream->dma_addr[stream->buf_num]);
+		}
+	}
+
+	stream->state &= ~USB_STATE_URB_BUF;
+
+	return 0;
+}
+
+static int usb_allocate_stream_buffers(struct usb_data_stream *stream, int num, unsigned long size)
+{
+	stream->buf_num = 0;
+	stream->buf_size = size;
+
+	deb_mem("all in all I will use %lu bytes for streaming\n",num*size);
+
+	for (stream->buf_num = 0; stream->buf_num < num; stream->buf_num++) {
+		deb_mem("allocating buffer %d\n",stream->buf_num);
+		if (( stream->buf_list[stream->buf_num] =
+					usb_buffer_alloc(stream->udev, size, GFP_ATOMIC,
+					&stream->dma_addr[stream->buf_num]) ) == NULL) {
+			deb_mem("not enough memory for urb-buffer allocation.\n");
+			usb_free_stream_buffers(stream);
+			return -ENOMEM;
+		}
+		deb_mem("buffer %d: %p (dma: %Lu)\n",
+			stream->buf_num,
+stream->buf_list[stream->buf_num], (long long)stream->dma_addr[stream->buf_num]);
+		memset(stream->buf_list[stream->buf_num],0,size);
+		stream->state |= USB_STATE_URB_BUF;
+	}
+	deb_mem("allocation successful\n");
+
+	return 0;
+}
+
+static int usb_bulk_urb_init(struct usb_data_stream *stream)
+{
+	int i;
+
+	if ((i = usb_allocate_stream_buffers(stream,stream->props.count,
+					stream->props.u.bulk.buffersize)) < 0)
+		return i;
+
+	/* allocate the URBs */
+	for (i = 0; i < stream->props.count; i++) {
+		if ((stream->urb_list[i] = usb_alloc_urb(0,GFP_ATOMIC)) == NULL)
+			return -ENOMEM;
+
+		usb_fill_bulk_urb( stream->urb_list[i], stream->udev,
+				usb_rcvbulkpipe(stream->udev,stream->props.endpoint),
+				stream->buf_list[i],
+				stream->props.u.bulk.buffersize,
+				usb_urb_complete, stream);
+
+		stream->urb_list[i]->transfer_flags = 0;
+		stream->urbs_initialized++;
+	}
+	return 0;
+}
+
+static int usb_isoc_urb_init(struct usb_data_stream *stream)
+{
+	int i,j;
+
+	if ((i = usb_allocate_stream_buffers(stream,stream->props.count,
+					stream->props.u.isoc.framesize*stream->props.u.isoc.framesperurb)) < 0)
+		return i;
+
+	/* allocate the URBs */
+	for (i = 0; i < stream->props.count; i++) {
+		struct urb *urb;
+		int frame_offset = 0;
+		if ((stream->urb_list[i] =
+					usb_alloc_urb(stream->props.u.isoc.framesperurb,GFP_ATOMIC)) == NULL)
+			return -ENOMEM;
+
+		urb = stream->urb_list[i];
+
+		urb->dev = stream->udev;
+		urb->context = stream;
+		urb->complete = usb_urb_complete;
+		urb->pipe = usb_rcvisocpipe(stream->udev,stream->props.endpoint);
+		urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
+		urb->interval = stream->props.u.isoc.interval;
+		urb->number_of_packets = stream->props.u.isoc.framesperurb;
+		urb->transfer_buffer_length = stream->buf_size;
+		urb->transfer_buffer = stream->buf_list[i];
+		urb->transfer_dma = stream->dma_addr[i];
+
+		for (j = 0; j < stream->props.u.isoc.framesperurb; j++) {
+			urb->iso_frame_desc[j].offset = frame_offset;
+			urb->iso_frame_desc[j].length = stream->props.u.isoc.framesize;
+			frame_offset += stream->props.u.isoc.framesize;
+		}
+
+		stream->urbs_initialized++;
+	}
+	return 0;
+}
+
+int usb_urb_init(struct usb_data_stream *stream, struct usb_data_stream_properties *props)
+{
+	if (stream == NULL || props == NULL)
+		return -EINVAL;
+
+	memcpy(&stream->props, props, sizeof(*props));
+
+	usb_clear_halt(stream->udev,usb_rcvbulkpipe(stream->udev,stream->props.endpoint));
+
+	if (stream->complete == NULL) {
+		err("there is no data callback - this doesn't make sense.");
+		return -EINVAL;
+	}
+
+	switch (stream->props.type) {
+		case USB_BULK:
+			return usb_bulk_urb_init(stream);
+		case USB_ISOC:
+			return usb_isoc_urb_init(stream);
+		default:
+			err("unkown URB-type for data transfer.");
+			return -EINVAL;
+	}
+}
+
+int usb_urb_exit(struct usb_data_stream *stream)
+{
+	int i;
+
+	usb_urb_kill(stream);
+
+	for (i = 0; i < stream->urbs_initialized; i++) {
+		if (stream->urb_list[i] != NULL) {
+			deb_mem("freeing URB no. %d.\n",i);
+			/* free the URBs */
+			usb_free_urb(stream->urb_list[i]);
+		}
+	}
+	stream->urbs_initialized = 0;
+
+	usb_free_stream_buffers(stream);
+	return 0;
+}
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_user.c linux-3.4.3/drivers/media/dvb/dvb-usb/a867_user.c
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_user.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_user.c	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,236 @@
+#include "a867_user.h"
+#include "a867_af903x.h"
+
+
+/**
+ * Handle for specific bus driver
+ */
+Handle User_handle = NULL;
+
+
+/**
+ * Totoal number of chip
+ */
+Byte User_chipNumber;
+
+
+/**
+ * Current index of chip
+ */
+Byte User_chipIndex;
+
+
+/**
+ * Variable of critical section
+ */
+
+Dword User_memoryCopy (
+    IN  Demodulator*    demodulator,
+    IN  void*           dest,
+    IN  void*           src,
+    IN  Dword           count
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  memcpy(dest, src, (size_t)count);
+	 *  return (0);
+     */
+	//memcpy (dest, src, (size_t)count);
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_memoryFree (
+	IN  Demodulator*	demodulator,
+	IN  void*			mem
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  free(pMem);
+	 *  return (0);
+     */
+	//free (mem);
+	//ExFreePool(mem);
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_printf (
+	IN  Demodulator*	demodulator,
+	IN  const char*		format, 
+	IN  ...
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  va_list arg;
+     *
+     *  va_start(arg, format);
+     *  vprintf(format, arg);
+     *  va_end(arg);
+     *  return (0);
+     */
+	return (Error_NO_ERROR);
+}
+
+
+Dword User_delay (
+    IN  Demodulator*    demodulator,
+	IN  Dword			dwMs
+) {	
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  delay(dwMs);
+     *  return (0);
+     */
+    //Sleep (dwMs);
+	unsigned long j = (HZ*dwMs)/1000;
+	set_current_state(TASK_UNINTERRUPTIBLE);
+	schedule_timeout(j);
+
+	return (Error_NO_ERROR);
+}
+
+
+Dword User_createCriticalSection (
+	IN  Demodulator*	demodulator
+) {
+    /*
+     *  ToDo:  Add code here 
+     *
+     *  //Pseudo code
+     *  return (0);
+     */
+	return (Error_NO_ERROR);
+}
+
+
+Dword User_deleteCriticalSection (
+	IN  Demodulator*	demodulator
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  return (0);
+     */
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_enterCriticalSection (
+    IN  Demodulator*    demodulator
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  return (0);
+     */
+    PDEVICE_CONTEXT PDC = (PDEVICE_CONTEXT)demodulator->userData;
+    if( PDC ) {
+	    down(&PDC->regLock); 
+    }
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_leaveCriticalSection (
+    IN  Demodulator*    demodulator
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  return (0);
+     */
+
+    PDEVICE_CONTEXT PDC = (PDEVICE_CONTEXT)demodulator->userData;
+    if( PDC ) {
+	    up(&PDC->regLock); 
+    }
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_mpegConfig (
+    IN  Demodulator*    demodulator
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     */
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_busTx (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    IN  Byte*           buffer
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  short i;
+     *
+     *  start();
+     *  write_i2c(uc2WireAddr);
+     *  ack();
+     *  for (i = 0; i < bufferLength; i++) {
+     *      write_i2c(*(ucpBuffer + i));
+     *      ack();
+     *  }
+     *  stop();
+     *
+     *  // If no error happened return 0, else return error code.
+     *  return (0);
+     */
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_busRx (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+) {
+    /*
+     *  ToDo:  Add code here
+     *
+     *  //Pseudo code
+     *  short i;
+     *
+     *  start();
+     *  write_i2c(uc2WireAddr | 0x01);
+     *  ack();
+     *  for (i = 0; i < bufferLength - 1; i++) {
+     *      read_i2c(*(ucpBuffer + i));
+     *      ack();
+     *  }
+     *  read_i2c(*(ucpBuffer + bufferLength - 1));
+     *  nack();
+     *  stop();
+     *
+     *  // If no error happened return 0, else return error code.
+     *  return (0);
+     */
+    return (Error_NO_ERROR);
+}
+
+
+Dword User_busRxData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+) {
+    return (Error_NO_ERROR);
+}
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_userdef.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_userdef.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_userdef.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_userdef.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,25 @@
+#ifndef _USERDEF_H_
+#define _USERDEF_H_
+
+
+//typedef     unsigned char   BYTE;      // 1 byte
+//typedef     unsigned short  WORD;      // 2 bytes
+//typedef     unsigned long   DWORD;     // 4 bytes
+typedef     int             INT;       // 4 bytes
+//typedef     void *          HANDLE;
+
+//#define NULL    0
+
+#ifdef IN
+#undef IN
+#endif
+
+#ifdef OUT
+#undef OUT
+#endif
+
+#define IN  
+#define OUT
+#define INOUT
+
+#endif // _USERDEF_H_
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_user.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_user.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_user.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_user.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,155 @@
+#ifndef __USER_H__
+#define __USER_H__
+
+
+//#include <stdio.h>
+#include "a867_type.h"
+#include "a867_error.h"
+//#include <linux/smp_lock.h> //for Linux mdelay
+#include <linux/delay.h> //for Linux mdelay
+
+
+
+#define User_USE_INTERRUPT              0
+#define User_USE_DRIVER                 0
+
+/** Define timeout count for acquirePlatform and setPlatform, the default value 300 means 30 seconds. */
+#define User_TIMEOUT_COUNT			300
+
+/** Define I2C master speed, the default value 0x0D means 197KHz (1000000000 / (24.4 * 16 * User_I2C_SPEED)). */
+#define User_I2C_SPEED              0x0D
+
+/** Define I2C address of secondary chip when Diversity mode or PIP mode is active. */
+#define User_I2C_ADDRESS			0x3A//0x38
+
+/** Define USB frame size */
+#define User_USB20_MAX_PACKET_SIZE      512
+//j010+s
+//#define User_USB20_FRAME_SIZE           (188 * 348)
+#define User_USB20_FRAME_SIZE           (188 * TS_PACKET_COUNT)
+//j010+e
+#define User_USB20_FRAME_SIZE_DW        (User_USB20_FRAME_SIZE / 4)
+#define User_USB11_MAX_PACKET_SIZE      64
+#define User_USB11_FRAME_SIZE           (188 * 21)
+#define User_USB11_FRAME_SIZE_DW        (User_USB11_FRAME_SIZE / 4)
+
+typedef     unsigned char   tBYTE;      // 1 byte
+typedef     unsigned short  tWORD;      // 2 bytes
+typedef     unsigned int	tDWORD;     // 4 bytes
+typedef     int             tINT;       // 4 bytes
+typedef     void *          tHANDLE;
+
+/**
+ * Memory copy Function
+ */
+Dword User_memoryCopy (
+    IN  Demodulator*    demodulator,
+    IN  void*           dest,
+    IN  void*           src,
+    IN  Dword           count
+);
+
+
+/**
+ * Memory free Function
+ */
+Dword User_memoryFree (
+	IN  Demodulator*	demodulator,
+	IN  void*			mem
+);
+
+
+/**
+ * Print Function
+ */
+Dword User_printf (
+	IN  Demodulator*	demodulator,
+	IN  const char*		format, 
+	IN  ...
+);
+
+
+/**
+ * Delay Function
+ */
+Dword User_delay (
+    IN  Demodulator*    demodulator,
+	IN  Dword			dwMs
+);
+
+
+/**
+ * Creat and initialize critical section
+ */
+Dword User_createCriticalSection (
+	IN  Demodulator*	demodulator
+);
+
+
+/**
+ * Delete critical section
+ */
+Dword User_deleteCriticalSection (
+	IN  Demodulator*	demodulator
+);
+
+
+/**
+ * Enter critical section
+ */
+Dword User_enterCriticalSection (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Leave critical section
+ */
+Dword User_leaveCriticalSection (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Config MPEG2 interface
+ */
+Dword User_mpegConfig (
+    IN  Demodulator*    demodulator
+);
+
+
+/**
+ * Write data via "Control Bus"
+ * I2C mode : uc2WireAddr mean demodulator chip address, the default value is 0x38
+ * USB mode : uc2WireAddr is useless, don't have to send this data
+ */
+Dword User_busTx (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    IN  Byte*           buffer
+);
+
+
+/**
+ * Read data via "Control Bus"
+ * I2C mode : uc2WireAddr mean demodulator chip address, the default value is 0x38
+ * USB mode : uc2WireAddr is useless, don't have to send this data
+ */
+Dword User_busRx (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+);
+
+
+/**
+ * Read data via "Data Bus"
+ * I2C mode : uc2WireAddr mean demodulator chip address, the default value is 0x38
+ * USB mode : uc2WireAddr is useless, don't have to send this data
+ */
+Dword User_busRxData (
+    IN  Demodulator*    demodulator,
+    IN  Dword           bufferLength,
+    OUT Byte*           buffer
+);
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_variable.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_variable.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_variable.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_variable.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,260 @@
+#ifndef __VARIABLE_H__
+#define __VARIABLE_H__
+//this file define variable which initialized by AP
+//CFOE------------------------------------------
+
+//These variables are initialized by API.
+//Don't change the order of the definition of these variables.
+
+
+//2k
+//BASE Address 0x418B
+#define var_addr_base                       0x418b
+#define log_addr_base                       0x418d
+#define log_data_base                       0x418f
+// Do NOT touch the following line: used by script
+// --- @xx++ Start variable block
+//Initialization..
+//API relative
+//BASE Address 0x0000
+#define trigger_ofsm                        0x0000
+#define cfoe_NS_2048_coeff1_25_24           0x0001
+#define cfoe_NS_2048_coeff1_23_16           0x0002
+#define cfoe_NS_2048_coeff1_15_8            0x0003
+#define cfoe_NS_2048_coeff1_7_0             0x0004
+#define cfoe_NS_2k_coeff2_24                0x0005
+#define cfoe_NS_2k_coeff2_23_16             0x0006
+#define cfoe_NS_2k_coeff2_15_8              0x0007
+#define cfoe_NS_2k_coeff2_7_0               0x0008
+
+//8k..
+
+#define cfoe_NS_8191_coeff1_25_24           0x0009
+#define cfoe_NS_8191_coeff1_23_16           0x000a
+#define cfoe_NS_8191_coeff1_15_8            0x000b
+#define cfoe_NS_8191_coeff1_7_0             0x000c
+#define cfoe_NS_8192_coeff1_25_24           0x000d
+#define cfoe_NS_8192_coeff1_23_16           0x000e
+#define cfoe_NS_8192_coeff1_15_8            0x000f
+#define cfoe_NS_8192_coeff1_7_0             0x0010
+#define cfoe_NS_8193_coeff1_25_24           0x0011
+#define cfoe_NS_8193_coeff1_23_16           0x0012
+#define cfoe_NS_8193_coeff1_15_8            0x0013
+#define cfoe_NS_8193_coeff1_7_0             0x0014
+
+#define cfoe_NS_8k_coeff2_24                0x0015
+#define cfoe_NS_8k_coeff2_23_16             0x0016
+#define cfoe_NS_8k_coeff2_15_8              0x0017
+#define cfoe_NS_8k_coeff2_7_0               0x0018
+
+//4k
+#define cfoe_NS_4096_coeff1_25_24           0x0019
+#define cfoe_NS_4096_coeff1_23_16           0x001a
+#define cfoe_NS_4096_coeff1_15_8            0x001b
+#define cfoe_NS_4096_coeff1_7_0             0x001c
+#define cfoe_NS_4k_coeff2_24                0x001d
+#define cfoe_NS_4k_coeff2_23_16             0x001e
+#define cfoe_NS_4k_coeff2_15_8              0x001f
+#define cfoe_NS_4k_coeff2_7_0               0x0020
+
+#define bfsfcw_fftindex_ratio_7_0           0x0021
+#define bfsfcw_fftindex_ratio_15_8          0x0022
+#define fftindex_bfsfcw_ratio_7_0           0x0023
+#define fftindex_bfsfcw_ratio_15_8          0x0024
+
+
+
+#define crystal_clk_7_0                     0x0025
+#define crystal_clk_15_8                    0x0026
+#define crystal_clk_23_16                   0x0027
+#define crystal_clk_31_24                   0x0028
+
+
+#define bfs_fcw_7_0                         0x0029
+#define bfs_fcw_15_8                        0x002a
+#define bfs_fcw_22_16                       0x002b
+
+//----------------------------------------------
+//statistic performance..
+
+#define qnt_vbc_err_7_0                     0x002c  //snr
+#define qnt_vbc_err_15_8                    0x002d  //snr
+#define qnt_vbc_err_23_16                   0x002e  //snr
+#define r_qnt_vbc_sframe_num                0x002f
+#define tpsd_const                          0x0030
+#define tpsd_txmod                          0x0031
+ 
+#define rsd_abort_packet_cnt_7_0            0x0032
+#define rsd_abort_packet_cnt_15_8           0x0033
+#define rsd_bit_err_cnt_7_0                 0x0034
+#define rsd_bit_err_cnt_15_8                0x0035
+#define rsd_bit_err_cnt_23_16               0x0036
+#define r_rsd_packet_unit_7_0               0x0037
+#define r_rsd_packet_unit_15_8              0x0038
+
+#define qnt_vbc_sframe_num                  0x0039
+#define rsd_packet_unit_7_0                 0x003a
+#define rsd_packet_unit_15_8                0x003b
+
+#define tpsd_lock                           0x003c
+#define mpeg_lock                           0x003d
+#define RsdSequence                         0x003e
+#define VtbSequence                         0x003f
+
+#define Training_Mode                       0x0040
+#define RESET_STATE                         0x0041
+#define unplug_flg                          0x0042
+#define aci_0                               0x0043
+#define aci_1                               0x0044
+
+#define adcx2                               0x0045
+#define tuner_ID                            0x0046
+#define empty_channel_status                0x0047
+#define signal_strength                     0x0048
+#define signal_quality                      0x0049
+#define est_rf_level_dbm                    0x004a
+#define FreBand                             0x004b
+#define suspend_flag                        0x004c
+//GUI relative
+//Initial OFSM
+#define API_Reserved                        0x004d
+#define var_ofsm_state                      0x004e
+#define OfdmGuiRCN_H                        0x004f
+#define OfdmGuiRCN_L                        0x0050
+#define antenna_unplugged                   0x0051
+#define strong_signal_detected              0x0052
+#define channelFlatnessInd                  0x0053
+#define Flatness_Ind_nonCmb                 0x0054
+#define AutoDetectedSpectrumInv             0x0055
+#define IsSpectrumInv                       0x0056
+#define strong_detect_bypass                0x0057
+#define ss_dtop_bypass                      0x0058
+#define retrain_dtop_bypass                 0x0059
+#define EnableTimeSlice                     0x005a
+#define SynchronizationType                 0x005b
+#define ApplyFastSynchronizationToEchoChannel 0x005c
+#define ApplyPwmToRfIf                      0x005d
+#define ChannelNo                           0x005e
+
+//release to AAGC document..
+#define csi_bypass                          0x005f
+#define mobile_bypass                       0x0060
+#define EnableSpeedLog                      0x0061
+
+//regression used only..
+#define r_rsd_abort_total_packet_7_0        0x0062
+#define r_rsd_abort_total_packet_15_8       0x0063
+#define r_rsd_abort_total_packet_23_16      0x0064
+#define MaxRsdSequence                      0x0065
+#define RsdFrameNo                          0x0066
+#define MPESuperFrameNo                     0x0067
+
+#define AgcDesiredLevel                     0x0068
+#define MinRfGain                           0x0069
+#define MaxIfGain                           0x006a
+#define RssiOffset                          0x006b
+#define RssiResidual                        0x006c
+//Dtop
+
+#define strong_weak_signal_default          0x006d
+#define unplug_th                           0x006e
+#define afe_mem4_rssi_comp                  0x006f
+
+#define aagc_speed_detect_count             0x0070
+#define aagc_mobile_thr                     0x0071
+#define aagc_nonmobile_thr                  0x0072
+#define agc_counter                         0x0073
+#define DisableAagcTop                      0x0074
+#define AgcReset                            0x0075
+#define AgcUp                               0x0076
+#define AgcDown                             0x0077
+#define AgcHold                             0x0078
+#define PwmCtrlHw                           0x0079
+#define MaxAgcGain                          0x007a
+#define IniAgcGain                          0x007b
+#define mccid_bypass                        0x007c
+#define CdpfEnDefaultEchoRange              0x007d
+#define CdpfIniTestNo                       0x007e
+#define timing_err_level                    0x007f
+#define timing_retrain_cnt                  0x0080
+#define ChannelDiffThr                      0x0081
+
+#define adjacent_on                         0x0082
+#define near_adjacent_on                    0x0083
+#define adjacent_off                        0x0084
+#define near_adjacent_off                   0x0085
+#define max_rf_agc_7_0                      0x0086
+#define max_rf_agc_9_8                      0x0087
+#define rf_top_numerator_s_7_0              0x0088
+#define rf_top_numerator_s_9_8              0x0089
+
+#define gui_tdi_lms_en                      0x008a
+#define fccid_strobe_scale                  0x008b
+#define fccid_strobe_numerator              0x008c
+#define fccid_strobe_base                   0x008d
+#define use_fccid                           0x008e
+#define fft_ave_symbol_num                  0x008f
+#define large_tone_num_th_7_0               0x0090
+#define large_tone_num_th_15_8              0x0091
+#define use_3m_lpf_th                       0x0092
+#define ce_var_min_8k                       0x0093
+#define ce_var_min_4k                       0x0094
+#define ce_var_min_2k                       0x0095
+#define ce_var_min_8k_non_flat              0x0096
+#define flatness_thr                        0x0097
+#define non_mobile_signal_level_offset      0x0098
+#define gui_ar_csi_en                       0x0099
+#define h2_echo_detected                    0x009a
+#define signal_strength_rf_high             0x009b
+#define signal_strength_rf_low              0x009c
+#define signal_strength_if_high             0x009d
+#define signal_strength_if_low              0x009e
+//flatness
+#define flatness_thr_high                   0x009f
+#define flatness_thr_low                    0x00a0
+
+//softbit quality
+#define sbq1                                0x00a1
+#define sbq2                                0x00a2
+
+//DCA
+#define dyna_dca_offset_en                  0x00a3
+#define dca_sbq_bad_th                      0x00a4
+#define detect_timing_err_en                0x00a5
+#define flatness_from_h2_echo               0x00a6
+
+#define timging_error_detection             0x00a7
+#define ce_forced_by_rotate                 0x00a8
+#define fccid_fft_mask_en                   0x00a9
+#define second_fctrl_unforce_en             0x00aa
+#define force_fdi0_at_high_mobile_en        0x00ab
+#define high_mobile_detected                0x00ac
+#define flatness_detection_en               0x00ad
+#define ChooseFsteCostFunctionFromCdpf      0x00ae
+#define signal_level                        0x00af
+#define TryConf2En                          0x00b0
+#define Lower_tpsd_lock                     0x00b1
+#define Upper_tpsd_lock                     0x00b2
+
+#define AgcCtrlType                         0x00b3
+#define opt_LNA_Rssi_scale                  0x00b4
+#define StopByTcl                           0x00b5
+#define RssiCalibration                     0x00b6
+#define AciDesiredSignalLevel_h             0x00b7
+#define AciDesiredSignalLevel_l             0x00b8
+#define ECO_ASIC                            0x00b9
+#define NXP_USE_I2C                         0x00ba
+#define rf_freqency_23_16                   0x00bb
+#define rf_freqency_15_8                    0x00bc
+#define rf_freqency_7_0                     0x00bd
+#define iqik_en                             0x00be
+#define dcc_en                              0x00bf
+#define VHFPinEnTh                          0x00c0
+#define ACIdetection                        0x00c1
+#define PinDiode                            0x00c2
+#define LNA_Gain                            0x00c3
+#define RSSI_LNA_ON                         0x00c4
+#define var_end                             0x00c5
+
+//BASE Address 0xFFFF
+#endif
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_version.h linux-3.4.3/drivers/media/dvb/dvb-usb/a867_version.h
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/a867_version.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/a867_version.h	2012-06-18 11:00:36.194010953 +0200
@@ -0,0 +1,3 @@
+#define Version_NUMBER		0x0200
+#define Version_DATE		0x20080314
+#define Version_BUILD		0x01
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/Kconfig linux-3.4.3/drivers/media/dvb/dvb-usb/Kconfig
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/Kconfig	2012-06-18 10:59:38.574010924 +0200
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/Kconfig	2012-06-18 11:00:36.194010953 +0200
@@ -414,6 +414,13 @@
 	help
 	  Say Y here to support the MxL111SF USB2.0 DTV receiver.
 
+config DVB_USB_A867
+       tristate "Avermedia A867 DVB support"
+       depends on DVB_USB
+       default m
+       help
+         Say Y here to support the Avermedia A867 device
+
 config DVB_USB_RTL28XXU
 	tristate "Realtek RTL28xxU DVB USB support"
 	depends on DVB_USB && EXPERIMENTAL
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/Kconfig.rej linux-3.4.3/drivers/media/dvb/dvb-usb/Kconfig.rej
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/Kconfig.rej	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/Kconfig.rej	2012-06-18 11:00:41.574010957 +0200
@@ -0,0 +1,14 @@
+--- drivers/media/dvb/dvb-usb/Kconfig
++++ drivers/media/dvb/dvb-usb/Kconfig
+@@ -415,3 +415,11 @@
+ 	select VIDEO_TVEEPROM
+ 	help
+ 	  Say Y here to support the MxL111SF USB2.0 DTV receiver.
++
++config DVB_USB_A867
++	tristate "Avermedia A867 DVB support"
++	depends on DVB_USB
++	default m
++	help
++	  Say Y here to support the Avermedia A867 device
++
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile	2012-06-18 10:59:38.544010924 +0200
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile	2012-06-18 11:00:41.574010957 +0200
@@ -18,6 +18,12 @@
 dvb-usb-a800-objs = a800.o
 obj-$(CONFIG_DVB_USB_A800) += dvb-usb-dibusb-common.o dvb-usb-a800.o
 
+dvb-usb-a867-objs := a867_af903x-core.o a867_af903x-devices.o a867_af903x-drv.o \
+                       a867_af903x-fe.o a867_af903x-tuner.o a867_cmd.o a867_standard.o \
+                       a867_demodulator.o a867_demodulatorextend.o a867_usb2impl.o \
+                       a867_user.o a867_mxl5007t.o a867_Maxlinear_MXL5007.o a867_Afa_AF9007.o
+obj-$(CONFIG_DVB_USB_A867) += dvb-usb-a867.o
+
 dvb-usb-dibusb-mb-objs = dibusb-mb.o
 obj-$(CONFIG_DVB_USB_DIBUSB_MB) += dvb-usb-dibusb-common.o dvb-usb-dibusb-mb.o
 
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile.orig linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile.orig
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile.orig	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile.orig	2012-06-18 11:00:41.574010957 +0200
@@ -0,0 +1,118 @@
+dvb-usb-objs = dvb-usb-firmware.o dvb-usb-init.o dvb-usb-urb.o dvb-usb-i2c.o dvb-usb-dvb.o dvb-usb-remote.o usb-urb.o
+obj-$(CONFIG_DVB_USB) += dvb-usb.o
+
+dvb-usb-vp7045-objs = vp7045.o vp7045-fe.o
+obj-$(CONFIG_DVB_USB_VP7045) += dvb-usb-vp7045.o
+
+dvb-usb-vp702x-objs = vp702x.o vp702x-fe.o
+obj-$(CONFIG_DVB_USB_VP702X) += dvb-usb-vp702x.o
+
+dvb-usb-gp8psk-objs = gp8psk.o gp8psk-fe.o
+obj-$(CONFIG_DVB_USB_GP8PSK) += dvb-usb-gp8psk.o
+
+dvb-usb-dtt200u-objs = dtt200u.o dtt200u-fe.o
+obj-$(CONFIG_DVB_USB_DTT200U) += dvb-usb-dtt200u.o
+
+dvb-usb-dibusb-common-objs = dibusb-common.o
+
+dvb-usb-a800-objs = a800.o
+obj-$(CONFIG_DVB_USB_A800) += dvb-usb-dibusb-common.o dvb-usb-a800.o
+
+dvb-usb-dibusb-mb-objs = dibusb-mb.o
+obj-$(CONFIG_DVB_USB_DIBUSB_MB) += dvb-usb-dibusb-common.o dvb-usb-dibusb-mb.o
+
+dvb-usb-dibusb-mc-objs = dibusb-mc.o
+obj-$(CONFIG_DVB_USB_DIBUSB_MC) += dvb-usb-dibusb-common.o dvb-usb-dibusb-mc.o
+
+dvb-usb-nova-t-usb2-objs = nova-t-usb2.o
+obj-$(CONFIG_DVB_USB_NOVA_T_USB2) += dvb-usb-dibusb-common.o dvb-usb-nova-t-usb2.o
+
+dvb-usb-umt-010-objs = umt-010.o
+obj-$(CONFIG_DVB_USB_UMT_010) += dvb-usb-dibusb-common.o dvb-usb-umt-010.o
+
+dvb-usb-m920x-objs = m920x.o
+obj-$(CONFIG_DVB_USB_M920X) += dvb-usb-m920x.o
+
+dvb-usb-gl861-objs = gl861.o
+obj-$(CONFIG_DVB_USB_GL861) += dvb-usb-gl861.o
+
+dvb-usb-au6610-objs = au6610.o
+obj-$(CONFIG_DVB_USB_AU6610) += dvb-usb-au6610.o
+
+dvb-usb-digitv-objs = digitv.o
+obj-$(CONFIG_DVB_USB_DIGITV) += dvb-usb-digitv.o
+
+dvb-usb-cxusb-objs = cxusb.o
+obj-$(CONFIG_DVB_USB_CXUSB) += dvb-usb-cxusb.o
+
+dvb-usb-ttusb2-objs = ttusb2.o
+obj-$(CONFIG_DVB_USB_TTUSB2) += dvb-usb-ttusb2.o
+
+dvb-usb-dib0700-objs = dib0700_core.o dib0700_devices.o
+obj-$(CONFIG_DVB_USB_DIB0700) += dvb-usb-dib0700.o
+
+dvb-usb-opera-objs = opera1.o
+obj-$(CONFIG_DVB_USB_OPERA1) += dvb-usb-opera.o
+
+dvb-usb-af9005-objs = af9005.o af9005-fe.o
+obj-$(CONFIG_DVB_USB_AF9005) += dvb-usb-af9005.o
+
+dvb-usb-af9005-remote-objs = af9005-remote.o
+obj-$(CONFIG_DVB_USB_AF9005_REMOTE) += dvb-usb-af9005-remote.o
+
+dvb-usb-anysee-objs = anysee.o
+obj-$(CONFIG_DVB_USB_ANYSEE) += dvb-usb-anysee.o
+
+dvb-usb-pctv452e-objs = pctv452e.o
+obj-$(CONFIG_DVB_USB_PCTV452E) += dvb-usb-pctv452e.o
+
+dvb-usb-dw2102-objs = dw2102.o
+obj-$(CONFIG_DVB_USB_DW2102) += dvb-usb-dw2102.o
+
+dvb-usb-dtv5100-objs = dtv5100.o
+obj-$(CONFIG_DVB_USB_DTV5100) += dvb-usb-dtv5100.o
+
+dvb-usb-af9015-objs = af9015.o
+obj-$(CONFIG_DVB_USB_AF9015) += dvb-usb-af9015.o
+
+dvb-usb-cinergyT2-objs = cinergyT2-core.o cinergyT2-fe.o
+obj-$(CONFIG_DVB_USB_CINERGY_T2) += dvb-usb-cinergyT2.o
+
+dvb-usb-ce6230-objs = ce6230.o
+obj-$(CONFIG_DVB_USB_CE6230) += dvb-usb-ce6230.o
+
+dvb-usb-friio-objs = friio.o friio-fe.o
+obj-$(CONFIG_DVB_USB_FRIIO) += dvb-usb-friio.o
+
+dvb-usb-ec168-objs = ec168.o
+obj-$(CONFIG_DVB_USB_EC168) += dvb-usb-ec168.o
+
+dvb-usb-az6007-objs = az6007.o
+obj-$(CONFIG_DVB_USB_AZ6007) += dvb-usb-az6007.o
+
+dvb-usb-az6027-objs = az6027.o
+obj-$(CONFIG_DVB_USB_AZ6027) += dvb-usb-az6027.o
+
+dvb-usb-lmedm04-objs = lmedm04.o
+obj-$(CONFIG_DVB_USB_LME2510) += dvb-usb-lmedm04.o
+
+dvb-usb-technisat-usb2-objs = technisat-usb2.o
+obj-$(CONFIG_DVB_USB_TECHNISAT_USB2) += dvb-usb-technisat-usb2.o
+
+dvb-usb-it913x-objs := it913x.o
+obj-$(CONFIG_DVB_USB_IT913X) += dvb-usb-it913x.o
+
+dvb-usb-mxl111sf-objs = mxl111sf.o mxl111sf-phy.o mxl111sf-i2c.o mxl111sf-gpio.o
+obj-$(CONFIG_DVB_USB_MXL111SF) += dvb-usb-mxl111sf.o
+obj-$(CONFIG_DVB_USB_MXL111SF) += mxl111sf-demod.o
+obj-$(CONFIG_DVB_USB_MXL111SF) += mxl111sf-tuner.o
+
+dvb-usb-rtl28xxu-objs = rtl28xxu.o
+obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o
+
+ccflags-y += -I$(srctree)/drivers/media/dvb/dvb-core
+ccflags-y += -I$(srctree)/drivers/media/dvb/frontends/
+# due to tuner-xc3028
+ccflags-y += -I$(srctree)/drivers/media/common/tuners
+ccflags-y += -I$(srctree)/drivers/media/dvb/ttpci
+
diff -urN linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile.rej linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile.rej
--- linux-3.4.3.org/drivers/media/dvb/dvb-usb/Makefile.rej	1970-01-01 01:00:00.000000000 +0100
+++ linux-3.4.3/drivers/media/dvb/dvb-usb/Makefile.rej	2012-06-18 11:00:41.574010957 +0200
@@ -0,0 +1,15 @@
+--- drivers/media/dvb/dvb-usb/Makefile
++++ drivers/media/dvb/dvb-usb/Makefile
+@@ -109,6 +109,12 @@
+ dvb-usb-af9035-objs = af9035.o
+ obj-$(CONFIG_DVB_USB_AF9035) += dvb-usb-af9035.o
+ 
++dvb-usb-a867-objs := a867_af903x-core.o a867_af903x-devices.o a867_af903x-drv.o \
++			a867_af903x-fe.o a867_af903x-tuner.o a867_cmd.o a867_standard.o \
++			a867_demodulator.o a867_demodulatorextend.o a867_usb2impl.o \
++			a867_user.o a867_mxl5007t.o a867_Maxlinear_MXL5007.o a867_Afa_AF9007.o
++obj-$(CONFIG_DVB_USB_A867) += dvb-usb-a867.o
++
+ ccflags-y += -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/
+ # due to tuner-xc3028
+ ccflags-y += -Idrivers/media/common/tuners